ATE392012T1 - Integrierte schaltung mit mindestens einem kontakthöcker - Google Patents

Integrierte schaltung mit mindestens einem kontakthöcker

Info

Publication number
ATE392012T1
ATE392012T1 AT03758504T AT03758504T ATE392012T1 AT E392012 T1 ATE392012 T1 AT E392012T1 AT 03758504 T AT03758504 T AT 03758504T AT 03758504 T AT03758504 T AT 03758504T AT E392012 T1 ATE392012 T1 AT E392012T1
Authority
AT
Austria
Prior art keywords
contact pad
integrated circuit
mum
signal
processing circuit
Prior art date
Application number
AT03758504T
Other languages
English (en)
Inventor
Heimo Scheucher
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE392012T1 publication Critical patent/ATE392012T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/0502Disposition
    • H01L2224/05022Disposition the internal layer being at least partially embedded in the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05571Disposition the external layer being disposed in a recess of the surface
    • H01L2224/05572Disposition the external layer being disposed in a recess of the surface the external layer extending out of an opening
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
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    • H01L2924/01013Aluminum [Al]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
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    • H01L2924/01022Titanium [Ti]
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    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01061Promethium [Pm]
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    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
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    • H01L2924/01082Lead [Pb]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19042Component type being an inductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30105Capacitance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)
AT03758504T 2002-11-08 2003-10-31 Integrierte schaltung mit mindestens einem kontakthöcker ATE392012T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02102552 2002-11-08

Publications (1)

Publication Number Publication Date
ATE392012T1 true ATE392012T1 (de) 2008-04-15

Family

ID=32309455

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03758504T ATE392012T1 (de) 2002-11-08 2003-10-31 Integrierte schaltung mit mindestens einem kontakthöcker

Country Status (8)

Country Link
US (1) US7247943B2 (de)
EP (1) EP1563537B1 (de)
JP (1) JP2006505933A (de)
CN (1) CN100382293C (de)
AT (1) ATE392012T1 (de)
AU (1) AU2003274530A1 (de)
DE (1) DE60320299T2 (de)
WO (1) WO2004042818A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10337569B4 (de) * 2003-08-14 2008-12-11 Infineon Technologies Ag Integrierte Anschlussanordnung und Herstellungsverfahren
US20080123335A1 (en) * 2006-11-08 2008-05-29 Jong Kun Yoo Printed circuit board assembly and display having the same
EP2168156B1 (de) 2007-07-12 2010-10-20 Nxp B.V. Integrierte schaltungen auf einem wafer und verfahren zur herstellung integrierter schaltungen
US8581423B2 (en) * 2008-11-17 2013-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Double solid metal pad with reduced area
US8293101B2 (en) * 2009-03-13 2012-10-23 Terrasep, Llc Methods and apparatus for centrifugal liquid chromatography
JP5558336B2 (ja) 2010-12-27 2014-07-23 株式会社東芝 半導体装置
US20130320522A1 (en) * 2012-05-30 2013-12-05 Taiwan Semiconductor Manufacturing Company, Ltd. Re-distribution Layer Via Structure and Method of Making Same
JP6111907B2 (ja) * 2013-07-05 2017-04-12 三菱電機株式会社 半導体装置の製造方法
CN105514085B (zh) * 2014-10-14 2018-05-04 中芯国际集成电路制造(上海)有限公司 晶圆、切割晶圆的方法及芯片
CN115132687B (zh) * 2022-09-02 2022-11-22 甬矽电子(宁波)股份有限公司 封装堆叠结构和封装堆叠方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5719448A (en) * 1989-03-07 1998-02-17 Seiko Epson Corporation Bonding pad structures for semiconductor integrated circuits
US5281855A (en) * 1991-06-05 1994-01-25 Trovan Limited Integrated circuit device including means for facilitating connection of antenna lead wires to an integrated circuit die
EP0637840A1 (de) * 1993-08-05 1995-02-08 AT&T Corp. Integrierte Schaltung mit aktiven Elementen unter den Anschlussflächen
JP3432284B2 (ja) * 1994-07-04 2003-08-04 三菱電機株式会社 半導体装置
US5821855A (en) * 1997-02-28 1998-10-13 Lewis; Tommy J. Recognition responsive security system
KR100267105B1 (ko) * 1997-12-09 2000-11-01 윤종용 다층패드를구비한반도체소자및그제조방법
TW430935B (en) * 1999-03-19 2001-04-21 Ind Tech Res Inst Frame type bonding pad structure having a low parasitic capacitance

Also Published As

Publication number Publication date
US7247943B2 (en) 2007-07-24
DE60320299T2 (de) 2009-05-20
EP1563537A1 (de) 2005-08-17
AU2003274530A1 (en) 2004-06-07
CN1711638A (zh) 2005-12-21
WO2004042818A1 (en) 2004-05-21
EP1563537B1 (de) 2008-04-09
DE60320299D1 (de) 2008-05-21
US20060071240A1 (en) 2006-04-06
CN100382293C (zh) 2008-04-16
JP2006505933A (ja) 2006-02-16

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