ATE386982T1 - Vorrichtung zur parallelen datenverarbeitung und kamerasystem mit einer solchen vorrichtung - Google Patents

Vorrichtung zur parallelen datenverarbeitung und kamerasystem mit einer solchen vorrichtung

Info

Publication number
ATE386982T1
ATE386982T1 AT02726365T AT02726365T ATE386982T1 AT E386982 T1 ATE386982 T1 AT E386982T1 AT 02726365 T AT02726365 T AT 02726365T AT 02726365 T AT02726365 T AT 02726365T AT E386982 T1 ATE386982 T1 AT E386982T1
Authority
AT
Austria
Prior art keywords
data
camera system
processors
connections
pixel signals
Prior art date
Application number
AT02726365T
Other languages
English (en)
Inventor
Leonardus Sevat
Cornelis Niessen
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE386982T1 publication Critical patent/ATE386982T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Image Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Solid State Image Pick-Up Elements (AREA)
AT02726365T 2001-05-11 2002-04-29 Vorrichtung zur parallelen datenverarbeitung und kamerasystem mit einer solchen vorrichtung ATE386982T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP01201737 2001-05-11

Publications (1)

Publication Number Publication Date
ATE386982T1 true ATE386982T1 (de) 2008-03-15

Family

ID=8180289

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02726365T ATE386982T1 (de) 2001-05-11 2002-04-29 Vorrichtung zur parallelen datenverarbeitung und kamerasystem mit einer solchen vorrichtung

Country Status (8)

Country Link
US (1) US7274390B2 (de)
EP (1) EP1393198B1 (de)
JP (1) JP4335537B2 (de)
KR (1) KR20030029103A (de)
CN (1) CN1295634C (de)
AT (1) ATE386982T1 (de)
DE (1) DE60225133T2 (de)
WO (1) WO2002093905A2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1648181A1 (de) * 2004-10-12 2006-04-19 Dialog Semiconductor GmbH Einzelbildabspeichervorrichtung
JP4320657B2 (ja) * 2005-12-26 2009-08-26 ソニー株式会社 信号処理装置
GB2436377B (en) * 2006-03-23 2011-02-23 Cambridge Display Tech Ltd Data processing hardware
US8681236B2 (en) * 2009-06-18 2014-03-25 Samsung Electronics Co., Ltd. Apparatus and method for reducing shutter lag of a digital camera
US8648932B2 (en) 2009-08-13 2014-02-11 Olive Medical Corporation System, apparatus and methods for providing a single use imaging device for sterile environments
KR101855158B1 (ko) 2010-03-25 2018-05-08 디퍼이 신테스 프로덕츠, 인코포레이티드 의료 애플리케이션을 위한 1회용 촬상 디바이스를 제공하는 시스템과 방법
CN103650476B (zh) 2011-05-12 2018-05-01 德普伊辛迪斯制品公司 对具有最小纵向互连的混合图像传感器使用堆叠方案的像素阵列区域最优化
KR101863605B1 (ko) 2011-09-19 2018-07-06 삼성전자주식회사 스트림 데이터를 고속으로 처리하는 프로세서
BR112015001369A2 (pt) 2012-07-26 2017-07-04 Olive Medical Corp sistema de câmera com sensor de imagem cmos monolítico de área mínima
CA2906975A1 (en) 2013-03-15 2014-09-18 Olive Medical Corporation Minimize image sensor i/o and conductor counts in endoscope applications
US10517469B2 (en) 2013-03-15 2019-12-31 DePuy Synthes Products, Inc. Image sensor synchronization without input clock and data transmission clock

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4908751A (en) * 1987-10-15 1990-03-13 Smith Harry F Parallel data processor
US4873515A (en) * 1987-10-16 1989-10-10 Evans & Sutherland Computer Corporation Computer graphics pixel processing system
US5187801A (en) * 1990-04-11 1993-02-16 Thinking Machines Corporation Massively-parallel computer system for generating paths in a binomial lattice
JP3513165B2 (ja) * 1992-06-30 2004-03-31 キヤノン株式会社 画像処理装置
KR100391805B1 (ko) * 1994-03-22 2003-10-22 하퍼칩, 인코포레이티드 직접대체셀(cell)을갖는결함허용(faulttolerance)아키텍쳐자료처리시스템
JPH07288824A (ja) * 1994-04-14 1995-10-31 Asahi Optical Co Ltd 輝度信号生成装置
US5590356A (en) * 1994-08-23 1996-12-31 Massachusetts Institute Of Technology Mesh parallel computer architecture apparatus and associated methods
US5943242A (en) * 1995-11-17 1999-08-24 Pact Gmbh Dynamically reconfigurable data processing system
US6421084B1 (en) * 1998-03-02 2002-07-16 Compaq Computer Corporation Method for interpolating a full color image from a single sensor using multiple threshold-based gradients
US6173386B1 (en) * 1998-12-14 2001-01-09 Cisco Technology, Inc. Parallel processor with debug capability
EP1085426B1 (de) * 1999-09-13 2006-01-11 Nippon Telegraph and Telephone Corporation Parallelverarbeitungsvorrichtung und -verfahren
WO2001031473A1 (en) * 1999-10-26 2001-05-03 Arthur D. Little, Inc. Multiplexing n-dimensional mesh connections onto (n + 1) data paths

Also Published As

Publication number Publication date
JP4335537B2 (ja) 2009-09-30
JP2004520767A (ja) 2004-07-08
EP1393198B1 (de) 2008-02-20
WO2002093905A3 (en) 2003-11-20
CN1295634C (zh) 2007-01-17
CN1537284A (zh) 2004-10-13
DE60225133D1 (de) 2008-04-03
EP1393198A2 (de) 2004-03-03
US7274390B2 (en) 2007-09-25
KR20030029103A (ko) 2003-04-11
DE60225133T2 (de) 2009-02-12
WO2002093905A2 (en) 2002-11-21
US20020186311A1 (en) 2002-12-12

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