MXPA04004486A - Procesamiento de matriz para soluciones de sitema lineal. - Google Patents

Procesamiento de matriz para soluciones de sitema lineal.

Info

Publication number
MXPA04004486A
MXPA04004486A MXPA04004486A MXPA04004486A MXPA04004486A MX PA04004486 A MXPA04004486 A MX PA04004486A MX PA04004486 A MXPA04004486 A MX PA04004486A MX PA04004486 A MXPA04004486 A MX PA04004486A MX PA04004486 A MXPA04004486 A MX PA04004486A
Authority
MX
Mexico
Prior art keywords
linear system
array processing
system solutions
processors
processing elements
Prior art date
Application number
MXPA04004486A
Other languages
English (en)
Inventor
Shane Supplee Stephan
Original Assignee
Interdigital Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interdigital Tech Corp filed Critical Interdigital Tech Corp
Publication of MXPA04004486A publication Critical patent/MXPA04004486A/es

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/11—Complex mathematical operations for solving equations, e.g. nonlinear equations, general mathematical optimization problems
    • G06F17/12—Simultaneous equations, e.g. systems of linear equations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7097—Interference-related aspects
    • H04B1/7103—Interference-related aspects the interference being multiple access interference
    • H04B1/7105—Joint detection techniques, e.g. linear detectors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60—Control of cameras or camera modules
    • H04N23/66—Remote control of cameras or camera parts, e.g. by remote control devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60—Control of cameras or camera modules
    • H04N23/667—Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7097—Interference-related aspects
    • H04B1/7103—Interference-related aspects the interference being multiple access interference
    • H04B1/7105—Joint detection techniques, e.g. linear detectors
    • H04B1/71055—Joint detection techniques, e.g. linear detectors using minimum mean squared error [MMSE] detector

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computing Systems (AREA)
  • Operations Research (AREA)
  • Multimedia (AREA)
  • Complex Calculations (AREA)
  • Image Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

La invencion se refiere a la utilizacion de elementos de procesamiento (54-54N) para resolver los sistemas lineales. Una modalidad (figura 3B) proyecta elementos de matriz a lo largo de una diagonal de la matriz sobre elementos de procesamiento escalar, para determinar un factor de Cholesky. Otra modalidad utiliza una matriz escalar bidimensional para determinar un factor de Cholesky. Para matrices que tienen una anchura de banda limitada, pueden ser utilizados los procesadores (54-54N) para reducir el numero de procesadores utilizados.
MXPA04004486A 2001-11-14 2002-11-13 Procesamiento de matriz para soluciones de sitema lineal. MXPA04004486A (es)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US33295001P 2001-11-14 2001-11-14
US8318902A 2002-02-26 2002-02-26
US10/172,113 US7218624B2 (en) 2001-11-14 2002-06-14 User equipment and base station performing data detection using a scalar array
PCT/US2002/036553 WO2003043236A1 (en) 2001-11-14 2002-11-13 Array processing for linear system solutions

Publications (1)

Publication Number Publication Date
MXPA04004486A true MXPA04004486A (es) 2004-08-11

Family

ID=27374484

Family Applications (1)

Application Number Title Priority Date Filing Date
MXPA04004486A MXPA04004486A (es) 2001-11-14 2002-11-13 Procesamiento de matriz para soluciones de sitema lineal.

Country Status (11)

Country Link
US (2) US7218624B2 (es)
EP (1) EP1444798A4 (es)
JP (3) JP2005509959A (es)
KR (9) KR100809993B1 (es)
CN (3) CN1582544A (es)
CA (1) CA2466684A1 (es)
DE (2) DE20217636U1 (es)
MX (1) MXPA04004486A (es)
NO (1) NO20042407L (es)
TW (6) TWI268667B (es)
WO (1) WO2003043236A1 (es)

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US7657846B2 (en) * 2004-04-23 2010-02-02 Microsoft Corporation System and method for displaying stack icons
US20060083291A1 (en) * 2004-10-15 2006-04-20 Zheng Hongming Receiver apparatus, and associated method, for operating upon data communicated in a MIMO, multi-code, MC-CDMA communication system
US7633913B2 (en) * 2004-11-05 2009-12-15 Nextel Communications Inc. Wireless communication system using joint detection to compensate for poor RF condition based on user priority
CN100383781C (zh) * 2004-11-26 2008-04-23 北京天碁科技有限公司 乔列斯基分解算法装置
US7924778B2 (en) * 2005-08-12 2011-04-12 Nextel Communications Inc. System and method of increasing the data throughput of the PDCH channel in a wireless communication system
JP4172807B2 (ja) * 2006-09-08 2008-10-29 インターナショナル・ビジネス・マシーンズ・コーポレーション 障害発生の原因箇所の発見を支援する技術
US8589467B2 (en) * 2007-11-22 2013-11-19 Nec Corporation Systolic array and calculation method
KR100986178B1 (ko) * 2008-06-16 2010-10-07 유택성 파워엘이디가 구비된 가로등
KR100986179B1 (ko) * 2008-06-16 2010-10-07 유택성 가로등용 파워엘이디 모듈
US8417758B1 (en) 2009-09-01 2013-04-09 Xilinx, Inc. Left and right matrix multiplication using a systolic array
US8473540B1 (en) 2009-09-01 2013-06-25 Xilinx, Inc. Decoder and process therefor
US8473539B1 (en) 2009-09-01 2013-06-25 Xilinx, Inc. Modified givens rotation for matrices with complex numbers
US8510364B1 (en) 2009-09-01 2013-08-13 Xilinx, Inc. Systolic array for matrix triangularization and back-substitution
US8620984B2 (en) 2009-11-23 2013-12-31 Xilinx, Inc. Minimum mean square error processing
US8416841B1 (en) 2009-11-23 2013-04-09 Xilinx, Inc. Multiple-input multiple-output (MIMO) decoding with subcarrier grouping
US8406334B1 (en) 2010-06-11 2013-03-26 Xilinx, Inc. Overflow resistant, fixed precision, bit optimized systolic array for QR decomposition and MIMO decoding
US8443031B1 (en) 2010-07-19 2013-05-14 Xilinx, Inc. Systolic array for cholesky decomposition
US9088521B2 (en) * 2013-02-21 2015-07-21 Litepoint Corporation System and method for testing multiple data packet signal transceivers concurrently
CN111998854B (zh) * 2020-08-31 2022-04-15 郑州轻工业大学 基于Cholesky分解计算的精确扩展Stirling插值滤波方法

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US4964126A (en) 1988-09-30 1990-10-16 Massachusetts Institute Of Technology Fault tolerant signal processing machine and method
JPH03141480A (ja) * 1989-10-27 1991-06-17 Mitsubishi Heavy Ind Ltd 帯行列演算用シストリックアレイ
JPH0752748B2 (ja) * 1989-12-14 1995-06-05 株式会社グラフィカ 三次元デバイスのシミュレーション装置
JPH0628324A (ja) * 1992-07-06 1994-02-04 Toshiba Corp 並列計算機及びコンパイラ
US5630154A (en) 1994-10-11 1997-05-13 Hughes Aircraft Company Programmable systolic array system arranged in a found arrangement for passing data through programmable number of cells in a time interleaved manner
JPH103468A (ja) 1996-06-14 1998-01-06 Toyo Commun Equip Co Ltd 並列演算処理システム
US6061706A (en) * 1997-10-10 2000-05-09 United Microelectronics Corp. Systolic linear-array modular multiplier with pipeline processing elements
US6313786B1 (en) * 1998-07-02 2001-11-06 Snaptrack, Inc. Method and apparatus for measurement processing of satellite positioning system (SPS) signals
EP0971485A1 (en) * 1998-07-08 2000-01-12 Siemens Aktiengesellschaft Multiuser detection in CDMA using a correlation matrix
US6675187B1 (en) 1999-06-10 2004-01-06 Agere Systems Inc. Pipelined linear array of processor elements for performing matrix computations
US6714527B2 (en) * 1999-09-21 2004-03-30 Interdigital Techology Corporation Multiuser detector for variable spreading factors
US6870882B1 (en) * 1999-10-08 2005-03-22 At&T Corp. Finite-length equalization over multi-input multi-output channels
FR2800948B1 (fr) * 1999-11-08 2002-03-01 Mitsubishi Electric Inf Tech Procede de detection conjointe
MXPA02006668A (es) * 2000-01-07 2002-09-30 Interdigital Tech Corp Determinacion de canal para sistemas de comunicacion duplex con division de tiempo.
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Also Published As

Publication number Publication date
WO2003043236A1 (en) 2003-05-22
CN2686248Y (zh) 2005-03-16
TWI268667B (en) 2006-12-11
JP2012150827A (ja) 2012-08-09
TWI263417B (en) 2006-10-01
US20070206543A1 (en) 2007-09-06
KR200303640Y1 (ko) 2003-02-11
CA2466684A1 (en) 2003-05-22
TW581368U (en) 2004-03-21
DE20217636U1 (de) 2003-04-03
KR100809993B1 (ko) 2008-03-07
TWI314405B (en) 2009-09-01
TW200415862A (en) 2004-08-16
CN1582544A (zh) 2005-02-16
JP2005509959A (ja) 2005-04-14
DE20217637U1 (de) 2003-03-20
KR20050090349A (ko) 2005-09-13
US20030091007A1 (en) 2003-05-15
KR20040016941A (ko) 2004-02-25
TW200302640A (en) 2003-08-01
US7218624B2 (en) 2007-05-15
KR20040015312A (ko) 2004-02-18
TW200742284A (en) 2007-11-01
CN2579091Y (zh) 2003-10-08
KR20040053297A (ko) 2004-06-23
KR20050096874A (ko) 2005-10-06
NO20042407L (no) 2004-06-09
TW588890U (en) 2004-05-21
EP1444798A1 (en) 2004-08-11
KR200310933Y1 (ko) 2003-04-18
TWI325240B (en) 2010-05-21
US7606207B2 (en) 2009-10-20
KR20070116287A (ko) 2007-12-07
KR20050090084A (ko) 2005-09-12
JP2008077682A (ja) 2008-04-03
TW200635264A (en) 2006-10-01
KR100858466B1 (ko) 2008-09-16
EP1444798A4 (en) 2007-12-12

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