ATE377767T1 - Verfahren und system zum simulieren eines modularen testsystems - Google Patents

Verfahren und system zum simulieren eines modularen testsystems

Info

Publication number
ATE377767T1
ATE377767T1 AT05743583T AT05743583T ATE377767T1 AT E377767 T1 ATE377767 T1 AT E377767T1 AT 05743583 T AT05743583 T AT 05743583T AT 05743583 T AT05743583 T AT 05743583T AT E377767 T1 ATE377767 T1 AT E377767T1
Authority
AT
Austria
Prior art keywords
simulating
modular test
test system
simulation framework
model
Prior art date
Application number
AT05743583T
Other languages
English (en)
Inventor
Conrad Mukai
Ankan Pramanick
Mark Elston
Toshiaki Adachi
Leon L Chen
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Application granted granted Critical
Publication of ATE377767T1 publication Critical patent/ATE377767T1/de

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31907Modular tester, e.g. controlling and coordinating instruments in a bus based architecture
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
AT05743583T 2004-05-22 2005-05-23 Verfahren und system zum simulieren eines modularen testsystems ATE377767T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US57357704P 2004-05-22 2004-05-22
US10/917,711 US7210087B2 (en) 2004-05-22 2004-08-13 Method and system for simulating a modular test system

Publications (1)

Publication Number Publication Date
ATE377767T1 true ATE377767T1 (de) 2007-11-15

Family

ID=34968284

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05743583T ATE377767T1 (de) 2004-05-22 2005-05-23 Verfahren und system zum simulieren eines modularen testsystems

Country Status (8)

Country Link
US (1) US7210087B2 (de)
EP (1) EP1756605B1 (de)
JP (1) JP3911007B1 (de)
KR (1) KR20070020247A (de)
AT (1) ATE377767T1 (de)
DE (1) DE602005003225T2 (de)
TW (1) TWI352211B (de)
WO (1) WO2005114237A1 (de)

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US7869986B2 (en) * 2006-07-10 2011-01-11 Blancha Barry E System and method for performing processing in a testing system
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US7809520B2 (en) * 2007-11-05 2010-10-05 Advantest Corporation Test equipment, method for loading test plan and program product
US20090119542A1 (en) * 2007-11-05 2009-05-07 Advantest Corporation System, method, and program product for simulating test equipment
US20090319247A1 (en) * 2008-06-18 2009-12-24 Eads Na Defense Security And Systems Solutions Inc Systems and Methods for A Simulated Network Environment and Operation Thereof
US8615373B2 (en) 2011-01-06 2013-12-24 International Business Machines Corporation Voltage driver for a voltage-driven intelligent characterization bench for semiconductor
US9043179B2 (en) 2011-01-06 2015-05-26 International Business Machines Corporation Voltage-driven intelligent characterization bench for semiconductor
US8839057B2 (en) * 2011-02-03 2014-09-16 Arm Limited Integrated circuit and method for testing memory on the integrated circuit
US10776233B2 (en) * 2011-10-28 2020-09-15 Teradyne, Inc. Programmable test instrument
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US9470759B2 (en) 2011-10-28 2016-10-18 Teradyne, Inc. Test instrument having a configurable interface
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TWI456216B (zh) * 2012-07-19 2014-10-11 Novatek Microelectronics Corp 積體電路及其測試系統
DE102013006012A1 (de) * 2013-04-09 2014-10-09 Airbus Defence and Space GmbH Mehrbenutzerfähige Testumgebung für eine Mehrzahl von Testobjekten
DE102013006011A1 (de) * 2013-04-09 2014-10-09 Airbus Defence and Space GmbH Modulare Testumgebung für eine Mehrzahl von Testobjekten
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US10467366B2 (en) 2016-10-14 2019-11-05 Oracle International Corporation Methods and systems for simulating high-speed link designs
US10592370B2 (en) * 2017-04-28 2020-03-17 Advantest Corporation User control of automated test features with software application programming interface (API)
KR102583174B1 (ko) 2018-06-12 2023-09-26 삼성전자주식회사 테스트 인터페이스 보드, 이를 포함하는 테스트 시스템 및 이의 동작 방법
WO2019238186A1 (en) * 2018-06-13 2019-12-19 Beumer Group A/S Method for design and test of logistics and material handling systems
WO2020105130A1 (ja) 2018-11-20 2020-05-28 三菱電機株式会社 通信システム、リスト参照局、リスト配信局、通信方法、および通信プログラム
US11302412B2 (en) * 2019-06-03 2022-04-12 Advantest Corporation Systems and methods for simulated device testing using a memory-based communication protocol
US11636019B2 (en) * 2019-07-11 2023-04-25 Walmart Apollo, Llc Systems and methods for dynamically simulating load to an application under test
CN110781103B (zh) * 2019-11-05 2022-02-15 中电科思仪科技股份有限公司 一种pxi总线开关模块控制系统及方法
CN111400872B (zh) * 2020-02-27 2023-11-17 中国商用飞机有限责任公司北京民用飞机技术研究中心 一种基于模型的航电系统虚拟集成测试方法及系统
CN116359716B (zh) * 2023-05-31 2023-08-04 深圳市华测半导体设备有限公司 一种ic测试机动态分配测试资源的方法、系统及介质

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Also Published As

Publication number Publication date
WO2005114237A1 (en) 2005-12-01
US20050262412A1 (en) 2005-11-24
EP1756605A1 (de) 2007-02-28
TW200610082A (en) 2006-03-16
KR20070020247A (ko) 2007-02-20
DE602005003225T2 (de) 2008-08-28
JP2008519247A (ja) 2008-06-05
TWI352211B (en) 2011-11-11
US7210087B2 (en) 2007-04-24
JP3911007B1 (ja) 2007-05-09
DE602005003225D1 (de) 2007-12-20
EP1756605B1 (de) 2007-11-07

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