ATE367608T1 - Integrierte schaltung mit bimodalem daten-strobe - Google Patents

Integrierte schaltung mit bimodalem daten-strobe

Info

Publication number
ATE367608T1
ATE367608T1 AT04783434T AT04783434T ATE367608T1 AT E367608 T1 ATE367608 T1 AT E367608T1 AT 04783434 T AT04783434 T AT 04783434T AT 04783434 T AT04783434 T AT 04783434T AT E367608 T1 ATE367608 T1 AT E367608T1
Authority
AT
Austria
Prior art keywords
data strobe
data
integrated circuit
mode
memory device
Prior art date
Application number
AT04783434T
Other languages
English (en)
Inventor
Craig Hampel
Original Assignee
Rambus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=34377433&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ATE367608(T1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Rambus Inc filed Critical Rambus Inc
Application granted granted Critical
Publication of ATE367608T1 publication Critical patent/ATE367608T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1694Configuration of memory controller to different memory types
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1689Synchronisation and timing concerns

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
AT04783434T 2003-09-30 2004-09-03 Integrierte schaltung mit bimodalem daten-strobe ATE367608T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/676,648 US20050071707A1 (en) 2003-09-30 2003-09-30 Integrated circuit with bi-modal data strobe

Publications (1)

Publication Number Publication Date
ATE367608T1 true ATE367608T1 (de) 2007-08-15

Family

ID=34377433

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04783434T ATE367608T1 (de) 2003-09-30 2004-09-03 Integrierte schaltung mit bimodalem daten-strobe

Country Status (7)

Country Link
US (2) US20050071707A1 (de)
EP (1) EP1668523B2 (de)
JP (2) JP4783290B2 (de)
KR (2) KR101108297B1 (de)
AT (1) ATE367608T1 (de)
DE (1) DE602004007674T3 (de)
WO (1) WO2005033958A1 (de)

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US7400670B2 (en) 2004-01-28 2008-07-15 Rambus, Inc. Periodic calibration for communication channels by drift tracking
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US7299313B2 (en) 2004-10-29 2007-11-20 International Business Machines Corporation System, method and storage medium for a memory subsystem command interface
US7512762B2 (en) * 2004-10-29 2009-03-31 International Business Machines Corporation System, method and storage medium for a memory subsystem with positional read data latency
US20060095620A1 (en) * 2004-10-29 2006-05-04 International Business Machines Corporation System, method and storage medium for merging bus data in a memory subsystem
US7543172B2 (en) 2004-12-21 2009-06-02 Rambus Inc. Strobe masking in a signaling system having multiple clock domains
US7688672B2 (en) * 2005-03-14 2010-03-30 Rambus Inc. Self-timed interface for strobe-based systems
US7478259B2 (en) * 2005-10-31 2009-01-13 International Business Machines Corporation System, method and storage medium for deriving clocks in a memory system
US7685392B2 (en) 2005-11-28 2010-03-23 International Business Machines Corporation Providing indeterminate read data latency in a memory system
US8121237B2 (en) 2006-03-16 2012-02-21 Rambus Inc. Signaling system with adaptive timing calibration
US7594055B2 (en) * 2006-05-24 2009-09-22 International Business Machines Corporation Systems and methods for providing distributed technology independent memory controllers
US7702832B2 (en) * 2006-06-07 2010-04-20 Standard Microsystems Corporation Low power and low pin count bi-directional dual data rate device interconnect interface
JP4267002B2 (ja) 2006-06-08 2009-05-27 エルピーダメモリ株式会社 コントローラ及びメモリを備えるシステム
US7669086B2 (en) 2006-08-02 2010-02-23 International Business Machines Corporation Systems and methods for providing collision detection in a memory system
US7870459B2 (en) 2006-10-23 2011-01-11 International Business Machines Corporation High density high reliability memory module with power gating and a fault tolerant address and command bus
US7721140B2 (en) * 2007-01-02 2010-05-18 International Business Machines Corporation Systems and methods for improving serviceability of a memory system
US8868873B2 (en) * 2007-09-27 2014-10-21 Rambus Inc. Reconfigurable memory system data strobes
JP5305543B2 (ja) 2007-12-21 2013-10-02 ラムバス・インコーポレーテッド メモリシステムの書き込みタイミングを較正する方法および装置
US8521979B2 (en) 2008-05-29 2013-08-27 Micron Technology, Inc. Memory systems and methods for controlling the timing of receiving read data
US7979757B2 (en) 2008-06-03 2011-07-12 Micron Technology, Inc. Method and apparatus for testing high capacity/high bandwidth memory devices
US8289760B2 (en) 2008-07-02 2012-10-16 Micron Technology, Inc. Multi-mode memory device and method having stacked memory dice, a logic die and a command processing circuit and operating in direct and indirect modes
US7855931B2 (en) 2008-07-21 2010-12-21 Micron Technology, Inc. Memory system and method using stacked memory device dice, and system using the memory system
US8756486B2 (en) 2008-07-02 2014-06-17 Micron Technology, Inc. Method and apparatus for repairing high capacity/high bandwidth memory devices
US8127204B2 (en) 2008-08-15 2012-02-28 Micron Technology, Inc. Memory system and method using a memory device die stacked with a logic die using data encoding, and system using the memory system
EP2384474B1 (de) * 2008-12-31 2015-08-12 Rambus Inc. Aktive kalibrierung für schnelle speicher
US8627160B2 (en) * 2010-04-21 2014-01-07 Lsi Corporation System and device for reducing instantaneous voltage droop during a scan shift operation
US8400808B2 (en) 2010-12-16 2013-03-19 Micron Technology, Inc. Phase interpolators and push-pull buffers
US9843315B2 (en) 2011-11-01 2017-12-12 Rambus Inc. Data transmission using delayed timing signals
US9032356B2 (en) 2013-03-06 2015-05-12 Lsi Corporation Programmable clock spreading
KR101836219B1 (ko) 2013-07-26 2018-04-19 인텔 코포레이션 비휘발성 메모리 인터페이스
US9171597B2 (en) 2013-08-30 2015-10-27 Micron Technology, Inc. Apparatuses and methods for providing strobe signals to memories
US9660847B2 (en) 2014-11-26 2017-05-23 Rambus Inc. Equalized multi-signaling mode driver
US10325636B1 (en) 2017-05-01 2019-06-18 Rambus Inc. Signal receiver with skew-tolerant strobe gating
US11735237B2 (en) 2019-02-27 2023-08-22 Rambus Inc. Low power memory with on-demand bandwidth boost
US11127444B1 (en) 2019-08-20 2021-09-21 Rambus Inc. Signal receiver with skew-tolerant strobe gating
EP4399585A1 (de) * 2021-09-07 2024-07-17 Rambus Inc. Gemeinsame datenübersteuerung zwischen mehreren speichervorrichtungen

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Also Published As

Publication number Publication date
KR101108297B1 (ko) 2012-01-25
JP5191555B2 (ja) 2013-05-08
DE602004007674T2 (de) 2008-04-10
US8352696B2 (en) 2013-01-08
DE602004007674D1 (de) 2007-08-30
US20050071707A1 (en) 2005-03-31
EP1668523B2 (de) 2014-12-10
KR101110469B1 (ko) 2012-01-31
JP4783290B2 (ja) 2011-09-28
US20080195885A1 (en) 2008-08-14
WO2005033958A1 (en) 2005-04-14
JP2011146063A (ja) 2011-07-28
KR20060111465A (ko) 2006-10-27
KR20110038184A (ko) 2011-04-13
EP1668523A1 (de) 2006-06-14
EP1668523B1 (de) 2007-07-18
JP2007507794A (ja) 2007-03-29
DE602004007674T3 (de) 2015-05-28

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