ATE267T1 - CIRCUIT ARRANGEMENT FOR SUPPRESSING TRANSMISSION EQUIPMENT FOR DIGITAL SIGNALS, IN PARTICULAR FOR MAKING HIGH-FREQUENCY INTERFERENCE PULSE OF ANY POLARITY. - Google Patents

CIRCUIT ARRANGEMENT FOR SUPPRESSING TRANSMISSION EQUIPMENT FOR DIGITAL SIGNALS, IN PARTICULAR FOR MAKING HIGH-FREQUENCY INTERFERENCE PULSE OF ANY POLARITY.

Info

Publication number
ATE267T1
ATE267T1 AT79102420T AT79102420T ATE267T1 AT E267 T1 ATE267 T1 AT E267T1 AT 79102420 T AT79102420 T AT 79102420T AT 79102420 T AT79102420 T AT 79102420T AT E267 T1 ATE267 T1 AT E267T1
Authority
AT
Austria
Prior art keywords
polarity
input
digital signals
circuit arrangement
frequency interference
Prior art date
Application number
AT79102420T
Other languages
German (de)
Inventor
Winfried Gottwald
Original Assignee
Siemens Aktiengesellschaft Berlin Und Muenchen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=6050077&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ATE267(T1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Siemens Aktiengesellschaft Berlin Und Muenchen filed Critical Siemens Aktiengesellschaft Berlin Und Muenchen
Application granted granted Critical
Publication of ATE267T1 publication Critical patent/ATE267T1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses
    • H03K5/1252—Suppression or limitation of noise or interference

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)

Abstract

1. A circuit arrangement for interference-clearing of transmission devices for digital signals, in particular for gating out higher-frequency interference pulses of arbitrary polarity, employing two monostable trigger circuits which produce a pulse of fixed width and constant polarity from each positive and negative flank of the input signal, characterized in that the pulses are linked with the aid of an OR-circuit (O) and that the output signal of the OR-circuit (O) is fed as a clock pulse signal to the clock pulse input (C) of a flip-flop (FF), whose other input is prepared by the input signal (E) in such a manner that the flip-flop (FF) is triggered by the trailing flank of the clock pulses into the respective other position only if the input Signal (E) at the preparation input of the flip-flop (FF) has changed at this time compared with the time before the clock pulse.
AT79102420T 1978-09-21 1979-07-12 CIRCUIT ARRANGEMENT FOR SUPPRESSING TRANSMISSION EQUIPMENT FOR DIGITAL SIGNALS, IN PARTICULAR FOR MAKING HIGH-FREQUENCY INTERFERENCE PULSE OF ANY POLARITY. ATE267T1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2841171A DE2841171C3 (en) 1978-09-21 1978-09-21 Circuit arrangement for interference suppression of transmission devices for digital signals, in particular for masking out higher-frequency interference pulses of any polarity
EP79102420A EP0009549B2 (en) 1978-09-21 1979-07-12 Circuit for interference elimination in transmission systems for digital signals, particularly for the elimination of higher-frequency interference pulses of any polarity

Publications (1)

Publication Number Publication Date
ATE267T1 true ATE267T1 (en) 1981-10-15

Family

ID=6050077

Family Applications (1)

Application Number Title Priority Date Filing Date
AT79102420T ATE267T1 (en) 1978-09-21 1979-07-12 CIRCUIT ARRANGEMENT FOR SUPPRESSING TRANSMISSION EQUIPMENT FOR DIGITAL SIGNALS, IN PARTICULAR FOR MAKING HIGH-FREQUENCY INTERFERENCE PULSE OF ANY POLARITY.

Country Status (3)

Country Link
EP (1) EP0009549B2 (en)
AT (1) ATE267T1 (en)
DE (1) DE2841171C3 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0059821B1 (en) * 1981-03-11 1984-07-25 Kb Alf Önnestam Alfadata Method and apparatus, e.g. in a data distribution system for, inter alia, avoiding distortion in transfer of signal states
US4433356A (en) * 1982-04-19 1984-02-21 Minnesota Mining And Manufacturing Company Control circuit for transformer relay
DE3225800C1 (en) * 1982-07-09 1983-12-15 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for removing noise from binary signals
JPS60106222A (en) * 1983-09-27 1985-06-11 メカトロン・システムズ・インコ−ポレ−テツド Method and device for masking noise presented in ac electricsignal
DE3531033A1 (en) * 1985-08-30 1987-03-12 Telefunken Electronic Gmbh Monostable trigger circuit
DE3608440A1 (en) * 1986-03-13 1987-09-24 Mitec Moderne Ind Gmbh PULSE LENGTH DISCRIMINATOR
DE4140920C1 (en) * 1991-12-12 1993-05-27 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt, De Level changing circuitry for flanks of rectangular or trapezoidal signals - has threshold value discriminator with output signal separated into two channels, each having a gate circuit assigned to SR-flip=flop
US5521550A (en) * 1994-12-23 1996-05-28 At&T Corp. Digital circuitry for noise blanking
DE19733733C2 (en) * 1997-08-04 1999-09-02 Siemens Ag Method and circuit arrangement for processing digital signals
DE19739245C2 (en) * 1997-09-08 1999-08-19 Siemens Ag Digital circuit with a filter unit to suppress interference pulses

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1251377B (en) * 1967-10-05 Standard Elektrik Lorenz Aktiengesellschaft Stuttgart Zuffenhausen Circuit arrangement for the conversion of bouncing or flashing impulses into ideal square-wave impulses, especially for test devices in telecommunications systems
DE1101490B (en) * 1960-02-03 1961-03-09 Siemens Ag Procedure for the detection of short-term malfunctions which are suitable for falsifying the telegraphic steps sent
DE2103435C3 (en) * 1971-01-26 1984-08-23 Felten & Guilleaume Fernmeldeanlagen GmbH, 8500 Nürnberg Method and circuit arrangement for preventing the transmission of binary characters at a higher than the highest permitted transmission speed
DD106756A1 (en) * 1973-08-24 1974-06-20
DE2410957C2 (en) * 1974-03-07 1982-10-21 Nixdorf Computer Ag, 4790 Paderborn Circuit arrangement for data transmission systems, for suppressing pulse-shaped signals in an input signal sequence
DE2415365C3 (en) * 1974-03-29 1983-12-08 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for masking out pulses whose duration is shorter than a predetermined test duration tp from a sequence of digital pulses present on the input side
DE2424816A1 (en) * 1974-05-22 1975-12-04 Bosch Gmbh Robert Noise immunity cct. for circuits exposed to noise from contact chatter - has two bistable flip-flops to suppress noise during clock pulses
US3958133A (en) * 1975-03-03 1976-05-18 United Technologies Corporation Digital noise discriminator
DE2657169C3 (en) * 1976-12-17 1981-01-29 Brown, Boveri & Cie Ag, 6800 Mannheim Arrangement for the suppression of positive and negative interference pulses of a certain width
DE2707610C3 (en) * 1977-02-22 1980-09-25 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Circuit arrangement for evaluating a digital pulse train with a pre-pulse

Also Published As

Publication number Publication date
DE2841171C3 (en) 1984-04-26
DE2841171A1 (en) 1980-03-27
EP0009549B1 (en) 1981-09-30
DE2841171B2 (en) 1980-09-25
EP0009549B2 (en) 1984-05-16
EP0009549A1 (en) 1980-04-16

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Legal Events

Date Code Title Description
REN Ceased due to non-payment of the annual fee
REN Ceased due to non-payment of the annual fee