ATE205346T1 - Verfahren zur verringerung der wirkung von übergangssignalen auf signalnachführschleifen - Google Patents

Verfahren zur verringerung der wirkung von übergangssignalen auf signalnachführschleifen

Info

Publication number
ATE205346T1
ATE205346T1 AT96914025T AT96914025T ATE205346T1 AT E205346 T1 ATE205346 T1 AT E205346T1 AT 96914025 T AT96914025 T AT 96914025T AT 96914025 T AT96914025 T AT 96914025T AT E205346 T1 ATE205346 T1 AT E205346T1
Authority
AT
Austria
Prior art keywords
stage
mode
transients
recovery stage
symbol timing
Prior art date
Application number
AT96914025T
Other languages
English (en)
Inventor
Marek Karol Dutkiewicz
Philip John Houghton
Original Assignee
Sierra Wireless Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sierra Wireless Inc filed Critical Sierra Wireless Inc
Application granted granted Critical
Publication of ATE205346T1 publication Critical patent/ATE205346T1/de

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/048Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Bidirectional Digital Transmission (AREA)
  • Dc Digital Transmission (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Circuits Of Receivers In General (AREA)
  • Optical Recording Or Reproduction (AREA)
  • Details Of Television Scanning (AREA)
  • Stereo-Broadcasting Methods (AREA)
  • Radio Relay Systems (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT96914025T 1995-05-22 1996-05-22 Verfahren zur verringerung der wirkung von übergangssignalen auf signalnachführschleifen ATE205346T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/450,947 US5629960A (en) 1995-05-22 1995-05-22 Method for reducing distortion effects on DC off-set voltage and symbol clock tracking in a demodulator
PCT/CA1996/000337 WO1996037986A1 (en) 1995-05-22 1996-05-22 Method for reducing the effect of demodulator transients on signal tracking loops

Publications (1)

Publication Number Publication Date
ATE205346T1 true ATE205346T1 (de) 2001-09-15

Family

ID=23790171

Family Applications (1)

Application Number Title Priority Date Filing Date
AT96914025T ATE205346T1 (de) 1995-05-22 1996-05-22 Verfahren zur verringerung der wirkung von übergangssignalen auf signalnachführschleifen

Country Status (8)

Country Link
US (1) US5629960A (de)
EP (1) EP0827661B1 (de)
JP (1) JPH11505974A (de)
AT (1) ATE205346T1 (de)
AU (1) AU5756696A (de)
CA (1) CA2221958A1 (de)
DE (1) DE69615018T2 (de)
WO (1) WO1996037986A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE412945T1 (de) * 1995-02-13 2008-11-15 Intertrust Tech Corp Systeme und verfahren für ein sicheres übertragungsmanagement und elektronischerrechtsschutz
JP2993443B2 (ja) * 1996-10-31 1999-12-20 日本電気株式会社 通信装置
JP2000278341A (ja) 1999-03-25 2000-10-06 Sanyo Electric Co Ltd 直交位相復調回路
JP3351412B2 (ja) * 2000-01-17 2002-11-25 日本電気株式会社 Dcオフセット除去方式及びdcオフセット除去回路を備えた受信回路
US6661858B1 (en) 2000-09-12 2003-12-09 Beaudin Andre DC restoration circuit for a radio receiver
US7076225B2 (en) 2001-02-16 2006-07-11 Qualcomm Incorporated Variable gain selection in direct conversion receiver
US7231000B2 (en) * 2001-10-22 2007-06-12 Broadcom Corporation System and method for DC offset compensation and bit synchronization
US7035350B2 (en) * 2001-10-22 2006-04-25 Broadcom Corporation Bluetooth access code assisted initial DC estimation and frame synchronization
KR100435494B1 (ko) * 2001-11-21 2004-06-09 한국전자통신연구원 디지털 통신에서의 동기 수행 시스템 및 그 방법
US20070223599A1 (en) * 2005-07-25 2007-09-27 Sysair, Inc., A Delaware Corporation Cellular PC modem architecture and method of operation
US8677499B2 (en) * 2005-12-29 2014-03-18 Nextlabs, Inc. Enforcing access control policies on servers in an information management system

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4105975A (en) * 1977-02-01 1978-08-08 Ncr Corporation Offset correction circuit for phase detectors
GB1556087A (en) * 1977-12-01 1979-11-21 Standard Telephones Cables Ltd Single channel duplex radio system
FR2462073A1 (fr) * 1979-07-17 1981-02-06 Thomson Csf Procede et dispositif pour l'extraction de donnees numeriques en presence de bruit et de distorsions
GB2083977B (en) * 1980-08-26 1984-08-22 Standard Telephones Cables Ltd Single channel duplex radio system
US4510595A (en) * 1983-10-03 1985-04-09 At&T Bell Laboratories Modified time-division transmission technique for digital mobile radio systems
US4520474A (en) * 1983-12-05 1985-05-28 Motorola, Inc. Duplex communication transceiver with modulation cancellation
JP2606709B2 (ja) * 1987-12-15 1997-05-07 株式会社リコー 無線通信システムのインタフェース回路
US4870370A (en) * 1988-02-19 1989-09-26 Silicon Systems, Inc. Method and apparatus for two stage automatic gain control
US4982442A (en) * 1989-04-25 1991-01-01 Motorola, Inc. Low cost antenna switch using relays configured in a transmit/receive arrangement
US5140699A (en) * 1990-12-24 1992-08-18 American Nucleonics Corporation Detector DC offset compensator
US5239686A (en) * 1991-04-29 1993-08-24 Echelon Corporation Transceiver with rapid mode switching capability
JPH04334137A (ja) * 1991-05-09 1992-11-20 Mitsubishi Electric Corp バースト光受信装置
JP2503837B2 (ja) * 1992-07-16 1996-06-05 日本電気株式会社 ディジタル光受信回路とディジタル光受信回路におけるプリアンプ回路

Also Published As

Publication number Publication date
CA2221958A1 (en) 1996-11-28
JPH11505974A (ja) 1999-05-25
EP0827661A1 (de) 1998-03-11
DE69615018D1 (de) 2001-10-11
WO1996037986A1 (en) 1996-11-28
AU5756696A (en) 1996-12-11
EP0827661B1 (de) 2001-09-05
DE69615018T2 (de) 2002-05-16
US5629960A (en) 1997-05-13

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties