ATE191802T1 - Speicherbankvergleichseinrichtung - Google Patents

Speicherbankvergleichseinrichtung

Info

Publication number
ATE191802T1
ATE191802T1 AT91306690T AT91306690T ATE191802T1 AT E191802 T1 ATE191802 T1 AT E191802T1 AT 91306690 T AT91306690 T AT 91306690T AT 91306690 T AT91306690 T AT 91306690T AT E191802 T1 ATE191802 T1 AT E191802T1
Authority
AT
Austria
Prior art keywords
memory
bank
address
addressed
sum
Prior art date
Application number
AT91306690T
Other languages
English (en)
Inventor
James Macdonald
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE191802T1 publication Critical patent/ATE191802T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Processing Of Color Television Signals (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Manipulation Of Pulses (AREA)
AT91306690T 1990-08-31 1991-07-23 Speicherbankvergleichseinrichtung ATE191802T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US57595790A 1990-08-31 1990-08-31

Publications (1)

Publication Number Publication Date
ATE191802T1 true ATE191802T1 (de) 2000-04-15

Family

ID=24302387

Family Applications (1)

Application Number Title Priority Date Filing Date
AT91306690T ATE191802T1 (de) 1990-08-31 1991-07-23 Speicherbankvergleichseinrichtung

Country Status (4)

Country Link
EP (1) EP0473274B1 (de)
JP (1) JP3240163B2 (de)
AT (1) ATE191802T1 (de)
DE (1) DE69132108T2 (de)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1142074B (it) * 1981-11-24 1986-10-08 Honeywell Inf Systems Sistema di elaborazione dati con allocazione automatica dell'indirizzo in una memoria modulare
JPH0642263B2 (ja) * 1984-11-26 1994-06-01 株式会社日立製作所 デ−タ処理装置
US4740916A (en) * 1985-12-19 1988-04-26 International Business Machines Corporation Reconfigurable contiguous address space memory system including serially connected variable capacity memory modules and a split address bus
US5341486A (en) * 1988-10-27 1994-08-23 Unisys Corporation Automatically variable memory interleaving system

Also Published As

Publication number Publication date
EP0473274A3 (en) 1992-04-01
DE69132108D1 (de) 2000-05-18
EP0473274A2 (de) 1992-03-04
JPH04245348A (ja) 1992-09-01
JP3240163B2 (ja) 2001-12-17
EP0473274B1 (de) 2000-04-12
DE69132108T2 (de) 2001-03-22

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties