ATE141425T1 - Schnittstelle zwischen einer systemsteuereinheit und einer dienst-processoreinheit in einem digitalrechner - Google Patents

Schnittstelle zwischen einer systemsteuereinheit und einer dienst-processoreinheit in einem digitalrechner

Info

Publication number
ATE141425T1
ATE141425T1 AT89306689T AT89306689T ATE141425T1 AT E141425 T1 ATE141425 T1 AT E141425T1 AT 89306689 T AT89306689 T AT 89306689T AT 89306689 T AT89306689 T AT 89306689T AT E141425 T1 ATE141425 T1 AT E141425T1
Authority
AT
Austria
Prior art keywords
scu
spu
buffer
delivering
data
Prior art date
Application number
AT89306689T
Other languages
English (en)
Inventor
Michael B Evans
Rueysen Lin
Brian F Rost
R Stephen Polzin
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of ATE141425T1 publication Critical patent/ATE141425T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Hardware Redundancy (AREA)
  • Computer And Data Communications (AREA)
  • Multi Processors (AREA)
AT89306689T 1989-02-03 1989-06-30 Schnittstelle zwischen einer systemsteuereinheit und einer dienst-processoreinheit in einem digitalrechner ATE141425T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/306,325 US5146564A (en) 1989-02-03 1989-02-03 Interface between a system control unit and a service processing unit of a digital computer

Publications (1)

Publication Number Publication Date
ATE141425T1 true ATE141425T1 (de) 1996-08-15

Family

ID=23184787

Family Applications (1)

Application Number Title Priority Date Filing Date
AT89306689T ATE141425T1 (de) 1989-02-03 1989-06-30 Schnittstelle zwischen einer systemsteuereinheit und einer dienst-processoreinheit in einem digitalrechner

Country Status (7)

Country Link
US (1) US5146564A (de)
EP (1) EP0380845B1 (de)
JP (1) JPH02207367A (de)
AT (1) ATE141425T1 (de)
AU (1) AU628533B2 (de)
CA (1) CA1322612C (de)
DE (1) DE68926954T2 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2642214B1 (fr) * 1988-12-30 1992-11-20 Cit Alcatel Systeme de detection d'ecrasement de donnees dans une memoire tampon, notamment pour un commutateur de donnees
US5129065A (en) * 1989-10-27 1992-07-07 Sun Microsystems, Inc. Apparatus and methods for interface register handshake for controlling devices
US5255374A (en) * 1992-01-02 1993-10-19 International Business Machines Corporation Bus interface logic for computer system having dual bus architecture
JP2598178B2 (ja) * 1991-04-30 1997-04-09 三菱電機株式会社 通信システム
US5386512A (en) * 1991-07-19 1995-01-31 International Business Machines Corporation System for deriving and testing mutual capability set after receiving updated capability from other processors and before requesting service information
US5355450A (en) * 1992-04-10 1994-10-11 Avid Technology, Inc. Media composer with adjustable source material compression
WO1993012613A1 (en) * 1991-12-13 1993-06-24 Avid Technology, Inc. Quantization table adjustment
US5412803A (en) * 1992-02-20 1995-05-02 International Business Machines Corporation Communications system having plurality of originator and corresponding recipient buffers with each buffer having three different logical areas for transmitting messages in single transfer
US5265212A (en) * 1992-04-01 1993-11-23 Digital Equipment Corporation Sharing of bus access among multiple state machines with minimal wait time and prioritization of like cycle types
US5758157A (en) * 1992-12-31 1998-05-26 International Business Machines Corporation Method and system for providing service processor capability in a data processing by transmitting service processor requests between processing complexes
JPH08511385A (ja) * 1993-04-16 1996-11-26 データ トランスレイション，インコーポレイテッド 可変量子化を用いた適応型画像圧縮
WO1994024809A1 (en) * 1993-04-16 1994-10-27 Data Translation, Inc. Adaptive video decompression
US6067408A (en) * 1993-05-27 2000-05-23 Advanced Micro Devices, Inc. Full duplex buffer management and apparatus
US5664224A (en) * 1993-07-23 1997-09-02 Escom Ag Apparatus for selectively loading data blocks from CD-ROM disks to buffer segments using DMA operations
US5862140A (en) * 1995-11-21 1999-01-19 Imedia Corporation Method and apparatus for multiplexing video programs for improved channel utilization
US5956088A (en) * 1995-11-21 1999-09-21 Imedia Corporation Method and apparatus for modifying encoded digital video for improved channel utilization
US6026451A (en) * 1997-12-22 2000-02-15 Intel Corporation System for controlling a dispatch of requested data packets by generating size signals for buffer space availability and preventing a dispatch prior to a data request granted signal asserted
US6253273B1 (en) * 1998-02-06 2001-06-26 Emc Corporation Lock mechanism
US6237055B1 (en) * 1998-12-03 2001-05-22 Intel Corporation Avoiding livelock when performing a long stream of transactions
GB2350980B (en) * 1999-06-08 2003-08-27 Sgs Thomson Microelectronics Device and method for processing a stream of data
WO2001044967A1 (en) * 1999-12-14 2001-06-21 Fujitsu Limited Multiprocessor system
WO2009010896A1 (en) * 2007-07-13 2009-01-22 Nxp B.V. Circuit with network of message distributor circuits

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51104233A (de) * 1975-03-12 1976-09-14 Hitachi Ltd
GB2075310A (en) * 1980-04-30 1981-11-11 Hewlett Packard Ltd Bus extender circuitry for data transmission
IT1155644B (it) * 1982-03-17 1987-01-28 Cselt Centro Studi Lab Telecom Interfaccia di accesso a un bus a larga banda per traffico integrato fonia dati
US4500958A (en) * 1982-04-21 1985-02-19 Digital Equipment Corporation Memory controller with data rotation arrangement
US4543628A (en) * 1983-01-28 1985-09-24 Digital Equipment Corporation Bus for data processing system with fault cycle operation
US4807109A (en) * 1983-11-25 1989-02-21 Intel Corporation High speed synchronous/asynchronous local bus and data transfer method
US4771378A (en) * 1984-06-19 1988-09-13 Cray Research, Inc. Electrical interface system
JPS61197861A (ja) * 1985-02-27 1986-09-02 Diesel Kiki Co Ltd 電磁アクチユエ−タ及びその製造方法
CA1266720A (en) * 1985-09-27 1990-03-13 Rasmus Nordby Synchronizing system
US4730308A (en) * 1985-10-04 1988-03-08 International Business Machines Corporation Interface between a computer bus and a serial packet link
CA1266318A (en) * 1985-10-07 1990-02-27 Hiroshi Suzuki High-speed packet-switched communications system with end-to-end flow control and retransmission
GB8528891D0 (en) * 1985-11-23 1986-01-02 Int Computers Ltd Data transmission system
GB8605613D0 (en) * 1986-03-07 1986-04-16 Limb J O Traffic scheduler
DE3751609T2 (de) * 1986-09-01 1996-07-04 Nippon Electric Co Datenprozessor mit Hochgeschwindigkeitsdatenübertragung.
US4823312A (en) * 1986-10-30 1989-04-18 National Semiconductor Corp. Asynchronous communications element
US4845710A (en) * 1986-12-23 1989-07-04 Oki Electric Industry Co., Ltd. Dynamic buffer supervising system for a data link access protocol control

Also Published As

Publication number Publication date
CA1322612C (en) 1993-09-28
DE68926954D1 (de) 1996-09-19
JPH02207367A (ja) 1990-08-17
AU628533B2 (en) 1992-09-17
EP0380845A2 (de) 1990-08-08
DE68926954T2 (de) 1997-03-27
AU5395490A (en) 1991-12-19
EP0380845B1 (de) 1996-08-14
US5146564A (en) 1992-09-08
EP0380845A3 (de) 1991-05-02

Similar Documents

Publication Publication Date Title
ATE141425T1 (de) Schnittstelle zwischen einer systemsteuereinheit und einer dienst-processoreinheit in einem digitalrechner
US4674033A (en) Multiprocessor system having a shared memory for enhanced interprocessor communication
EP0382505A3 (de) Virtuelles computersystem mit Ein-/Ausgabeunterbrechungssteuerung
US4558412A (en) Direct memory access revolving priority apparatus
EP0049159A3 (de) Schnittstelle für Sammelschiene in einer Datenübertragungssteuerung
ATE110479T1 (de) Peripheres interface-system.
GB2186719A (en) Peripheral dma controller for data acquisition system
EP0240145A3 (de) Prozessorselektionssystem
GR3023419T3 (en) Buffer memory subsystem for peripheral controllers and method
EP0384621A2 (de) Datenübertragungsbetrieb zwischen zwei asynchronen Bussen
JPS55127652A (en) Mutual supervision system between computers
TW369632B (en) Computer system
US5307468A (en) Data processing system and method for controlling the latter as well as a CPU board
EP0798644A3 (de) Verfahren und Vorrichtung zum Zugriff zu einem Chip-auswählbaren Gerät in einem Datenverarbeitungssystem
JPS5674738A (en) Transfer system of display data
JPS5587220A (en) Interface controller
GB2039105A (en) Multi-unit computer priority system
JPS5569836A (en) Channel control system
Lin et al. DMA-based Communications between PC and DSP
JPH0743687B2 (ja) データ記憶サブシステム
EP0278263A3 (de) Mehrfachbus-Direktspeicherzugriffssteuerungsgerät
JPS57211661A (en) Data transfer system for multiprocessor device
JPS6412358A (en) Intermediate device for connecting universal bus of programmable controller
JPS6161432B2 (de)
JPS54129937A (en) Bus control system

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties