ATE134064T1 - Verfahren zur speicherung analoger grössen und einrichtung zur durchführung des verfahrens - Google Patents

Verfahren zur speicherung analoger grössen und einrichtung zur durchführung des verfahrens

Info

Publication number
ATE134064T1
ATE134064T1 AT90810743T AT90810743T ATE134064T1 AT E134064 T1 ATE134064 T1 AT E134064T1 AT 90810743 T AT90810743 T AT 90810743T AT 90810743 T AT90810743 T AT 90810743T AT E134064 T1 ATE134064 T1 AT E134064T1
Authority
AT
Austria
Prior art keywords
floating gate
analog values
implementing
subjected
control electrode
Prior art date
Application number
AT90810743T
Other languages
English (en)
Inventor
Henri Oguey
Original Assignee
Suisse Electronique Microtech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suisse Electronique Microtech filed Critical Suisse Electronique Microtech
Application granted granted Critical
Publication of ATE134064T1 publication Critical patent/ATE134064T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Flow Control (AREA)
  • Feedback Control In General (AREA)
  • Paper (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • Measuring Pulse, Heart Rate, Blood Pressure Or Blood Flow (AREA)
AT90810743T 1989-09-29 1990-09-27 Verfahren zur speicherung analoger grössen und einrichtung zur durchführung des verfahrens ATE134064T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8912739A FR2652671B1 (fr) 1989-09-29 1989-09-29 Procede de memorisation de grandeurs analogiques et dispositif pour sa mise en óoeuvre.

Publications (1)

Publication Number Publication Date
ATE134064T1 true ATE134064T1 (de) 1996-02-15

Family

ID=9385932

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90810743T ATE134064T1 (de) 1989-09-29 1990-09-27 Verfahren zur speicherung analoger grössen und einrichtung zur durchführung des verfahrens

Country Status (5)

Country Link
EP (1) EP0420822B1 (de)
JP (1) JPH03259497A (de)
AT (1) ATE134064T1 (de)
DE (1) DE69025255T2 (de)
FR (1) FR2652671B1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4205729C2 (de) * 1992-02-25 2001-02-22 Siemens Ag Halbleiterspeicher, dessen Speicherzellen zwei Feldeffekttransistoren mit einem gemeinsamen Floating-Gate aufweisen und Verfahren zu seinem Betrieb

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5346621B2 (de) * 1974-10-21 1978-12-15
US4181980A (en) * 1978-05-15 1980-01-01 Electronic Arrays, Inc. Acquisition and storage of analog signals
US4627027A (en) * 1982-09-01 1986-12-02 Sanyo Electric Co., Ltd. Analog storing and reproducing apparatus utilizing non-volatile memory elements

Also Published As

Publication number Publication date
FR2652671B1 (fr) 1993-11-12
EP0420822A1 (de) 1991-04-03
JPH03259497A (ja) 1991-11-19
DE69025255D1 (de) 1996-03-21
FR2652671A1 (fr) 1991-04-05
DE69025255T2 (de) 1996-08-14
EP0420822B1 (de) 1996-02-07

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties