JPH0511832B2 - - Google Patents

Description

[Detailed description of the invention]

[Industrial Field of Application] The present invention provides a screen configured with a plurality of display devices.
The present invention relates to a television signal receiving device that displays two images. [Summary of the Invention] In the present invention, a high-definition TV signal is converted to an NTSC TV signal, and the signal is displayed on a screen comprised of a total of 12 displays, 4 horizontally and 3 vertically. [Conventional technology] The current television broadcasting standards in our country are
It is said to be in NTSC format. On the other hand, in order to obtain higher quality images, it has been proposed to change the broadcasting method to a high-definition method. The high-definition TV signal is NTSC T.
Because it is different from the signal, it cannot be received as is with a conventional NTSC TV receiver. Therefore, we changed the high-definition TV signal to NTSC.
It has been proposed to convert the signal into a NTSC TV signal and receive it on an NTSC TV receiver. [Problem to be solved by the invention] However, in the conventional proposal, the high-definition TV signal is received by a single NTSC TV receiver, so in the end,
It has the disadvantage that it can only obtain images with the quality of the NTSC system. Therefore, even though the source is a high-definition system, its advantages are not utilized and it is not possible to view high-definition images. Therefore, the present invention enables high-vision images to be displayed on NTSC TV receivers (including projection TVs, etc.) while maintaining their high quality. [Means for Solving the Problems] The television signal receiving device of the present invention includes an A/D converter that A/D converts a high-vision TV signal, and an A/D converter that converts the A/D converted TV signal into at least one field. A storage memory, a vertical filter that converts the 5 horizontal scanning lines of a high-definition TV signal to 7 horizontal scanning lines of an NTSC TV signal, and 4 units horizontally and 3 units vertically.
The horizontal scanning line constituting one field is divided into three in the vertical direction, and the horizontal scanning line forming one field is divided into three in the vertical direction. The memory is configured in three stages, and each of the three divided parts is stored in each stage. [Function] For example, if there are 4 NTSC CRTs horizontally and 3 vertically,
A total of 12 units are arranged to form one screen. A horizontal scanning line constituting one field is vertically divided into three parts, and each part is stored in the memory. The number of horizontal scanning lines of the data read from the memory is increased so that seven horizontal scanning lines of the NTSC system are generated from five horizontal scanning lines of the high-definition system. The increased horizontal scanning line is divided into three in the vertical direction, and further divided into four in the scanning direction, and then supplied to each CRT. Therefore, a high-vision image can be displayed on an NTSC display without sacrificing its high quality. [Embodiment] FIG. 2 schematically shows an NTSC TV screen. In this method, the aspect ratio of the screen is set to 4:3, and the number of horizontal scanning lines in one frame is 525. Among these, the number of effective horizontal scanning lines appearing on the actual screen is, for example, 483. Further, if the number of samplings for one horizontal scanning line in digital processing of an image is 360, the number of samplings for the effective screen portion is, for example, 297. Figure 3 schematically represents a high-vision TV screen. In this system, the screen aspect ratio is 16:9 and the number of horizontal scanning lines in one frame is 1125. Further, in the above example, the number of horizontal scanning lines on the effective screen is 1035. When the number of samplings for one horizontal scanning line is 1440,
The number of samples in the effective screen portion is 1188. FIG. 4 shows the configuration of the screen according to the present invention. In the present invention, CRT (liquid crystal display etc. may also be used) 11 to 34 as a display device of NTSC system.
A total of 12 units, 4 units horizontally and 3 units vertically, are arranged to form one screen. Each CRT
The aspect ratio is set to 4:3 to correspond to the NTSC system, so if each CRT is arranged in this way, the aspect ratio of the screen made up of 12 CRTs will be 16:9, which is the aspect ratio of the high-definition system. The screen can be made to match the ratio. However, since each CRT has 525 horizontal scanning lines, 1575 (=525×3) horizontal scanning lines are required to display one image on the entire screen. The number of horizontal scanning lines in high-definition is 1125, so this needs to be increased to 1575.
Since the least common multiple of both is 7875, the number can be increased by generating seven horizontal scanning lines of the NTSC system from five horizontal scanning lines of the high-definition system. The first 525 of the 1575 horizontal scanning lines generated in this way are transferred to the upper four CRTs 11 to 1.
4, and the next 525 cables are supplied to the middle CRT 21 to 2.
4, if the last 525 lines are supplied to each of the lower CRTs 31 to 34, each CRT will be scanned with 525 horizontal scanning lines as in the case of the normal NTSC system. However, since there are four CRTs arranged horizontally, the horizontal scanning line is divided into four equal parts horizontally, and each
Signals of 1/4 of the original length are sequentially supplied to CRTs n1 to n4. In this way, one image can be displayed using 12 CRTs. FIG. 5 is a block diagram of a television signal receiving apparatus according to the present invention. In the figure, reference numeral 1 denotes a high-definition TV camera, which outputs a high-definition television (TV) signal. Of course TV
The camera 1 can also be replaced with a high-vision television set, VTR, or the like. 2 is an A/D converter which A/D converts the input TV signal. 3 is frame memory;
One frame of A/D converted TV signal is stored. 4 is a vertical filter that changes the number of horizontal scanning lines. 5 is NTSC arranged as described above.
It is a type of CRT. FIG. 1 is a more detailed block diagram of the apparatus shown in FIG. A/D converter 2 is 48.6MHz, for example.
The input high-definition TV signal is A/D converted into 8-bit digital data using the clock. The output of the A/D converter 2 is a latch circuit D1,
It is input to D2 and latched. Latch circuit D1,
D2 is operated on the negative and positive edges of the 24.3MHz clock, respectively. Among the outputs of the latch circuit D1, the upper 4 bits of data corresponding to 1/3 of the horizontal scanning line of the first field are stored in the memory MFMA1U, and the lower bits are stored in the memory MFMA1L. Of course, it is theoretically possible to configure these as one memory. Similarly, the data of the next 1/3 horizontal scanning line is stored in the memories MFMA2U, 2L, and the data of the last 1/3 are stored in the memories MFMA3U, 3L, respectively. A 24.3MHz negative edge is used as the write clock for these memories. On the other hand, the data of the same field output from the latch circuit D2 is also stored in the memory MFMA1QU,
Stored in 1QL, 2QU, 2QL, 3QU, 3QL. A 24.3 MHz positive edge is used as the write clock for these memories. In this way, data for one field is stored in these memories. However, as described later, one new horizontal scanning line is generated by processing seven consecutive horizontal scanning lines H, so the upper memory MFMA1QU, 1QL, 1U, 1L is The last 3H worth of data to be written is simultaneously written to the middle stage memories MFMA2QU, 2QL, 2U, and 2L. The same applies to between the middle memory and the lower memory, and between the lower memory and the upper memory. In the same way as above, data for the next one field is stored in memories MFMB1U, 1L, 2U, 2.
QL, 3U, 3L, 1QU, 1QL, 2QU,
Written to 2QL, 3QU, and 3QL, respectively. In this way, memory MFMA1U to
Frame memory 3 configured by MFMB3QL
One frame's worth of data is stored in . Memory MFMA1 in the upper row of one field
The data written to U, 1L and 1QU, 1QL is read out at the negative and positive edges of the 11.3MHz clock and latched into latch circuits D31 and D41. The data latched in latch circuits D31 and D41 are input to latch circuit D51 operated by a 22.7 MHz clock and are combined. The data output from the latch circuit 51 is input to the vertical filter 41. Further, data stored in the upper memories MFMB1U, 1L, 1QU, and 1QL of the other field is similarly input to the vertical filter 41. Similarly, the memories in the middle of the two fields MFMA2QU, 2L, 2QU, 2QL,
The data of MFMB2U, 2L, 2QU, 2QL is sent to the vertical filter 42 via latch circuits D32, 42, 52, and to the lower memory MFMA3.
U, 3L, 3QU, 3QL, MFMBU, 3
The data of L, 3QU, 3QL is sent to the latch circuit D3.
3, 43, 53 to the vertical filter 43,
Each is input. FIG. 6 shows the configuration of the vertical filter 41 (and 42, 43 as well). The vertical filter 41 multiplies the 1H memories H1 to H7, which serve as delay means for delaying the input signal by 1H, by a predetermined coefficient.
It is composed of coefficient circuits K1 to K7 made of PROMs, etc., adder circuits A11 to A16, and latch circuits D61 to 67, 71 to 77, 81, and 82. These circuits are driven by a 22.68MHz clock. Coefficient circuits K1 to K7 change coefficients in 7H cycles. A certain 1H in a certain 1H interval in the vertical filter
When the signal output from the memory is Qn, the signal output from the memory in the next 1H interval is Qn ₊₁ , and the output of the vertical filter is Pi, the following equation holds true.

【table】

〔Effect of the invention〕

As described above, according to the present invention, a total of 12 NTSC
By arranging 4 CRTs horizontally and 3 vertically to form a single screen, we increased the number of horizontal scanning lines of the high-definition system by 7/5 times and supplied them separately to each CRT. It becomes possible to display high-quality images using an NTSC CRT.

[Detailed description of the invention]

Fig. 1 is a more detailed block diagram of the device shown in Fig. 5, Fig. 2 is an explanatory diagram of the NTSC system, Fig. 3 is an explanatory diagram of the high-vision system, and Fig. 4 is a CRT of the present invention.
5 is a block diagram of the television signal receiving apparatus of the present invention, FIG. 6 is a block diagram of the vertical filter in FIG. 1, and FIG. 7 is a timing chart of the vertical filter. 1...TV camera, 2...A/D converter, 3...
...Frame memory, 4...Vertical filter, 5...
CRT.

Claims (1)

[Scope of Claims] 1: an A/D converter for A/D converting a high-definition TV signal; a memory for storing at least one field of the A/D-converted TV signal; A vertical filter that converts the horizontal scanning lines of a book into the 7 horizontal scanning lines of an NTSC TV signal, and a total of 12 NTSC TVs, 4 horizontally and 3 vertically. A horizontal scanning line constituting one field is divided into three in the vertical direction, and the memory is configured in three stages and divided into three. A television signal receiving device in which each part is stored in each stage.