CN110008071B - Remote debugging device and method - Google Patents
Remote debugging device and method Download PDFInfo
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- CN110008071B CN110008071B CN201910225838.3A CN201910225838A CN110008071B CN 110008071 B CN110008071 B CN 110008071B CN 201910225838 A CN201910225838 A CN 201910225838A CN 110008071 B CN110008071 B CN 110008071B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2294—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by remote test
Abstract
The invention discloses a remote debugging method, which comprises the following steps: acquiring register data from a Central Processing Unit (CPU) through a tandem platform environment type control interface (PECI) bus; when the register data are determined to be abnormal, a control instruction and the register data are sent to a (Dash) network card through a serial bus (I2C), wherein the control instruction is used for indicating the (Dash) network card to send the register data to a remote debugging host, so that the remote debugging host carries out remote debugging on an abnormal object corresponding to the register data in a workstation.
Description
Technical Field
The present disclosure relates to remote debugging technologies, and in particular, to a remote debugging apparatus and method.
Background
A workstation is a high-end general-purpose microcomputer intended for single-user use and providing greater performance than a personal computer, particularly in terms of graphics processing, task parallelism, and the like. The workstation is usually equipped with a large screen with high resolution, a multi-screen display, and a large amount of internal and external memories, and has an extremely high information processing capability, as well as a high-performance graphic and image processing capability.
However, when a problem occurs in a workstation, since a Baseboard Management Controller (BMC) is not provided in the workstation, the prior art cannot implement remote debugging of the workstation when a problem occurs in software or hardware in the workstation.
Disclosure of Invention
In view of the above, the embodiments of the present invention are intended to provide a device and a method for remote debugging.
In order to achieve the above purpose, the technical solution of the embodiment of the present invention is realized as follows:
according to an aspect of an embodiment of the present invention, there is provided a remote debugging method, including:
register data is obtained from a Central Processing Unit (CPU) through a serial Platform Environment Control Interface (PECI);
when the register data are determined to be abnormal, a control instruction and the register data are sent to a Dash network card through a serial bus (I2C, Inter-Integrated Circuit), wherein the control instruction is used for indicating the Dash network card to send the register data to a remote debugging host, so that the remote debugging host carries out remote debugging on an abnormal object corresponding to the register data in a workstation.
In the above scheme, the determining that the register data is abnormal includes:
performing logic operation on the register data to obtain an operation result;
and determining that the register flag bit value in the operation result is different from a preset register flag bit value, and determining that the register data is abnormal.
In the foregoing solution, after the control instruction and the register data are sent to the Dash network card through I2C, the method further includes:
and receiving a processing result sent by the remote debugging host aiming at the register data.
According to another aspect of the embodiments of the present invention, there is provided a remote debugging apparatus, including:
the processor is used for acquiring register data from the CPU through the PECI bus; when the register data are determined to be abnormal data, sending a control instruction and the register data to a Dash network card through an I2C bus, wherein the control instruction is used for indicating the Dash network card to send the register data to a remote debugging host;
and the Dash network card is used for sending the register data to the remote debugging host according to the control instruction so that the remote debugging host can carry out remote debugging on the abnormal object corresponding to the register data in the workstation.
In the above scheme, the processor is further configured to perform a logic operation on the register data to obtain an operation result; and determining that the register flag bit value in the operation result is different from a preset register flag bit value, and determining that the register data is abnormal data.
In the above scheme, the processor is further configured to receive a processing result sent by the remote debugging host for the register data.
In the above scheme, the processor includes an embedded controller EC or a super input output chip ESIO.
According to a third aspect of embodiments of the present invention, there is provided a remote debugging apparatus, the apparatus including:
the processing unit is used for acquiring register data from a CPU through a PECI bus and sending the register data and a control instruction to the sending unit through I2C when the register data is determined to be abnormal data, wherein the control instruction is used for instructing the sending unit to send the register data to a remote debugging host;
and the sending unit is used for sending the register data to the remote debugging host according to the control instruction so that the remote debugging host can carry out remote debugging on the abnormal object corresponding to the register data in the workstation.
In the above scheme, the apparatus further comprises:
the processing unit is also used for carrying out logic operation on the register data to obtain an operation result; and the register flag bit value is also used for determining that the register data is abnormal data when the register flag bit value in the operation result is different from a preset register flag bit value.
In the foregoing solution, the processing unit is further configured to receive a processing result sent by the remote debugging host for the register data.
The invention provides a remote debugging device and a method, which acquire register data from a CPU through a serial PECI bus; when the register data are determined to be abnormal data, the register data and a control instruction are sent to a Dash network card through I2C, and the control instruction is used for indicating the Dash network card to send the register data to a remote debugging host; so that the debugging host can remotely debug the abnormal object corresponding to the register data in the workstation. Therefore, the abnormal register data is sent to the remote debugging host through the Dash network card, and the remote debugging host can remotely debug the abnormal object in the workstation.
Drawings
FIG. 1 is a schematic flow chart of a remote tuning method according to an embodiment of the present invention;
FIG. 2 is a first schematic structural diagram of a remote debugging apparatus according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a remote debugging apparatus according to an embodiment of the present invention.
Detailed Description
So that the manner in which the features and aspects of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings.
Fig. 1 is a schematic flow chart of a remote tuning method in an embodiment of the present invention, as shown in fig. 1, the method includes:
in the embodiment of the present invention, the method is mainly applied to a first remote debugging host, where the first remote debugging host may specifically be a workstation product, for example: the workstation product can be a high-grade special computer which professionally carries out graphic, image (static), image (dynamic) and video work, namely an image server.
In this application, an Embedded Controller (EC) or an ESIO (super input output) chip is disposed on a motherboard of the first remote debugging host, and the EC/ESIO is connected to a CPU on the motherboard by using a Platform Environment Control Interface (PECI) bus. The PECI bus is specifically a serial PECI bus, which is an interface with less functions and can only be used for reading the CPU temperature and part of the CPU registers. Also, the Serial PECI bus is a communication interface between the CPU and other chips, for example, the other chips include: a Baseboard Management Controller (BMC), an Embedded Controller (EC), a super input/output chip ESIO, a PCH, and other chips.
When the first remote debugging host needs to acquire the register data of the CPU, an instruction can be sent to a target CPU on the mainboard by the EC/ESIO directly through the PECI bus, wherein the instruction can be an instruction for acquiring the register information of the CPU. When the target CPU receives the instruction, the register information in the target CPU can be directly packed to form data which can be transmitted through the PECI bus, and the data containing the register information is returned to the EC/ESIO through the PECI bus.
In this application, the EC/ESIO is mainly used to transmit an instruction sent to the target CPU to acquire register data of the CPU, and to receive data sent by the target CPU and containing register information of the CPU.
102, when determining that the register data is abnormal, sending a control instruction and the register data to a Dash network card through a serial bus I2C, wherein the control instruction is used for instructing the Dash network card to send the register data to a remote debugging host, so that the remote debugging host carries out remote debugging on an abnormal object corresponding to the register data in a workstation.
In the embodiment of the present invention, the first remote debugging host is connected to a Dash Network card through an Intelligent Platform Management Interface (IPMI) of a Local Area Network (LAN) and a Wide Area Network (WAN), the Dash Network card is specifically a Network card chip with a Dash function, and the Dash Network card is connected to the EC/ESIO through a serial bus 12C.
When the EC/ESIO acquires the register data of the CPU, the EC/ESIO firstly performs logic operation on the acquired register data of the CPU to obtain an operation result; comparing the register flag bit value in the operation result with a preset register flag bit value to obtain a comparison result; and when the comparison result represents that the register flag bit value in the operation result is different from the preset register flag bit value, determining that the register data is abnormal, and at the moment, sending a control instruction and the abnormal register data to the Dash network card through I2C by the EC/ESIO. Here, the control instruction is mainly used to instruct the Dash network card to send the abnormal register data to the second remote debugging host, so that the second remote debugging host performs remote debugging on the abnormal object corresponding to the register data in the workstation.
In the application, when the Dash network card receives the control instruction and the abnormal register data, the abnormal register data can be sent to the second remote debugging host according to the control instruction, and therefore the second remote debugging host can obtain the register data of the CPU, and then the corresponding abnormal object in the workstation can be remotely debugged according to the register data of the CPU.
Here, the workstation includes a plurality of first remote debugging hosts, and the exception object may be one of the first remote debugging hosts in the workstation.
After the second remote debugging host debugs the abnormal object in the workstation based on the abnormal register data, the debugged result can be returned to the Dash network card, and the Dash network card receives the processing result sent by the second remote debugging host for the register data. Therefore, the remote debugging host can be used for remotely debugging the abnormal object in the workstation through the Dash network card.
In the application, when the remote debugging host is used for remotely debugging an abnormal object in the workstation, the remote debugging can be specifically realized by customizing ESIO/EC and Firmware (FW) of a Dash network card chip, and the specific realization method is as follows:
1. firstly, defining a software protocol for direct communication between an ESIO/EC and a Dash network card chip;
ESIO/EC reads the register of CPU, obtain the register data, and through carrying on the logical operation to the register data obtained, judge whether the register data are unusual;
3. when the ESIO/EC finishes processing the register data and determines that the register data is abnormal data, the ESIO/EC transmits the read register data to a Dash network card chip through an I2C bus by a software protocol defined by the Dash network card;
4, the Dash network card chip transmits the abnormal register data to the remote debugging host through IPMI;
5. and the remote debugging host carries out remote debugging on the corresponding abnormal object in the workstation according to the received register data, and returns a debugging result after the debugging is finished.
According to the embodiment of the invention, the abnormal register data is sent to the remote debugging host through the Dash network card, so that the remote debugging host can remotely debug the abnormal object in the workstation without extra hardware cost, and the implementation is very high.
Fig. 2 is a schematic structural composition diagram of a remote debugging apparatus in an embodiment of the present invention, as shown in fig. 2, the remote debugging apparatus includes: the remote debugging device comprises a remote debugging host 20, a Dash network card 21, a processor 22 and a CPU group 23, wherein the CPU group 23 may include more than one CPU, and the Dash network card 21, the processor 22 and the CPU group 23 may be located in another remote debugging device. The remote debugging means may be implemented by the processor 22 when it is performing remote debugging of an exception object in the workstation. Here, the processor 22 may be an integrated circuit chip having signal processing capabilities. In implementation, this may be done by hardware integrated logic circuits in processor 22 or instructions in the form of software. The Processor 22 may be a general purpose Processor, a Digital Signal Processor (DSP), or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. Processor 22 may implement or perform the methods, steps, and logic blocks disclosed in embodiments of the present invention. A general purpose processor may be a microprocessor or any conventional processor or the like. The steps of the method disclosed by the embodiment of the invention can be directly implemented by a hardware decoding processor, or can be implemented by combining hardware and software modules in the decoding processor.
In this application, the processor 22 includes either the EC221 or the ESIO 222.
Specifically, when the remote debugging apparatus needs to acquire the register data of the CPU, an instruction, which may be an instruction to acquire the register information of the CPU, may be sent to the target CPU in the CPU group 23 through the PECI bus by the EC221 or the ESIO 222. When the target CPU receives the instruction, it may directly package the register information of the CPU in itself to form data that can be transmitted through the PECI bus, and then return the data containing the register information of the CPU to the EC221 or the ESIO222 through the PECI bus.
After the EC221 or the ESIO222 acquires the register data, firstly, performing logical operation on the register data to obtain an operation result; and then comparing the flag bit value in the operation result with a preset flag bit value to obtain a comparison result. When the comparison result indicates that the flag bit value in the operation result is different from the preset flag bit value, it is determined that the register data is abnormal data, and a control instruction and the abnormal register data are sent to the Dash network card 21 through the I2C bus, where the control instruction is used to instruct the Dash network card 21 to send the abnormal register data to the remote debugging host 20.
After receiving the control instruction and the register data, the Dash network card 21 sends the register data to the remote debugging host 20 according to the control instruction, so that the remote debugging host 20 remotely debugs an abnormal object corresponding to the abnormal register data in the workstation.
After the remote debugging host 20 finishes remote debugging of the abnormal object of the register data corresponding to the abnormality in the workstation, the debugging result is sent to the processor 22 through the Dash network card 21.
Processor 22 receives the processing result sent by remote debugging host 20 for the register data, and stores the processing result for later review by a technician.
It should be noted that: the PECI bus is used for realizing connection communication among the components, and the PECI bus can also comprise a data bus, a power supply bus, a control bus and a status signal bus.
Fig. 3 is a schematic structural composition diagram of a remote debugging apparatus in an embodiment of the present invention, and as shown in fig. 3, the apparatus includes:
the processing unit 301 is configured to obtain register data from a CPU through a PECI bus, and when it is determined that the register data is abnormal data, send the register data and a control instruction to a sending unit through I2C, where the control instruction is used to instruct the sending unit to send the register data to a remote debugging host;
a sending unit 302, configured to send the register data to the remote debugging host according to the control instruction, so that the remote debugging host performs remote debugging on an abnormal object corresponding to the register data in a workstation.
In this application, the processing unit 301 is further configured to perform a logic operation on the register data to obtain an operation result; and the register flag bit value is also used for determining that the register data is abnormal data when the register flag bit value in the operation result is different from a preset register flag bit value.
In this application, the processing unit 301 is further configured to receive a processing result sent by the remote debugging host for the register data.
It should be noted that: in the above embodiment, when performing remote debugging on an abnormal object in a workstation, the remote debugging apparatus is described by way of example only by dividing the program modules, and in practical applications, the processing may be distributed to different program modules according to needs, that is, the internal structure of the remote debugging apparatus is divided into different program modules to complete all or part of the processing described above. In addition, the remote debugging apparatus provided in the above embodiment and the remote debugging method embodiment belong to the same concept, and specific implementation processes thereof are detailed in the method embodiment and are not described herein again.
In an exemplary embodiment, the present invention further provides a computer readable storage medium, such as a memory, including a computer program, which is executable by the processor 22 of the remote debugging apparatus to perform the steps of the aforementioned method. The computer readable storage medium can be Memory such as FRAM, ROM, PROM, EPROM, EEPROM, Flash Memory, magnetic surface Memory, optical disk, or CD-ROM; or may be a variety of devices including one or any combination of the above memories, such as a mobile phone, computer, tablet device, personal digital assistant, etc.
A computer-readable storage medium, on which a computer program is stored which, when executed by a processor, performs: acquiring register data from a Central Processing Unit (CPU) through a serial platform environment type control interface (PECI) bus; when the register data are determined to be abnormal, a control instruction and the register data are sent to a Dash network card through a serial bus I2C, wherein the control instruction is used for indicating the Dash network card to send the register data to a remote debugging host, so that the remote debugging host can carry out remote debugging on an abnormal object corresponding to the register data in a workstation.
The computer program, when executed by the processor, further performs: performing logic operation on the register data to obtain an operation result; and determining that the register flag bit value in the operation result is different from a preset register flag bit value, and determining that the register data is abnormal.
The computer program, when executed by the processor, further performs: and receiving a processing result sent by the remote debugging host aiming at the register data.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (10)
1. A method of remote debugging, the method comprising:
acquiring register data from a Central Processing Unit (CPU) by an Embedded Controller (EC) or a super input and output (ESIO) chip through a serial platform environment type control interface (PECI) bus;
when the register data are determined to be abnormal, a control instruction and the register data are sent to a Dash network card through a serial bus I2C, wherein the control instruction is used for indicating the Dash network card to send the register data to a remote debugging host, so that the remote debugging host can carry out remote debugging on an abnormal object corresponding to the register data in a workstation.
2. The method of claim 1, the determining that the register data is anomalous comprising:
performing logic operation on the register data to obtain an operation result;
and determining that the register flag bit value in the operation result is different from a preset register flag bit value, and determining that the register data is abnormal.
3. The method of claim 1, after said sending control instructions and said register data to a Dash network card through I2C, the method further comprising:
and receiving a processing result sent by the remote debugging host aiming at the register data.
4. A remote commissioning apparatus, the apparatus comprising:
the processor is used for acquiring register data from the CPU through the PECI bus; when the register data are determined to be abnormal data, sending a control instruction and the register data to a Dash network card through an I2C bus, wherein the control instruction is used for indicating the Dash network card to send the register data to a remote debugging host; the processor comprises EC or ESIO;
and the Dash network card is used for sending the register data to the remote debugging host according to the control instruction so that the remote debugging host can carry out remote debugging on the abnormal object corresponding to the register data in the workstation.
5. The apparatus of claim 4, the processor further configured to perform a logical operation on the register data to obtain an operation result; and determining that the register flag bit value in the operation result is different from a preset register flag bit value, and determining that the register data is abnormal data.
6. The apparatus of claim 4, the processor further to receive a processing result of the remote debug host sent for the register data.
7. The apparatus of claim 4, the processor comprising an Embedded Controller (EC) or a super input output (ESIO) chip.
8. A remote commissioning apparatus, the apparatus comprising:
the processing unit is used for acquiring register data from a CPU through a PECI bus and sending the register data and a control instruction to the sending unit through I2C when the register data is determined to be abnormal data, wherein the control instruction is used for instructing the sending unit to send the register data to a remote debugging host; the processing unit has an EC or ESIO function;
and the sending unit is used for sending the register data to the remote debugging host according to the control instruction so that the remote debugging host can carry out remote debugging on the abnormal object corresponding to the register data in the workstation.
9. The apparatus of claim 8, the processing unit further configured to perform a logical operation on the register data to obtain an operation result; and the register flag bit value is also used for determining that the register data is abnormal data when the register flag bit value in the operation result is different from a preset register flag bit value.
10. The apparatus of claim 8, the processing unit to further receive a processing result of the remote debugging host for the register data transmission.
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