Independent keyboard scanning circuit and method
Technical field
The present invention relates to a kind of scanning circuit of keyboard, especially a kind of independent keyboard scanning circuit and method.
Background technology
With the continuous development of embedded technology, current each electronic product is generally using microcontroller as control core
The heart, keyboard are widely used as main input equipment.
Current keyboard scan mainly controlled by microcontroller, it is necessary to by run the program in microcontroller come into
Row, runs into interference, program is caused to run fast, and scanning imaging system is by cisco unity malfunction.
A kind of patent of invention " fast scanning and positioning method of matrix keyboard " of Application No. CN201010153560.2 is adopted
Enter the Scan orientation process of keyboard with the mode that keyboard interrupt triggers, judged using the method that keyboard scan step is repeated several times
Whether button is effective, and the key assignments to being obtained carries out condition adjudgement;If multiple repairing weld state is identical, it is in and stablizes shape
State, key assignments are effective;If multiple repairing weld state is different, key assignments is invalid.Single key stroke or combination key operation need individually judgement, such as
It is single key stroke, then into singly-bound tupe;Key operation is combined in this way, then into Macintosh tupe.Described in the patent
Method solves since keyboard caused by the mechanical property of keyboard itself is shaken and causes the Problem-Errors such as wrong key, continuous touching,
And the support issue to Macintosh and repeat key.But the method single key stroke needs to handle respectively with combining key operation;
Not accounting for keyboard state maintains a period of time just to perform the keyboard operation function of effectively operating after;Increase and decrease button operation function
, it is necessary to change keyboard scan finder structure when either adjusting button operation function.
The content of the invention
In order to solve above-mentioned technical problem existing for existing keyboard scan localization method, the present invention provides a kind of stand alone types
Keyboard scanning circuit and method, the independent keyboard scanning circuit is by independent keyboard, the first shift register, the second displacement
Register, state Code memory, encoder composition.
The independent keyboard scanning circuit synchronizes control by scanning impulse, shift pulse.
The independent keyboard shares N number of button, equipped with N bit keyboard status signal outputs;The N bit keyboards state letter
Number be level signal.
First shift register has the function of the input of N parallel-by-bits and Serial output;The second shift LD utensil
There are serial input and 2 × N parallel-by-bit output functions.
The N parallel-by-bit input terminals of first shift register are connected to N bit keyboard status signal outputs;Second displacement
The serial input terminal of register is connected to the serial output terminal of the first shift register;First shift register, the second displacement are posted
The shift pulse input terminal of storage is connected to shift pulse, and the presetting pulse input terminal of the first shift register is connected to scanning
Pulse.The presetting pulse of first shift register is used to carry out the N parallel-by-bits input data of the first shift register defeated
Enter to latch.
The state Code memory is 2 × N binary registers;2 × N positions data input pin in state Code memory
It is connected to 2 × N parallel-by-bit output terminals of the second shift register;The reception pulse input end of the state Code memory is connected to
Scanning impulse.
The encoder has 2 × N coding input ends, and the 2 × N coding input end is connected to state Code memory
2 × N data output ends.
The scanning impulse, the sequential of shift pulse meet claimed below:In one cycle, scanning impulse has 1 arteries and veins
Punching, shift pulse have N number of pulse;The scanning impulse, shift pulse are all according to the order of 1 scanning impulse, N number of shift pulse
And it renews.
The cycle of the scanning impulse is 20~100ms.
First shift register, the shift pulse edge of the second shift register are effective.
The presetting pulse of first shift register is effective for edge;Either, first shift register is pre-
Put pulse for high level it is effective when, it is desirable that scanning impulse is positive pulse;The presetting pulse of first shift register is low electricity
When flat effective, it is desirable that scanning impulse is negative pulse.
The encoder is read-only memory.
2 × N positions data output end of the state Code memory exports the conditional code of 2 × N;The conditional code is by effective
Conditional code and disarmed state code composition;The key number of the encoder output is made of effective key number and invalid key number;It is described effective
Conditional code is generated by effective keyboard operation or state, and encoder corresponds to output when inputting each effective status code corresponding effective
Key number;The disarmed state code is generated by invalid keyboard operation or state, and encoder inputs all corresponding during all disarmed state codes
Export invalid key number.
The encoder has M key output terminals, and the selection of M values should meet 2MMore than or equal to effective key number and invalid key number
The sum of quantity.
The independent keyboard scanning circuit further includes keyboard state change pulse generation unit, for judging free-standing key
Whether the key number of disk output changes, when the key number of independent keyboard output changes, output keyboard state variation arteries and veins
Punching.
The keyboard state change pulse generation unit is made of OR gate, M delay buffers and M XOR gate;M are prolonged
Slow buffer is used to carry out signal delay respectively to the M positions key number of independent keyboard output;The input of M XOR gate is respectively M
The input of position delay buffer, output signal;The output of M XOR gate is respectively connected to the input terminal of OR gate;The output of OR gate
End output keyboard state change pulse.
Meet one-to-one relationship between the N bit keyboards status signal and N number of button.
The N positions, 2 × N, M refer both to binary digit data.
The beneficial effects of the invention are as follows:The Scan orientation of state will be maintained to single key stroke, combination key operation, keyboard, by
Meet scanning impulse, shift pulse that specific time sequence requires and control the conditional code for being converted into same binary length, using unified
The mode of coding is handled, and single key stroke, combination key operation, keyboard maintain state to operate the difference for being only embodied in conditional code
On;Button operation function is either adjusted if necessary to increase and decrease button operation function, keyboard scanning circuit structure need not be changed,
Encoder need to be only changed according to the correspondence between the conditional code after increase and decrease and key number, re-writes depositing for read-only memory
Store up content.The invention circuit is not using microcontrollers such as microcontroller, ARM, without operation program, reliable operation.
Description of the drawings
Fig. 1 is independent keyboard scanning circuit functional block diagram;
Fig. 2 is the independent keyboard circuit diagram of the embodiment of the present invention;
Fig. 3 is the scanning encoding circuit diagram of the embodiment of the present invention;
Fig. 4 is the pulse sequence figure of the embodiment of the present invention;
Fig. 5 is the impulse circuit schematic diagram of the embodiment of the present invention;
Fig. 6 is the circuit diagram of the keyboard state change pulse generation unit of the embodiment of the present invention;
Fig. 7 is the waveform correlation schematic diagram that the keyboard of the embodiment of the present invention effectively operates.
Specific embodiment
Below in conjunction with attached drawing, the invention will be further described.
Fig. 1 is independent keyboard scanning circuit functional block diagram, by independent keyboard 400, the first shift register 100,
Two shift registers 200, state Code memory 500, encoder 300 form.
Fig. 2 is the circuit diagram of the independent keyboard 400 of the embodiment of the present invention, shares 4 buttons, by button S1, button S2,
Button S3, button S4 and it is connected to the pull-up resistor R1 of power supply+VCC, pull-up resistor R2, pull-up resistor R3, pull-up resistor R4 groups
Into.4 output terminals of independent keyboard 400 correspond output key S1, button S2, button S3, the state of button S4 respectively
Signal I1, I2, I3, I4, during by key pressing, the status signal of corresponding output end is low level;It is corresponding to export when button is not pressed
The status signal at end is high level.
The first shift register 100, the second shift register 200, state Code memory 500, encoder 300 in Fig. 1
Scanning circuit is formed, embodiment circuit diagram is as shown in Figure 3.The status signal of embodiment independent keyboard circuit output has 4,
Therefore, to have the function of input, 4 binary shift registers of Serial output parallel, second moves the first shift register 100
Bit register 200 is 8 binary shift registers for having the function of serial input, parallel output.First shift register 100
4 parallel input terminal L0~L3 be sequentially connected to I1, I2, I3, I4, the serial input terminal D2 of the second shift register 200 connects
It is connected to the serial output terminal Q1 of the first shift register 100.The displacement of first shift register 100, the second shift register 200
Pulse input end CLK1, CLK2 are connected to shift pulse CP2, the presetting pulse input terminal CLK0 of the first shift register 100
It is connected to scanning impulse CP1.
Requirement 8 bit binary datas of deposit of state Code memory 500,8 data input pin D57~D50 are connected to the
8 parallel-by-bit output terminal Q27~Q20 of two shift registers 200;The reception pulse input end CLK5 of state Code memory 500 connects
It is connected to scanning impulse CP1.
8 input terminal A7~A0 of encoder 300 be connected to 8 data output end Q57 of state Code memory 500~
Q50.Encoder 300, which exports, is scanned through 4 definite binary system keys number of coding.
In Fig. 3 embodiments, the first shift register 100 can select have parallel input, Serial output by 74HC165 etc.
The medium-scale integration shift register of function is formed or is made of edge triggered flip flop.Second shift register 200 can select
Select by 74HC164 etc. there is serial input, the medium-scale integration shift register of parallel output forms or is touched by edge
Send out device composition.When forming the first shift register 100, the second shift register 200 by edge triggered flip flop, preferably by edging trigger
D type flip flop composition.State Code memory 500 is made of edge triggered flip flop, is preferably made of the d type flip flop of edging trigger, example
Such as, selecting double D trigger 74HC74, either 4D triggers 74HC175 or 8D trigger 74HC273 is formed.
In Fig. 3 embodiments, encoder 300 is read-only memory.Address input end A7~A0 of read-only memory is coding
The input terminal of device 300, data output end D3~D0 of read-only memory are coding output terminal C3~C0 of encoder 300.
The scan method and operation principle of independent keyboard scanning circuit are as follows:
Scanning encoding circuit scanning impulse CP1, shift pulse CP2 control under work, relevant pulse sequence figure is such as
Shown in Fig. 4.
The sequential of CP1, CP2 meet claimed below in embodiment:In one cycle, CP1 has 1 pulse, and CP2 has 4
Pulse;Each pulse according to 1 CP1 pulse, 4 CP2 pulses order in cycles.
Meeting CP1, CP2 pulse of timing requirements can be generated by various pulsqe distributors, and Fig. 5 is the embodiment of the present invention
Impulse circuit schematic diagram is made of oscillator 801, counter 802, pulsqe distributor 803.Clock pulse CP in Fig. 4 is by shaking
Device generation is swung, CP send to counter 802 and counted, and counter 802 is 10 system Counters, and 10 states of result P (count
Value) P0 → P9 is followed successively by, as shown in Figure 4.Pulsqe distributor 803 in embodiment is realized using ROM memory, hereon referred to as arteries and veins
Punching distribution ROM memory.The address input of pulse distribution ROM memory is connected to the counting output of counter 802, pulse distribution
2 data output ends of ROM memory are exported respectively as CP1 pulses, CP2 pulses.The write-in content of pulse distribution ROM memory
It is shown in Table 1.
1 pulse distribution ROM memory tables of data of table
The output of ROM memory address in table 1, i.e. counter is at least 4 binary codes.Under normal circumstances, counter
If 802 is regular using binary addition, corresponding 4 binary codes 0000~1001 of P0~P9 orders, i.e. ROM memory
Location scope is 0000~1001, and the storage content of address 0000~1001 is the corresponding contents of P0~P9 in table 1.
Pulse distribution ROM memory needs 2 data outputs.If the address input of pulse distribution ROM memory has R,
When independent keyboard has the output of N bit keyboards status signal, the selection of R needs satisfaction 2RMore than or equal to 2 × (N+1).
Oscillator 801 is multivibrator.The cycle of scanning impulse CP1 is 20~100ms.CP1, CP2 can also be by only
Circuit or device outside vertical keyboard scanning circuit provide.
First shift register 100 is under the control of scanning impulse CP1, to the status signal of the output of independent keyboard 400
I1, I2, I3, I4 carry out data input latch, and the data of the latch inside the first shift register 100 are known as current key at this time
Value.Second shift register 200, via the control of 8 CP2 pulses, the first two current key assignments is shifted in two cycles before
To 200 output terminal of the second shift register, 4 digits first moved into the second shift register 200 output at this time are stated to be existing state
Key assignments, state key assignments before 4 digits moved into afterwards are stated to be.
Existing state key assignments that scanning impulse CP1 exports the second shift register 200, preceding state key assignments are latched in conditional code deposit
The output terminal of device 500, the output of state Code memory 500 are similarly preceding state key assignments and existing state key assignments.
First shift register 100, the equal edge of shift pulse of the second shift register 200 are effective, and therefore, CP2 can be with
It is positive pulse or negative pulse.
When the presetting pulse of first shift register 100 is that edge is effective, scanning impulse CP1 can be negative pulse, also may be used
Think positive pulse;When the presetting pulse of first shift register 100 is that high level is effective, it is desirable that scanning impulse CP1 is positive pulse;
When the presetting pulse of first shift register 100 is that low level is effective, it is desirable that scanning impulse CP1 is negative pulse.For example, first moves
When bit register 100 selects to be made of 74HC165, presetting pulse is effective for low level, and therefore, scanning impulse CP1 is negative arteries and veins
Punching.
In embodiment, the 4 existing state key assignments and 4 preceding state key assignments of 500 data output end of state Code memory output are common
Form 8 conditional codes.8 conditional codes are used to identify the current state and mode of operation of independent keyboard.For example, this reality
It applies in example, the conditional code of no key pressing is 11111111;The conditional code of S1 key singly-bound pushes is 11111110;S1 key singly-bounds
The conditional code pressed and maintained is 11101110;The conditional code of S1 keys singly-bound release operation is 11101111;S2 key singly-bounds are pressed
The conditional code of operation is 11111101;The conditional code of S4 key singly-bound pushes is 11110111;The S1 of S2+S1 combination operations is pressed
Lower operation after expression first presses S2, presses the operation of S1, the conditional code of the operation is again in the state that S2 maintenances are pressed
11011100。
Encoder 300 is used to conditional code being converted to key number.In embodiment, equipped with 7 effective keyboard operations and state,
Including:
Operation 0:The singly-bound push of button S1, key number are 0000;
Operation 1:The singly-bound push of button S2, key number are 0001;
Operation 2:The singly-bound push of button S3, key number are 0010;
Operation 3:Button S3 singly-bounds press after maintenance state, key number be 0011;
Operation 4:After button S4 singly-bounds are pressed, then the combination key operation of S1 is pushed button, key number is 0100;
Operation 5:After button S4 singly-bounds are pressed, then the combination key operation of S2 is pushed button, key number is 0101;
Operation 6:The singly-bound release operation of button S1, key number is 0110.
The conditional code and key number obtained according to above-mentioned regulation is shown in coding schedule 2:
2 coding schedule of table
Keyboard operation |
Conditional code (address) |
Key number (storage data) |
S1 singly-bounds are pressed |
11111110 |
0000 |
S2 singly-bounds are pressed |
11111101 |
0001 |
S3 singly-bounds are pressed |
11111011 |
0010 |
S3 singly-bounds press maintenance |
10111011 |
0011 |
S4+S1 combination operations |
01110110 |
0100 |
S4+S2 combination operations |
01110101 |
0101 |
S1 singly-bounds discharge |
11101111 |
0110 |
Other operations or state |
******** |
1111 |
Encoder 300 is combinational logic circuit, and the circuit of design meets the logical relation of table 2.
The encoder 300 of embodiment is preferably made of read-only memory.Selected read-only memory has 8 bit address, and totally 28A 4
Position binary storage cell.7 effective keyboard operations have 7 effective status codes, corresponding 7 effective keys number with state;It will
Address A7~A0 of the conditional code as read-only memory, in 7 corresponding storage units of effective status code, inciting somebody to action accordingly
Key number is as storage data write-in.7 effective keyboard operations are disarmed state code, i.e. table with the conditional code generated outside state
It is disarmed state code caused by other operations or state in 2;In other storage units, invalid key number, nothing are all write
Key number is imitated as a value outside 7 effective keys number, in embodiment, invalid key number is 1111.
Read-only memory always works at data output state.When there is read-only memory piece selected control system, data output to delay
When rushing control function, its piece selected control system, data output cushioning control should be made to be in effective status.
Key number in embodiment is 4 binary codes.The number of bits of key number can increase or subtract as needed
It is few, at this point, need to only select the read-only memory to match with this.If the number of bits of key number is M, the selection of M values should
Meet 2MMore than or equal to the sum of effective key number and quantity of invalid key number.When independent keyboard has the output of N bit keyboards status signal
When, read-only memory needs the input of 2 × N bit address, M-bit data output.
Button operation function is either adjusted if necessary to increase and decrease button operation function, only need to change table 2 as needed, it will
Amended content re-writes the storage content of read-only memory.
The edge of scanning impulse CP1 at the time of state Code memory 500 is carried out data latch is known as state latch edge,
It is the rising edge of CP1 in embodiment.In embodiment, when independent keyboard S1 singly-bounds are pressed, encoder 300 is pressed in S1 singly-bounds
Under, the state latch by the preset and next CP1 pulses of CP1 pulses by conditional code along after being latched in state Code memory 500, and one
In a CP1 pulse periods, coding output terminal C3~C0 run-out keies number 0000;When independent keyboard S2 singly-bounds are pressed, encoder
300 press in S2 singly-bounds, and the state latch by the preset and next CP1 pulses of CP1 pulses is latched in conditional code along by conditional code
After register 500, in a CP1 pulse period, run-out key number 0001;After independent keyboard first presses S4, then S1 is pressed, compiled
Code device 300 combines key pressing in S1, and conditional code is latched in by the state latch edge by the preset and next CP1 pulses of CP1 pulses
After state Code memory 500, in a CP1 pulse period, run-out key number 0100;After independent keyboard first presses S4, then press
Lower S2, encoder 300 combine key pressing in S2, and the state latch edge by the preset and next CP1 pulses of CP1 pulses is by conditional code
After being latched in state Code memory 500, in a CP1 pulse period, run-out key number 0101;When independent keyboard S1 singly-bounds discharge
When, encoder 300 is discharged in S1 singly-bounds, and conditional code is latched on the state latch edge by the preset and next CP1 pulses of CP1 pulses
After state Code memory 500, in a CP1 pulse period, run-out key number 0110;It can therefore be seen that when what is identified is only
During effective button operation of vertical keyboard, the output duration after effective button operation of encoder 300 is a CP1 cycle
Effective key number of width.
In embodiment, when independent keyboard S3 singly-bounds are pressed, encoder 300 is pressed in S3 singly-bounds, pre- by CP1 pulses
It puts with the state latch of next CP1 pulses along after conditional code is latched in state Code memory 500, in a CP1 pulse period,
Run-out key number 0010;Start on the state latch edge of next CP1, terminate until S3 singly-bounds press maintenance state, by CP1 arteries and veins
The state latch of preset and next CP1 pulses is rushed along after conditional code is latched in state Code memory 500, encoder 300 exports
Key number 0011;It can therefore be seen that when identification be the maintenance state of independent keyboard when, encoder 300 exports effective key number
Duration and the duration of the maintenance state be adapted.
When outside the state of keyboard or operation is 7 effective keyboard operations described in table 2 and states, encoder
300 output invalid keys number 1111.Effective key number or output invalid key number are either exported, encoder 300 changes output content
At the time of for CP1 state latch edge;In embodiment, encoder 300 changes at the time of exporting content as the rising edge of CP1.
The cycle of CP1 is the scan period of independent keyboard.The keyboard scan cycle in more than 20ms, can effectively keep away
The influence of key point disk key jitter;The keyboard scan cycle in below 100ms, is unlikely to omit keyboard operation;Therefore, CP1
Cycle should be controlled in 20~100ms.
Due to CP1 pulses in state latch along being latching to the conditional code of state Code memory 500 as preceding state key assignments and existing state
Key assignments, the current key assignments after button operation need one CP1 pulse period of delay that existing state key assignment combination could be used as to become state
Code, therefore, after key pressing, also there are one the delays of CP1 pulse periods for run-out key No. 300 of encoder.Since button is by artificial
Operation, the time delay of tens ms in operation on not influencing.
Fig. 6 is the circuit diagram of the keyboard state change pulse generation unit of the embodiment of the present invention.What it is when identification is stand alone type
During effective button operation of keyboard, the state latch edge of CP1 of the encoder 300 after effective button operation starts, until next
Until the state latch edge of a CP1, output duration is effective key number of a CP1 periodic width.Receive the stand alone type
The device of keyboard output is, it is necessary to which the output of moment inquiry independent keyboard, obtains key number.The period distances of inquiry are necessarily less than
The cycle of CP1.
Circuit shown in Fig. 6 is used to judge whether the key number of independent keyboard output changes, when independent keyboard exports
Key number when changing, keyboard state change pulse is exported, for the reception device of independent keyboard to be aided in receive stand alone type
The key number of keyboard output, for example, using keyboard state change pulse as the interrupt request singal of reception device.
Circuit shown in Fig. 6 by delay buffer 601, XOR gate 602, XOR gate 603, XOR gate 604, XOR gate 605 or
Door 606 forms.By only having 4 edge triggered flip flops of Trigger Function to form, 4 edge triggered flip flops touch delay buffer 601
The reception pulse input end that input terminal is delay buffer 601 is sent out, is connected to CP1;Delay buffer 601 is in the state of CP1
It latches along progress data latch.
Delay buffer 601 is used to carry out at delay 4 data C3~C0 of the coding output terminal of encoder 300 respectively
Reason.4 data input pin D63~D60 of delay buffer 601 are connected to coding output terminal C3~C0 of encoder 300, delay
The data that 4 data output end Q63~Q60 of buffer 601 are accordingly exported are C31~C01;C31~C01 is buffered by delay
After the first-level buffer of device 601, signal postpones a CP1 pulse period than C3~C0, and Fig. 7 show the key of the embodiment of the present invention
The waveform correlation schematic diagram that disk effectively operates.The T1 sections of CP1 pulses are located at, independent keyboard has once effectively operation, real
Applying effective operation of example includes:S1 singly-bounds are pressed, S2 singly-bounds are pressed, S3 singly-bounds are pressed, the S1 of S4+S1 combination operations is pressed, S4+
The S2 of S2 combination operations is pressed, the release of S1 singly-bounds.On the next state latch edge once effectively operated, i.e. CP1 pulses in Fig. 7
Rising edge after T1 sections, coding C3~C0 that encoder 300 exports change;In T2 sections, the output of encoder 300 one
Efficient coding C3~C0 of a CP1 pulse periods;In T3, T4 and section afterwards, coding C3~C0 that encoder 300 exports is another
Secondary change and enter maintenance state, which may be that such as S1 singly-bounds press maintenance state below, export invalid key
Number, it is also possible to S3 singly-bounds press maintenance state below, export effective key number, until effectively operation next time.
Coding C3~C0 that D6 pulses in Fig. 7 schematically illustrate the output of encoder 300 is in maintenance state, is not become
Change, still change, the D6 pulses are not present in actual circuit.As shown in fig. 7, D6 pulses are low level, illustrate table
Show that coding C3~C0 that encoder 300 exports is in maintenance state, do not change;D6 pulses are high level, schematically illustrate volume
Code device 300 exports efficient coding C3~C0 of a cycle.What the Q6 in Fig. 7 reflected is the situation of change of C31~C01, it is clear that
Q6 postpones a CP1 pulse period than D6.Equally, the Q6 pulses are not present in actual circuit.
In Fig. 7, coding C3~C0 that encoder 300 exports is in maintenance state, does not change, still changes,
Really by 606 4 delay buffers 601, XOR gate 602, XOR gate 603, XOR gate 604, XOR gate 605, OR gate groups
Into logic circuit complete.1 corresponding, input point that 4 XOR gates encode in output terminal C3~C0 respectively with encoder 300
Not Wei 4 delay buffers 601 input, output signal.For example, two input signals of XOR gate 602 be respectively C0 and
C01, C01 postpone a CP1 pulse period than C0, and therefore, when C0 changes, XOR gate 602 exports 1 CP1 pulses week
The positive pulse of phase width;When C0 is a CP1 pulse period change width signal, XOR gate 602 exports 2 CP1 pulses weeks
The positive pulse of phase width.XOR gate 603, XOR gate 604, XOR gate 605 judge whether C1~C3 changes respectively, principle with
It is identical to judge whether C0 changes.XOR gate 602, XOR gate 603, XOR gate 604, the output terminal of XOR gate 605 connect respectively
The input terminal of OR gate 606 is connected to, whether OR gate 606 changes for comprehensive descision C0~C3, as long as C0~C3 changes,
OR gate 606 exports keyboard state change pulse F, which is positive pulse.
In embodiment, delay buffer 601 selects the 8D triggers 74HC273 of rising edge triggering.
Delay buffer 601 can also use other schemes, for example, using RC circuits, using 4 RC circuits respectively to C0
~C3 is postponed;If the time delay of RC circuits is less than a CP1 pulse period, encoder 300 exports a cycle
Efficient coding C3~C0 when, output efficient coding C3~C0 start and export efficient coding C3~C0 terminate all generation one
Keyboard state change pulse, the width of keyboard state change pulse are equal to RC circuit delay times;If during the delay of RC circuits
Between be more than or equal to a CP1 pulse period, then encoder 300 export a cycle efficient coding C3~C0 when, have in output
Effect coding C3~C0 generates a keyboard state change pulse when starting, which is more than or equal to 2 CP1 pulse periods.
It is required that the time delay of RC circuits is no more than 2 CP1 pulse periods, failed to report in order to avoid generating.
In the invention circuit, the positioning of state operation will be maintained to single key stroke, combination key operation, keyboard, by full
2 Pulse Width Controls of sufficient specific time sequence requirement are converted into the conditional code of same binary length, by the way of Unified coding into
Row processing, single key stroke, combination key operation, keyboard maintain state operation to be only embodied in not being same as above for conditional code;If necessary to increase
Subtract button operation function and either adjust button operation function, keyboard scanning circuit structure need not be changed, it only need to be according to increase and decrease
State code table afterwards updates encoder 300, the storage content for re-writing update read-only memory.The invention circuit
Not using microcontrollers such as microcontroller, ARM, without operation program, reliable operation.