ZA857240B - Access verification arrangement for digital data processing system which has demand-paged memory - Google Patents

Access verification arrangement for digital data processing system which has demand-paged memory

Info

Publication number
ZA857240B
ZA857240B ZA857240A ZA857240A ZA857240B ZA 857240 B ZA857240 B ZA 857240B ZA 857240 A ZA857240 A ZA 857240A ZA 857240 A ZA857240 A ZA 857240A ZA 857240 B ZA857240 B ZA 857240B
Authority
ZA
South Africa
Prior art keywords
demand
data processing
processing system
digital data
access verification
Prior art date
Application number
ZA857240A
Other languages
English (en)
Inventor
Richard L Sites
Stanley A Lackey
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of ZA857240B publication Critical patent/ZA857240B/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491—Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Storage Device Security (AREA)
ZA857240A 1984-09-21 1985-09-20 Access verification arrangement for digital data processing system which has demand-paged memory ZA857240B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US65351184A 1984-09-21 1984-09-21

Publications (1)

Publication Number Publication Date
ZA857240B true ZA857240B (en) 1986-05-28

Family

ID=24621184

Family Applications (1)

Application Number Title Priority Date Filing Date
ZA857240A ZA857240B (en) 1984-09-21 1985-09-20 Access verification arrangement for digital data processing system which has demand-paged memory

Country Status (11)

Country Link
US (1) US4821169A (fr)
EP (1) EP0175620B1 (fr)
JP (1) JPS61114353A (fr)
KR (1) KR860002759A (fr)
AU (1) AU578732B2 (fr)
BR (1) BR8504729A (fr)
CA (1) CA1237200A (fr)
DE (1) DE3587031T2 (fr)
IN (1) IN165278B (fr)
MX (1) MX158239A (fr)
ZA (1) ZA857240B (fr)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5023773A (en) * 1988-02-10 1991-06-11 International Business Machines Corporation Authorization for selective program access to data in multiple address spaces
US5301327A (en) * 1989-06-30 1994-04-05 Digital Equipment Corporation Virtual memory management for source-code development system
US5463778A (en) * 1989-11-16 1995-10-31 Texas Instruments Incorporated User controlled trap handler
US5075845A (en) * 1989-12-22 1991-12-24 Intel Corporation Type management and control in an object oriented memory protection mechanism
JP2796162B2 (ja) * 1990-02-21 1998-09-10 富士通株式会社 命令処理方法
US5564052A (en) * 1991-06-27 1996-10-08 Integrated Device Technology, Inc. Logically disconnectable virtual-to-physical address translation unit and method for such disconnection
US5539899A (en) * 1992-04-03 1996-07-23 International Business Machines Corporation System and method for handling a segmented program in a memory for a multitasking data processing system utilizing paged virtual storage
US5548739A (en) * 1993-11-04 1996-08-20 Sun Microsystems, Inc. Method and apparatus for rapidly retrieving data from a physically addressed data storage structure using address page crossing predictive annotations
US5657445A (en) * 1996-01-26 1997-08-12 Dell Usa, L.P. Apparatus and method for limiting access to mass storage devices in a computer system
KR20000021076A (ko) * 1998-09-25 2000-04-15 김영환 네트워크 방식의 커넥션에 의한 디지털시스템의 다이나믹 제어장치
US7765581B1 (en) * 1999-12-10 2010-07-27 Oracle America, Inc. System and method for enabling scalable security in a virtual private network
GB2378005A (en) * 2001-07-27 2003-01-29 Chien-Tzu Hou Method for Controlling Paged Memory Access Attributes
US9390031B2 (en) * 2005-12-30 2016-07-12 Intel Corporation Page coloring to associate memory pages with programs
BR112015009265A2 (pt) 2012-10-25 2017-07-04 Rexnord Ind Llc montagem de transporte modular de topo de cilindro de controle ativo
US9908717B2 (en) 2012-10-25 2018-03-06 Rexnord Industries, Llc Non contact active control conveying assembly
CA2965680A1 (fr) 2014-10-31 2016-05-06 Rexnord Industries, Llc Rouleaux actives a hauteur variable pour un ensemble de transport sur rouleaux a commande active
WO2016070042A1 (fr) 2014-10-31 2016-05-06 Rexnord Industries, Llc Fonctionnement d'un ensemble de transport sur rouleaux à commande active des rouleaux
US10162694B2 (en) 2015-12-21 2018-12-25 Intel Corporation Hardware apparatuses and methods for memory corruption detection
EP3468902A4 (fr) 2016-06-08 2020-03-11 Rexnord Industries, LLC Ensemble d'entraînement destiné à un transporteur modulaire

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3893084A (en) * 1973-05-01 1975-07-01 Digital Equipment Corp Memory access control system
US3916385A (en) * 1973-12-12 1975-10-28 Honeywell Inf Systems Ring checking hardware
US4300192A (en) * 1974-04-18 1981-11-10 Honeywell Information Systems Inc. Method and means for storing and accessing information in a shared access multiprogrammed data processing system
US4016545A (en) * 1975-07-31 1977-04-05 Harris Corporation Plural memory controller apparatus
US4092715A (en) * 1976-09-22 1978-05-30 Honeywell Information Systems Inc. Input-output unit having extended addressing capability
US4386399A (en) * 1980-04-25 1983-05-31 Data General Corporation Data processing system
JPS58149548A (ja) * 1982-03-02 1983-09-05 Hitachi Ltd メモリ制御方式
JPS6047624B2 (ja) * 1982-06-30 1985-10-22 富士通株式会社 アドレス変換制御方式
US4581702A (en) * 1983-01-10 1986-04-08 International Business Machines Corporation Critical system protection

Also Published As

Publication number Publication date
AU578732B2 (en) 1988-11-03
DE3587031T2 (de) 1993-08-19
JPS61114353A (ja) 1986-06-02
AU4743285A (en) 1986-03-27
DE3587031D1 (de) 1993-03-11
US4821169A (en) 1989-04-11
IN165278B (fr) 1989-09-09
MX158239A (es) 1989-01-17
EP0175620A2 (fr) 1986-03-26
JPH0260012B2 (fr) 1990-12-14
EP0175620B1 (fr) 1993-01-27
CA1237200A (fr) 1988-05-24
BR8504729A (pt) 1986-07-22
EP0175620A3 (en) 1989-09-20
KR860002759A (ko) 1986-04-28

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