ZA847566B - Multi-processor computer central control units - Google Patents

Multi-processor computer central control units

Info

Publication number
ZA847566B
ZA847566B ZA847566A ZA847566A ZA847566B ZA 847566 B ZA847566 B ZA 847566B ZA 847566 A ZA847566 A ZA 847566A ZA 847566 A ZA847566 A ZA 847566A ZA 847566 B ZA847566 B ZA 847566B
Authority
ZA
South Africa
Prior art keywords
cmy
memory
processors
bus system
ioc
Prior art date
Application number
ZA847566A
Other languages
English (en)
Inventor
Rudolf Bitzinger
Walter Engl
Siegfried Humml
Klaus Schreier
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of ZA847566B publication Critical patent/ZA847566B/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54516—Initialization, software or data downloading
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/5455—Multi-processor, parallelism, distributed systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/1305—Software aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13109—Initializing, personal profile
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13376—Information service, downloading of information, 0800/0900 services

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Memory System (AREA)
  • Hardware Redundancy (AREA)
ZA847566A 1983-09-26 1984-09-26 Multi-processor computer central control units ZA847566B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19833334797 DE3334797A1 (de) 1983-09-26 1983-09-26 Multiprozessor-rechner, insbesondere multiprozessor-zentralsteuereinheit eines fernsprech-vermittlungssystems

Publications (1)

Publication Number Publication Date
ZA847566B true ZA847566B (en) 1985-05-29

Family

ID=6210098

Family Applications (1)

Application Number Title Priority Date Filing Date
ZA847566A ZA847566B (en) 1983-09-26 1984-09-26 Multi-processor computer central control units

Country Status (6)

Country Link
EP (1) EP0141247B1 (xx)
JP (1) JPH0797874B2 (xx)
AT (1) ATE63189T1 (xx)
DE (2) DE3334797A1 (xx)
FI (1) FI88220C (xx)
ZA (1) ZA847566B (xx)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3334797A1 (de) * 1983-09-26 1985-01-03 Siemens AG, 1000 Berlin und 8000 München Multiprozessor-rechner, insbesondere multiprozessor-zentralsteuereinheit eines fernsprech-vermittlungssystems
JPS61150059A (ja) * 1984-12-24 1986-07-08 Sony Corp デ−タ処理装置
DE3629399A1 (de) * 1986-08-29 1988-03-03 Siemens Ag Verfahren zum betrieb des zentralen speichers einer multiprozessor-zentralsteuereinheit eines vermittlungssystems
US4816990A (en) * 1986-11-05 1989-03-28 Stratus Computer, Inc. Method and apparatus for fault-tolerant computer system having expandable processor section
US4933846A (en) * 1987-04-24 1990-06-12 Network Systems Corporation Network communications adapter with dual interleaved memory banks servicing multiple processors
DE3716633A1 (de) * 1987-05-18 1988-12-08 Siemens Ag Schaltungsanordnung fuer fernmeldeanlagen, insbesondere fernsprechvermittlungsanlagen, mit je mehreren prozessoren und speichern
JPH02274197A (ja) * 1989-04-17 1990-11-08 Nec Corp 負荷分散処理方式
EP0428938A3 (en) * 1989-11-17 1991-12-11 Siemens Aktiengesellschaft Multiprocessor system
US5471607A (en) * 1993-04-22 1995-11-28 Analog Devices, Inc. Multi-phase multi-access pipeline memory system
US6332165B1 (en) 1997-09-05 2001-12-18 Sun Microsystems, Inc. Multiprocessor computer system employing a mechanism for routing communication traffic through a cluster node having a slice of memory directed for pass through transactions
WO2009012409A2 (en) 2007-07-17 2009-01-22 Opvista Incorporated Optical ring networks having node-to-node optical communication channels for carrying data traffic
US20110135301A1 (en) 2009-12-08 2011-06-09 Vello Systems, Inc. Wavelocker for Improving Laser Wavelength Accuracy in WDM Networks
US8705741B2 (en) 2010-02-22 2014-04-22 Vello Systems, Inc. Subchannel security at the optical layer
US8542999B2 (en) 2011-02-01 2013-09-24 Vello Systems, Inc. Minimizing bandwidth narrowing penalties in a wavelength selective switch optical network
CN116662228B (zh) * 2023-06-16 2024-01-30 深圳市东方聚成科技有限公司 分时复用局部存储器的访问方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3931613A (en) * 1974-09-25 1976-01-06 Data General Corporation Data processing system
US4164787A (en) * 1977-11-09 1979-08-14 Bell Telephone Laboratories, Incorporated Multiple microprocessor intercommunication arrangement
US4363094A (en) * 1977-12-29 1982-12-07 M/A-COM DDC, Inc. Communications processor
CA1179069A (en) * 1981-04-10 1984-12-04 Yasushi Fukunaga Data transmission apparatus for a multiprocessor system
US4394726A (en) * 1981-04-29 1983-07-19 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Distributed multiport memory architecture
JPS5819973A (ja) * 1981-07-30 1983-02-05 Nec Corp 時分割バス方式マルチプロセツサ計算機
DE3334797A1 (de) * 1983-09-26 1985-01-03 Siemens AG, 1000 Berlin und 8000 München Multiprozessor-rechner, insbesondere multiprozessor-zentralsteuereinheit eines fernsprech-vermittlungssystems

Also Published As

Publication number Publication date
FI843760A0 (fi) 1984-09-25
FI843760L (fi) 1985-03-27
EP0141247A3 (en) 1988-02-10
JPS60102088A (ja) 1985-06-06
EP0141247B1 (de) 1991-05-02
FI88220B (fi) 1992-12-31
ATE63189T1 (de) 1991-05-15
DE3334797A1 (de) 1985-01-03
EP0141247A2 (de) 1985-05-15
DE3484530D1 (de) 1991-06-06
FI88220C (fi) 1993-04-13
JPH0797874B2 (ja) 1995-10-18

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