YU129773A - Circuit for marking an abnormal realization of program in a process computer working in real time on different priority levels - Google Patents

Circuit for marking an abnormal realization of program in a process computer working in real time on different priority levels

Info

Publication number
YU129773A
YU129773A YU129773A YU129773A YU129773A YU 129773 A YU129773 A YU 129773A YU 129773 A YU129773 A YU 129773A YU 129773 A YU129773 A YU 129773A YU 129773 A YU129773 A YU 129773A
Authority
YU
Yugoslavia
Prior art keywords
marking
realization
abnormal
program
circuit
Prior art date
Application number
YU129773A
Other languages
English (en)
Inventor
Avsan Oleg
Oleg Avsan
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of YU129773A publication Critical patent/YU129773A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54575—Software application
    • H04Q3/54591—Supervision, e.g. fault localisation, traffic measurements, avoiding errors, failure recovery, monitoring, statistical analysis

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Debugging And Monitoring (AREA)
  • Alarm Systems (AREA)
  • Testing And Monitoring For Control Systems (AREA)
YU129773A 1972-05-23 1973-05-17 Circuit for marking an abnormal realization of program in a process computer working in real time on different priority levels YU129773A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE666172A SE364579B (ja) 1972-05-23 1972-05-23

Publications (1)

Publication Number Publication Date
YU129773A true YU129773A (en) 1980-04-30

Family

ID=20269282

Family Applications (1)

Application Number Title Priority Date Filing Date
YU129773A YU129773A (en) 1972-05-23 1973-05-17 Circuit for marking an abnormal realization of program in a process computer working in real time on different priority levels

Country Status (13)

Country Link
JP (1) JPS4943545A (ja)
BR (1) BR7303757D0 (ja)
CA (1) CA982269A (ja)
ES (1) ES415010A1 (ja)
FI (1) FI56754C (ja)
FR (1) FR2186154A5 (ja)
GB (1) GB1422603A (ja)
HU (1) HU167446B (ja)
IT (1) IT987815B (ja)
NO (1) NO133860C (ja)
PL (1) PL97264B1 (ja)
SE (1) SE364579B (ja)
YU (1) YU129773A (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4369493A (en) 1979-05-14 1983-01-18 Metropolitan Life Insurance Company Response time monitor
JPS56120840A (en) * 1980-02-26 1981-09-22 Kayaba Ind Co Ltd Hydraulic buffer
JPH10198583A (ja) * 1997-01-10 1998-07-31 Nec Corp 空走プロセスの検出と処置方式及び方法
CN108415407B (zh) * 2018-03-14 2023-11-03 江苏徐工工程机械研究院有限公司 找平故障检测控制器、摊铺机找平控制装置和方法
DE102018106871A1 (de) * 2018-03-22 2019-09-26 Thyssenkrupp Ag Verfahren zur Diagnose einer Funktionalität mit diskreten Werten oder diskreten Klassen von Werten auf der Eingangs- oder Ausgangsseite

Also Published As

Publication number Publication date
AU5531973A (en) 1974-11-07
DE2322349B2 (de) 1976-02-12
GB1422603A (en) 1976-01-28
NO133860C (ja) 1976-07-07
FR2186154A5 (ja) 1974-01-04
IT987815B (it) 1975-03-20
NO133860B (ja) 1976-03-29
ES415010A1 (es) 1976-02-16
HU167446B (ja) 1975-10-28
JPS4943545A (ja) 1974-04-24
FI56754B (fi) 1979-11-30
FI56754C (fi) 1980-03-10
PL97264B1 (pl) 1978-02-28
BR7303757D0 (pt) 1974-07-11
DE2322349A1 (de) 1973-11-29
SE364579B (ja) 1974-02-25
CA982269A (en) 1976-01-20

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