WO2025046857A1 - 電力変換装置 - Google Patents

電力変換装置 Download PDF

Info

Publication number
WO2025046857A1
WO2025046857A1 PCT/JP2023/031913 JP2023031913W WO2025046857A1 WO 2025046857 A1 WO2025046857 A1 WO 2025046857A1 JP 2023031913 W JP2023031913 W JP 2023031913W WO 2025046857 A1 WO2025046857 A1 WO 2025046857A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
circuit
control
power supply
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/JP2023/031913
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
拓也 梶山
優介 檜垣
祥平 東谷
暁斗 中山
順平 磯崎
悠平 和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
TMEIC Corp
Original Assignee
Mitsubishi Electric Corp
TMEIC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp, TMEIC Corp filed Critical Mitsubishi Electric Corp
Priority to JP2024501625A priority Critical patent/JP7485495B1/ja
Priority to PCT/JP2023/031913 priority patent/WO2025046857A1/ja
Publication of WO2025046857A1 publication Critical patent/WO2025046857A1/ja
Anticipated expiration legal-status Critical
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/49—Combination of the output voltage waveforms of a plurality of converters

Definitions

  • This disclosure relates to a power conversion device.
  • MMCs modular multilevel converters
  • HVDC high-voltage direct current
  • STATCOMs static synchronous compensators
  • the converter cell is provided with a power supply circuit that supplies control power from the main circuit side, such as a capacitor. Since the load of the power supply circuit may differ for each converter cell, when each switching element of the converter cell is in the off state (for example, in a floating state), an error caused by an imbalance in the load of the power supply circuit may cause an imbalance in the voltage of each capacitor.
  • JP 2019-106785 A Patent Document 1 considers suppressing the occurrence of an imbalance in the capacitor voltages in multiple converter cells while suppressing unnecessary power consumption.
  • Patent Document 1 when in a floating state in which multiple switching elements included in a converter cell are turned off, the higher the capacitor voltage, the more frequently the switch section of the power supply circuit included in the converter cell is turned on.
  • the mechanism for adjusting the frequency at which the switch section is turned on is complicated and the cost is also high.
  • the objective of one aspect of the present disclosure is to provide a power conversion device that can suppress voltage imbalances in the storage elements in each converter cell with a simple configuration.
  • a power conversion device includes a power converter including a plurality of converter cells connected in series.
  • Each converter cell includes a switching circuit including a plurality of first switching elements connected in series, a storage element connected in parallel to the switching circuit, a control circuit for controlling the switching circuit, and a power supply circuit that generates a control voltage based on the voltage of the storage element using a second switching element and a transformer and supplies the control voltage to the control circuit.
  • the power supply circuit controls a switch connected in series to a resistor to an on state so that a discharge current flows through the resistor for discharging the storage element.
  • a simple configuration can be used to suppress voltage imbalances in the storage elements of each converter cell.
  • FIG. 1 is a diagram illustrating a configuration example of a power conversion device.
  • FIG. 2 is a diagram illustrating a configuration example of a converter cell.
  • FIG. 2 is a block diagram showing an example of a hardware configuration of a control device.
  • FIG. 2 is a diagram for explaining voltage imbalance in two converter cells.
  • FIG. 13 is a diagram illustrating a configuration example of a power supply circuit according to a comparative example.
  • FIG. 2 is a diagram showing an ideal voltage waveform of a capacitor of a converter cell.
  • FIG. 2 is a diagram showing an example of a voltage waveform of each capacitor of two converter cells. A figure showing another example of voltage waveforms of each capacitor of two converter cells.
  • FIG. 1 is a diagram illustrating a configuration example of a power conversion device.
  • FIG. 2 is a diagram illustrating a configuration example of a converter cell.
  • FIG. 2 is a block diagram showing an example of a hardware configuration of a control device.
  • FIG. 2 is
  • FIG. 2 is a diagram illustrating a configuration example of a power supply circuit according to the present embodiment.
  • FIG. 4 is a diagram showing a voltage waveform of a capacitor according to the present embodiment.
  • FIG. 13 is a diagram illustrating an example of the configuration of a switch control unit according to a first modified example of the present embodiment.
  • FIG. 13 is a diagram showing a voltage waveform of a capacitor according to the first modified example of the present embodiment.
  • FIG. 11 is a diagram illustrating an example of the configuration of a switch control unit according to a second modified example of the present embodiment.
  • FIG. 11 is a diagram showing a voltage waveform of a capacitor according to the second modification of the present embodiment.
  • FIG. 13 is a diagram showing a voltage waveform of a capacitor according to a third modified example of the present embodiment.
  • FIG. 13 is a diagram showing a voltage waveform of a capacitor according to a fourth modified example of the present embodiment.
  • Fig. 1 is a diagram showing a configuration example of a power conversion device 100.
  • the power conversion device 100 is connected between an AC circuit 2 and a DC circuit 4.
  • the DC circuit 4 is, for example, a DC power system including a DC transmission network or the like, or a DC terminal of another power conversion device.
  • the DC circuit 4 may be configured to include a power storage device connected to the DC terminal of a power converter 6.
  • the power storage device includes, for example, an electric double layer capacitor or a storage battery such as a lithium ion battery.
  • the power conversion device 100 includes a self-excited power converter 6 and a control device 5 for controlling the power converter 6.
  • the power converter 6 is configured by a modular multilevel converter including a plurality of converter cells (corresponding to the "cells" in FIG. 1) 1 connected in series with each other.
  • a “converter cell” is also called a “sub module” or a “unit converter.”
  • the power converter 6 is connected to the DC circuit 4 and performs power conversion between the DC circuit 4 and the AC circuit 2. Specifically, the power converter 6 converts the DC power output from the DC circuit 4 into AC power, and outputs the AC power to the AC circuit 2 via the transformer 3. The power converter 6 also converts the AC power from the AC circuit 2 into DC power, and outputs the DC power to the DC circuit 4.
  • the leg circuit 8 is provided for each of the multiple phases that make up the AC.
  • the leg circuit 8 is connected between the AC circuit 2 and the DC circuit 4, and performs power conversion between the two circuits.
  • Figure 1 shows a case where the AC circuit 2 is a three-phase AC system, and three leg circuits 8u, 8v, and 8w are provided corresponding to the U phase, V phase, and W phase, respectively.
  • the AC terminals Nu, Nv, and Nw provided on the leg circuits 8u, 8v, and 8w, respectively, are connected to the AC circuit 2 via the transformer 3.
  • the AC circuit 2 is, for example, a three-phase AC power system including an AC power source. In FIG. 1, for ease of illustration, the connection between the AC terminals Nv and Nw and the transformer 3 is not shown.
  • the DC terminals i.e., the positive DC terminal Np and the negative DC terminal Nn
  • the DC terminals i.e., the positive DC terminal Np and the negative DC terminal Nn
  • the leg circuits 8u, 8v, 8w may be configured to be connected to the AC circuit 2 via an interconnection reactor.
  • a primary winding may be provided in each of the leg circuits 8u, 8v, 8w, and the leg circuits 8u, 8v, 8w may be AC-connected to the transformer 3 or the interconnection reactor via a secondary winding that is magnetically coupled to the primary winding.
  • the primary winding may be the reactors 7a, 7b described below.
  • leg circuit 8 is electrically (i.e., DC or AC) connected to the AC circuit 2 via a connection provided in each leg circuit 8u, 8v, 8w, such as the AC terminals Nu, Nv, Nw or the above-mentioned primary winding.
  • Leg circuit 8u includes a positive arm 13u from the positive DC terminal Np to the AC terminal Nu, and a negative arm 14u from the negative DC terminal Nn to the AC terminal Nu.
  • the connection point between the positive arm 13u and the negative arm 14u is connected to the transformer 3 as the AC terminal Nu.
  • the positive DC terminal Np and the negative DC terminal Nn are connected to the DC circuit 4.
  • Leg circuit 8v includes a positive arm 13v and a negative arm 14v
  • leg circuit 8w includes a positive arm 13w and a negative arm 14w.
  • Leg circuits 8v and 8w have the same configuration as leg circuit 8u, so the following description will be given using leg circuit 8u as a representative.
  • the positive arm 13u includes a plurality of converter cells 1 connected in cascade to each other and a reactor 7a.
  • the plurality of converter cells 1 and the reactor 7a are connected in series to each other.
  • the negative arm 14u includes a plurality of converter cells 1 connected in cascade to each other and a reactor 7b.
  • the plurality of converter cells 1 and the reactor 7b are connected in series to each other.
  • the power conversion device 100 further includes an AC voltage detector 10, an AC current detector 15, DC voltage detectors 11a and 11b, and arm current detectors 9a and 9b provided in each leg circuit 8. These detectors measure electrical quantities (i.e., current, voltage) used to control the power converter 6. Signals detected by these detectors are input to the control device 5.
  • the AC voltage detector 10 detects three-phase AC voltages Vsysu, Vsysv, and Vsysw (hereinafter also collectively referred to as "AC voltage Vsys").
  • the AC current detector 15 detects three-phase AC currents Isysu, Isysv, and Isysw (hereinafter also collectively referred to as "AC current Isys") of the AC circuit 2.
  • the DC voltage detector 11a detects the DC voltage Vdcp of the positive DC terminal Np connected to the DC circuit 4.
  • the DC voltage detector 11b detects the DC voltage Vdcn of the negative DC terminal Nn connected to the DC circuit 4.
  • ⁇ Converter cell configuration> 2A and 2B are diagrams showing a configuration example of the converter cell 1.
  • the converter cell 1 shown in Fig. 2A has a circuit configuration called a half-bridge configuration.
  • the converter cell 1 includes a switching circuit 25, a capacitor 28 as a storage element, a voltage detector 29, a power supply circuit 30, and a control circuit 40.
  • the switching circuit 25, the capacitor 28, and the power supply circuit 30 are connected in parallel.
  • the switching circuit 25 includes two switching elements 22A, 22B connected in series, and diodes 23A, 23B.
  • the diodes 23A, 23B are connected in anti-parallel (i.e., in parallel and in the reverse bias direction) to the switching elements 22A, 22B, respectively.
  • the capacitor 28 is connected in parallel to the switching circuit 25 and holds a DC voltage.
  • the voltage Vc across the capacitor 28 is detected by a voltage detector 29.
  • the detected voltage Vc is input to the power supply circuit 30.
  • the voltage Vc may be input to the control circuit 40.
  • the control circuit 40 transmits the voltage Vc to the control device 5.
  • connection node between switching elements 22A and 22B is connected to the high-potential side input/output terminal G1.
  • the connection node between switching element 22B and capacitor 28 is connected to the low-potential side input/output terminal G2.
  • Capacitor 28 is charged by the current flowing through input/output terminals G1 and G2, and the voltage increases.
  • power supply circuit 30 is activated.
  • Power supply circuit 30 generates a control voltage Vs based on the voltage of capacitor 28, and supplies (outputs) the control voltage Vs to control circuit 40.
  • the specific configuration of power supply circuit 30 will be described later.
  • the control circuit 40 controls the switching circuit 25.
  • the control circuit 40 When the control voltage Vs is supplied from the power supply circuit 30, the control circuit 40 is in a state in which it can control each of the switching elements 22A, 22B.
  • the control circuit 40 receives a control permission notification from outside the converter cell 1 (e.g., the control device 5) to permit the start of control of the switching circuit 25, it starts controlling each of the switching elements 22A, 22B. This enables each of the switching elements 22A, 22B to perform on-off switching operations.
  • the control circuit 40 is configured, for example, with an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination of these.
  • control circuit 40 adjusts the length of the on time and off time of each switching element 22A, 22B to control the voltage between input/output terminals G1, G2 and the voltage of capacitor 28 to the corresponding target values.
  • these target values are set based on the AC voltage of AC circuit 2 and the DC voltage of DC circuit 4, the number of converter cells 1 that make up the arms, etc.
  • the converter cell 1 shown in FIG. 2(b) has a circuit configuration called a full-bridge configuration.
  • this converter cell 1 includes switching circuits 25 and 26, a capacitor 28, a voltage detector 29, and a power supply circuit 30.
  • the switching circuit 25, the switching circuit 26, the capacitor 28, and the power supply circuit 30 are connected in parallel.
  • the switching circuit 26 includes two switching elements 22C, 22D connected in series, and diodes 23C, 23D.
  • the diodes 23C, 23D are connected in anti-parallel to the switching elements 22C, 22D, respectively.
  • the connection node of the switching elements 22A and 22B is connected to the high-potential side input/output terminal G1, and the connection node of the switching elements 22C and 22D is connected to the low-potential side input/output terminal G2.
  • switching element 22D By turning on switching element 22D, turning off switching element 22C, and alternately turning on switching elements 22A and 22B, a positive voltage or zero voltage is output between input/output terminals G1 and G2.
  • switching element 22D By turning off switching element 22D, turning on switching element 22C, and alternately turning on switching elements 22A and 22B, a zero voltage or negative voltage is output between input/output terminals G1 and G2.
  • a self-extinguishing switching element capable of controlling both on and off operations is used for each of the switching elements 22A to 22D.
  • the switching elements 22A to 22D are self-extinguishing semiconductor switching elements such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor).
  • IGBT Insulated Gate Bipolar Transistor
  • MOSFET Metal Oxide Semiconductor Field-Effect Transistor
  • the converter cell 1 is configured as a half-bridge cell as shown in FIG. 2(a).
  • the converter cell 1 may also be configured as a full-bridge cell as shown in FIG. 2(b).
  • FIG. 3 is a block diagram showing an example of a hardware configuration of the control device 5.
  • the control device 5 in FIG. 3 is configured based on a computer.
  • the control device 5 includes one or more input converters 70, one or more sample-and-hold (S/H) circuits 71, a multiplexer (MUX) 72, and an A/D converter 73.
  • the control device 5 includes one or more central processing units (CPUs) 74, a random access memory (RAM) 75, and a read-only memory (ROM) 76.
  • the control device 5 includes one or more input/output interfaces 77, an auxiliary storage device 78, and a bus 79 that connects the above components to each other.
  • the input converter 70 includes an auxiliary transformer for each input channel.
  • Each auxiliary transformer converts the detection signal from each detector in FIG. 1 into a signal with a voltage level suitable for subsequent signal processing.
  • a sample-and-hold circuit 71 is provided for each input converter 70.
  • the sample-and-hold circuit 71 samples and holds the signal representing the electrical quantity received from the corresponding input converter 70 at a specified sampling frequency.
  • the multiplexer 72 sequentially selects the signals held in the multiple sample-and-hold circuits 71.
  • the A/D converter 73 converts the signal selected by the multiplexer 72 into a digital value. Note that by providing multiple A/D converters 73, A/D conversion may be performed in parallel on the detection signals of multiple input channels.
  • the CPU 74 controls the entire control device 5 and executes arithmetic processing according to a program.
  • the RAM 75 as a volatile memory
  • the ROM 76 as a non-volatile memory are used as the main memory of the CPU 74.
  • the ROM 76 stores programs and setting values for signal processing.
  • the auxiliary storage device 78 is a non-volatile memory with a larger capacity than the ROM 76, and stores programs and data on detected electrical quantity values.
  • the input/output interface 77 is an interface circuit for communication between the CPU 74 and external devices.
  • control device 5 may be configured using circuits such as FPGA and ASIC.
  • control device 5 may be configured using analog circuits.
  • each switching element 22A, 22B (hereinafter also collectively referred to as "switching element 22") is in an off state (e.g., a gate-blocked state).
  • switching element 22 In order to start the operation of the power converter 6, it is first necessary to initially charge the capacitors 28 of each converter cell 1. For example, during initial charging, all the capacitors 28 are charged simultaneously by closing a circuit breaker (not shown) connected to the primary side (i.e., the AC circuit 2 side) of the transformer 3.
  • the power supply circuit 30 starts. After that, the control circuit 40 starts to control the on/off of each switching element 22 according to the control permission notification from the control device 5. During the period from when the power supply circuit 30 starts to when the control circuit 40 starts to control each switching element 22 (hereinafter also referred to as the "standby period"), the switching elements 22 are not operating, so the voltage of the capacitor 28 is charged by the initial charging current flowing through the input/output terminals G1 and G2 of the converter cell 1.
  • the initial charging current is determined by the voltage of the AC circuit 2 or DC circuit 4 (e.g., the circuit used for initial charging) and the impedance of each converter cell 1 and reactors 7a, 7b, and the same initial charging current flows through multiple converter cells 1 connected in series at a certain time.
  • the charging power supplied to a converter cell 1 by the initial charging current is the product of the voltage of the capacitor 28 of that converter cell 1 and the initial charging current.
  • the initial charging current stops flowing. However, if the power supply circuit 30 and control circuit 40 of the converter cell 1 consume power themselves, the initial charging current equivalent to that power continues to flow.
  • the voltage of the AC circuit 2 or DC circuit 4 is divided by multiple converter cells 1 connected in series.
  • the divided voltages of each converter cell 1 will be equal.
  • the characteristics of each of the multiple converter cells 1 do not match perfectly due to component variations, so the divided voltages are not equal.
  • the power consumed by a certain converter cell 1 (hereinafter also referred to as "self-power consumption") is greater than a standard value, while the self-power consumption of other converter cells 1 is less than the standard value. In this case, the divided voltages of each converter cell 1 will not be equal.
  • the average value of the voltage of the capacitor 28 of multiple converter cells 1 connected in series (hereinafter also referred to as the "average voltage value")
  • the average value of the charging power supplied to multiple converter cells 1 connected in series (hereinafter also referred to as the "average power value”).
  • the charging power supplied to that converter cell 1 is greater than the average power value.
  • the voltage of the capacitor 28 of another converter cell 1 is less than the average voltage value
  • the charging power supplied to the other converter cell 1 is less than the average power value.
  • FIG. 4 is a diagram for explaining the voltage imbalance in two converter cells 1.
  • the Xth converter cell 1x and the Yth converter cell 1y have different power losses.
  • k is a natural number of 2 or more, and X and Y are different.
  • graph 501 shows the change over time in voltage Vc of capacitor 28 (hereinafter, for convenience, also referred to as "capacitor 28x”) of converter cell 1x.
  • Graph 502 shows the change over time in voltage Vc of capacitor 28 (hereinafter, for convenience, also referred to as “capacitor 28y”) of converter cell 1y. It is assumed that the self-power consumption of converter cell 1x is smaller than the average power value, and that the self-power consumption of converter cell 1y is larger than the average power value.
  • the voltage of the power converter 6 is small relative to the voltage of the power system (e.g., the AC circuit 2 or the DC circuit 4), so a large initial charging current flows through the power converter 6. As a result, the voltage Vc of each capacitor 28x, 28y increases rapidly.
  • FIG. 5 is a diagram showing an example of the configuration of a power supply circuit according to a comparative example.
  • the power supply circuit 50 includes a capacitor 51, a diode 52, a switching element 53, an anti-parallel diode 54, a transformer 56, and an automatic voltage regulator (AVR) 57.
  • AVR automatic voltage regulator
  • Capacitor 51 is connected in parallel with capacitor 28 of the converter cell and receives power. Therefore, the voltage of capacitor 51 is the same as the voltage of capacitor 28.
  • Transformer 56 includes a primary winding connected in parallel with capacitor 51 via switching element 53, a secondary winding for supplying a control voltage, and a tertiary winding for voltage detection.
  • Automatic voltage stabilizer 57 controls the on/off of switching element 53. By alternately turning switching element 53 on and off, the voltage of capacitor 51 is intermittently applied to the primary winding of transformer 56.
  • the voltage output to the tertiary winding is used as information for adjusting the on-period and off-period of switching element 53 by automatic voltage stabilizer 57. For example, if the voltage output to the tertiary winding becomes higher than a specified voltage, automatic voltage stabilizer 57 shortens the on-period and lengthens the off-period of switching element 53, thereby lowering the voltage of the tertiary winding. By adjusting the voltage of the tertiary winding in this way, the voltage of the secondary winding is also adjusted.
  • Figure 6 is a diagram showing an ideal voltage waveform of the capacitor 28 of a converter cell 1.
  • the voltage waveform 601 shown in Figure 6 is the voltage waveform of the capacitor 28 of a certain converter cell 1.
  • the horizontal axis of Figure 6 is time, and the vertical axis is the voltage Vc of the capacitor 28.
  • the circuit breaker is closed and initial charging of the capacitor 28 begins.
  • the power supply circuit 50 starts up, and at time t1, the voltage Vc reaches the initial charging voltage V1.
  • each converter cell 1 constituting an arm shares the voltage of the AC circuit 2 or the DC circuit 4.
  • the period from time t0 to time t1 corresponds to the initial charging period during which multiple converter cells 1 are initially charged.
  • FIG. 7 is a diagram showing an example of the voltage waveforms of the capacitor 28 of each of the two converter cells.
  • voltage waveform 611 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x
  • voltage waveform 612 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y.
  • the definitions of each time t0, t1, t2, and t3 are the same as in FIG. 6.
  • FIG. 9A and 9B are diagrams showing configuration examples of a power supply circuit according to the present embodiment.
  • Fig. 9A shows a configuration example of a power supply circuit 30A.
  • Fig. 9B shows a configuration example of a power supply circuit 30B.
  • the power supply circuits 30A and 30B correspond to the power supply circuit 30 shown in Fig. 2, but are denoted by the symbols "A" and "B" for convenience in order to distinguish them from each other.
  • the control unit 35 controls the operation of the power supply circuit 30A. Specifically, the switch control unit 33 included in the control unit 35 receives an input of the voltage Vc of the capacitor 28 detected by the voltage detector 29. Since the voltage of the capacitor 51 is the same as the voltage Vc of the capacitor 28, the switch control unit 33 may receive an input of the voltage of the capacitor 51.
  • the difference between power supply circuit 30B and power supply circuit 30A is where the series body of resistor 31 and switch 32 is provided. Specifically, in power supply circuit 30B, the series body is connected in parallel with the secondary winding of transformer 56. In this way, even when the series body is connected to the secondary winding side of transformer 56, capacitor 28 can be discharged. The voltage applied to the secondary winding of transformer 56 can be made lower than the voltage of capacitor 28. Therefore, the withstand voltage and insulation performance required of resistor 31 and switch 32 are relaxed, which contributes to the miniaturization of the power supply circuit. The same applies when transformer 56 has a tertiary winding.
  • FIG. 10 is a diagram showing the voltage waveforms of the capacitors according to this embodiment.
  • voltage waveform 631 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x
  • voltage waveform 632 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y.
  • the definitions of the times t0, ta, t1, and t2 are the same as in FIG. 8.
  • the converter cell 1x has a tendency for its voltage Vc to increase due to its low self-power consumption, while the converter cell 1y has a tendency for its voltage Vc to decrease due to its high self-power consumption.
  • the control signal Sa in the converter cell 1x is referred to as the "control signal Sax”
  • the control signal Sa in the converter cell 1y is referred to as the "control signal Say.” The same applies in the following explanations.
  • the power supply circuit 30 starts up. At time t1, the voltage Vc reaches the initial charging voltage V1. At time t1, each converter cell 1 constituting an arm shares the voltage of the AC circuit 2 or the DC circuit 4. After time t1, the voltage Vc of the converter cell 1x increases, and the voltage Vc of the converter cell 1y decreases.
  • the control signal Sax goes to "high level” and the switch 32 is controlled to the on state.
  • the charge of the capacitor 28 is discharged by the resistor 31, thereby suppressing the increase in the voltage Vc in the converter cell 1x.
  • the threshold value Vth1 is set to a value greater than the initial charging voltage V1.
  • the example in Figure 10 shows a state in which the power consumption in resistor 31 of converter cell 1x is balanced with the power that was increasing voltage Vc. As a result, voltage Vc of converter cells 1x and 1y is maintained during the period from time t1a to time t2. However, it is not necessary to set the power consumption in resistor 31 so as not to change voltage Vc.
  • Switch control unit 33 only needs to control the on and off states of switch 32 so that the voltage Vc of capacitor 28 does not drop to the minimum voltage Vmin. This is because controlling the on and off of switch 32 at unnecessarily high speeds can cause malfunctions of switch 32 and shorten the lifespan of switch 32.
  • the switch control unit 33 may have a hysteresis characteristic like a Schmitt trigger. For example, when the switch control unit 33 determines that the voltage Vc is equal to or greater than the threshold Vth1, it controls the switch 32 to the on state. On the other hand, when the switch control unit 33 determines that the voltage Vc is less than a threshold Vth1a that is smaller than the threshold Vth1 after the voltage Vc becomes equal to or greater than the threshold Vth1 (i.e., after the switch 32 is in the on state), it controls the switch 32 to the off state. In this way, the switch control unit 33 may compare the voltage Vc with the threshold Vth1 when switching the switch 32 from off to on, and compare the voltage Vc with the threshold Vth1a when switching the switch 32 from on to off.
  • the switch 32 is controlled from off to on, suppressing an increase in the voltage Vc. Accordingly, a decrease in the voltage Vc in the other converter cells 1 (e.g., converter cell 1y) is suppressed, preventing the voltage Vc from decreasing to the minimum voltage Vmin. Therefore, voltage imbalance is suppressed, and the power supply circuits 30A, 30B can be prevented from entering a stopped state.
  • the switch control unit 33 having the function of controlling the switch 32 can be realized by a simple configuration such as a comparison circuit.
  • FIG. 11 is a diagram showing a configuration example of switch control unit 33A according to the first modification of the present embodiment.
  • switch control unit 33A includes a comparison circuit 159, a comparison circuit 160, and an AND circuit 161.
  • Switch control unit 33A corresponds to switch control unit 33 in Fig. 9, but is given the reference character "A" for distinction. This is also true in Fig. 13.
  • Comparator circuit 159 outputs signal S1 with a value of "1" (e.g., high level) when voltage Vc is equal to or greater than threshold Vth1, and outputs signal S1 with a value of "0” (e.g., low level) when voltage Vc is less than threshold Vth1.
  • Comparator circuit 160 outputs signal S2 with a value of "1” when voltage Vc is less than threshold Vth2, and outputs signal S2 with a value of "0” when voltage Vc is equal to or greater than threshold Vth2.
  • threshold Vth2 is set to a value greater than threshold Vth1 and less than target voltage V2.
  • AND circuit 161 performs an AND operation on the value of signal S1 and the value of signal S2. Specifically, AND circuit 161 outputs a control signal Sa with a value of "1" when the value of signal S1 is "1" (i.e., voltage Vc is equal to or greater than threshold value Vth1) and the value of signal S2 is "1" (i.e., voltage Vc is less than threshold value Vth2). This controls switch 32 to the on state.
  • AND circuit 161 outputs a control signal Sa with a value of "0" when at least one of the values of signal S1 and signal S2 is “0". This controls switch 32 to the off state.
  • the switch control unit 33A is not limited to the configuration example shown in FIG. 11. Specifically, the switch control unit 33A may be configured to control the switch 32 to the OFF state when the voltage Vc is less than the threshold Vth1, to control the switch 32 to the ON state when the voltage Vc is equal to or greater than the threshold Vth1 and less than the threshold Vth2, and to control the switch 32 to the OFF state when the voltage Vc is equal to or greater than the threshold Vth2.
  • FIG. 12 is a diagram showing the voltage waveforms of the capacitors according to the first modified example of this embodiment.
  • voltage waveform 641 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x
  • voltage waveform 642 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y.
  • the definitions of the times t0, ta, t1, t1a, t2, t2a, t3, and t3a are the same as in FIG. 10.
  • each switching element 22 is driven, so the voltage Vc converges toward the target voltage V2.
  • control signal Sax goes to "low level” and switch 32 is controlled to the off state. This causes resistor 31 to stop discharging capacitor 28 (i.e., no power consumption occurs in resistor 31), so the rate at which voltage Vc rises increases. After that, voltage Vc reaches target voltage V2 at time t3.
  • control signal Sa goes to "high level” and switch 32 is controlled to the on state. This causes resistor 31 to start discharging capacitor 28 (i.e., power consumption occurs in resistor 31), so the rate at which voltage Vc rises slows.
  • control signal Sa goes to "low level” and switch 32 is controlled to the off state. This causes resistor 31 to stop discharging capacitor 28, so the rate at which voltage Vc rises increases. Thereafter, voltage Vc reaches target voltage V2 at time t3a.
  • each switching element 22 is driven, so voltage Vc can be controlled, and there is no need to discharge capacitor 28 in resistor 31. As a result, power consumption in resistor 31 after time t2 becomes unnecessary power loss. In this way, according to variant 1, it is possible to suppress voltage imbalance during the standby period from time ta to time t2, while suppressing the occurrence of unnecessary power loss after time t2.
  • switch control unit 33B includes a comparison circuit 159, a NOT circuit 163, and an AND circuit 165.
  • Comparator circuit 159 is the same as in FIG. 11, and detailed description thereof will not be repeated.
  • NOT circuit 163 outputs signal S3, which is the inverted logical level of signal Sv. Specifically, a value of "1" of signal Sv indicates a state in which control (driving) of each switching element 22 is permitted, and a value of "0" of signal Sv indicates a state in which control of each switching element 22 is not permitted.
  • switch control unit 33B determines that control of each switching element 22 is permitted. Typically, switch control unit 33B determines that the value of signal Sv is "1" when a control permission notification is received from control device 5, and determines that the value of signal Sv is "0" when a control permission notification is not received.
  • AND circuit 165 performs an AND operation on the value of signal S1 and the value of signal S3. Specifically, AND circuit 165 outputs a control signal Sa with a value of "1" when the value of signal S1 is "1" (i.e., voltage Vc is equal to or greater than threshold value Vth1) and the value of signal S3 is "1" (i.e., control of each switching element 22 is not permitted). This controls switch 32 to the ON state.
  • AND circuit 165 outputs a control signal Sa with a value of "0" when at least one of the values of signal S1 and signal S3 is “0". This controls switch 32 to the OFF state.
  • the switch control unit 33B is not limited to the configuration example shown in FIG. 13. Specifically, the switch control unit 33B controls the switch 32 to the OFF state when control of each switching element 22 is not permitted and the voltage Vc is less than the threshold Vth1, and controls the switch 32 to the ON state when control of each switching element 22 is not permitted and the voltage Vc is equal to or greater than the threshold Vth1. Furthermore, when control of each switching element 22 is permitted, the switch control unit 33B controls the switch 32 to the OFF state regardless of the value of the voltage Vc.
  • FIG. 14 is a diagram showing the voltage waveforms of the capacitors according to the second modification of this embodiment.
  • voltage waveform 651 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x
  • voltage waveform 652 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y.
  • the definitions of the times t0, ta, t1, t1a, t2, and t3 are the same as in FIG. 10.
  • the control circuit 40 starts driving each switching element 22 in accordance with the control permission notification from the control device 5.
  • the power supply circuit 30 (specifically, the switch control unit 33B) receives the control permission notification sent from the control device 5.
  • the switch control unit 33B determines that control of each switching element 22 is permitted. Therefore, the signal Sv shown in FIG. 13 becomes "high level”. Therefore, in the converter cell 1x, the control signal Sax becomes "low level” and the switch 32 is controlled to the off state. In the converter cell 1y, the switch 32 is maintained in the off state.
  • the power supply circuit 30 in each converter cell 1x, 1y controls the switch 32 to the off state. Therefore, it is possible to suppress unnecessary power loss in the resistor 31 after time t2.
  • the threshold value Th1 is set to be larger than the initial charging voltage V1, but the present invention is not limited to this configuration.
  • the third modification a configuration in which the threshold value Th1 is set to be smaller than the initial charging voltage V1 will be described.
  • FIG. 15 is a diagram showing a voltage waveform of a capacitor according to the third modification of this embodiment.
  • the power supply circuit 30 has the function of the switch control unit 33A shown in FIG. 11, but may also have the function of the switch control unit 33 shown in FIG. 9 or the switch control unit 33B shown in FIG. 13.
  • the threshold value Th1 is set to be greater than the minimum voltage Vmin and less than the initial charging voltage V1.
  • voltage waveform 661 is the voltage waveform of capacitor 28 of Xth converter cell 1x
  • voltage waveform 662 is the voltage waveform of capacitor 28 of Yth converter cell 1y.
  • the definitions of each time t0, ta, t1, t2, and t3 are the same as in FIG. 10.
  • the power supply circuit 30 starts up.
  • the voltage Vc of the capacitor 28 of the converter cells 1x and 1y reaches the threshold value Vth1. This causes the control signals Sax and Say to go to "high level,” and the switches 32 in the converter cells 1x and 1y are controlled to be in the on state. As a result, the charge in the capacitor 28 is discharged by the resistor 31, and the rate of rise of the voltage Vc becomes slower.
  • the voltage Vc in converter cells 1x and 1y reaches the initial charging voltage V1. Thereafter, in the period from time t1 to time t2, the voltage Vc in converter cells 1x and 1y maintains the initial charging voltage V1. Therefore, voltage imbalance is suppressed.
  • V1+ ⁇ V be the voltage that is ⁇ V higher than the initial charging voltage V1
  • V1- ⁇ V be the voltage that is ⁇ V lower than the initial charging voltage V1
  • Ph be the power consumption of resistor 31 at voltage (V1+ ⁇ V)
  • Pl be the power consumption of resistor 31 at voltage (V1- ⁇ V).
  • the difference Pd is sufficiently smaller than the difference between the power consumption Ph and the power consumption Pl (i.e., Ph-Pl) (i.e., Pd ⁇ (Ph-Pl))
  • the voltage difference between the voltage Vc of converter cell 1x and the voltage Vc of converter cell 1y will be smaller than " ⁇ V x 2".
  • ⁇ V is assumed to be sufficiently small, so the voltage Vc of converter cells 1x and 1y is maintained at the initial charging voltage V1. Note that if ⁇ V is not sufficiently small, the voltage Vc of converter cell 1x is maintained at "V1+ ⁇ V", and the voltage Vc of converter cell 1y is maintained at "V1- ⁇ V". Even in this case, voltage imbalance is suppressed.
  • Fig. 16 is a diagram showing a voltage waveform of a capacitor according to the fourth modification of the present embodiment.
  • the power supply circuit 30 has the function of the switch control unit 33 shown in Fig. 9, but may have the function of the switch control unit 33A shown in Fig. 11 or the switch control unit 33B shown in Fig. 13.
  • the threshold value Th1 is set to be the same as the initial charging voltage V1.
  • the initial charging voltage V1 is set based on the voltage at the time of initial charging of either the AC circuit 2 or the DC circuit 4, whichever is used for initial charging, and the number (e.g., k) of converter cells 1 included in the arm of the power converter 6.
  • the voltage of the DC circuit 4 is used for initial charging, and the DC voltage of the DC circuit 4 during initial charging is "Vdc".
  • the DC voltage Vdc is divided by "k x 2" converter cells 1. If the voltage is divided evenly, the voltage in one converter cell 1 is "Vdc/(k x 2)". Therefore, the initial charging voltage V1 is "Vdc/(k x 2)". As a result, the threshold value Th1 is set to "Vdc/(k x 2)".
  • voltage waveform 671 is the voltage waveform of capacitor 28 of Xth converter cell 1x
  • voltage waveform 672 is the voltage waveform of capacitor 28 of Yth converter cell 1y.
  • the definitions of each time t0, ta, t1, t2, and t3 are the same as in FIG. 10.
  • the power supply circuit 30 is activated.
  • the voltage Vc of the capacitors 28 of the converter cells 1x and 1y reaches the threshold value Vth1 (i.e., the initial charging voltage V1).
  • Vth1 i.e., the initial charging voltage V1
  • the control signals Sax and Say to go to "high level” and the switches 32 in the converter cells 1x and 1y are controlled to be in the on state.
  • the voltages Vc in the converter cells 1x and 1y are maintained at the initial charging voltage V1. Therefore, voltage imbalance is suppressed.
  • the reason why the voltages Vc in the converter cells 1x and 1y are maintained at the initial charging voltage V1 is the same as that explained in FIG. 15.
  • the resistor 31 is provided inside the power supply circuit 30.
  • the present invention is not limited to this configuration.
  • the resistor 31 may be provided outside the power supply circuit 30. In this case, heat generated by the power consumption of the resistor 31 can be discharged to the outside of the power supply circuit 30, so that the power supply circuit 30 can be prevented from becoming large and having high thermal conductivity.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
PCT/JP2023/031913 2023-08-31 2023-08-31 電力変換装置 Pending WO2025046857A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2024501625A JP7485495B1 (ja) 2023-08-31 2023-08-31 電力変換装置
PCT/JP2023/031913 WO2025046857A1 (ja) 2023-08-31 2023-08-31 電力変換装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2023/031913 WO2025046857A1 (ja) 2023-08-31 2023-08-31 電力変換装置

Publications (1)

Publication Number Publication Date
WO2025046857A1 true WO2025046857A1 (ja) 2025-03-06

Family

ID=91030871

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2023/031913 Pending WO2025046857A1 (ja) 2023-08-31 2023-08-31 電力変換装置

Country Status (2)

Country Link
JP (1) JP7485495B1 (https=)
WO (1) WO2025046857A1 (https=)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016203517A1 (ja) * 2015-06-15 2016-12-22 東芝三菱電機産業システム株式会社 電力変換装置
US20180183353A1 (en) * 2015-06-22 2018-06-28 Hyosung Corporation Power supply apparatus for sub-module of mmc
JP2019106785A (ja) 2017-12-12 2019-06-27 東芝三菱電機産業システム株式会社 電力変換装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016203517A1 (ja) * 2015-06-15 2016-12-22 東芝三菱電機産業システム株式会社 電力変換装置
US20180183353A1 (en) * 2015-06-22 2018-06-28 Hyosung Corporation Power supply apparatus for sub-module of mmc
JP2019106785A (ja) 2017-12-12 2019-06-27 東芝三菱電機産業システム株式会社 電力変換装置

Also Published As

Publication number Publication date
JP7485495B1 (ja) 2024-05-16
JPWO2025046857A1 (https=) 2025-03-06

Similar Documents

Publication Publication Date Title
US20220269325A1 (en) Power supply apparatus, power supply system, and data center
US10998830B2 (en) Power conversion device and three-phase power conversion device
US10110110B2 (en) Power conversion device
JP6208803B2 (ja) モジュール型マルチレベルコンバータ及びモジュール型マルチレベルコンバータの電圧バランシング制御方法
CN111293888A (zh) Dc/dc转换器
US11689109B2 (en) Input-parallel output-series multi-converter switching power supply
US20240014669A1 (en) Power Storage Apparatus and Power System Stabilization System
TWI810884B (zh) 直流-直流變壓器及其控制方法
US20240072649A1 (en) Totem-pole power factor correction circuit and power supply module
KR102276024B1 (ko) 무순단 전원 공급 제어 장치 및 그 전원 공급 제어 장치가 적용된 ups 모듈
US12368316B2 (en) Power supply device
JP7485495B1 (ja) 電力変換装置
JP7118328B1 (ja) 電力制御システム
JP7641856B2 (ja) 充電装置
JP6923121B2 (ja) 電力供給装置
JP7418675B1 (ja) 電力変換装置
US11362578B2 (en) Power conversion apparatus
JP5185563B2 (ja) 電力変換装置
JP7823271B1 (ja) 無停電電源装置
US20240088784A1 (en) Dc-dc converter, vehicle including converter, and control method thereof
JP7693121B1 (ja) 無停電電源装置および給電システム
US20260074620A1 (en) Systems and methods to balance flying capacitors in high power multi-level buck or boost converters for renewable and solar maximum power point tracking (mppt) inverter applications
JP7126133B2 (ja) 電力変換装置
WO2026088286A1 (ja) 無停電電源装置
WO2025099787A1 (ja) 電力系統安定化システム、電力系統安定化システムの起動方法及び制御装置

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2024501625

Country of ref document: JP

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 2024501625

Country of ref document: JP

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 23950800

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2023950800

Country of ref document: EP