WO2024202667A1 - 積層セラミックコンデンサ - Google Patents

積層セラミックコンデンサ Download PDF

Info

Publication number
WO2024202667A1
WO2024202667A1 PCT/JP2024/005490 JP2024005490W WO2024202667A1 WO 2024202667 A1 WO2024202667 A1 WO 2024202667A1 JP 2024005490 W JP2024005490 W JP 2024005490W WO 2024202667 A1 WO2024202667 A1 WO 2024202667A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
conductive resin
ceramic capacitor
flat
multilayer ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2024/005490
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
しま 勝部
孝太 善哉
泰弘 三嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to CN202480021000.1A priority Critical patent/CN120836068A/zh
Priority to KR1020257027983A priority patent/KR20250136405A/ko
Priority to EP24778812.8A priority patent/EP4648077A1/en
Priority to JP2025509906A priority patent/JPWO2024202667A1/ja
Publication of WO2024202667A1 publication Critical patent/WO2024202667A1/ja
Priority to US19/297,039 priority patent/US20250372309A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/012—Form of non-self-supporting electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
    • H01G4/1218—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates
    • H01G4/1227—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates based on alkaline earth titanates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H01G4/2325—Terminals electrically connecting two or more layers of a stacked or rolled capacitor characterised by the material of the terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/252—Terminals the terminals being coated on the capacitive element

Definitions

  • the present invention relates to a multilayer ceramic capacitor.
  • the external electrodes of conventional multilayer ceramic capacitors are configured with a copper base external electrode, a resin external electrode, a Ni plating layer, and a Sn plating layer.
  • Patent Document 1 describes a resin external electrode that has a three-layer structure in the thickness direction. The first layer is the layer on the copper base side, the second layer is in the middle, and the third layer is the layer on the plating side. The void volume is described for the first and second layers. The void volume of the first layer is 10% or less, and the void volume of the second layer is 16% or more. However, there is no description of the spatial distribution of the voids within the resin electrode layer.
  • the multilayer ceramic capacitor of Patent Document 1 has the following problems.
  • the conductive resin layer has a three-layer structure, which increases manufacturing costs.
  • the spatial distribution of voids in the conductive resin layer is random, which causes uneven cohesive force within the conductive resin layer.
  • the uneven cohesive force within the conductive resin layer causes a decrease in the mechanical strength of the multilayer ceramic capacitor.
  • the main object of the present invention is to provide a multilayer ceramic electronic component, in particular a multilayer ceramic capacitor with high mechanical strength.
  • the multilayer ceramic capacitor of the present invention includes a laminate including a plurality of laminated dielectric layers, a first main surface and a second main surface that face each other in the height direction, a first side surface and a second side surface that face each other in the width direction perpendicular to the height direction, and a first end surface and a second end surface that face each other in the length direction perpendicular to the height direction and the width direction, a first internal electrode layer that is disposed on the plurality of dielectric layers and exposed to the first end surface, a second internal electrode layer that is disposed on the plurality of dielectric layers and exposed to the second end surface, a first external electrode that is disposed on the first end surface, and a second external electrode that is disposed on the second end surface, in which the first external electrode and the second external electrode have a base electrode layer that includes a metal component, a conductive resin layer that includes a thermosetting resin and a metal filler that is disposed on the base electrode layer, and a plating layer that is disposed on the
  • the present invention provides a multilayer ceramic capacitor with high mechanical strength.
  • FIG. 1 is a perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention
  • 2 is a cross-sectional view taken along line II in FIG. 1.
  • 2 is a cross-sectional view taken along line II-II of FIG. 1.
  • FIG. 3 is an enlarged view of the frame R1 in FIG. 2 .
  • FIG. 5 is an enlarged view of the frame R2 in FIG. 4 .
  • Fig. 1 is a perspective view of a multilayer ceramic capacitor 1 according to an embodiment of the present invention.
  • the laminate 2 includes a plurality of dielectric layers and a plurality of internal electrode layers that are stacked.
  • the shape of the laminate 2 is approximately a rectangular parallelepiped.
  • the direction in which the dielectric layers and the internal electrode layers are stacked is defined as a height direction T.
  • the direction perpendicular to the height direction T is defined as a width direction W.
  • the direction perpendicular to the height direction T and the width direction W is defined as a length direction L.
  • one of the two faces that face each other in the height direction T is the first main surface M1.
  • the remaining face is the second main surface M2.
  • one of the two faces that face each other in the width direction W is the first side surface S1.
  • the remaining face is the second side surface.
  • one of the two faces that face each other in the length direction L is the first end surface E1.
  • the remaining face is the second end surface E2.
  • the mounting surface of the multilayer ceramic capacitor 1 is the second main surface M2.
  • the mounting surface refers to the surface that faces a wiring board or the like when the multilayer ceramic capacitor 1 is mounted on a wiring board or the like.
  • the cross section taken along line I-I in FIG. 1 is taken as the LT cross section.
  • the cross section taken along line II-II in FIG. 1 is taken as the WT cross section.
  • intersection of three faces of the laminate 2 is the corner of the laminate 2, and the intersection of two faces of the laminate 2 is the ridge of the laminate 2. It is preferable that the corners and ridges are rounded.
  • the total number of dielectric layers laminated in the laminate 2 is preferably 15 or more and 2000 or less.
  • the main material of the dielectric layers is a ceramic material. Examples of the ceramic material are dielectric ceramics containing barium titanate, calcium titanate, strontium titanate, calcium zirconate, or the like as main components.
  • the ceramic material may be a dielectric ceramic containing these main components and additional components such as manganese compounds, iron compounds, chromium compounds, cobalt compounds, and nickel compounds.
  • each dielectric layer is preferably 0.5 ⁇ m or more and 10 ⁇ m or less.
  • Fig. 2 is a cross-sectional view taken along line II in Fig. 1.
  • the laminate 2 can be divided into a first main surface side outer layer portion OL1, an inner layer range IL, and a second main surface side outer layer portion OL2 in the height direction T.
  • the first main surface side outer layer portion OL1, the inner layer range IL, and the second main surface side outer layer portion OL2 are arranged in this order from the first main surface M1 to the second main surface M2 in the height direction T.
  • the first main surface side outer layer portion OL1 is the portion between the internal electrode layer closest to the first main surface M1 and the first main surface M1.
  • the internal layer range IL is the range where the internal electrode layers face each other.
  • the second main surface side outer layer portion OL2 is the portion between the internal electrode layer closest to the second main surface M2 and the second main surface M2.
  • the first main surface side outer layer portion OL1 is located on the first main surface M1 side of the laminate 2.
  • the first main surface side outer layer portion OL1 is formed by an assembly of multiple dielectric layers located between the first main surface M1 and the internal electrode layer closest to the first main surface M1.
  • the first main surface side outer layer portion OL1 is formed by multiple dielectric layers located between the first main surface M1 and the outermost surface of the inner layer range IL on the first main surface M1 side and an extension of that outermost surface.
  • the second main surface side outer layer portion OL2 is located on the second main surface M2 side of the laminate 2.
  • the second main surface side outer layer portion OL2 is formed by an assembly of multiple dielectric layers located between the second main surface M2 and the internal electrode layer closest to the second main surface M2.
  • the second main surface side outer layer portion OL2 is formed by multiple dielectric layers located between the second main surface M2 and the outermost surface of the inner layer range IL on the second main surface M2 side and an extension of that outermost surface.
  • the inner layer range IL is the range sandwiched between the first main surface side outer layer portion OL1 and the second main surface side outer layer portion OL2.
  • the dielectric layers disposed in the first main surface side outer layer portion OL1 and the second main surface side outer layer portion OL2 are referred to as outer dielectric layer 3.
  • the dielectric layers disposed in the inner layer range IL are referred to as inner dielectric layer 4.
  • the length in the length direction L is the lengthwise length.
  • the length in the width direction W is the widthwise length.
  • the length in the height direction T is the heightwise length.
  • the position that is half the length in the longitudinal direction is the center position in the longitudinal direction L.
  • the center position in the longitudinal direction L is the center position in the longitudinal direction.
  • the position that is half the widthwise length is the center position in the width direction W.
  • the center position in the width direction W is the widthwise center position.
  • the position that is half the length in the height direction is the center position in the height direction T.
  • the center position in the height direction T is the center position in the height direction.
  • the end in the length direction L is the length direction end.
  • the end in the width direction W is the width direction end.
  • the end in the height direction T is the height direction end.
  • the size of the laminate 2 is not particularly limited.
  • the length of the laminate in the longitudinal direction is preferably 0.2 mm or more and 10 mm or less.
  • the length of the laminate 2 in the width direction is preferably 0.1 mm or more and 5 mm or less.
  • the length of the laminate 2 in the height direction is preferably 0.1 mm or more and 5 mm or less.
  • the laminate 2 can be divided into a first end surface side outer layer portion LG1, a longitudinally facing portion LF, and a second end surface side outer layer portion LG2 in the longitudinal direction L.
  • the first end surface side outer layer portion LG1, the longitudinally facing portion LF, and the second end surface side outer layer portion LG2 are arranged in this order in the longitudinal direction L from the first end surface E1 to the second end surface E2.
  • the longitudinal opposing portion LF is a portion where the internal electrode layers face each other in the height direction T.
  • the first end face side outer layer portion LG1 is a portion between the longitudinal opposing portion LF and the first end face E1.
  • the second end face side outer layer portion LG2 is a portion between the longitudinal opposing portion LF and the second end face E2.
  • the longitudinal opposing portion LF is a portion that corresponds to the opposing electrode portion of the internal electrode layer.
  • the first end face side outer layer portion LG1 and the second end face side outer layer portion LG2 are portions that correspond to the lead-out electrode portion of the internal electrode layer.
  • the first end face side outer layer portion LG1 and the second end face side outer layer portion LG2 are also called L gaps.
  • the opposing electrode portion includes a first opposing electrode portion 7a and a second opposing electrode portion 7b.
  • the extraction electrode portion includes a first extraction electrode portion 8a and a second extraction electrode portion 8b. The opposing electrode portion and the extraction electrode portion will be described later.
  • the first end face side outer layer portion LG1 is located on the first end face E1 side.
  • the first end face side outer layer portion LG1 is located between the first end face E1 and the end of the second internal electrode layer 6b on the first end face E1 side.
  • the second end face side outer layer portion LG2 is located on the second end face E2 side.
  • the second end face side outer layer portion LG2 is located between the second end face E2 and the end of the first internal electrode layer 6a on the second end face E2 side.
  • Fig. 3 is a cross-sectional view taken along line II-II in Fig. 1.
  • the laminate 2 can be divided into a first side surface outer layer portion WG1, a widthwise opposing portion WF, and a second side surface outer layer portion WG2 in the width direction W.
  • the first side surface outer layer portion WG1, the widthwise opposing portion WF, and the second side surface outer layer portion WG2 are arranged in this order in the width direction W from the first side surface S1 to the second side surface S2.
  • the widthwise opposing portion WF is the portion where the internal electrode layers oppose each other in the height direction T.
  • the first side surface side outer layer portion WG1 is the portion between the widthwise opposing portion WF and the first side surface S1.
  • the second side surface side outer layer portion WG2 is the portion between the widthwise opposing portion WF and the second side surface S2.
  • the first side surface side outer layer portion WG1 and the second side surface side outer layer portion WG2 are also called the W gap.
  • the first side surface side outer layer portion WG1 and the second side surface side outer layer portion WG2 are portions where no internal electrode layer exists in the height direction T.
  • the first side surface side outer layer portion WG1 is located on the first side surface S1 side.
  • the first side surface side outer layer portion WG1 is formed by multiple dielectric layers located between the first side surface S1 and the outermost surface of the widthwise opposing portion WF on the first side surface S1 side.
  • the second side surface outer layer portion WG2 is located on the second side surface S2 side.
  • the second side surface outer layer portion WG2 is formed by multiple dielectric layers located between the second side surface S2 and the outermost surface of the widthwise opposing portion WF on the second side surface S2 side.
  • the internal electrode layers include a plurality of first internal electrode layers 6a and a plurality of second internal electrode layers 6b.
  • the first internal electrode layers 6a are internal electrode layers exposed at the first end face E1.
  • the second internal electrode layers 6b are internal electrode layers exposed at the second end face E2.
  • the first internal electrode layer 6a can be divided into a first opposing electrode portion 7a and a first extraction electrode portion 8a.
  • the first opposing electrode portion 7a is the portion that faces the second internal electrode layer 6b.
  • the first extraction electrode portion 8a is the portion that is extracted from the first opposing electrode portion 7a to the first end face E1 of the laminate 2.
  • the end of the first extraction electrode portion 8a on the first end face E1 side is extended to the surface of the first end face E1 of the laminate 2.
  • the end of the first extraction electrode portion 8a extended to the first end face E1 forms an exposed portion at the first end face E1.
  • the second internal electrode layer 6b can be divided into a second opposing electrode portion 7b and a second extraction electrode portion 8b.
  • the second opposing electrode portion 7b is the portion that faces the first internal electrode layer 6a.
  • the second extraction electrode portion 8b is the portion that is extracted from the second opposing electrode portion 7b to the second end face E2 of the laminate 2.
  • the end of the second extraction electrode portion 8b on the second end face E2 side is extended to the surface of the second end face E2 of the laminate 2.
  • the end of the second extraction electrode portion 8b extended to the second end face E2 forms an exposed portion at the second end face E2.
  • the shapes of the first opposing electrode portion 7a and the second opposing electrode portion 7b are not particularly limited.
  • the shapes of the first opposing electrode portion 7a and the second opposing electrode portion 7b are preferably rectangular.
  • the corners of the first opposing electrode portion 7a and the corners of the second opposing electrode portion 7b may be rounded.
  • the corners of the first opposing electrode portion 7a and the corners of the second opposing electrode portion 7b may be formed at an angle. Forming at an angle means forming them in a tapered shape.
  • the shapes of the first and second extraction electrodes 8a and 8b are not particularly limited.
  • the shapes of the first and second extraction electrodes 8a and 8b are preferably rectangular.
  • the corners of the first and second extraction electrodes 8a and 8b may be rounded.
  • the corners of the first and second extraction electrodes 8a and 8b may be formed at an angle. Forming at an angle means forming them in a tapered shape.
  • the width of the first opposing electrode portion 7a and the width of the first extension electrode portion 8a may be the same. Either one of the width of the first opposing electrode portion 7a and the width of the first extension electrode portion 8a may be narrower than the remaining one.
  • the width of the second opposing electrode portion 7b and the width of the second extension electrode portion 8b may be the same. Either one of the width of the second opposing electrode portion 7b and the width of the second extension electrode portion 8b may be narrower than the remaining one.
  • capacitance is formed by the first opposing electrode portion 7a and the second opposing electrode portion 7b facing each other via the inner dielectric layer 4. This allows the multilayer ceramic capacitor 1 to exhibit capacitor characteristics.
  • the thickness of the first internal electrode layer 6a and the second internal electrode layer 6b is preferably, for example, about 0.2 ⁇ m or more and 2.0 ⁇ m or less.
  • the total number of the first internal electrode layers 6a and the second internal electrode layers 6b is preferably 15 or more and 2000 or less.
  • the portion where the first internal electrode layer 6a and the second internal electrode layer 6b face each other is defined as an inner layer portion 10.
  • the inner layer portion 10 is a portion where the lengthwise facing portion LF shown in FIG. 2 and the widthwise facing portion WF shown in FIG. 3 intersect with the inner layer range IL.
  • the shape of the inner layer portion 10 is approximately a rectangular parallelepiped.
  • the portion where the lengthwise facing portion LF and the inner layer range IL intersect is shown as the inner layer portion 10.
  • the portion where the widthwise facing portion WF and the inner layer range IL intersect is shown as the inner layer portion 10.
  • the external electrodes include a first external electrode 20a and a second external electrode 20b.
  • the first external electrode 20a is an external electrode connected to the first internal electrode layer 6a.
  • the first external electrode 20a is disposed on the first end face E1, a portion of the first main surface M1, a portion of the second main surface M2, a portion of the first side surface S1, and a portion of the second side surface S2.
  • the second external electrode 20b is an external electrode connected to the second internal electrode layer 6b.
  • the second external electrode 20b is disposed on the second end face E2, a portion of the first main surface M1, a portion of the second main surface M2, a portion of the first side surface S1, and a portion of the second side surface S2.
  • the external electrode preferably includes a base electrode layer, a conductive resin layer, and a plating layer.
  • the plating layer preferably includes a Ni plating layer and a Sn plating layer.
  • an external electrode including a base electrode layer, a conductive resin layer, a Ni plating layer, and a Sn plating layer is described.
  • the base electrode layer includes a first base electrode layer 21a and a second base electrode layer 21b.
  • the first base electrode layer 21a is disposed on the first end face E1, a part of the first main surface M1, a part of the second main surface M2, a part of the first side surface S1, and a part of the second side surface S2.
  • the second base electrode layer 21b is disposed on the second end face E2, a part of the first main surface M1, a part of the second main surface M2, a part of the first side surface S1, and a part of the second side surface S2.
  • the base electrode layer includes a conductive metal and a glass component.
  • the conductive metal is at least one of copper, nickel, silver, palladium, a silver-palladium alloy, gold, etc.
  • the glass component is at least one of boron, silicon, barium, manganese, aluminum, lithium, etc.
  • the base electrode layer When the base electrode layer is fired simultaneously with the internal electrode layer, it is preferable to add a dielectric material to the conductive paste instead of the glass component. This can improve the adhesion between the base electrode layer and the laminate 2.
  • the thickness of the base electrode layer located on the first end face E1 or the first end face E2 at the center position in the height direction is preferably 10 ⁇ m or more and 150 ⁇ m or less.
  • the thickness of the base electrode layer at the center position in the longitudinal direction on the first main surface M1, the second main surface M2, the first side surface S1, and the second side surface S2 is 5 ⁇ m or more and 50 ⁇ m or less.
  • the base electrode layer can also be a thin film layer.
  • the thin film layer can be formed by a thin film formation method such as a sputtering method or a vapor deposition method.
  • the formed thin film layer is a layer in which metal particles are deposited.
  • the thickness of the thin film layer is preferably 1 ⁇ m or less.
  • a conductive resin layer is disposed on the base electrode layer.
  • the conductive resin layer includes a resin component and a metal component.
  • the conductive resin layer includes a first conductive resin layer 22 a and a second conductive resin layer 22 b.
  • the first conductive resin layer 22a is disposed on the first underlying electrode layer 21a.
  • the first conductive resin layer 22a covers the first underlying electrode layer 21a.
  • the second conductive resin layer 22b is disposed on the second underlying electrode layer 21b.
  • the second conductive resin layer 22b covers the second underlying electrode layer 21b. It is preferable that the ends of the conductive resin layers are in contact with the laminate 2.
  • the conductive resin layer contains a thermosetting resin. By containing a thermosetting resin, the conductive resin layer is more flexible than the underlying electrode layer.
  • the conductive resin layer functions as a buffer layer. Therefore, when a bending stress is applied to the mounting board and this stress applies a physical impact to the multilayer ceramic capacitor 1, cracks are unlikely to occur in the multilayer ceramic capacitor 1. When a shock caused by a thermal cycle is applied to the multilayer ceramic capacitor 1, cracks are unlikely to occur in the multilayer ceramic capacitor 1.
  • the thermosetting resin contained in the conductive resin layer can be a thermosetting resin such as an epoxy resin, a phenol resin, a urethane resin, a silicone resin, or a polyimide resin.
  • a thermosetting resin such as an epoxy resin, a phenol resin, a urethane resin, a silicone resin, or a polyimide resin.
  • an epoxy resin is one of the most suitable resins.
  • An epoxy resin has excellent heat resistance, moisture resistance, and adhesion.
  • multiple types of resins such as an epoxy resin and a phenol resin may be used.
  • the conductive resin layer preferably contains a curing agent in addition to the thermosetting resin.
  • the curing agent can be a compound such as a phenol-based, amine-based, acid anhydride-based, imidazole-based, active ester-based, or amide-imide-based compound.
  • the conductive resin layer contains a metal component.
  • the inclusion of the metal component in the conductive resin layer makes the conductive resin layer conductive.
  • the metal component in the conductive resin layer is contained in the conductive resin layer as metal powder, i.e., metal filler. Contact between the metal fillers forms a conductive path inside the conductive resin layer.
  • the conductive resin layer becomes conductive due to the formed conductive path.
  • the metal component will be explained later.
  • the thickness of the conductive resin layer 22 located on the first end face E1 or the second end face E2 at the center position in the height direction is preferably 10 ⁇ m or more and 200 ⁇ m or less.
  • the thickness of the conductive resin layer at the center position in the longitudinal direction on the first main surface M1, the second main surface M2, the first side surface S1, and the second side surface S2 is 10 ⁇ m or more and 200 ⁇ m or less.
  • the plating layer includes a Ni plating layer and a Sn plating layer.
  • Ni plating layer The Ni plating layer is disposed on the conductive resin layer.
  • the Ni plating layer covers at least a portion of the conductive resin layer.
  • the Ni plating layer includes a first Ni plating layer 23a and a second Ni plating layer 23b.
  • the first Ni plating layer 23a is disposed on the first conductive resin layer 22a.
  • the second Ni plating layer 23b is disposed on the second conductive resin layer 22b.
  • the Sn plating layer is disposed on the Ni plating layer.
  • the Sn plating layer covers at least a portion of the Ni plating layer.
  • the Sn plating layer includes a first Sn plating layer 24a and a second Sn plating layer 24b.
  • the first Sn plating layer 24a is disposed on the first Ni plating layer 23a.
  • the second Sn plating layer 24b is disposed on the second Ni plating layer 23b.
  • the Sn plating layer has good solder wettability.
  • the Sn plating layer makes it easy to mount the multilayer ceramic capacitor 1 on a substrate, etc.
  • each Ni-plated layer and Sn-plated layer is preferably 2 ⁇ m or more and 15 ⁇ m or less.
  • the size of the multilayer ceramic capacitor 1 is not particularly limited.
  • the preferred length of the multilayer ceramic capacitor 1 including the laminate 2 and the external electrodes is 0.2 mm or more and 10 mm or less.
  • the preferred height of the multilayer ceramic capacitor 1 including the laminate 2 and the external electrodes is 0.1 mm or more and 5 mm or less.
  • the preferred width of the multilayer ceramic capacitor 1 including the laminate 2 and the external electrodes is 0.1 mm or more and 10 mm or less.
  • the metal component contained in the conductive resin layer contains a metal component to impart conductivity to the conductive resin layer.
  • the metal component contained in the conductive resin layer can be silver, copper, nickel, tin, bismuth, or an alloy containing any of these. It is particularly preferable that the metal component contains silver.
  • the silver may be elemental silver. Or, the silver may be an alloy containing silver.
  • the metal component can be at least one of silver, silver-coated copper, and silver-coated alloy powder.
  • Figure 4 is an enlarged view of the framed area R1 in Figure 2.
  • Figure 5 is an enlarged view of the framed area R2 in Figure 4.
  • the conductive resin layer will be described using the second conductive resin layer 22b as an example. However, what is described below also applies to the first conductive resin layer 22a.
  • metal filler 30 is disposed in second conductive resin layer 22b. Multiple metal fillers 30 are dispersed and disposed in resin 38.
  • the metal filler 30 contained in the conductive resin layer has a flat shape.
  • the flat metal filler 30 may be referred to as flat filler 30.
  • voids 40 are arranged on the surface of the metal filler 30.
  • the mechanical strength of the multilayer ceramic capacitor 1 can be improved. If destruction inside the conductive resin layer occurs at the interface between the flat filler 30 and the resin 38, the uniform presence of voids 40 between the flat filler 30 and the resin 38 reduces the destruction strength of the entire resin electrode. As a result, when thermal stress or mechanical stress is applied to the multilayer ceramic capacitor 1, the resin electrode layer is destroyed preferentially over the dielectric layer of the laminate 2, and destruction of the dielectric layer can be avoided. As a result, the mechanical strength of the multilayer ceramic capacitor 1 can be increased. Each of these is explained in order below.
  • the conductive resin layer contains flat fillers as metal fillers 30.
  • Flat fillers refer to metal fillers 30 having the following shape:
  • the flatness is defined as follows. Metal filler 30 with a flatness of 4 or more is considered to be flat filler 30.
  • Flatness a/b
  • A the direction in which the length of the metal filler 30 is the longest.
  • Midpoint M the midpoint of the metal filler 30 in the direction A.
  • Length a the longest length of the metal filler 30 in the same direction as the direction A at the midpoint M.
  • Length b the shortest length of the metal filler 30 in a direction perpendicular to the direction A at the midpoint M.
  • voids 40 are arranged on the surface of the flat filler 30.
  • voids 40 are arranged around the flat filler 30.
  • the flat filler 30 is oriented in a direction closer to the horizontal direction than perpendicular to the plane of the element body.
  • the element body means the laminate 2.
  • the plane here means the second main surface M2 or the second end surface E2. Oriented means that the direction A of the flat filler 30 faces a predetermined direction.
  • the flat filler 30 is oriented in the second conductive resin layer 22b on the second main surface M2 so as to extend in a direction approximately parallel to the length direction L of the laminate 2.
  • the line CL in Figure 4 indicates the direction in which a crack propagates when external stress is applied to the multilayer ceramic capacitor 1.
  • the flat filler 30 extends in a direction approximately parallel to the length direction L.
  • the voids 40 arranged on the surface of the flat filler 30 are arranged along at least a portion of the outer periphery 42 of the flat filler 30.
  • the voids 40 are arranged in a portion of the outer periphery 42 of the flat filler 30 that is approximately parallel to the length direction L.
  • Controlling the progression of cracks means adjusting the degree of crack progression.
  • the degree of crack progression is adjusted so that the external stress is alleviated by the cracks, making it difficult for external stress to be applied to the dielectric layer. As a result, it is possible to prevent cracks that occur in the resin electrode layer from progressing into the dielectric layer.
  • the voids 40 arranged on the outer periphery 42 of the flat filler 30 are arranged in a length range of 5% to 90% of the periphery of the outer periphery 42 of the flat filler 30 observed in the LT cross section.
  • the range D indicates the area in which the voids 40 are located on the outer periphery 42 of the flat filler 30. It is preferable that the length of the outer periphery 42 of the flat filler 30 included in range D is 5% or more and 90% or less of the total periphery length of the outer periphery 42 of the flat filler 30.
  • a plurality of flat fillers 30 are arranged in the resin electrode layer, and it is preferable that within a predetermined range in the LT cross section, the proportion of metal fillers 30 in which voids 40 are arranged within a range of 5% to 90% of the perimeter of the outer periphery 42 of the flat fillers 30 relative to the total number of flat fillers 30 is 60% or more.
  • the predetermined range can be, for example, a rectangular range of 20 ⁇ m x 10 ⁇ m.
  • the proportion of metal fillers 30 having an inclination of 45° or less with respect to the direction parallel to the length direction L of the laminate 2 is 50% or more relative to the total number of flat fillers 30.
  • the specified range can be, for example, a rectangular range of 20 ⁇ m x 10 ⁇ m.
  • angle A is the angle between line L1 and line L2.
  • Line L1 is a line indicating a direction parallel to the length direction L.
  • Line L2 indicates the longitudinal direction of the flat filler 30.
  • the proportion of flat fillers 30 with angle A of 45° or less is 50% or more.
  • the voids 40 can be arranged uniformly between the metal filler 30 and the resin. This reduces the fracture strength of the entire resin electrode, and when thermal stress or mechanical stress is applied to the multilayer ceramic capacitor 1, the resin electrode layer is broken down preferentially over the dielectric layer. As a result, it is possible to avoid breaking down the dielectric layer, and the mechanical strength of the multilayer ceramic capacitor 1 can be improved.
  • the average particle size of the metal filler 30 is not particularly limited.
  • the average particle size of the metal filler 30 can be, for example, 0.3 ⁇ m or more and 10 ⁇ m or less.
  • the average particle size of the metal filler contained in the conductive resin layer can be calculated using a laser diffraction particle size measurement method (based on IOS 13320).
  • the amount of resin contained in the conductive resin layer is preferably 25 vmol% or more and 65 vmol% or less relative to the total volume of the conductive resin layer.
  • the amount of metal components contained in the conductive resin layer is preferably 35 vmol% or more and 75 vmol% or less relative to the total volume of the conductive resin layer.
  • the mechanical strength and other properties were evaluated as follows.
  • the conditions of the multilayer ceramic capacitor used in the evaluation are as follows.
  • the size of the multilayer ceramic capacitor is 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height.
  • the capacitance of the multilayer ceramic capacitor is 0.010 ⁇ F.
  • the rated voltage of the multilayer ceramic capacitor is 50 V.
  • the evaluation method and criteria for mechanical strength are as follows. Mechanical strength was evaluated based on the resistance to cracking. The mechanical strength was evaluated by performing a deflection test using the method of JIS C 6484 on 10 completed multilayer ceramic capacitors, and the presence or absence of cracking in the dielectric layer when the amount of deflection was fixed at 5 mm. No cracks occurred in the multilayer ceramic capacitor 1 of this embodiment.
  • the LT cross section shown in Fig. 4 can be observed, for example, as follows.
  • the multilayer ceramic capacitor 1 is polished to the center position in the width direction.
  • the cross section exposed by polishing is then observed with an optical microscope or the like.
  • the length and thickness of each part can be measured from the observed cross section.
  • the cross-sections of the external electrodes of the multilayer ceramic capacitor 1 were processed by ion milling, and the state of the voids was observed using a backscattered electron image of a FE-SEM (Field Emission Scanning Electron Microscope).
  • the conductive paste for the dielectric sheet and the internal electrode layer contains a binder and a solvent.
  • the binder and the solvent may be a known organic binder and an organic solvent, etc.
  • a conductive paste for the internal electrode layer is printed in a predetermined pattern on the dielectric sheet.
  • the internal electrode layer pattern is formed by printing the conductive paste.
  • the printing can be performed by, for example, screen printing or gravure printing.
  • a predetermined number of dielectric sheets for the outer layer are stacked. No internal electrode layer pattern is printed on the dielectric sheets for the outer layer. Dielectric sheets with internal electrode layer patterns printed on them are stacked in order on top of the stacked dielectric sheets. A predetermined number of dielectric sheets for the outer layer are then stacked on top of them. A laminated sheet is produced by stacking these layers.
  • the laminated sheet is pressed in the height direction to produce a laminated block.
  • the pressing method can be a hydrostatic press.
  • the laminated block is cut to a predetermined size. This cutting process cuts out laminated chips. When cutting, the corners and edges of the laminated chips may be rounded. Barrel polishing may be used to round them.
  • the laminated chip is fired. This firing produces a laminate.
  • the preferred firing temperature is 900°C or higher and 1200°C or lower. The firing temperature can be changed depending on the materials of the dielectric and internal electrode layers.
  • the laminate is provided with external electrodes.
  • a conductive paste that will become the base electrodes is applied to both end surfaces of the laminate.
  • the conductive paste contains a glass component and a metal.
  • the application method can be, for example, a dipping method.
  • a firing process is performed.
  • a base electrode layer is formed by this firing process.
  • the preferred temperature for the firing process is 700° C. or higher and 900° C. or lower.
  • the base electrode layer is a fired layer.
  • the conductive resin layer is formed on the base electrode layer.
  • a conductive resin paste is prepared.
  • the conductive resin paste contains a resin component, a metal component, and a solvent.
  • a thermosetting resin is used as the resin component. Specifically, at least one of an epoxy resin and a phenolic resin is used as the resin component.
  • the solvent for the conductive resin paste is diethylene glycol monobutyl ether (molecular weight 162.23, boiling point 230° C.) to which is added a high boiling point solvent having a boiling point of 250° C. or higher, as shown below.
  • Dibutyl sebacate (molecular weight 314.47, boiling point 345°C) Diethyl sebacate (molecular weight 258.36, boiling point 309°C) Dibutyl adipate (molecular weight 258.36, boiling point 305°C) Dimethyl sebacate (molecular weight 230.30, boiling point 294°C) Diethyl suberate (molecular weight 230.30, boiling point 283°C) Dibutyl succinate (molecular weight 230.30, boiling point 274°C) Diethyl adipate (molecular weight 202.25, boiling point 251°C)
  • dibutyl adipate (molecular weight 258.36, boiling point 305°C) is used.
  • metal powder i.e. metal filler
  • At least one of silver, silver-coated copper, and silver-coated alloy powder is used as the metal filler.
  • the shape of the metal filler is flat. Note that spherical metal filler may also be added.
  • a conductive resin paste is applied onto the base electrode layer.
  • the application method can be a dipping method.
  • the heat treatment involves drying in a hot air oven at 150°C to 180°C for 10 minutes. After that, the material is cured in an air atmosphere at 200°C to 280°C for 60 minutes. This heat curing forms a conductive electrode layer.
  • the conductive electrode layer By forming the conductive electrode layer in this manner, voids can be arranged on the surface of the metal filler. Furthermore, the ratio of the area in which voids are arranged to the perimeter of the metal filler can be adjusted by changing the type of high-boiling point solvent, the amount of high-boiling point solvent added, the drying conditions, or the curing conditions.
  • the atmosphere during the heat treatment is preferably a nitrogen gas atmosphere.
  • the preferred oxygen concentration is 100 ppm or less. This oxygen concentration makes it difficult for the resin to scatter. In addition, this oxygen concentration makes it difficult for various metal components to oxidize.
  • Ni plating layer is formed on the surface of the conductive resin layer.
  • This Ni plating layer becomes a first Ni plating layer and a second Ni plating layer.
  • the method for forming the Ni plating layer may be an electrolytic plating method, and a preferred plating method is barrel plating.
  • a Sn plating layer is formed on the Ni plating layer.
  • a first Sn plating layer is formed on the first Ni plating layer.
  • a second Sn plating layer is formed on the second Ni plating layer.
  • a laminate including a plurality of laminated dielectric layers, the laminate having a first main surface and a second main surface opposed in the height direction, a first side surface and a second side surface opposed in the width direction perpendicular to the height direction, and a first end surface and a second end surface opposed in the length direction perpendicular to the height direction and the width direction, a first internal electrode layer arranged on the plurality of dielectric layers and exposed on the first end surface, a second internal electrode layer arranged on the plurality of dielectric layers and exposed on the second end surface, a first external electrode arranged on the first end surface, and a second external electrode arranged on the second end surface, wherein the first external electrode and the second external electrode have a base electrode layer containing a metal component, a conductive resin layer containing a thermosetting resin and a metal filler arranged on the base electrode layer, and a plating layer arranged on the conductive resin layer, the metal filler of the conductive resin layer is a flat filler that is flat, and
  • ⁇ 2> The multilayer ceramic capacitor described in ⁇ 1>, in which the voids arranged on the surface of the flat filler are arranged along at least a portion of the outer periphery of the flat filler.
  • ⁇ 3> A multilayer ceramic capacitor according to ⁇ 1> or ⁇ 2>, in which the voids are arranged in a range of 5% to 90% of the perimeter of the flat filler in a cross section parallel to the height and length directions of the laminate.
  • ⁇ 4> A multilayer ceramic capacitor described in any one of ⁇ 1> to ⁇ 3>, in which the flat filler extends in a direction approximately parallel to the length direction.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Ceramic Capacitors (AREA)
PCT/JP2024/005490 2023-03-29 2024-02-16 積層セラミックコンデンサ Ceased WO2024202667A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN202480021000.1A CN120836068A (zh) 2023-03-29 2024-02-16 层叠陶瓷电容器
KR1020257027983A KR20250136405A (ko) 2023-03-29 2024-02-16 적층 세라믹 콘덴서
EP24778812.8A EP4648077A1 (en) 2023-03-29 2024-02-16 Laminated ceramic capacitor
JP2025509906A JPWO2024202667A1 (https=) 2023-03-29 2024-02-16
US19/297,039 US20250372309A1 (en) 2023-03-29 2025-08-12 Multilayer ceramic capacitor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023054074 2023-03-29
JP2023-054074 2023-03-29

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US19/297,039 Continuation US20250372309A1 (en) 2023-03-29 2025-08-12 Multilayer ceramic capacitor

Publications (1)

Publication Number Publication Date
WO2024202667A1 true WO2024202667A1 (ja) 2024-10-03

Family

ID=92904226

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2024/005490 Ceased WO2024202667A1 (ja) 2023-03-29 2024-02-16 積層セラミックコンデンサ

Country Status (6)

Country Link
US (1) US20250372309A1 (https=)
EP (1) EP4648077A1 (https=)
JP (1) JPWO2024202667A1 (https=)
KR (1) KR20250136405A (https=)
CN (1) CN120836068A (https=)
WO (1) WO2024202667A1 (https=)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013179268A (ja) * 2012-02-03 2013-09-09 Murata Mfg Co Ltd セラミック電子部品
JP2014039000A (ja) * 2012-08-10 2014-02-27 Samsung Electro-Mechanics Co Ltd 積層セラミックキャパシタ及びその製造方法。
US20160254094A1 (en) * 2015-02-26 2016-09-01 Samsung Electro-Mechanics Co., Ltd. Ceramic electronic component and method of manufacturing the same
JP2018006501A (ja) * 2016-06-30 2018-01-11 Tdk株式会社 電子部品
JP2020088190A (ja) 2018-11-27 2020-06-04 株式会社村田製作所 積層セラミック電子部品
US20200185153A1 (en) * 2018-12-11 2020-06-11 Samsung Electro-Mechanics Co., Ltd. Capacitor component
JP2021028967A (ja) * 2019-08-13 2021-02-25 株式会社村田製作所 積層セラミック電子部品および樹脂電極用導電性ペースト
JP2021125474A (ja) * 2020-01-31 2021-08-30 太陽誘電株式会社 コイル部品及びコイル部品の製造方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013179268A (ja) * 2012-02-03 2013-09-09 Murata Mfg Co Ltd セラミック電子部品
JP2014039000A (ja) * 2012-08-10 2014-02-27 Samsung Electro-Mechanics Co Ltd 積層セラミックキャパシタ及びその製造方法。
US20160254094A1 (en) * 2015-02-26 2016-09-01 Samsung Electro-Mechanics Co., Ltd. Ceramic electronic component and method of manufacturing the same
JP2018006501A (ja) * 2016-06-30 2018-01-11 Tdk株式会社 電子部品
JP2020088190A (ja) 2018-11-27 2020-06-04 株式会社村田製作所 積層セラミック電子部品
US20200185153A1 (en) * 2018-12-11 2020-06-11 Samsung Electro-Mechanics Co., Ltd. Capacitor component
JP2021028967A (ja) * 2019-08-13 2021-02-25 株式会社村田製作所 積層セラミック電子部品および樹脂電極用導電性ペースト
JP2021125474A (ja) * 2020-01-31 2021-08-30 太陽誘電株式会社 コイル部品及びコイル部品の製造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4648077A1

Also Published As

Publication number Publication date
EP4648077A1 (en) 2025-11-12
KR20250136405A (ko) 2025-09-16
JPWO2024202667A1 (https=) 2024-10-03
CN120836068A (zh) 2025-10-24
US20250372309A1 (en) 2025-12-04

Similar Documents

Publication Publication Date Title
US11062848B2 (en) Multilayer ceramic electronic component
KR102112107B1 (ko) 전자부품 및 전자부품의 제조 방법
KR101630050B1 (ko) 적층 세라믹 전자부품
KR101927731B1 (ko) 적층 세라믹 콘덴서
KR102568254B1 (ko) 적층 세라믹 전자부품
KR101397835B1 (ko) 적층 세라믹 전자부품 및 이의 제조방법
KR20140121726A (ko) 적층 세라믹 커패시터 및 그 제조방법
KR20160084217A (ko) 적층 세라믹 전자부품 및 적층 세라믹 전자부품의 실장기판
CN116344211A (zh) 层叠陶瓷电容器及层叠陶瓷电容器的安装构造
KR20250140456A (ko) 적층 세라믹 콘덴서
KR101565725B1 (ko) 적층 세라믹 커패시터 및 그 제조방법
WO2024202667A1 (ja) 積層セラミックコンデンサ
JP2017199847A (ja) 積層セラミックコンデンサ
CN120712623A (zh) 层叠陶瓷电容器
WO2024135256A1 (ja) 積層セラミック電子部品
WO2023243160A1 (ja) 積層セラミックコンデンサ
CN119110977A (zh) 层叠陶瓷电容器
JP2016082186A (ja) 積層セラミックコンデンサ、これを含む積層セラミックコンデンサ連、および、積層セラミックコンデンサの実装体
WO2024202666A1 (ja) 積層セラミックコンデンサ
WO2025018006A1 (ja) 積層セラミックコンデンサ
JP2016082183A (ja) 積層セラミックコンデンサ、これを含む積層セラミックコンデンサ連、および、積層セラミックコンデンサの実装体
US20250111995A1 (en) Multilayer ceramic capacitor
KR102900303B1 (ko) 적층형 전자 부품
WO2024247445A1 (ja) 積層セラミックコンデンサ
JP2026069620A (ja) 積層セラミックコンデンサ

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 24778812

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2024778812

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 2024778812

Country of ref document: EP

Effective date: 20250807

ENP Entry into the national phase

Ref document number: 2025509906

Country of ref document: JP

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 2025509906

Country of ref document: JP

ENP Entry into the national phase

Ref document number: 1020257027983

Country of ref document: KR

Free format text: ST27 STATUS EVENT CODE: A-0-1-A10-A15-NAP-PA0105 (AS PROVIDED BY THE NATIONAL OFFICE)

WWE Wipo information: entry into national phase

Ref document number: 1020257027983

Country of ref document: KR

WWE Wipo information: entry into national phase

Ref document number: 202517082958

Country of ref document: IN

WWP Wipo information: published in national office

Ref document number: 202517082958

Country of ref document: IN

WWE Wipo information: entry into national phase

Ref document number: 202480021000.1

Country of ref document: CN

WWP Wipo information: published in national office

Ref document number: 202480021000.1

Country of ref document: CN

NENP Non-entry into the national phase

Ref country code: DE

WWP Wipo information: published in national office

Ref document number: 2024778812

Country of ref document: EP