WO2024171887A1 - 半導体装置および半導体装置の製造方法 - Google Patents

半導体装置および半導体装置の製造方法 Download PDF

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Publication number
WO2024171887A1
WO2024171887A1 PCT/JP2024/003873 JP2024003873W WO2024171887A1 WO 2024171887 A1 WO2024171887 A1 WO 2024171887A1 JP 2024003873 W JP2024003873 W JP 2024003873W WO 2024171887 A1 WO2024171887 A1 WO 2024171887A1
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Prior art keywords
electrode
semiconductor device
metal
capillary
semiconductor element
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PCT/JP2024/003873
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English (en)
French (fr)
Japanese (ja)
Inventor
瞬也 三上
克宗 白井
悠史 大隅
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Rohm Co Ltd
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Rohm Co Ltd
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Priority to JP2025501072A priority Critical patent/JPWO2024171887A1/ja
Publication of WO2024171887A1 publication Critical patent/WO2024171887A1/ja
Priority to US19/296,448 priority patent/US20260005175A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • H10W40/10Arrangements for heating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01221Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
    • H10W72/01225Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in solid form, e.g. by using a powder or by stud bumping
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221Structures or relative sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231Shapes
    • H10W72/234Cross-sectional shape, i.e. in side view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241Dispositions, e.g. layouts
    • H10W72/247Dispositions of multiple bumps
    • H10W72/248Top-view layouts, e.g. mirror arrays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/853On the same surface
    • H10W72/859Bump connectors and bond wires

Definitions

  • This disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.
  • Patent Document 1 discloses an example of a conventional switching element.
  • a switching element generates energy due to the electromotive force that is generated when cutting off a current.
  • Active clamping is a function that absorbs this energy with the switching element.
  • An object of the present disclosure is to provide a semiconductor device that is an improvement over conventional semiconductor devices.
  • an object of the present disclosure is to provide a semiconductor device that can make the active clamp function more appropriately.
  • the semiconductor device provided by the first aspect of the present disclosure comprises a semiconductor element having a first electrode and a metal block bonded to the first electrode, the metal block having a fractured portion located on a first side, which is the side away from the first electrode in the thickness direction of the semiconductor element, and the center of the fractured portion is offset from the center of the metal block when viewed in the thickness direction.
  • the method for manufacturing a semiconductor device includes the steps of inserting a wire material including a base portion having a uniform diameter into an insertion hole of a capillary and forming a ball portion at the tip of the wire material, attaching the ball portion to a first electrode of a semiconductor element, separating the capillary from the ball portion in the thickness direction of the semiconductor element while allowing relative movement between the capillary and the wire material, sliding the capillary in a sliding direction intersecting the thickness direction, and moving the capillary to the first side in the thickness direction while preventing relative movement between the capillary and the wire material, thereby breaking the wire material and forming a metal lump joined to the first electrode.
  • the semiconductor device provided by the third aspect of the present disclosure comprises a semiconductor element having a first electrode, a plurality of metal lumps joined to the first electrode, and a placement reference portion that serves as a placement reference for the plurality of metal lumps.
  • the above configuration allows active clamping to function more appropriately in, for example, a semiconductor device.
  • FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present disclosure.
  • FIG. 2 is a partial plan view showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 3 is a circuit diagram showing a semiconductor element of the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 4 is a front view showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 5 is a side view showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 6 is a cross-sectional view taken along line VI-VI in FIG.
  • FIG. 7 is a cross-sectional view taken along line VII-VII in FIG.
  • FIG. 8 is a plan view showing a semiconductor element of the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present disclosure.
  • FIG. 2 is a partial plan view showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 9 is a plan view showing a metal lump of a semiconductor device according to a first embodiment of the present disclosure.
  • FIG. 10 is a cross-sectional view taken along line XX in FIG.
  • FIG. 11 is a partial cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 12 is a partial cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 13 is a partial cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 14 is a partial cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 10 is a cross-sectional view taken along line XX in FIG.
  • FIG. 11 is a partial cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 12 is a partial cross-sectional view showing the method for manufacturing the semiconductor
  • FIG. 15 is a partial cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 16 is a partial cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 17 is a cross-sectional view showing a first modified example of the metal lump of the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 18 is a partial cross-sectional view showing a first modification of the method for manufacturing a semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 19 is a plan view showing a second modified example of the metal block of the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 20 is a partial cross-sectional view showing a second modification of the method for manufacturing a semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 21 is a plan view showing a semiconductor device according to a second embodiment of the present disclosure.
  • FIG. 22 is a partial plan view showing a semiconductor device according to a third embodiment of the present disclosure.
  • FIG. 23 is a cross-sectional view taken along line XXIII-XXIII in FIG.
  • FIG. 24 is a partial plan view showing a semiconductor device according to a fourth embodiment of the present disclosure.
  • FIG. 25 is a cross-sectional view taken along line XXV-XXV in FIG.
  • FIG. 26 is a plan view showing a semiconductor device according to a fifth embodiment of the present disclosure.
  • FIG. 21 is a plan view showing a semiconductor device according to a second embodiment of the present disclosure.
  • FIG. 22 is a partial plan view showing a semiconductor device according to a third embodiment of the present disclosure.
  • FIG. 23
  • FIG. 27 is a partial plan view showing a semiconductor device according to a fifth embodiment of the present disclosure.
  • FIG. 28 is a circuit diagram showing a semiconductor element of a semiconductor device according to a fifth embodiment of the present disclosure.
  • FIG. 29 is a front view showing a semiconductor device according to a fifth embodiment of the present disclosure.
  • FIG. 30 is a side view showing a semiconductor device according to the fifth embodiment of the present disclosure.
  • FIG. 31 is a cross-sectional view taken along line XXXI-XXXI in FIG.
  • FIG. 32 is a cross-sectional view taken along line XXXII-XXXII in FIG.
  • FIG. 33 is a plan view showing a semiconductor element of a semiconductor device according to a fifth embodiment of the present disclosure.
  • FIG. 34 is a partially enlarged cross-sectional view taken along line XXXIV-XXXIV in FIG. 33.
  • FIG. FIG. 35 is a plan view showing a semiconductor element of a first modified example of the semiconductor device according to the fifth embodiment of the present disclosure.
  • 36A to 36D are plan views showing modified examples of the placement reference portion of the semiconductor device according to the fifth embodiment of the present disclosure.
  • FIG. 37 is a plan view showing a modified example of the metal lump of the semiconductor device according to the fifth embodiment of the present disclosure.
  • FIG. 38 is a plan view showing a semiconductor element of a semiconductor device according to a sixth embodiment of the present disclosure.
  • FIG. 39 is a plan view showing a semiconductor element of a semiconductor device according to a seventh embodiment of the present disclosure.
  • FIG. 40 is a plan view showing a semiconductor element of the semiconductor device according to the eighth embodiment of the present disclosure.
  • FIG. 41 is a plan view showing a semiconductor element of a first modified example of the semiconductor device according to the eighth embodiment of the present disclosure.
  • FIG. 42 is a plan view showing a semiconductor element of a semiconductor device according to a ninth embodiment of the present disclosure.
  • FIG. 43 is a plan view showing a semiconductor element of a first modified example of the semiconductor device according to the ninth embodiment of the present disclosure.
  • FIG. 44 is a partial plan view showing a semiconductor device according to the tenth embodiment of the present disclosure.
  • FIG. 45 is a cross-sectional view taken along line XLV-XLV in FIG.
  • FIG. 46 is a partial plan view showing a semiconductor device according to the eleventh embodiment of the present disclosure.
  • 47 is a cross-sectional view taken along line XLVII-XLVII in FIG.
  • an object A is formed on an object B" and “an object A is formed on an object B” include “an object A is formed directly on an object B” and “an object A is formed on an object B with another object interposed between the object A and the object B” unless otherwise specified.
  • an object A is disposed on an object B” and “an object A is disposed on an object B” include “an object A is disposed directly on an object B” and “an object A is disposed on an object B with another object interposed between the object A and the object B" unless otherwise specified.
  • an object A is located on an object B includes “an object A is located on an object B in contact with an object B” and “an object A is located on an object B with another object interposed between the object A and the object B” unless otherwise specified.
  • an object A overlaps an object B when viewed in a certain direction includes “an object A overlaps the entire object B” and “an object A overlaps a part of an object B.”
  • a surface A faces in direction B is not limited to the case where the angle of surface A with respect to direction B is 90°, but also includes the case where surface A is tilted with respect to direction B.
  • First embodiment: 1 to 10 show a semiconductor device A1 according to a first embodiment of the present disclosure.
  • the semiconductor device A1 of this embodiment includes a first lead 1, a plurality of second leads 2, a plurality of third leads 3, a semiconductor element 4, a plurality of first wires 51, a plurality of second wires 52, a plurality of metal lumps 6, and a sealing resin 8.
  • FIG. 1 is a plan view showing the semiconductor device A1.
  • FIG. 2 is a partial plan view showing the semiconductor device A1.
  • FIG. 4 is a front view showing the semiconductor device A1.
  • FIG. 5 is a side view showing the semiconductor device A1.
  • FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 2.
  • FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 2.
  • FIG. 8 is a plan view showing the semiconductor element 4.
  • FIG. 9 is a plan view showing the metal mass 6.
  • FIG. 10 is a cross-sectional view taken along line X-X in FIG. 9.
  • three mutually orthogonal directions are referred to as appropriate.
  • the z direction corresponds to the "thickness direction” of this disclosure.
  • the x direction corresponds to the "first direction” of this disclosure.
  • the y direction corresponds to the "second direction” of this disclosure.
  • the shape and size of the semiconductor device A1 are not limited in any way.
  • the size in the x direction is about 4 mm to 7 mm
  • the size in the y direction is about 4 mm to 8 mm
  • the size in the z direction is about 0.7 mm to 2.0 mm.
  • the first lead 1 is a member that supports the semiconductor element 4 and constitutes a conductive path to the semiconductor element 4.
  • the material of the first lead 1 may be made of, for example, a metal such as Cu, Ni, Fe, etc., or an alloy thereof.
  • the first lead 1 may have a plating layer formed in an appropriate position and made of a metal such as Ag, Ni, Pd, Au, etc.
  • the thickness of the first lead 1 is no limitations, and it is, for example, about 0.12 mm to 0.2 mm.
  • the first lead 1 in this embodiment has a die pad portion 11 and two extension portions 12.
  • the die pad portion 11 is a portion that supports the semiconductor element 4. There are no limitations on the shape of the die pad portion 11, and in this embodiment, it is rectangular when viewed in the z direction.
  • the die pad portion 11 has a die pad main surface 111 and a die pad back surface 112.
  • the die pad main surface 111 is a surface that faces the z direction.
  • the die pad back surface 112 is a surface that faces the opposite side to the die pad main surface 111 in the thickness direction. In the illustrated example, the die pad main surface 111 and the die pad back surface 112 are flat surfaces.
  • the two extension portions 12 are portions that extend from the die pad portion 11 on both sides in the x direction.
  • the extension portion 12 has a portion that extends from the die pad portion 11 along the x direction, a portion that extends at an angle in the z direction toward the side toward which the die pad main surface 111 faces relative to that portion, and a portion that extends from that portion along the x direction, and has an overall curved shape.
  • the second leads 2 are spaced apart from the first lead 1 and form a conductive path to the semiconductor element 4.
  • the second leads 2 form a conductive path for a current switched by the semiconductor element 4.
  • the second leads 2 are arranged on one side in the y direction with respect to the first lead 1.
  • the second leads 2 are arranged spaced apart from each other in the x direction.
  • the material of the second lead 2 is not limited in any way, and may be made of metals such as Cu, Ni, Fe, etc., or alloys thereof.
  • the second lead 2 may have a plating layer made of a metal such as Ag, Ni, Pd, Au, etc., formed in appropriate locations.
  • the thickness of the second lead 2 is not limited in any way, and may be, for example, about 0.12 mm to 0.2 mm.
  • the second lead 2 in this embodiment has a pad portion 21 and a terminal portion 22.
  • the pad portion 21 is the portion to which the first wire 51 is connected. In this embodiment, the pad portion 21 is located on the side facing the die pad main surface 111 relative to the die pad portion 11 in the z direction.
  • the terminal portion 22 is a strip-shaped portion extending outward in the y direction from the pad portion 21.
  • the terminal portion 22 has a bent shape when viewed in the x direction, and its tip portion is in the same (or approximately the same) position as the die pad portion 11 in the z direction.
  • the terminal portion 22 is a power supply terminal.
  • Multiple tertiary leads 3 are spaced apart from the first lead 1 and form a conductive path to the semiconductor element 4. In this embodiment, the multiple third leads 3 form a conductive path for a control signal current for controlling the semiconductor element 4.
  • the multiple third leads 3 are arranged on the other side in the y direction with respect to the first lead 1.
  • the multiple third leads 3 are arranged spaced apart from each other in the x direction.
  • the material of the third lead 3 is not limited in any way, and may be made of metals such as Cu, Ni, Fe, etc., or alloys thereof.
  • the third lead 3 may have a plating layer made of a metal such as Ag, Ni, Pd, Au, etc., formed in appropriate locations.
  • the thickness of the third lead 3 is not limited in any way, and may be, for example, about 0.12 mm to 0.2 mm.
  • the third lead 3 in this embodiment has a pad portion 31 and a terminal portion 32.
  • the pad portion 31 is the portion to which the second wire 52 is connected. In this embodiment, the pad portion 31 is located on the side facing the die pad main surface 111 relative to the die pad portion 11 in the z direction.
  • the terminal portion 32 is a strip-shaped portion that extends outward in the y direction from the pad portion 31.
  • the terminal portion 32 has a bent shape when viewed in the x direction, and its tip portion is in the same (or approximately the same) position as the die pad portion 11 in the z direction.
  • terminal portions 32 of the multiple third leads 3 are distinguished as terminal portions 321, 322, 323, and 324.
  • Terminal portion 321 is an output terminal and is electrically connected to a third electrode 4031, which will be described later.
  • Terminal portion 322 is a ground terminal and is electrically connected to a third electrode 4032, which will be described later.
  • Terminal portion 323 is a self-diagnosis output terminal and is electrically connected to a third electrode 4033, which will be described later.
  • Terminal portion 324 is an input terminal and is electrically connected to a third electrode 4034, which will be described later.
  • the semiconductor element 4 is an element that exerts the electrical function of the semiconductor device A1.
  • the specific configuration of the semiconductor element 4 is not limited in any way.
  • the semiconductor element 4 exerts a switching function.
  • the semiconductor element 4 has an element body 40, a first electrode 401, a second electrode 402, and a plurality of third electrodes 403.
  • the semiconductor element 4 has a switching section 408 that is a part that constitutes a transistor that exerts a switching function, and a control section 48 that is a part that controls, monitors, protects, etc. the transistor of the switching section 408.
  • the transistor included in the control section 48 is, for example, a transistor with a horizontal structure.
  • the element body 40 has an element principal surface 40a and an element rear surface 40b.
  • the element principal surface 40a faces the same side as the die pad principal surface 111 in the z direction.
  • the element rear surface 40b faces the opposite side to the element principal surface 40a in the z direction.
  • materials for the element body 40 include semiconductor materials such as Si (silicon), SiC (silicon carbide), and GaN (gallium nitride).
  • the element body 40 has a switching section 408.
  • the switching section 408 incorporates a transistor structure such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or a MISFET (Metal Insulator Semiconductor Field Effect Transistor). As shown in Figures 1, 2 and 8, the switching section 408 is arranged side by side with the control section 48 in the y direction when viewed in the z direction. However, the specific arrangement of the switching section 408 and the control section 48 is not limited in any way.
  • the first electrode 401 is disposed on the element main surface 40a of the element body 40.
  • the first electrode 401 is disposed on the portion of the element main surface 40a on the side of the multiple second leads 2 in the y direction.
  • the first electrode 401 overlaps with the switching unit 408 when viewed in the z direction.
  • the first electrode 401 is separated from the control unit 48 when viewed in the z direction.
  • the first electrode 401 is a source electrode.
  • the material of the first electrode 401 there are no limitations on the material of the first electrode 401, and examples of the material include metals such as Al (aluminum), Al-Si, Cu (copper), etc., or alloys containing these.
  • the first electrode 401 may have a structure in which layers made of multiple materials selected from these metals are stacked.
  • the first electrode 401 of this embodiment has a first region 4011 and a plurality of second regions 4012.
  • the first region 4011 and the plurality of second regions 4012 are separated from each other when viewed in the z direction.
  • the specific configuration of the first region 4011 and the plurality of second regions 4012 is not limited in any way, and for example, the metal layer constituting the first electrode 401 is covered with an insulating layer (not shown).
  • the insulating layer contains, for example, polyimide resin.
  • a plurality of openings are formed in the insulating layer.
  • the first region 4011 and the plurality of second regions 4012 are constituted by the portions of the metal layer exposed from the plurality of openings.
  • the first region 4011 is a region having a larger area than the second region 4012.
  • the shape of the first region 4011 is not limited in any way, and in the illustrated example, it has a shape with its longitudinal direction in the x direction. In the illustrated example, the first region 4011 has a shape having an elongated rectangular portion with its longitudinal direction in the x direction, and two portions protruding from the elongated rectangular portion in the y direction.
  • Each of the multiple second regions 4012 has an area smaller than that of the first region 4011.
  • the shape and arrangement of the multiple second regions 4012 are not limited in any way.
  • the multiple second regions 4012 include those located on one side of the first region 4011 in the y direction and arranged in the x direction, and those arranged in the y direction on both sides of the first region 4011 in the x direction.
  • the second electrode 402 is disposed on the element back surface 40b of the element body 40. When viewed in the z direction, the second electrode 402 overlaps with the switching unit 408 and the control unit 48, and in this embodiment, covers the entire element back surface 40b. In this embodiment, the second electrode 402 is a drain electrode.
  • the material of the second electrode 402 includes metals such as Al (aluminum), Al-Si, Cu (copper), etc., or alloys containing these.
  • the second electrode 402 may have a structure in which layers made of multiple materials selected from these metals are stacked.
  • the specific configuration of the control unit 48 is not limited in any way.
  • the control unit 48 may include, for example, a current sensor circuit, a temperature sensor circuit, an overcurrent protection circuit, a heat protection circuit, a low voltage malfunction prevention circuit, etc.
  • the multiple third electrodes 403 are arranged on the element principal surface 40a.
  • the multiple third electrodes 403 are arranged on the portion of the element principal surface 40a that faces the multiple third leads 3 in the y direction.
  • the multiple third electrodes 403 overlap with the control unit 48 when viewed in the z direction.
  • the multiple third electrodes 403 are mainly conductive to the control unit 48.
  • the number of third electrodes 403 may be one.
  • the semiconductor element 4 has four third electrodes 403.
  • the four third electrodes 403 include third electrodes 4031, 4032, 4033, and 4034.
  • the third electrode 4031 is an output electrode, and the output current is limited when the load is short-circuited and a current exceeding the overcurrent detection value flows.
  • the third electrode 4032 is a ground electrode.
  • the third electrode 4033 is a self-diagnosis output electrode, and the potential differs depending on whether an overcurrent or overheat state exists.
  • the third electrode 4034 is an input electrode, and a pull-down resistor is connected inside.
  • FIG. 3 shows an example of the circuit configuration of the switching unit 408 and the control unit 48.
  • the switching unit includes a transistor.
  • the control unit 48 includes an energy absorption circuit 481 and a protection circuit 482.
  • the energy absorption circuit 481 is a circuit that absorbs electrical energy caused by transient voltages, etc., and includes, for example, a Zener diode and a resistor.
  • the protection circuit 482 is a circuit that protects the control unit 48, and includes, for example, a heating protection unit 4821 and an overcurrent protection unit 4822.
  • the first wires 51 are for conducting the first electrode 401 of the semiconductor element 4 and the second leads 2.
  • the material of the first wires 51 is not limited, and may be made of a metal such as Au (gold), Cu (copper), or Al (aluminum).
  • the first wires 51 may contain a metal different from the metal contained in the first electrode 401.
  • the first wires 51 have a bonding portion 511, a bonding portion 512, and a loop portion 513.
  • the specific configuration of the first wires 51 is not limited.
  • the first wires 51 are made of a material containing Cu (copper), and are formed by, for example, a capillary. In this embodiment, a current that is switched by the semiconductor element 4 flows through the first wires 51.
  • the semiconductor device is not limited to a configuration in which the first wire 51 is joined to the first electrode 401.
  • it may be configured in such a way that a conductive member made of a metal plate material other than the first wire 51 is joined to the first electrode 401.
  • it may be configured to include another electrode that is conductive to the first electrode 401 via a conductive path formed in the semiconductor element 4, and the first wire 51 or other conductive member is in contact with this electrode.
  • the bonding portion 511 is electrically connected to the first electrode 401 of the semiconductor element 4, and is disposed at a position overlapping the first electrode 401 when viewed in the z direction. In this embodiment, the bonding portion 511 is bonded to the first electrode 401, and is the so-called first bonding portion.
  • the bonding portion 512 is the portion that is bonded to the pad portion 21 of the second lead 2.
  • the bonding portion 512 is the so-called second bonding portion.
  • the loop portion 513 is connected to the bonding portion 511 and the bonding portion 512, and is, for example, curved overall.
  • the multiple bonding portions 511 are bonded to multiple second regions 4012 of the first electrode 401. Therefore, the multiple bonding portions 511 are arranged along three sides included in the outer edge of the element body 40. The multiple bonding portions 511 are arranged in a row along the outer edge of the first electrode 401.
  • the second wires 52 are for electrically connecting the third electrodes 403 of the semiconductor element 4 and the third leads 3.
  • the material of the second wires 52 is not limited, and may be made of a metal such as Au (gold), Cu (copper), or Al (aluminum).
  • the second wires 52 have a bonding portion 521, a bonding portion 522, and a loop portion 523.
  • the specific configuration of the second wires 52 is not limited. In the illustrated example, the second wires 52 are formed by, for example, a capillary.
  • a control signal current for controlling the semiconductor element 4 flows through the multiple second wires 52.
  • the third electrode 4031 and the pad portion 31 of the third lead 3 having the terminal portion 321 are connected by the second wires 52.
  • the third electrode 4032 and the pad portion 31 of the third lead 3 having the terminal portion 322 are connected by the second wires 52.
  • the third electrode 4033 and the pad portion 31 of the third lead 3 having the terminal portion 323 are connected by the second wires 52.
  • the third electrode 4034 and the pad portion 31 of the third lead 3 having the terminal portion 324 are connected by the second wires 52.
  • the bonding portion 521 is bonded to the second electrode 402 of the semiconductor element 4.
  • the bonding portion 521 is the so-called first bonding portion.
  • the bonding portion 522 is the portion that is bonded to the pad portion 31 of the third lead 3.
  • the bonding portion 522 is the so-called second bonding portion.
  • the loop portion 523 is connected to the bonding portion 521 and the bonding portion 522, and is, for example, curved overall.
  • Each of the multiple metal lumps 6 contains a metal and is bonded to the first electrode 401.
  • the specific configuration of the metal lumps 6 is not limited in any way.
  • the metal lumps 6 have the same configuration as the bonding portion 511 of the first wire 51. That is, among the methods of forming the first wire 51 using a capillary, the metal lumps 6 are formed by cutting the wire material after performing a forming process of the bonding portion 511.
  • the metal lumps 6 in this embodiment contain Cu (copper).
  • the number of the metal lumps 6 is not limited in any way.
  • the multiple metal lumps 6 are disposed in the first region 4011 of the first electrode 401 and are joined to the first region 4011.
  • the arrangement of the multiple metal lumps 6 is not limited in any way.
  • the multiple metal lumps 6 are arranged in multiple rows along the x direction.
  • the positions of the multiple metal lumps 6 included in adjacent rows in the y direction are shifted from each other in the x direction.
  • the multiple metal lumps 6 are arranged in a staggered arrangement.
  • the multiple metal lumps 6 may be arranged in a matrix along the x and y directions, for example.
  • the metal lump 6 has a large diameter portion 61, a small diameter portion 62, a first tapered portion 63, a top surface 64, and a broken portion 65.
  • the large diameter portion 61 is a portion that contacts the first electrode 401 (first region 4011).
  • the large diameter portion 61 has a flat cylindrical shape (or a roughly cylindrical shape).
  • the small diameter portion 62 is a portion that is located on the opposite side of the large diameter portion 61 from the first electrode 401 (first region 4011) in the z direction.
  • the small diameter portion 62 has a flat cylindrical shape (or a roughly cylindrical shape).
  • the small diameter portion 62 has a smaller diameter than the large diameter portion 61.
  • the center of the large diameter portion 61 and the center of the small diameter portion 62 both coincide with the center O1 of the metal lump 6.
  • the first tapered portion 63 is a portion interposed between the large diameter portion 61 and the small diameter portion 62.
  • the first tapered portion 63 has a smaller diameter in the z direction from the large diameter portion 61 toward the small diameter portion 62.
  • the metal block 6 of the present disclosure may be configured without the first tapered portion 63.
  • the fractured portion 65 is located on the side (first side) away from the first electrode 401 (first region 4011) in the z direction.
  • the fractured portion 65 is the location where the wire material W is fractured in the manufacturing method of the semiconductor device A1 described below.
  • the center O2 of the fractured portion is offset from the center O1 of the metal block 6.
  • the center O2 is offset in the y direction from the center O1.
  • all of the fractured portions 65 are away from the center O1.
  • the centers O1 of all the metal blocks 6 are offset in the y direction toward the control unit 48 with respect to the centers O1 of the respective metal blocks 6.
  • Top surface 64 is located on the first side in the z direction and is a surface adjacent to fracture portion 65 when viewed in the z direction. Top surface 64 intersects with the z direction. In the illustrated example, top surface 64 is substantially perpendicular to the z direction. “Substantially perpendicular to the z direction" means that, for example, in the manufacturing method of semiconductor device A1 described below, when top surface 64 is formed by sliding capillary Cp in the y direction, there may be an angle difference that may occur due to unavoidable errors in the manufacturing method.
  • the sealing resin 8 covers a portion of each of the first lead 1, the plurality of second leads 2, and the plurality of third leads 3, as well as the semiconductor element 4, the plurality of first wires 51, the plurality of second wires 52, and the plurality of metal lumps 6.
  • the sealing resin 8 is made of an insulating resin, and contains, for example, an epoxy resin mixed with a filler.
  • the shape of the sealing resin 8 is not limited in any way.
  • the sealing resin 8 has a resin main surface 81, a resin back surface 82, two first resin side surfaces 83, and two second resin side surfaces 84.
  • the resin main surface 81 faces the same side as the die pad main surface 111 in the z direction and is, for example, a flat surface.
  • the resin back surface 82 faces the opposite side to the resin main surface 81 in the z direction and is, for example, a flat surface.
  • the two first resin side surfaces 83 are located between the resin main surface 81 and the resin back surface 82 in the z direction, and face both sides in the x direction.
  • the two second resin side surfaces 84 are located between the resin main surface 81 and the resin back surface 82 in the z direction, and face both sides in the y direction.
  • the wire material W is inserted into the insertion hole 91 of the capillary Cp. Then, a ball portion 69 is formed at the tip of the wire material W.
  • the constituent material of the wire material W is the constituent material of the metal lump 6 described above.
  • the wire material W has a base portion 60.
  • the base portion 60 is a portion that occupies most of the wire material W in the supplied state, and has a uniform diameter.
  • the ball portion 69 is formed, for example, by heating the ball portion 69 protruding from the capillary Cp.
  • the capillary Cp and the wire material W are lowered in the z direction to approach the first electrode 401 (first region 4011). Then, the ball portion 69 is attached to the first electrode 401 (first region 4011). At this time, the portion of the ball portion 69 located between the first electrode 401 (first region 4011) and the capillary Cp becomes the large diameter portion 61.
  • the insertion hole 91 of the capillary Cp has a constant diameter portion 911 and a tapered portion 912.
  • the constant diameter portion 911 has an inner diameter slightly larger than the diameter of the base portion 60 of the wire material W.
  • the tapered portion 912 is provided near the tip of the insertion hole 91, and the inner diameter increases the further away from the constant diameter portion 911 (toward the tip portion 92).
  • the portion of the ball portion 69 that enters the constant diameter portion 911 becomes the small diameter portion 62.
  • the portion of the ball portion 69 that contacts the tapered portion 912 becomes the first tapered portion 63.
  • a second tapered portion 66 is formed between the base portion 60 and the small diameter portion 62.
  • the capillary Cp is moved away from the first electrode 401 (first region 4011) in the z direction.
  • the state in which relative movement between the capillary Cp and the wire material W is allowed is, for example, a state in which the wire material W is not clamped by the capillary Cp.
  • the capillary Cp is moved in the z direction until the tip 92 of the capillary Cp overlaps with the small diameter portion 62 when viewed in a direction perpendicular to the z direction (for example, the x direction or y direction). That is, in the illustrated example, the capillary Cp is moved in the z direction until the tip 92 of the capillary Cp exceeds the first taper portion 63 in the z direction.
  • the capillary Cp is slid in a sliding direction intersecting the z direction.
  • this sliding it is preferable, but not limited to, that the wire material W is clamped by the capillary Cp.
  • the capillary Cp is slid until the tip 92 of the capillary Cp passes the center O1.
  • the sliding of the capillary Cp causes shear deformation of the wire material W.
  • a neck portion 67 is formed in the wire material W.
  • the portion where the tip 92 of the capillary Cp intersects with the wire material W becomes the top surface 64.
  • the sliding direction may be any direction that creates the neck portion 67 in the wire material W.
  • the sliding direction is the y direction, which is perpendicular to the z direction.
  • the capillary Cp is moved in the z direction to the side (first side) away from the first electrode 401 (first region 4011).
  • the capillary Cp in a state where the relative movement between the capillary Cp and the wire material W is prevented, i.e., in a state where the wire material W is clamped by the capillary Cp, the capillary Cp is moved to the first side in the z direction. As a result, the wire material W breaks at the neck portion 67, and the metal lump 6 is formed. The broken portion of the neck portion 67 becomes the broken portion 65.
  • multiple metal lumps 6 are formed in order from the row farthest from the control unit 48 in the y direction. That is, if the first row, second row, ..., fifth row are formed in order of distance from the control unit 48 in the y direction, multiple metal lumps 6 are formed in the first row, then multiple metal lumps 6 are formed in the second row, and finally multiple metal lumps 6 are formed in the fifth row.
  • the capillary Cp is slid as shown in Figure 14 to form each metal lump 6, there are no metal lumps 6 at the destination of the capillary Cp.
  • the center O1 of the break portion 65 is offset from the center O1 of the metal lump 6. This is because, as shown in Fig. 14, the capillary Cp is slid to form the constricted portion 67, and as shown in Fig. 16, the break portion 65 is formed by breaking the wire material W at the constricted portion 67. Since the constricted portion 67 has a small cross-sectional area, it is possible to break it with a smaller force than in Fig. 16. This makes it possible to prevent the shape of the metal lump 6 from becoming unintended distorted. It is possible to prevent the bond between the metal lump 6 and the first electrode 401 from being weakened by the force used when breaking the wire material W. Therefore, it is possible to more reliably bond the metal lump 6 of the desired shape to the first electrode 401, and the active clamp can function more appropriately.
  • the tip 92 crosses the small diameter portion 62.
  • a larger shear force acts on the wire material W. This raises concerns that the bonding strength between the portion of the wire material W that will become the metal lump 6 and the first electrode 401 will be weakened.
  • the wire material W has the first tapered portion 63, it is preferable to move the capillary Cp until the tip 92 passes the first tapered portion 63 in the movement of the capillary Cp shown in FIG. 13.
  • the top surface 64 is substantially perpendicular to the z direction. This is because, in the sliding of the capillary Cp shown in FIG. 14, the capillary Cp is slid in a direction perpendicular to the z direction. By sliding the capillary Cp in this manner, the metal block 6 can be reproducibly formed into the desired shape.
  • FIGS. 17 to 25 show modified examples and other embodiments of the present disclosure.
  • elements that are the same as or similar to those in the above-described embodiment are given the same reference numerals as in the above-described embodiment.
  • the configurations of the various parts in each modified example and each embodiment can be combined with each other as appropriate to the extent that no technical contradictions arise.
  • FIG. 17 and 18 show a first modified example of the semiconductor device A1 and the manufacturing method of the semiconductor device A1, respectively.
  • the top surface 64 is slightly inclined with respect to the y direction. Specifically, the top surface 64 is inclined so that the closer it is to the breakage portion 65 in the y direction, the closer it is to the first electrode 401 (first region 4011) in the z direction.
  • FIG. 18 shows the step of sliding the capillary Cp in the manufacturing method of this modified example.
  • the capillary Cp is slid in the y direction while being moved in the z direction so as to approach the first electrode 401 (first region 4011).
  • This modification also allows the active clamp to function more appropriately.
  • the angle of the top surface 64 is not limited in any way. According to this modification, as shown in FIG. 18, when the capillary Cp is slid, the capillary Cp presses the large diameter portion 61 and the small diameter portion 62, etc. against the first electrode 401 (first region 4011). This makes it possible to increase the bonding strength between the metal lump 6 and the first electrode 401 (first region 4011).
  • FIG. 19 and 20 show a second modified example of the semiconductor device A1 and the manufacturing method of the semiconductor device A1, respectively.
  • the fractured portion 65 overlaps with the center O1 when viewed in the z direction.
  • the capillary Cp is slid, the capillary Cp is slid so that the entire tip portion 92 does not exceed the center O1.
  • This modified example also allows the active clamp to function more appropriately. As can be seen from this modified example, the amount by which the capillary Cp slides can be set appropriately.
  • Second embodiment: 21 shows a semiconductor device according to a second embodiment of the present disclosure.
  • a semiconductor device A2 according to this embodiment differs from the above-described embodiment in the configurations of a first electrode 401, a plurality of metal lumps 6, and a plurality of first wires 51.
  • the bonding portions 511 of the multiple metal lumps 6 and the multiple first wires 51 are all bonded to one region of the first electrode 401.
  • the first electrode 401 includes only one region.
  • the bonding portions 511 of the multiple first wires 51 are arranged side by side on both sides of the multiple metal blocks 6 in the x direction and on one side in the y direction.
  • This embodiment also allows the active clamp to function more appropriately.
  • the bonding portions 511 of the plurality of 6 and the plurality of first wires 51 may be bonded to one region of the first electrode 401.
  • Third embodiment 22 and 23 show a semiconductor device according to a third embodiment of the present disclosure.
  • the semiconductor device A3 of this embodiment differs from the above-described embodiments mainly in the configuration of the semiconductor element 4 and in that the semiconductor element 42 and a plurality of third wires 53 are included.
  • the semiconductor element 4 of this embodiment has the switching unit 408 of the above embodiment and performs a switching function, but does not have the control unit 48 of the above embodiment.
  • the semiconductor element 42 performs functions such as controlling, monitoring, and protecting the semiconductor element 4. Both the semiconductor element 4 and the semiconductor element 42 are mounted on the die pad main surface 111 of the die pad portion 11 via a bonding material 49. In the illustrated example, the semiconductor element 4 and the semiconductor element 42 are arranged side by side in the y direction.
  • the semiconductor element 42 has a plurality of electrodes 421 and a plurality of electrodes 422.
  • the plurality of electrodes 421 and the plurality of electrodes 422 are both arranged on the same side in the z direction.
  • the plurality of electrodes 421 are arranged on the side where the semiconductor element 4 is located in the y direction.
  • the plurality of electrodes 422 are arranged on the side where the plurality of third leads 3 are located in the y direction.
  • the plurality of electrodes 422 include electrodes 4221, 4222, 4223, and 4224.
  • the electrode 4221 corresponds to the third electrode 4031 in the semiconductor device A1 described above.
  • the electrode 4222 corresponds to the third electrode 4032 in the semiconductor device A1 described above.
  • the electrode 4223 corresponds to the third electrode 4033 in the semiconductor device A1 described above.
  • the electrode 4224 corresponds to the third electrode 4034 in the semiconductor device A1 described above.
  • the multiple second wires 52 are individually connected to the multiple electrodes 422 of the semiconductor element 42 and the multiple third leads 3.
  • the bonding portion 521 is bonded to the electrodes 422.
  • the bonding portion 522 is bonded to the pad portion 31 of the third lead 3.
  • the semiconductor device A4 includes a plurality of third wires 53.
  • the plurality of third wires 53 are individually connected to a plurality of third electrodes 403 of the semiconductor element 4 and a plurality of electrodes 421 of the semiconductor element 42.
  • the third wire 53 has, for example, a bonding portion 531, a bonding portion 532, and a loop portion 533, and has a configuration similar to that of the second wire 52.
  • the bonding portion 531 is bonded to the third electrode 403.
  • the bonding portion 532 is bonded to the electrode 421.
  • This embodiment also allows the active clamp to function more appropriately.
  • the specific configuration of the semiconductor element 4 is not limited in any way.
  • the die pad portion 11 may be mounted with not only the semiconductor element 4, but also other semiconductor elements such as the semiconductor element 42 in addition to the semiconductor element 4.
  • the functions of the semiconductor elements other than the semiconductor element 4 are not limited in any way.
  • Fourth embodiment 24 and 25 show a semiconductor device according to a fourth embodiment of the present disclosure.
  • the semiconductor device A4 of this embodiment includes a semiconductor element 4 and a semiconductor element 42, similar to the semiconductor device A3.
  • the semiconductor element 42 is mounted on the element main surface 40a of the semiconductor element 4. That is, the semiconductor element 42 is disposed on the opposite side of the semiconductor element 4 from the die pad portion 11 in the z direction.
  • the semiconductor element 4 and the semiconductor element 42 are stacked on top of each other.
  • the semiconductor element 42 is bonded to the element principal surface 40a of the semiconductor element 4, for example, by a bonding material 49.
  • the semiconductor element 42 is mounted at a position spaced apart in the y direction from the first electrode 401 when viewed in the z direction. Unlike the illustrated example, the semiconductor element 42 may be disposed on the first electrode 401.
  • the first electrode 401 and the semiconductor element 42 are both rectangular with the x direction as the longitudinal direction.
  • the multiple third electrodes 403 are located between the first electrode 401 and the semiconductor element 42 in the y direction, and are arranged side by side in the x direction.
  • This embodiment also allows the active clamp to function more appropriately. As can be seen from this embodiment, there are no limitations on the arrangement or mounting form of the semiconductor element 42.
  • the semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure are not limited to the above-described embodiment.
  • the specific configuration of the semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure can be freely designed in various ways.
  • the semiconductor device A5 of this embodiment includes a first lead 1, a plurality of second leads 2, a plurality of third leads 3, a semiconductor element 4, a plurality of first wires 51, a plurality of second wires 52, a plurality of metal lumps 6, and a sealing resin 8.
  • FIG. 26 is a plan view showing semiconductor device A5.
  • FIG. 27 is a partial plan view showing semiconductor device A5.
  • FIG. 29 is a front view showing semiconductor device A5.
  • FIG. 30 is a side view showing semiconductor device A5.
  • FIG. 31 is a cross-sectional view taken along line XXXI-XXXI in FIG. 27.
  • FIG. 32 is a cross-sectional view taken along line XXXII-XXXII in FIG. 27.
  • FIG. 33 is a plan view showing semiconductor element 4.
  • FIG. 34 is a partially enlarged cross-sectional view taken along line XXXIV-XXXIV in FIG. 33.
  • the metal lump 6 in this embodiment may have the same configuration as the metal lump 6 in the first embodiment, for example (see the plan view in FIG. 9 and the cross-sectional view in FIG. 10).
  • the shape and size of the semiconductor device A5 are not limited in any way.
  • the size in the x direction is about 4 mm to 7 mm
  • the size in the y direction is about 4 mm to 8 mm
  • the size in the z direction is about 0.7 mm to 2.0 mm.
  • the first lead 1 is a member that supports the semiconductor element 4 and constitutes a conductive path to the semiconductor element 4.
  • the material of the first lead 1 is not limited in any way and may be made of, for example, a metal such as Cu (copper), Ni (nickel), Fe (iron), etc. or an alloy thereof.
  • the first lead 1 may have a plating layer formed in an appropriate place and made of a metal such as Ag (silver), Ni (nickel), Pd (palladium), Au (gold), etc.
  • the thickness of the first lead 1 is not limited in any way and may be, for example, about 0.12 mm to 0.2 mm.
  • the first lead 1 in this embodiment has a die pad portion 11 and two extension portions 12.
  • the die pad portion 11 is a portion that supports the semiconductor element 4. There are no limitations on the shape of the die pad portion 11, and in this embodiment, it is rectangular when viewed in the z direction.
  • the die pad portion 11 has a die pad main surface 111 and a die pad back surface 112.
  • the die pad main surface 111 is a surface that faces the z direction.
  • the die pad back surface 112 is a surface that faces the opposite side to the die pad main surface 111 in the thickness direction. In the illustrated example, the die pad main surface 111 and the die pad back surface 112 are flat surfaces.
  • the two extension portions 12 are portions that extend from the die pad portion 11 on both sides in the x direction.
  • the extension portion 12 has a portion that extends from the die pad portion 11 along the x direction, a portion that extends at an angle in the z direction toward the side toward which the die pad main surface 111 faces relative to that portion, and a portion that extends from that portion along the x direction, and has an overall curved shape.
  • the second leads 2 are spaced apart from the first lead 1 and form a conductive path to the semiconductor element 4.
  • the second leads 2 form a conductive path for a current switched by the semiconductor element 4.
  • the second leads 2 are arranged on one side in the y direction with respect to the first lead 1.
  • the second leads 2 are arranged spaced apart from each other in the x direction.
  • the material of the second lead 2 is not limited in any way, and may be made of metals such as Cu (copper), Ni (nickel), Fe (iron), etc., or alloys thereof.
  • the second lead 2 may have a plating layer formed in an appropriate location, and may be made of metals such as Ag (silver), Ni (nickel), Pd (palladium), Au (gold), etc.
  • the thickness of the second lead 2 is not limited in any way, and may be, for example, about 0.12 mm to 0.2 mm.
  • the second lead 2 in this embodiment has a pad portion 21 and a terminal portion 22.
  • the pad portion 21 is the portion to which the first wire 51 is connected. In this embodiment, the pad portion 21 is located on the side facing the die pad main surface 111 relative to the die pad portion 11 in the z direction.
  • the terminal portion 22 is a strip-shaped portion extending outward in the y direction from the pad portion 21.
  • the terminal portion 22 has a bent shape when viewed in the x direction, and its tip portion is in the same (or approximately the same) position as the die pad portion 11 in the z direction.
  • the terminal portion 22 is a power supply terminal.
  • Multiple tertiary leads 3 are spaced apart from the first lead 1 and form a conductive path to the semiconductor element 4. In this embodiment, the multiple third leads 3 form a conductive path for a control signal current for controlling the semiconductor element 4.
  • the multiple third leads 3 are arranged on the other side in the y direction with respect to the first lead 1.
  • the multiple third leads 3 are arranged spaced apart from each other in the x direction.
  • the material of the third lead 3 is not limited in any way, and may be, for example, a metal such as Cu (copper), Ni (nickel), Fe (iron), etc., or an alloy thereof.
  • the third lead 3 may have a plating layer formed in an appropriate location, and may be, for example, a metal such as Ag (silver), Ni (nickel), Pd (palladium), Au (gold), etc.
  • the thickness of the third lead 3 is not limited in any way, and may be, for example, about 0.12 mm to 0.2 mm.
  • the third lead 3 in this embodiment has a pad portion 31 and a terminal portion 32.
  • the pad portion 31 is the portion to which the second wire 52 is connected. In this embodiment, the pad portion 31 is located on the side facing the die pad main surface 111 relative to the die pad portion 11 in the z direction.
  • the terminal portion 32 is a strip-shaped portion that extends outward in the y direction from the pad portion 31.
  • the terminal portion 32 has a bent shape when viewed in the x direction, and its tip portion is in the same (or approximately the same) position as the die pad portion 11 in the z direction.
  • terminal portions 32 of the multiple third leads 3 are distinguished as terminal portions 321, 322, 323, and 324.
  • Terminal portion 321 is an output terminal and is electrically connected to a third electrode 4031, which will be described later.
  • Terminal portion 322 is a ground terminal and is electrically connected to a third electrode 4032, which will be described later.
  • Terminal portion 323 is a self-diagnosis output terminal and is electrically connected to a third electrode 4033, which will be described later.
  • Terminal portion 324 is an input terminal and is electrically connected to a third electrode 4034, which will be described later.
  • the semiconductor element 4 is an element that exerts the electrical function of the semiconductor device A5.
  • the specific configuration of the semiconductor element 4 is not limited in any way.
  • the semiconductor element 4 exerts a switching function.
  • the semiconductor element 4 has an element body 40, a first electrode 401, a second electrode 402, a plurality of third electrodes 403, and a plurality of placement reference portions 45.
  • the semiconductor element 4 has a switching portion 408 that is a portion that constitutes a transistor that exerts a switching function, and a control portion 48 that is a portion that controls, monitors, protects, etc. the transistor of the switching portion 408.
  • the transistor included in the control portion 48 is, for example, a transistor having a horizontal structure.
  • the element body 40 has an element principal surface 40a and an element rear surface 40b.
  • the element principal surface 40a faces the same side as the die pad principal surface 111 in the z direction.
  • the element rear surface 40b faces the opposite side to the element principal surface 40a in the z direction.
  • materials for the element body 40 include semiconductor materials such as Si (silicon), SiC (silicon carbide), and GaN (gallium nitride).
  • the element body 40 has a switching section 408.
  • the switching section 408 incorporates a transistor structure such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or a MISFET (Metal Insulator Semiconductor Field Effect Transistor). As shown in Figures 26, 27 and 33, the switching section 408 is arranged side by side with the control section 48 in the y direction when viewed in the z direction. However, the specific arrangement of the switching section 408 and the control section 48 is not limited in any way.
  • the first electrode 401 is disposed on the element main surface 40a of the element body 40.
  • the first electrode 401 is disposed on the portion of the element main surface 40a on the side of the multiple second leads 2 in the y direction.
  • the first electrode 401 overlaps with the switching unit 408 when viewed in the z direction.
  • the first electrode 401 is separated from the control unit 48 when viewed in the z direction.
  • the first electrode 401 is a source electrode.
  • the material of the first electrode 401 there are no limitations on the material of the first electrode 401, and examples of the material include metals such as Al (aluminum), Al-Si, Cu (copper), etc., or alloys containing these.
  • the first electrode 401 may have a structure in which layers made of multiple materials selected from these metals are stacked.
  • the first electrode 401 of this embodiment has a first region 4011 and multiple second regions 4012.
  • the first region 4011 and the multiple second regions 4012 are separated from each other when viewed in the z direction.
  • the first region 4011 is a region having a larger area than the second region 4012.
  • the shape of the first region 4011 is not limited in any way, and in the illustrated example, it is a shape with the x direction as the longitudinal direction. In the illustrated example, the first region 4011 is shaped to have a rectangular portion with the x direction as the longitudinal direction, and two portions protruding in the y direction from the rectangular portion.
  • the first region 4011 is not limited to a configuration including only one connected portion.
  • the first region 4011 may be a configuration including multiple portions separated from each other. For example, it may be a configuration including multiple portions in which multiple metal lumps 6 are individually arranged. In this case, the distance between adjacent portions in the x and y directions is, for example, about 20 ⁇ m.
  • Each of the multiple second regions 4012 has an area smaller than that of the first region 4011.
  • the shape and arrangement of the multiple second regions 4012 are not limited in any way.
  • the multiple second regions 4012 include those located on one side of the first region 4011 in the y direction and arranged in the x direction, and those arranged in the y direction on both sides of the first region 4011 in the x direction.
  • the multiple placement reference parts 45 are the placement reference for the multiple metal lumps 6. "Becoming the placement reference for the multiple metal lumps 6" means that they contribute to the process of determining the position at which the metal lumps 6 are placed when the metal lumps 6 are formed in the manufacturing method of the semiconductor device A5. For example, when the multiple metal lumps 6 are placed using a ball bonding technique using a capillary as in the manufacturing method described below, they are used to initialize the operation of the capillary. In the initial setting, for example, a camera is used to photograph an area including the placement reference parts 45. Then, the camera is moved relatively to a state where a reference line provided on the photographed screen coincides with or intersects with the desired placement reference part 45, and the position is stored in the manufacturing device.
  • This stored position becomes the reference position for the operation of the capillary to form the multiple metal lumps 6 in the manufacturing method of the semiconductor device A5.
  • the multiple placement reference parts 45 may be configured to become the placement reference for the multiple metal lumps 6 by being positionally analyzed by an image analysis system for position control of the capillary or the like when actually forming the multiple metal lumps 6.
  • the specific configuration of the placement reference portion 45 is not limited in any way.
  • the placement reference portion 45 is separated from the first region 4011.
  • the placement reference portion 45 is not limited to a configuration separated from the first region 4011, and may be a configuration connected to the first region 4011.
  • the shape of the placement reference portion 45 is not limited in any way.
  • the placement reference portion 45 has a shape in which a strip portion extending in the x direction and a strip portion extending in the y direction cross each other.
  • the size of the placement reference portion 45 is not limited in any way, and for example, the size in the x direction and the y direction is 2 ⁇ m or more and 50 ⁇ m or less.
  • the semiconductor element 4 has a metal layer 4010 and an insulating film 46.
  • the metal layer 4010 is a layer containing metal laminated on the element body 40, and contains, for example, Al (aluminum).
  • the metal layer 4010 is conductive to the source region of the element body 40.
  • the thickness of the metal layer 4010 is not limited in any way, and is, for example, 2 ⁇ m or more and 10 ⁇ m or less.
  • the insulating film 46 partially covers the metal layer 4010.
  • the insulating film 46 contains, for example, a polyimide resin.
  • the thickness of the insulating film 46 is not limited in any way, and is, for example, 2 ⁇ m or more and 10 ⁇ m or less.
  • the insulating film 46 has a plurality of openings 461.
  • the openings 461 expose the metal layer 4010.
  • the first region 4011, the second regions 4012, and the arrangement reference portions 45 are formed by the portions of the metal layer 4010 exposed from the openings 461.
  • the arrangement reference portions 45 may be formed by exposing a member other than the metal layer 4010 from the openings 461, by thinning a portion of the insulating film 46, or by patterning an additional layer.
  • the second electrode 402 is disposed on the back surface 40b of the element body 40. When viewed in the z direction, the second electrode 402 overlaps with the switching unit 408 and the control unit 48, and in this embodiment, covers the entire back surface 40b of the element. In this embodiment, the second electrode 402 is a drain electrode.
  • the material of the second electrode 402 includes metals such as Au (gold), Ag (silver), Ni (nickel), Ti (titanium), etc., or alloys containing these.
  • the second electrode 402 may have a structure in which layers made of multiple materials selected from these metals are stacked.
  • the specific configuration of the control unit 48 is not limited in any way.
  • the control unit 48 may include, for example, a current sensor circuit, a temperature sensor circuit, an overcurrent protection circuit, a heat protection circuit, a low voltage malfunction prevention circuit, etc.
  • the multiple third electrodes 403 are arranged on the element principal surface 40a.
  • the multiple third electrodes 403 are arranged on the portion of the element principal surface 40a that faces the multiple third leads 3 in the y direction.
  • the multiple third electrodes 403 overlap with the control unit 48 when viewed in the z direction.
  • the multiple third electrodes 403 are mainly conductive to the control unit 48.
  • the number of third electrodes 403 may be one.
  • the semiconductor element 4 has four third electrodes 403.
  • the four third electrodes 403 include third electrodes 4031, 4032, 4033, and 4034.
  • the third electrode 4031 is an output electrode, and the output current is limited when the load is short-circuited and a current exceeding the overcurrent detection value flows.
  • the third electrode 4032 is a ground electrode.
  • the third electrode 4033 is a self-diagnosis output electrode, and the potential differs depending on whether an overcurrent or overheat state exists.
  • the third electrode 4034 is an input electrode, and a pull-down resistor is connected inside.
  • FIG. 28 shows an example of the circuit configuration of the switching unit 408 and the control unit 48.
  • the switching unit includes a transistor.
  • the control unit 48 includes an energy absorption circuit 481 and a protection circuit 482.
  • the energy absorption circuit 481 is a circuit that absorbs electrical energy caused by transient voltages, etc., and includes, for example, a Zener diode and a resistor.
  • the protection circuit 482 is a circuit that protects the control unit 48, and includes, for example, a heating protection unit 4821 and an overcurrent protection unit 4822.
  • the first wires 51 are for conducting the first electrode 401 of the semiconductor element 4 and the second leads 2.
  • the material of the first wires 51 is not limited, and may be made of a metal such as Au (gold), Cu (copper), or Al (aluminum).
  • the first wires 51 may contain a metal different from the metal contained in the first electrode 401.
  • the first wires 51 have a bonding portion 511, a bonding portion 512, and a loop portion 513.
  • the specific configuration of the first wires 51 is not limited.
  • the first wires 51 are made of a material containing Cu (copper), and are formed by, for example, a capillary. In this embodiment, a current that is switched by the semiconductor element 4 flows through the first wires 51.
  • the semiconductor device is not limited to a configuration in which the first wire 51 is joined to the first electrode 401.
  • it may be configured in such a way that a conductive member made of a metal plate material other than the first wire 51 is joined to the first electrode 401.
  • it may be configured to include another electrode that is conductive to the first electrode 401 via a conductive path formed in the semiconductor element 4, and the first wire 51 or other conductive member is in contact with this electrode.
  • the bonding portion 511 is electrically connected to the first electrode 401 of the semiconductor element 4, and is disposed at a position overlapping the first electrode 401 when viewed in the z direction. In this embodiment, the bonding portion 511 is bonded to the first electrode 401, and is the so-called first bonding portion.
  • the bonding portion 512 is the portion that is bonded to the pad portion 21 of the second lead 2.
  • the bonding portion 512 is the so-called second bonding portion.
  • the loop portion 513 is connected to the bonding portion 511 and the bonding portion 512, and is curved overall.
  • the multiple bonding portions 511 are bonded to multiple second regions 4012 of the first electrode 401. Therefore, the multiple bonding portions 511 are arranged along three sides included in the outer edge of the element body 40. The multiple bonding portions 511 are arranged in a row along the outer edge of the first electrode 401.
  • the second wires 52 are for electrically connecting the third electrodes 403 of the semiconductor element 4 and the third leads 3.
  • the material of the second wires 52 is not limited, and may be made of a metal such as Au (gold), Cu (copper), or Al (aluminum).
  • the second wires 52 have a bonding portion 521, a bonding portion 522, and a loop portion 523.
  • the specific configuration of the second wires 52 is not limited. In the illustrated example, the second wires 52 are formed by, for example, a capillary.
  • a control signal current for controlling the semiconductor element 4 flows through the multiple second wires 52.
  • the third electrode 4031 and the pad portion 31 of the third lead 3 having the terminal portion 321 are connected by the second wires 52.
  • the third electrode 4032 and the pad portion 31 of the third lead 3 having the terminal portion 322 are connected by the second wires 52.
  • the third electrode 4033 and the pad portion 31 of the third lead 3 having the terminal portion 323 are connected by the second wires 52.
  • the third electrode 4034 and the pad portion 31 of the third lead 3 having the terminal portion 324 are connected by the second wires 52.
  • the bonding portion 521 is bonded to the second electrode 402 of the semiconductor element 4.
  • the bonding portion 521 is the so-called first bonding portion.
  • the bonding portion 522 is the portion that is bonded to the pad portion 31 of the third lead 3.
  • the bonding portion 522 is the so-called second bonding portion.
  • Loop portion 523 is connected to bonding portion 521 and bonding portion 522, and is curved overall.
  • Each of the multiple metal lumps 6 contains a metal and is bonded to the first electrode 401.
  • the specific configuration of the metal lumps 6 is not limited in any way.
  • the metal lumps 6 have the same configuration as the bonding portion 511 of the first wire 51. That is, among the methods of forming the first wire 51 using a capillary, the metal lumps 6 are formed by cutting the wire material after performing a forming process of the bonding portion 511.
  • the metal lumps 6 in this embodiment contain Cu (copper).
  • the number of the metal lumps 6 is not limited in any way.
  • the multiple metal lumps 6 are disposed in the first region 4011 of the first electrode 401 and are joined to the first region 4011.
  • the arrangement of the multiple metal lumps 6 is not limited in any way.
  • the multiple metal lumps 6 are arranged in multiple rows along the x direction.
  • the multiple metal lumps 6 are arranged in five rows along the x direction. The center lines of each row are indicated by reference lines Lx1 to Lx5.
  • the metal blocks 6 are arranged in multiple rows along the y direction. Specifically, the metal blocks 6 arranged along the reference lines Lx1, Lx3, and Lx5 are arranged in multiple rows along the y direction. The metal blocks 6 arranged along the reference lines Lx2 and Lx4 are arranged in multiple rows along the y direction. In the figure, the center lines of some of the rows of the metal blocks 6 arranged along the y direction are indicated by reference lines Ly11, Ly12, Ly21, and Ly22. In the illustrated example, the number of arrangements along the y direction is greater than the number of arrangements along the x direction. In the illustrated example, the metal blocks 6 are arranged in a staggered arrangement. Alternatively, the metal blocks 6 may be arranged in a matrix along the x direction and the y direction, for example.
  • the multiple placement reference portions 45 include multiple first placement reference portions 451 and multiple second placement reference portions 452.
  • the multiple first placement reference portions 451 serve as placement references for multiple metal lumps 6 arranged along the x direction among the multiple metal lumps 6.
  • five first placement reference portions 451 are arranged on each side of the first region 4011 in the x direction, corresponding to the reference lines Lx1 to Lx5.
  • the number of multiple first placement reference portions 451 arranged on one side of the first region 4011 in the x direction is the same as the number of rows of the multiple metal lumps 6 arranged along the x direction.
  • the second placement reference portions 452 are used as placement references for the metal blocks 6 arranged along the y direction among the metal blocks 6.
  • four second placement reference portions 452 are arranged on both sides of the first region 4011 in the y direction, corresponding to the reference lines Ly11, Ly12, Ly21, and Ly22.
  • the number of the second placement reference portions 452 arranged on one side of the first region 4011 in the y direction is less than the number of rows of the metal blocks 6 arranged along the y direction.
  • the second placement reference portions 452 are arranged at positions corresponding to the metal blocks 6 arranged at the ends of the metal blocks 6 arranged along the x direction.
  • the metal blocks 6 arranged at the ends of the x direction refer to, for example, the metal blocks 6 located at both ends in the x direction.
  • This configuration is effective, for example, in the initial setting of the above-mentioned capillary, when setting the formation positions of the metal chunks 6 arranged along the x direction, by setting the positions of two metal chunks 6 arranged at both ends in the x direction, and generating the position of another metal chunk 6 by interpolation from the positions of these two metal chunks 6.
  • the first placement reference portion 451 may be provided on only one side in the x direction with respect to the first region 4011.
  • the second placement reference portion 452 may be provided on only one side in the y direction with respect to the first region 4011.
  • the diameter of the metal lump 6 is, for example, 100 ⁇ m to 120 ⁇ m.
  • the pitch of the reference lines Lx1 to Lx5 is not limited in any way, but is, for example, 100 ⁇ m to 150 ⁇ m.
  • the pitch of the reference lines Ly11, Ly12 and the pitch of the reference lines Ly21, Ly22 are not limited in any way, but are, for example, 50 ⁇ m to 75 ⁇ m.
  • the arrangement pitch of the multiple metal lump 6 in the x direction is constant, but is not limited to this configuration and may include arrangement pitches of multiple sizes.
  • the arrangement pitch of the rows along the reference lines Lx1, Lx2 and the arrangement pitch of the rows along the reference lines Lx3, Lx4, Lx5 may be different from each other.
  • the shape of the metal lump 6 in this embodiment may be the same as that of the metal lump 6 in the first embodiment.
  • the metal lump 6 has a large diameter portion 61, a small diameter portion 62, a first tapered portion 63, a top surface 64, and a broken portion 65.
  • the large diameter portion 61 is a portion that contacts the first electrode 401 (first region 4011).
  • the large diameter portion 61 has a flat cylindrical shape (or a roughly cylindrical shape).
  • the small diameter portion 62 is a portion that is located on the opposite side of the large diameter portion 61 from the first electrode 401 (first region 4011) in the z direction.
  • the small diameter portion 62 has a flat cylindrical shape (or a roughly cylindrical shape).
  • the small diameter portion 62 has a smaller diameter than the large diameter portion 61.
  • the center of the large diameter portion 61 and the center of the small diameter portion 62 both coincide with the center O1 of the metal lump 6 when viewed in the z direction.
  • the first tapered portion 63 is a portion interposed between the large diameter portion 61 and the small diameter portion 62.
  • the first tapered portion 63 has a smaller diameter in the z direction from the large diameter portion 61 toward the small diameter portion 62.
  • the metal block 6 of the present disclosure may be configured without the first tapered portion 63.
  • the fractured portion 65 is located on the side (first side) away from the first electrode 401 (first region 4011) in the z direction.
  • the fractured portion 65 is the location where the wire material W is fractured in the manufacturing method of the semiconductor device A5 described below.
  • the center O2 of the fractured portion 65 is offset from the center O1 of the metal block 6. In this embodiment, the center O2 is offset in the y direction from the center O1. Furthermore, in the illustrated example, as shown in FIG. 9, all of the fractured portions 65 are away from the center O1. As shown in FIG. 33, the centers O1 of all the metal blocks 6 are offset in the y direction toward the control unit 48 with respect to the centers O1 of the respective metal blocks 6.
  • Top surface 64 is located on the first side in the z direction and is adjacent to fracture portion 65 when viewed in the z direction. Top surface 64 intersects with the z direction. In the illustrated example, top surface 64 is substantially perpendicular to the z direction. “Substantially perpendicular to the z direction" means that, for example, in the manufacturing method of semiconductor device A5 described below, when top surface 64 is formed by sliding capillary Cp in the y direction, there may be an angle difference that may occur due to unavoidable errors in the manufacturing method.
  • the sealing resin 8 covers a portion of each of the first lead 1, the plurality of second leads 2, and the plurality of third leads 3, as well as the semiconductor element 4, the plurality of first wires 51, the plurality of second wires 52, and the plurality of metal lumps 6.
  • the sealing resin 8 is made of an insulating resin, and contains, for example, an epoxy resin mixed with a filler.
  • the shape of the sealing resin 8 is not limited in any way.
  • the sealing resin 8 has a resin main surface 81, a resin back surface 82, two first resin side surfaces 83, and two second resin side surfaces 84.
  • the resin main surface 81 faces the same side as the die pad main surface 111 in the z direction and is, for example, a flat surface.
  • the resin back surface 82 faces the opposite side to the resin main surface 81 in the z direction and is, for example, a flat surface.
  • the two first resin side surfaces 83 are located between the resin main surface 81 and the resin back surface 82 in the z direction, and face both sides in the x direction.
  • the two second resin side surfaces 84 are located between the resin main surface 81 and the resin back surface 82 in the z direction, and face both sides in the y direction.
  • the manufacturing method of the semiconductor device A5 (particularly, the method of forming the multiple metal lumps 6) will be described below.
  • the manufacturing method according to this embodiment can be the same as the manufacturing method according to the first embodiment. The following description will be given with reference to Figures 11 to 16.
  • the wire material W is inserted into the insertion hole 91 of the capillary Cp. Then, a ball portion 69 is formed at the tip of the wire material W.
  • the constituent material of the wire material W is the constituent material of the metal lump 6 described above.
  • the wire material W has a base portion 60.
  • the base portion 60 is a portion that occupies most of the wire material W in the supplied state, and has a uniform diameter.
  • the ball portion 69 is formed, for example, by heating the ball portion 69 protruding from the capillary Cp.
  • the capillary Cp and the wire material W are lowered in the z direction to approach the first electrode 401 (first region 4011). Then, the ball portion 69 is attached to the first electrode 401 (first region 4011). At this time, the portion of the ball portion 69 located between the first electrode 401 (first region 4011) and the capillary Cp becomes the large diameter portion 61.
  • the insertion hole 91 of the capillary Cp has a constant diameter portion 911 and a tapered portion 912.
  • the constant diameter portion 911 has an inner diameter slightly larger than the diameter of the base portion 60 of the wire material W.
  • the tapered portion 912 is provided near the tip of the insertion hole 91, and the inner diameter increases the further away from the constant diameter portion 911 (toward the tip portion 92).
  • the portion of the ball portion 69 that enters the constant diameter portion 911 becomes the small diameter portion 62.
  • the portion of the ball portion 69 that contacts the tapered portion 912 becomes the first tapered portion 63.
  • a second tapered portion 66 is formed between the base portion 60 and the small diameter portion 62.
  • the capillary Cp is moved away from the first electrode 401 (first region 4011) in the z direction.
  • the state in which relative movement between the capillary Cp and the wire material W is allowed is, for example, a state in which the wire material W is not clamped by the capillary Cp.
  • the capillary Cp is moved in the z direction until the tip 92 of the capillary Cp overlaps with the small diameter portion 62 when viewed in a direction perpendicular to the z direction (for example, the x direction or y direction). That is, in the illustrated example, the capillary Cp is moved in the z direction until the tip 92 of the capillary Cp exceeds the first taper portion 63 in the z direction.
  • the capillary Cp is slid in a sliding direction intersecting the z direction.
  • this sliding it is preferable, but not limited to, that the wire material W is clamped by the capillary Cp.
  • the capillary Cp is slid until the tip 92 of the capillary Cp passes the center O1.
  • the sliding of the capillary Cp causes shear deformation of the wire material W.
  • a neck portion 67 is formed in the wire material W.
  • the portion where the tip 92 of the capillary Cp intersects with the wire material W becomes the top surface 64.
  • the sliding direction may be any direction that creates the neck portion 67 in the wire material W.
  • the sliding direction is the y direction, which is perpendicular to the z direction.
  • the capillary Cp is moved in the z direction to the side (first side) away from the first electrode 401 (first region 4011).
  • the capillary Cp in a state where the relative movement between the capillary Cp and the wire material W is prevented, i.e., in a state where the wire material W is clamped by the capillary Cp, the capillary Cp is moved to the first side in the z direction. As a result, the wire material W breaks at the neck portion 67, and the metal lump 6 is formed. The broken portion of the neck portion 67 becomes the broken portion 65.
  • the capillary Cp sequentially forms the metal lumps 6 according to the arrangement positions set by the initial setting.
  • the metal lumps 6 are formed in order starting from the row farthest from the control unit 48 in the y direction. That is, a plurality of metal lumps 6 are formed with the reference line Lx1 as the arrangement reference. Next, a plurality of metal lumps 6 are formed with the reference line Lx2 as the arrangement reference. Next, a plurality of metal lumps 6 are formed with the reference line Lx3 as the arrangement reference. Next, a plurality of metal lumps 6 are formed with the reference line Lx4 as the arrangement reference.
  • a plurality of metal lumps 6 are formed with the reference line Lx5 as the arrangement reference.
  • the order in which the plurality of metal lumps 6 in each row are formed is not particularly limited, but may be formed in order along the x direction, starting from the metal lumps 6 located at the farthest end in the x direction.
  • a plurality of metal lumps 6 are formed in this order, when the capillary Cp is slid as shown in FIG. 14 in the formation of each metal lump 6, there is no metal lumps 6 at the destination of the capillary Cp.
  • the semiconductor element 4 has a plurality of placement reference portions 45.
  • the placement precision of the plurality of metal lumps 6 can be improved. Therefore, for example, it is possible to place a plurality of metal lumps 6 at a higher density, allowing the active clamp to function more appropriately.
  • the placement reference portion 45 is formed by the metal layer 4010 exposed from the opening 461 of the insulating film 46. This makes it possible to form multiple placement reference portions 45 at once in the process of forming the first region 4011 and the second region 4012.
  • the configuration in which the metal layer 4010 is exposed from the opening 461 can be captured with high contrast in an image, which is preferable for more accurate placement setting.
  • the multiple placement reference portions 45 include multiple first placement reference portions 451 and multiple second placement reference portions 452. This allows the positions of the multiple metal lumps 6 arranged along the x direction and the multiple metal lumps 6 arranged along the y direction to be set more accurately.
  • the number of the multiple second placement reference portions 452 is less than the number of columns arranged along the y direction. This makes it possible to reduce the space required to arrange the multiple second placement reference portions 452, which is preferable for miniaturizing the entire semiconductor element 4.
  • the multiple placement reference parts 45 are configured to be separated from the first region 4011 and the second region 4012. As a result, in an image of the initial settings, etc., the multiple placement reference parts 45 are visually recognized as individual markers separated from the first region 4011, etc. Therefore, it is expected that the initial settings work, etc. can be performed more reliably.
  • the center O1 of the break portion 65 is offset from the center O1 of the metal lump 6. This is because, as shown in Figure 14, the capillary Cp is slid to form the constricted portion 67, and as shown in Figure 16, the break portion 65 is formed by breaking the wire material W at the constricted portion 67. Since the cross-sectional area of the constricted portion 67 is small, it is possible to break the constricted portion 67 with a smaller force than in Figure 16. This makes it possible to prevent the shape of the metal lump 6 from becoming unintended distorted. It is possible to prevent the bond between the metal lump 6 and the first electrode 401 from being weakened by the force used when breaking the wire material W. Therefore, it is possible to more reliably bond the metal lump 6 of the desired shape to the first electrode 401, and the active clamp can function more appropriately.
  • FIGS. 35 to 47 show modified examples and other embodiments of the present disclosure.
  • elements that are the same as or similar to those in the above-described embodiment are given the same reference numerals as in the above-described embodiment.
  • the configurations of the various parts in each modified example and each embodiment can be combined with each other as appropriate to the extent that no technical contradictions arise.
  • first modified example: 35 shows a first modified example of the semiconductor device A5.
  • the number of the second arrangement reference portions 452 arranged on one side in the y direction with respect to the first region 4011 is the same as the number of rows of the metal lumps 6 arranged along the y direction.
  • This modified example also allows the active clamp to function more appropriately.
  • the number of the second placement reference portions 452 is not limited in any way and can be changed as appropriate depending on, for example, the specific processing method of the initial settings.
  • FIG. 36 shows a modified example of the arrangement reference portion 45.
  • the dashed lines in FIG. 36 are reference lines corresponding to the reference lines Lx1 to Lx5 or the reference lines Ly11, Ly12, Ly21, and Ly22 in FIG. 33.
  • the arrangement reference portion 45 in FIG. 36 is a quadrangle when viewed in the z direction, specifically a square. This arrangement reference portion 45 has two sides parallel to the reference line and two sides perpendicular to the reference line.
  • the arrangement reference portion 45 in FIG. 36 is a strip extending along the reference line.
  • the arrangement reference portion 45 in FIG. 36 is a quadrangle (diamond) having a diagonal line along the reference line and a diagonal line perpendicular to the reference line.
  • the arrangement reference portion 45 in FIG. 36 is a triangle, and one apex angle intersects the reference line. For example, the reference line can bisect the apex angle.
  • This modified example also allows the active clamp to function more appropriately.
  • the specific shape of the placement reference portion 45 is not limited in any way, and various shapes can be used as long as the shape allows the reference line to be identified.
  • Modifications of the metal block 6 37 shows a modified example of the metal block 6.
  • O2 of the fractured portion 65 coincides (or approximately coincides) with the center O1 of the metal block 6.
  • Such a metal block 6 is formed, for example, by fracture of the wire material W shown in FIG. 16 without moving the capillary Cp in the y direction as described with reference to FIG. 14.
  • This modified example also allows the active clamp to function more appropriately.
  • the specific shape of the metal block 6 is not limited in any way.
  • Sixth embodiment: 38 shows a semiconductor element 4 of a semiconductor device according to a sixth embodiment of the present disclosure.
  • the configuration of the arrangement reference portion 45 of the semiconductor element 4 is different from that of the above-described embodiment.
  • the arrangement reference portion 45 is not configured to be separated from the first region 4011.
  • the first region 4011 has two first sides 4011x and two second sides 4011y.
  • the two first sides 4011x are sides separated from each other in the x direction.
  • the two second sides 4011y are sides separated from each other in the y direction.
  • the two first sides 4011x have multiple portions that are bent inwardly of the first region 4011 when viewed from the z direction. These portions form multiple first placement reference portions 451.
  • the two second sides 4011y have multiple portions that are bent inwardly of the first region 4011 when viewed from the z direction. These portions form multiple second placement reference portions 452.
  • the illustrated placement reference portions 45 are triangular with an inward apex angle, but are not limited to this shape and can be set to various shapes, including the example shown in FIG. 36, for example.
  • the multiple placement reference portions 45 are not provided as independent shaped parts, but are formed integrally as part of the first region 4011 (first side 4011x, second side 4011y). Therefore, compared to a configuration including placement reference portions 45 that are independent from the first region 4011, it is possible to reduce the placement space for the placement reference portions 45, which is advantageous for miniaturizing the semiconductor element 4.
  • FIG. 39 shows the semiconductor element 4 of the semiconductor device according to the seventh embodiment of the present disclosure.
  • the configuration of the arrangement reference portion 45 of the semiconductor element 4 is different from that of the above-mentioned embodiment.
  • the two first sides 4011x have a plurality of portions bent outward from the first region 4011 when viewed from the z direction. These portions constitute a plurality of first arrangement reference portions 451.
  • the two second sides 4011y have a plurality of portions bent outward from the first region 4011 when viewed from the z direction. These portions constitute a plurality of second arrangement reference portions 452.
  • the illustrated arrangement reference portions 45 are triangular with an apex angle facing outward, but are not limited to such a shape and can be set to various shapes, including the example shown in FIG. 36, for example.
  • This embodiment also allows the active clamp to function more appropriately. This embodiment also allows the placement space for the placement reference portion 45 to be reduced, which is advantageous for miniaturizing the semiconductor element 4.
  • Eighth embodiment 40 shows a semiconductor element 4 of a semiconductor device according to an eighth embodiment of the present disclosure.
  • the configuration of a first region 4011 of the semiconductor element 4 is different from that of the above-described embodiment.
  • two first sides 4011x have a bent shape.
  • the first sides 4011x include a plurality of inclined lines each inclined with respect to the x direction and the y direction. Each inclined line is arranged and inclined along a plurality of metal blocks 6 arranged in a staggered pattern.
  • This embodiment also allows the active clamp to function more appropriately. This embodiment makes it possible to reduce the size of the first region 4011, which is advantageous for miniaturizing the semiconductor element 4.
  • First modified example of eighth embodiment 41 shows a first modified example of the semiconductor device A8.
  • the configurations of the first region 4011 and the multiple placement reference portions 45 of the semiconductor element 4 are different from those of the above-described embodiment.
  • the boundary portions of the multiple inclined lines included in the first side 4011x constitute the multiple first placement reference portions 451.
  • the boundary portions of the adjacent inclined lines include a portion bent inward of the first region 4011 and a portion bent outward of the first region 4011. These geometrically shaped portions constitute the multiple first placement reference portions 451.
  • This modified example also allows the active clamp to function more appropriately.
  • This modified example reduces the size of the first region 4011 while eliminating the need for a dedicated space for arranging the multiple first placement reference portions 451. This is therefore even more advantageous in reducing the size of the semiconductor element 4.
  • Ninth embodiment: 42 shows a semiconductor element 4 of a semiconductor device according to a ninth embodiment of the present disclosure.
  • the configurations of the first region 4011 and the multiple placement reference parts 45 of the semiconductor element 4 are different from those of the above-mentioned embodiment.
  • each of the two first sides 4011x and the two second sides 4011y has multiple step-shaped parts. These multiple step-shaped parts constitute the multiple first placement reference parts 451 and the multiple second placement reference parts 452.
  • the multiple step shapes are arranged on the first side 4011x so that the size in the x direction increases toward the center in the y direction.
  • This embodiment also allows the active clamp to function more appropriately. According to this embodiment, a dedicated space for arranging the multiple first arrangement reference portions 451 and the multiple second arrangement reference portions 452 is not required. This is therefore further advantageous in miniaturizing the semiconductor element 4.
  • First modified example of the ninth embodiment 43 shows a semiconductor element 4 of a first modified example of the semiconductor device A9.
  • the configurations of the first region 4011 and the multiple placement reference portions 45 of the semiconductor element 4 are different from those of the above-described embodiment.
  • rectangular recesses are formed on each of the two first sides 4011x and the two second sides 4011y.
  • a plurality of first placement reference portions 451 and a plurality of second placement reference portions 452 are formed by step-shaped portions that are one side portions of the multiple recesses.
  • This embodiment also allows the active clamp to function more appropriately.
  • the size of the first region 4011 in the x direction varies depending on the step shape, but as shown in FIG. 42, the central portion in the y direction does not become locally larger. This is therefore preferable for miniaturizing the semiconductor element 4.
  • Tenth embodiment: 44 and 45 show a semiconductor device according to a tenth embodiment of the present disclosure.
  • the semiconductor device A10 of this embodiment differs from the above-described embodiments mainly in the configuration of the semiconductor element 4 and in that the semiconductor element 42 and a plurality of third wires 53 are provided.
  • the semiconductor element 4 of this embodiment has the switching unit 408 of the above embodiment and performs a switching function, but does not have the control unit 48 of the above embodiment.
  • the semiconductor element 42 performs functions such as controlling, monitoring, and protecting the semiconductor element 4. Both the semiconductor element 4 and the semiconductor element 42 are mounted on the die pad main surface 111 of the die pad portion 11 via a bonding material 49. In the illustrated example, the semiconductor element 4 and the semiconductor element 42 are arranged side by side in the y direction.
  • the semiconductor element 42 has a plurality of electrodes 421 and a plurality of electrodes 422.
  • the plurality of electrodes 421 and the plurality of electrodes 422 are both arranged on the same side in the z direction.
  • the plurality of electrodes 421 are arranged on the side where the semiconductor element 4 is located in the y direction.
  • the plurality of electrodes 422 are arranged on the side where the plurality of third leads 3 are located in the y direction.
  • the plurality of electrodes 422 include electrodes 4221, 4222, 4223, and 4224.
  • the electrode 4221 corresponds to the third electrode 4031 in the semiconductor device A1 described above.
  • the electrode 4222 corresponds to the third electrode 4032 in the semiconductor device A1 described above.
  • the electrode 4223 corresponds to the third electrode 4033 in the semiconductor device A1 described above.
  • the electrode 4224 corresponds to the third electrode 4034 in the semiconductor device A1 described above.
  • the multiple second wires 52 are individually connected to the multiple electrodes 422 of the semiconductor element 42 and the multiple third leads 3.
  • the bonding portion 521 is bonded to the electrodes 422.
  • the bonding portion 522 is bonded to the pad portion 31 of the third lead 3.
  • the semiconductor device A10 includes a plurality of third wires 53.
  • the plurality of third wires 53 are individually connected to a plurality of third electrodes 403 of the semiconductor element 4 and a plurality of electrodes 421 of the semiconductor element 42.
  • the third wire 53 has, for example, a bonding portion 531, a bonding portion 532, and a loop portion 533, and has a configuration similar to that of the second wire 52.
  • the bonding portion 531 is bonded to the third electrode 403.
  • the bonding portion 532 is bonded to the electrode 421.
  • This embodiment also allows the active clamp to function more appropriately.
  • the specific configuration of the semiconductor element 4 is not limited in any way.
  • the die pad portion 11 may be mounted with not only the semiconductor element 4, but also other semiconductor elements such as the semiconductor element 42 in addition to the semiconductor element 4.
  • the functions of the semiconductor elements other than the semiconductor element 4 are not limited in any way.
  • Eleventh embodiment 46 and 47 show a semiconductor device according to an eleventh embodiment of the present disclosure.
  • the semiconductor device A11 of this embodiment includes a semiconductor element 4 and a semiconductor element 42, similar to the semiconductor device A10.
  • the semiconductor element 42 is mounted on the element main surface 40a of the semiconductor element 4. That is, the semiconductor element 42 is disposed on the opposite side of the semiconductor element 4 from the die pad portion 11 in the z direction.
  • the semiconductor element 4 and the semiconductor element 42 are stacked on top of each other.
  • the semiconductor element 42 is bonded to the element principal surface 40a of the semiconductor element 4, for example, by a bonding material 49.
  • the semiconductor element 42 is mounted at a position spaced apart in the y direction from the first electrode 401 when viewed in the z direction. Unlike the illustrated example, the semiconductor element 42 may be disposed on the first electrode 401.
  • the first electrode 401 and the semiconductor element 42 are both rectangular with the x direction as the longitudinal direction.
  • the multiple third electrodes 403 are located between the first electrode 401 and the semiconductor element 42 in the y direction, and are arranged side by side in the x direction.
  • This embodiment also allows the active clamp to function more appropriately. As can be seen from this embodiment, there are no limitations on the arrangement or mounting form of the semiconductor element 42.
  • the semiconductor device and the semiconductor device according to the present disclosure are not limited to the above-mentioned embodiments.
  • the specific configuration of the semiconductor device according to the present disclosure can be freely designed in various ways.
  • Appendix 1A A semiconductor element having a first electrode; At least one metal mass bonded to the first electrode, the metal lump has a fractured portion located on a first side that is a side away from the first electrode in a thickness direction of the semiconductor element, A semiconductor device, wherein when viewed in the thickness direction, the center of the fracture portion is offset from the center of the metal block.
  • Appendix 2A. 1C The semiconductor device of claim 1A, wherein, when viewed in the thickness direction, all of the fractured portions are away from the center of the metal block.
  • the semiconductor device according to claim 1A wherein the metal block has a large diameter portion in contact with the first electrode, and a small diameter portion located on the opposite side of the large diameter portion from the first electrode in the thickness direction and having a smaller diameter than the large diameter portion.
  • Appendix 4A The semiconductor device according to claim 3A, wherein, when viewed in the thickness direction, a center of the large diameter portion and a center of the small diameter portion both coincide with a center of the metal block.
  • Appendix 5A. 4B The semiconductor device according to claim 3A or 4A, wherein the metal block has a first tapered portion interposed between the large diameter portion and the small diameter portion.
  • Appendix 6A Appendix 6A.
  • the metal block has a top surface located on the first side in the thickness direction and adjacent to the fracture portion when viewed in the thickness direction.
  • Appendix 7A The semiconductor device of claim 6A, wherein the top surface is larger than the fracture portion when viewed in the thickness direction.
  • Appendix 8A the at least one metal chunk comprises a plurality of metal chunks; The semiconductor device of any one of appendixes 1A to 7A, wherein in each of the plurality of metal chunks, the center of the fracture portion is shifted in the same direction relative to the center of the metal chunk.
  • Appendix 9A Appendix 9A.
  • the plurality of metal blocks are arranged in a plurality of rows along a first direction perpendicular to the thickness direction,
  • the semiconductor device of claim 8A wherein in the plurality of metal lumps, the centers of the fractured portions are shifted in a second direction intersecting the first direction relative to the centers of the metal lumps.
  • Appendix 10A The semiconductor device of any one of claims 1A to 7A, further comprising a wire connected to the first electrode.
  • Appendix 11A. 10B The semiconductor device according to claim 10A, wherein the first electrode includes a first region in which the metal lump is disposed and a second region to which the wire is connected.
  • Appendix 12A Appendix
  • Appendix 13A Appendix 13A.
  • the method for manufacturing a semiconductor device according to claim 14A wherein in the step of releasing the capillary, the capillary is moved to a position where a tip of the capillary overlaps the small diameter portion when viewed from a direction perpendicular to the thickness direction.
  • Appendix 16A The insertion hole has a tapered portion connected to the tip portion,
  • a manufacturing method for a semiconductor device as described in Appendix 15A in which, in the process of forming the ball portion, a first taper portion is formed which is a portion of the ball portion that contacts the taper portion and is interposed between the large diameter portion and the small diameter portion.
  • Appendix 17A Appendix 17A.
  • Appendix 1B A semiconductor element having a first electrode; A plurality of metal lumps joined to the first electrode; and at least one placement reference portion that serves as a placement reference for the plurality of metal lumps.
  • Appendix 2B A metal layer; An insulating film partially covering the metal layer, The semiconductor device according to claim 1B, wherein the first electrode is a portion of the metal layer exposed from the insulating film.
  • Appendix 3B The semiconductor device according to claim 2B, wherein the placement reference portion is a portion of the metal layer exposed from the insulating film.
  • Appendix 4B 4. The semiconductor device according to claim 1, wherein the placement reference portion is spaced apart from the first electrode in a plan view.
  • Appendix 5B A semiconductor element having a first electrode; A plurality of metal lumps joined to the first electrode; and at least one placement reference portion that serves as a placement reference for the plurality of metal lumps.
  • Appendix 2B A metal layer; An insulating film partially covering the metal layer, The semiconductor device according to
  • the placement reference portion is formed by a part of an edge of the first electrode.
  • Appendix 6B The semiconductor device according to claim 5B, wherein the placement reference portion is configured by a portion of an edge of the first electrode that is bent inward in a plan view.
  • Appendix 7B The semiconductor device according to claim 5B, wherein the placement reference portion is configured by a portion of an edge of the first electrode that is bent outward in a plan view.
  • Appendix 8B The semiconductor device according to claim 5B, wherein the placement reference portion is configured by a portion of an edge of the first electrode that has a step shape in a plan view.
  • Appendix 9B Appendix
  • the at least one placement reference portion includes a plurality of placement reference portions.
  • Appendix 10B The plurality of metal lumps are arranged along a first direction in a plan view
  • the semiconductor device according to claim 9B, wherein the plurality of arrangement reference portions include a first arrangement reference portion that serves as an arrangement reference for the plurality of metal chunks arranged along the first direction.
  • Appendix 11B Appendix
  • the plurality of metal lumps are arranged in a plurality of rows along the first direction in a plan view
  • the plurality of metal blocks arranged in a plurality of rows along the first direction are further arranged in a plurality of rows along a second direction intersecting the first direction in a plan view, 10C.
  • Appendix 12B The semiconductor device according to claim 11B, wherein the plurality of arrangement reference portions include a plurality of first arrangement reference portions, the number of which is equal to the number of rows of the plurality of metal blocks arranged in a plurality of rows along the first direction. Appendix 13B. 12C.
  • each of the plurality of metal lumps has a break portion located on a first side that is a side away from the first electrode in a thickness direction of the semiconductor element; 14C.
  • the semiconductor device of claim 11B wherein in each metal block, when viewed in the thickness direction, the center of the fracture portion is offset from the center of the metal block.
  • Appendix 16B. 15C The semiconductor device of claim 15B, wherein in each of the plurality of metal chunks, the center of the fracture portion is shifted in the second direction relative to the center of the metal chunk.
  • Appendix 17B. 16C The semiconductor device of claim 1B, further comprising a wire connected to the first electrode.
  • A1, A2, A3, A4 Semiconductor devices A5, A51, A6, A7, A8, A81: Semiconductor devices A9, A91, A10, A11: Semiconductor device 1: First lead 2: Second lead 3: Third lead 4: Semiconductor element 6: Metal lump 8: Sealing resin 11: Die pad portion 12: Extension portion 21: Pad portion 22: Terminal portion 31: Pad portion 32: Terminal portion 40: Element body 40a: Element main surface 40b: Element back surface 42: Semiconductor element 45: Placement reference portion 46: Insulating film 48: Control portion 49: Bonding material 51: First wire 52: Second wire 53: Third wire 60: Base portion 61: Large diameter portion 62: Small diameter portion 63: First tapered portion 64: Top surface 65: Fracture portion 66: Second tapered portion 67: Narrowed portion 69: Ball portion 81: Resin main surface 82: Resin back surface 83: First resin side surface 84: Second resin side surface 91: Insertion hole 92: Tip portion

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6412555A (en) * 1987-07-07 1989-01-17 Nec Corp Formation of bump and device therefor
JPH0536697A (ja) * 1991-07-31 1993-02-12 Nec Kansai Ltd バンプ電極形成装置
JPH08236563A (ja) * 1995-02-24 1996-09-13 Fujitsu Ltd ワイヤボンディング方法及び装置
JP2005175175A (ja) * 2003-12-11 2005-06-30 Matsushita Electric Ind Co Ltd スタッドバンプ形成方法、スタッドバンプを含む半導体装置及び製造方法
WO2023282013A1 (ja) * 2021-07-06 2023-01-12 ローム株式会社 半導体装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6412555A (en) * 1987-07-07 1989-01-17 Nec Corp Formation of bump and device therefor
JPH0536697A (ja) * 1991-07-31 1993-02-12 Nec Kansai Ltd バンプ電極形成装置
JPH08236563A (ja) * 1995-02-24 1996-09-13 Fujitsu Ltd ワイヤボンディング方法及び装置
JP2005175175A (ja) * 2003-12-11 2005-06-30 Matsushita Electric Ind Co Ltd スタッドバンプ形成方法、スタッドバンプを含む半導体装置及び製造方法
WO2023282013A1 (ja) * 2021-07-06 2023-01-12 ローム株式会社 半導体装置

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