WO2024143383A1 - ＳｉＣ半導体装置 - Google Patents

ＳｉＣ半導体装置 Download PDF

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Publication number
WO2024143383A1
WO2024143383A1 PCT/JP2023/046704 JP2023046704W WO2024143383A1 WO 2024143383 A1 WO2024143383 A1 WO 2024143383A1 JP 2023046704 W JP2023046704 W JP 2023046704W WO 2024143383 A1 WO2024143383 A1 WO 2024143383A1
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regions
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English (en)
French (fr)
Japanese (ja)
Inventor
誠悟 森
佑紀 中野
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Rohm Co Ltd
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Rohm Co Ltd
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Priority to CN202380088399.0A priority Critical patent/CN120419309A/zh
Priority to JP2024567874A priority patent/JPWO2024143383A1/ja
Priority to DE112023004899.1T priority patent/DE112023004899T5/de
Publication of WO2024143383A1 publication Critical patent/WO2024143383A1/ja
Priority to US19/245,480 priority patent/US20250324691A1/en
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Definitions

  • Patent document 1 discloses an electronic device having an impurity region introduced into a silicon carbide layer by channeling implantation.
  • the present disclosure provides a novel SiC semiconductor device.
  • the present disclosure provides a SiC semiconductor device including a first SiC layer of a first conductivity type having a first axial channel along a stacking direction, a second SiC layer of a first conductivity type having a second axial channel along the stacking direction and stacked on the first SiC layer, a first region of a second conductivity type extending along the first axial channel in the first SiC layer, and a second region of a second conductivity type extending along the second axial channel in the second SiC layer and overlapping the first region in the stacking direction.
  • FIG. 1 is a plan view showing a SiC semiconductor device according to the first embodiment.
  • FIG. 2 is a cross-sectional view taken along the line II-II shown in FIG.
  • FIG. 3 is a plan view showing an example of a chip layout.
  • FIG. 4 is a perspective view showing an example of a chip layout.
  • FIG. 5 is a cross-sectional perspective view showing a main portion of a chip together with the basic form of a column region.
  • FIG. 6A is a graph showing an example of a concentration gradient in the second region (first region).
  • FIG. 6B is a graph showing an example of the concentration gradient in the second region (first region).
  • FIG. 6C is a graph showing an example of the concentration gradient in the second region (first region).
  • FIG. 6D is a graph showing an example of the concentration gradient in the second region (first region).
  • FIG. 6E is a graph showing an example of the concentration gradient in the second region (first region).
  • FIG. 7 is a graph showing a comparative example of the concentration gradient in the second region (first region).
  • FIG. 8 is a cross-sectional perspective view showing the column region according to the first embodiment.
  • FIG. 9 is a graph showing an example of the concentration gradient in the column region shown in FIG.
  • FIG. 10 is a cross-sectional perspective view showing a column region according to the second embodiment.
  • FIG. 11 is a graph showing an example of the concentration gradient in the column region shown in FIG.
  • FIG. 12 is a cross-sectional perspective view showing a column region according to the third embodiment.
  • FIG. 21 is a graph showing an example of the concentration gradient in the column region shown in FIG.
  • FIG. 22 is a cross-sectional perspective view showing a column region according to the eighth embodiment.
  • FIG. 23 is a graph showing an example of the concentration gradient in the column region shown in FIG.
  • FIG. 24 is a cross-sectional perspective view showing a column region according to the ninth embodiment.
  • FIG. 25 is a cross-sectional perspective view showing a column region according to the tenth embodiment.
  • FIG. 26 is a cross-sectional perspective view showing a column region according to the eleventh embodiment.
  • FIG. 27 is a cross-sectional perspective view showing a column region according to the twelfth embodiment.
  • FIG. 28 is a plan view showing a main part of an active region.
  • FIG. 28 is a plan view showing a main part of an active region.
  • FIG. 29 is a cross-sectional perspective view showing a gate structure according to the first embodiment.
  • FIG. 30 is a cross-sectional view showing a main part of the outer circumferential region.
  • FIG. 31 is a cross-sectional perspective view showing a gate structure according to the second embodiment.
  • FIG. 32 is a schematic diagram showing a wafer used in manufacturing a SiC semiconductor device.
  • FIG. 33 is a flowchart showing an example of a method for manufacturing a SiC semiconductor device.
  • FIG. 34A is a cross-sectional perspective view showing an example of a manufacturing method for a SiC semiconductor device.
  • FIG. 34B is a cross-sectional perspective view showing a step subsequent to that of FIG. 34A.
  • FIG. 34C is a cross-sectional perspective view showing a step subsequent to FIG.
  • the second side 5B is connected to the first side 5A
  • the third side 5C is connected to the second side 5B
  • the fourth side 5D is connected to the first side 5A and the third side 5C.
  • the first side 5A and the third side 5C extend in a first direction X along the first main surface 3 and face a second direction Y that intersects (specifically, perpendicular to) the first direction X.
  • the second side 5B and the fourth side 5D extend in the second direction Y and face the first direction X.
  • the XY plane including the first direction X and the second direction Y forms a horizontal plane perpendicular to the vertical direction Z.
  • the axis extending along the vertical direction Z may be referred to as the "vertical axis.”
  • the first direction X and the second direction Y may be referred to as the "horizontal direction.”
  • the horizontal direction is also the direction extending along the first main surface 3.
  • the number of layers of the multiple semiconductor layers is typically 2 to 5 (2, 3, 4, or 5).
  • the stacked portion 7 has a two-layer structure including an n-type first layer 8 made of SiC single crystal and an n-type second layer 9 made of SiC single crystal.
  • the first layer 8 may be referred to as the "first SiC layer”, the “first semiconductor layer”, etc.
  • the second layer 9 may be referred to as the "second SiC layer”, the "second semiconductor layer”, etc.
  • the first layer 8 is laminated on the base layer 6.
  • the first layer 8 extends horizontally in a layered manner, forming the middle part of the chip 2 and part of the first to fourth side faces 5A to 5D.
  • the first layer 8 is made of an epitaxial layer (i.e., a SiC epitaxial layer) that is crystal-grown starting from the base layer 6.
  • the n-type impurity concentration of the second layer 9 is preferably lower than the n-type impurity concentration of the base layer 6.
  • the second layer 9 may have a peak n-type impurity concentration of 1 ⁇ 10 15 cm -3 or more and 1 ⁇ 10 18 cm -3 or less.
  • the n-type impurity concentration of the second layer 9 may be approximately constant in the thickness direction.
  • the n-type impurity concentration of the second layer 9 may have a concentration gradient that gradually increases and/or gradually decreases in the stacking direction (crystal growth direction).
  • the n-type impurity concentration of the second layer 9 is preferably adjusted with at least nitrogen.
  • the second layer 9 preferably contains nitrogen and a pentavalent element other than nitrogen.
  • the second layer 9 preferably contains either arsenic or antimony, or both, as the pentavalent element other than phosphorus and nitrogen.
  • the multiple first regions 14 extend approximately in the vertical direction Z in a cross-sectional view taken from the a-plane ((11-20) plane) of the SiC single crystal.
  • the multiple first regions 14 are inclined approximately by the off angle ⁇ off from the vertical axis toward the off direction Doff in a cross-sectional view taken from the m-plane ((1-100) plane) of the SiC single crystal.
  • the a-plane of the SiC single crystal is a crystal plane perpendicular to the a-axis direction
  • the m-plane of the SiC single crystal is a crystal plane perpendicular to the m-axis direction.
  • the first lower end 14a may have an extension that crosses the boundary between the base layer 6 and the first layer 8 and is located within the base layer 6.
  • the thickness of the extension of the first lower end 14a based on the upper end of the base layer 6 may be greater than 0 ⁇ m and less than 2 ⁇ m.
  • the thickness of the extension of the first lower end 14a may have a value that belongs to any one of the following ranges: greater than 0 ⁇ m and less than 0.5 ⁇ m, 0.5 ⁇ m or more and less than 1 ⁇ m, 1 ⁇ m or more and less than 1.5 ⁇ m, and 1.5 ⁇ m or more and less than 2 ⁇ m.
  • the multiple second regions 15 and the second layer 9 form a second superjunction structure SJ2.
  • the state of charge balance means that, for multiple adjacent second regions 15, the depletion layer extending from one second pn junction and the depletion layer extending from the other second pn junction are connected within the multiple second drift regions 17.
  • the multiple second regions 15 are formed in the second layer 9 so as to overlap the multiple first regions 14 in the stacking direction. Specifically, the multiple second regions 15 overlap the multiple first regions 14 in a one-to-one correspondence in the stacking direction.
  • the multiple second drift regions 17 are connected to the multiple first drift regions 16 at the boundary between the first layer 8 and the second layer 9, and form multiple drift regions 13 together with the multiple first drift regions 16.
  • the multiple second drift regions 17 form multiple current paths extending in the stacking direction together with the multiple first drift regions 16.
  • the second regions 15 are made up of channeling regions (second channeling regions) that extend along the second axial channel CH2 in the second layer 9 in a cross-sectional view.
  • the second regions 15 are impurity regions that are introduced parallel or nearly parallel to the region (second axial channel CH2) surrounded by the atomic rows along the low-index crystal axis in the second layer 9, and extend at an angle with respect to the first main surface 3.
  • the second regions 15 have an off direction Doff and an off angle ⁇ off that are approximately equal to the off direction Doff and the off angle ⁇ off of the second axis channel CH2. In other words, the second regions 15 are inclined by the off angle ⁇ off from the vertical axis toward the off direction Doff.
  • the second regions 15 extend in the vertical direction Z in a cross-sectional view from the a-plane of the SiC single crystal.
  • the second regions 15 have ends that are inclined by approximately the off angle ⁇ off from the vertical axis toward the off direction Doff in a cross-sectional view from the m-plane of the SiC single crystal.
  • the distance between the lower end of the second layer 9 and the second lower end 15a may be 0 ⁇ m or more and 2 ⁇ m or less.
  • the distance between the lower end of the second layer 9 and the second lower end 15a may have a value that belongs to any one of the ranges of 0 ⁇ m or more and 0.5 ⁇ m or less, 0.5 ⁇ m or more and 1 ⁇ m or less, 1 ⁇ m or more and 1.5 ⁇ m or less, and 1.5 ⁇ m or more and 2 ⁇ m or less.
  • the second upper end 15b may be formed at a distance from the upper end of the second layer 9 (i.e., the first main surface 3) toward the lower end, and may face the upper end of the second layer 9 across a part (upper end) of the second layer 9.
  • the space between the first main surface 3 and the second upper end 15b of the second layer 9 may be used as a region for forming a device structure (other impurity regions, etc.).
  • the second upper end 15b may be exposed from the upper end of the second layer 9 (i.e., the first main surface 3).
  • the distance between the upper end of the second layer 9 and the second upper end 15b may be 0 ⁇ m or more and 1 ⁇ m or less.
  • the distance between the upper end of the second layer 9 and the second upper end 15b may have a value that falls within any one of the ranges of 0 ⁇ m or more and 0.25 ⁇ m or less, 0.25 ⁇ m or more and 0.5 ⁇ m or less, 0.5 ⁇ m or more and 0.75 ⁇ m or less, and 0.75 ⁇ m or more and 1 ⁇ m or less.
  • the second regions 15 may have a peak p-type impurity concentration of 1 ⁇ 10 15 cm ⁇ 3 or more and 1 ⁇ 10 18 cm ⁇ 3 or less.
  • the p-type impurity concentration (peak value) of the second regions 15 may be equal to or more than the p-type impurity concentration (peak value) of the first region 14.
  • the p-type impurity concentration (peak value) of the second regions 15 may be less than the p-type impurity concentration (peak value) of the first region 14.
  • the p-type impurity concentration (peak value) of the second regions 15 may be approximately equal to the p-type impurity concentration (peak value) of the first region 14.
  • the p-type impurity concentration of the second region 15 is preferably adjusted by at least one trivalent element. It is particularly preferable that the p-type impurity concentration of the second region 15 is adjusted by a trivalent element that is heavier than carbon. In other words, the second region 15 preferably contains a trivalent element other than boron (at least one of aluminum, gallium, and indium). In this embodiment, the p-type impurity concentration of the second region 15 is adjusted by aluminum.
  • Each of the multiple second regions 15 has a second width W2.
  • the second width W2 is the width in a direction perpendicular to the extension direction of the second regions 15. It is preferable that the second width W2 is less than the second thickness T2 of the second layer 9. Of course, the second width W2 may be greater than or equal to the second thickness T2.
  • the second width W2 is preferably less than the first thickness T1 of the first layer 8. Of course, the second width W2 may be greater than or equal to the first thickness T1. The second width W2 is preferably approximately equal to the first width W1 of the first region 14. Of course, the second width W2 may be greater than or equal to the first width W1, or may be less than the first width W1.
  • the second width W2 may be 0.1 ⁇ m or more and 5 ⁇ m or less.
  • the second width W2 may have a value belonging to any one of the following ranges: 0.1 ⁇ m or more and 0.25 ⁇ m or less, 0.25 ⁇ m or more and 0.5 ⁇ m or less, 0.5 ⁇ m or more and 0.75 ⁇ m or less, 0.75 ⁇ m or more and 1 ⁇ m or less, 1 ⁇ m or more and 1.5 ⁇ m or less, 1.5 ⁇ m or more and 2 ⁇ m or less, 2 ⁇ m or more and 2.5 ⁇ m or less, 2.5 ⁇ m or more and 3 ⁇ m or less, 3 ⁇ m or more and 3.5 ⁇ m or less, 3.5 ⁇ m or more and 4 ⁇ m or less, 4 ⁇ m or more and 4.5 ⁇ m or less, and 4.5 ⁇ m or more and 5 ⁇ m or less.
  • the second width W2 is preferably 0.5 ⁇ m or more and 1.5 ⁇ m or less.
  • the second regions 15 each have a second region thickness TR2 (region depth).
  • the second region thickness TR2 may be less than the second thickness T2 of the second layer 9.
  • the second region thickness TR2 may be greater than the second thickness T2.
  • the second region thickness TR2 may be approximately equal to the second thickness T2.
  • the second region thickness TR2 may be less than the first thickness T1 of the first layer 8.
  • the second region thickness TR2 may be greater than the first thickness T1.
  • the second region thickness TR2 may be approximately equal to the first thickness T1.
  • the second region thickness TR2 may be less than the first region thickness TR1 of the first region 14.
  • the second region thickness TR2 may be greater than the first region thickness TR1.
  • the second region thickness TR2 may be approximately equal to the first region thickness TR1.
  • the second region thickness TR2 is preferably 1 ⁇ m or more.
  • the second region thickness TR2 is preferably 5 ⁇ m or less.
  • the second region thickness TR2 may have a value that falls within any one of the following ranges: 1 ⁇ m or more and 1.5 ⁇ m or less, 1.5 ⁇ m or more and 2 ⁇ m or less, 2 ⁇ m or more and 2.5 ⁇ m or less, 2.5 ⁇ m or more and 3 ⁇ m or less, 3 ⁇ m or more and 3.5 ⁇ m or less, 3.5 ⁇ m or more and 4 ⁇ m or less, 4 ⁇ m or more and 4.5 ⁇ m or less, and 4.5 ⁇ m or more and 5 ⁇ m or less.
  • the second regions 15 are formed at intervals of a second pitch P2 in the first direction X.
  • the second pitch P2 is preferably less than the second thickness T2 of the second layer 9.
  • the second pitch P2 may be equal to or greater than the second thickness T2 of the second layer 9.
  • the second pitch P2 is preferably less than the first thickness T1 of the first layer 8.
  • the second pitch P2 may be equal to or greater than the first thickness T1.
  • a superjunction structure SJ having a two-layer structure is shown.
  • a superjunction structure SJ having a stacked structure of three or more layers may also be adopted.
  • a stack section 7 having a stacked structure of three or more layers may be formed, and a column region 12 having a stacked structure of three or more layers may be formed.
  • the third and subsequent semiconductor layers in the stack 7 are formed in the same configuration as the second layer 9, and the third and subsequent regions in the column region 12 are formed in the same configuration as the second region 15.
  • the (n+2)th layer (n is a natural number equal to or greater than 1) region of the column region 12 is formed in the (n+2)th semiconductor layer in the same relationship as the (n+1)th layer region is to the nth region.
  • the extension direction of the multiple first regions 14 intersects (specifically, is perpendicular to) the off direction Doff of the SiC single crystal, so the multiple first regions 14 are inclined from the vertical axis toward the off direction Doff by approximately the off angle ⁇ off in a cross-sectional view seen from the m-plane of the SiC single crystal. Therefore, in consideration of the accuracy of the charge balance, it is preferable that the multiple first regions 14 extend in the off direction Doff.
  • the multiple second regions 15 may be arranged at intervals in the second direction Y (a-axis direction) and each extend in a band shape in the first direction X (m-axis direction).
  • the extension direction of the multiple second regions 15 intersects (specifically, is perpendicular to) the off direction Doff of the SiC single crystal, so the multiple second regions 15 are inclined from the vertical axis toward the off direction Doff by approximately the off angle ⁇ off in a cross-sectional view seen from the m-plane of the SiC single crystal. Therefore, in consideration of the accuracy of the charge balance, it is preferable that the multiple second regions 15 extend in the off direction Doff.
  • the concentration gradient of the p-type impurity concentration in the first region 14 and the concentration gradient of the p-type impurity concentration in the second region 15 will be specifically explained. Since the concentration gradient of the first region 14 and the concentration gradient of the second region 15 are almost similar, the concentration gradient of the second region 15 will be exemplified below.
  • the concentration gradient of the first region 14 can be explained by substituting "first layer 8" with “base layer 6", “second layer 9” with “first layer 8”, “second region 15 (second lower end 15a and second upper end 15b)” with “first region 14 (first lower end 14a and first upper end 14b)” and “second axial channel CH2" with “first axial channel CH1” as necessary in the following explanation.
  • the relative or absolute positional relationship of the second region 15 with respect to the first layer 8 and the second layer 9 applies mutatis mutandis to the relative or absolute positional relationship of the first region 14 with respect to the base layer 6 and the first layer 8.
  • FIGS. 6A to 6E are graphs showing an example of the concentration gradient in the second region 15 (first region 14).
  • FIG. 7 is a graph showing a comparative example of the concentration gradient in the second region 15 (first region 14).
  • the vertical axis indicates the p-type impurity concentration in the second region 15, and the horizontal axis indicates the depth along the second axial channel CH2 with the upper end (first main surface 3) of the second layer 9 as the reference (zero point).
  • a region having a p-type impurity concentration of 1 ⁇ 10 15 cm ⁇ 3 or more is defined as the second region 15 and is shown as a graph.
  • the values of the impurity concentration, thickness, etc. shown below are examples for explaining the basic configuration of the second region 15 based on the concentration gradient, and are not shown with the intention of uniquely limiting the configuration of the second region 15.
  • the impurity concentration, thickness, etc. are adjusted to various values depending on the implantation conditions of the trivalent element (dose amount, implantation temperature, implantation energy, etc.), etc.
  • FIGS. 6A to 6E are graphs showing the case where the second region 15 is formed by the channeling implantation method.
  • Each of the graphs shows the concentration gradient of the second region 15 when a predetermined trivalent element (here, aluminum) is introduced into the second layer 9 parallel or nearly parallel to the second axial channel CH2 with an implantation energy of 190 KeV (FIG. 6A), 380 KeV (FIG. 6B), 650 KeV (FIG. 6C), 960 KeV (FIG. 6D), or 2000 KeV (FIG. 6E).
  • the second thickness T2 of the second layer 9 is about 3 ⁇ m, and the dose of the trivalent element is 1 ⁇ 10 13 cm ⁇ 2 .
  • the second region 15 (190 KeV) has a second region thickness TR2 of 1.5 ⁇ m or more and 1.8 ⁇ m or less, and has a second lower end 15a spaced from the lower end of the second layer 9 toward the upper end, and a second upper end 15b exposed from the upper end (first main surface 3) of the second layer 9.
  • the distance between the lower end of the second layer 9 and the second lower end 15a is 1.2 ⁇ m or more and 1.5 ⁇ m or less.
  • Peak portion 21 is a portion having a peak value P (maximum value) of the p-type impurity concentration. Peak portion 21 is also a convex main concentration transition portion including a series of concentration changes (inflection points) where the p-type impurity concentration changes from an increase (increasing trend) to a decrease (decreasing trend).
  • the depth position of peak portion 21 is 0.1 ⁇ m or more and 0.5 ⁇ m or less.
  • the gradual portion 22 is defined by a portion having a concentration drop rate of 50% or less in a thickness range of at least 0.5 ⁇ m.
  • the gradual portion 22 has a thickness of 0.7 ⁇ m or more and 0.8 ⁇ m or less, and has a concentration drop rate of 50% or less in the thickness range.
  • the p-type impurity concentration of the gradual portion 22 is within a concentration range of 4.5 ⁇ 10 16 cm -3 or more and 9 ⁇ 10 16 cm -3 or less.
  • the gradual decrease portion 22 has a thickness of 0.8 ⁇ m or more and 1.1 ⁇ m or less, and has a concentration decrease rate of 50% or less within this thickness range.
  • the p-type impurity concentration of the gradual decrease portion 22 is within a concentration range of 3.5 ⁇ 10 16 cm -3 or more and 7 ⁇ 10 16 cm -3 or less.
  • the p-type impurity concentration of the gradually decreasing portion 23 gradually decreases from the gradual decrease portion 22 to 1 ⁇ 10 15 cm -3 .
  • the p-type impurity concentration of the second region 15 has a concentration gradient from the second upper end 15b to the second lower end 15a, similar to the example of FIG. 6A, which includes a gradually increasing portion 20, a peak portion 21, a gradual portion 22, and a gradually decreasing portion 23.
  • the gradually increasing portion 20 also increases gradually from the second upper end 15b of the second region 15 to the peak portion 21 at a relatively steep rate of increase.
  • the depth position of the peak portion 21 is 0.6 ⁇ m or more and 1 ⁇ m or less.
  • the second lower end 15a has an extension that crosses the boundary between the first layer 8 and the second layer 9 and extends into the first layer 8.
  • the extension of the second lower end 15a has a thickness of 0.4 ⁇ m or more and 0.7 ⁇ m or less based on the upper end of the first layer 8.
  • the distance between the upper end of the second layer 9 and the second upper end 15b of the second region 15 is 0.3 ⁇ m or more and 0.6 ⁇ m or less.
  • the gradual decrease portion 22 has a thickness of 1.3 ⁇ m or more and 1.7 ⁇ m or less, and has a concentration decrease rate of 50% or less within this thickness range.
  • the p-type impurity concentration of the gradual decrease portion 22 is within a concentration range of 2.2 ⁇ 10 16 cm -3 or more and 4.5 ⁇ 10 16 cm -3 or less.
  • the p-type impurity concentration of the gradually decreasing portion 23 gradually decreases from the gradual decrease portion 22 to 1 ⁇ 10 15 cm -3 .
  • the p-type impurity concentration of the second region 15 has a concentration gradient from the second upper end 15b to the second lower end 15a, similar to the example of FIG. 6A, which includes a gradually increasing portion 20, a peak portion 21, a gradual portion 22, and a gradually decreasing portion 23.
  • the gradually increasing portion 20 also increases gradually from the second upper end 15b of the second region 15 to the peak portion 21 at a relatively steep rate of increase.
  • the depth position of the peak portion 21 is 1.3 ⁇ m or more and 1.9 ⁇ m or less.
  • the gradual portion 22 has a thickness of 1.5 ⁇ m or more and 1.8 ⁇ m or less, and has a concentration decrease rate of 50% or less in this thickness range.
  • the gradual portion 22 crosses the boundary between the first layer 8 and the second layer 9 and is located within the first layer 8. That is, the extension of the second region 15 includes a part of the gradual portion 22.
  • the p-type impurity concentration of the gradual portion 22 is within a concentration range of 2 ⁇ 10 16 cm ⁇ 3 or more and 4 ⁇ 10 16 cm ⁇ 3 or less.
  • the p-type impurity concentration of the gradually decreasing portion 23 gradually decreases from the gradual portion 22 to 1 ⁇ 10 15 cm ⁇ 3 .
  • the thickness of the gradually increasing portion 20, the peak portion 21, the gradual portion 22, and the gradually decreasing portion 23 all increase with increasing implantation energy.
  • the peak value P of the second region 15 decreases with increasing implantation energy. This is because the trivalent element is introduced into deeper regions with increasing implantation energy, increasing the p-type impurity concentration in these deep regions.
  • the second region 15 had a gradual increase portion 20, a peak portion 21 (peak value P), and a gradual decrease portion 23 in the range of 0.5 ⁇ m, but did not have a gradual portion 22 having a thickness of 0.5 ⁇ m or more.
  • the depth position of the peak portion 21 (peak value P) relative to the upper end of the second layer 9 increased with increasing injection energy, but the second region thickness TR2 of the second region 15 was less than 2 ⁇ m at any injection energy. In other words, even if the injection energy was increased, the second region thickness TR2 did not fluctuate significantly.
  • the second region 15 consisting of a single impurity region for the second layer 9 having a relatively large second thickness T2 (for example, a second thickness T2 of 1 ⁇ m or more).
  • a second thickness T2 for example, a second thickness T2 of 1 ⁇ m or more.
  • SiC single crystals have physical properties that make it difficult for impurities to diffuse. Therefore, the above problem is generally solved by the multi-epitaxial growth method or the multi-stage random injection method.
  • a process of introducing a trivalent element into an epitaxial layer having a relatively small thickness (for example, less than 1 ⁇ m) by random injection is repeated multiple times.
  • the number of epitaxial growth steps and the number of random injection steps increase, making the manufacturing process more complicated.
  • a process is carried out in which a trivalent element is introduced in multiple stages at different depth positions using multiple injection energies.
  • the trivalent element is introduced into the second layer 9 at five injection energies (190 KeV, 380 KeV, 650 KeV, and 960 KeV).
  • the trivalent element can be introduced to the desired depth position, but the depth position at which the trivalent element can be introduced is shallow. Therefore, the number of epitaxial growth steps and the number of random injection step must be increased, resulting in the same problems as in the multi-epitaxial growth method.
  • the first layer 8 has a first thickness T1 of 3 ⁇ m
  • the first region 14 is formed in the first layer 8 by an implantation energy of 650 KeV.
  • the first region 14 may be formed by an implantation energy of 650 KeV or less.
  • the second region thickness TR2 of the second region 15 may be different from the first region thickness TR1 of the first region 14.
  • the second region thickness TR2 may be less than the first region thickness TR1 or may be greater than the first region thickness TR1.
  • the second region 15 in the second embodiment is formed in the second layer 9 having a second thickness T2 that is approximately equal to the first thickness T1 of the first layer 8.
  • the second region 15 in the third embodiment is formed in the second layer 9 having a second thickness T2 that is less than the first thickness T1 of the first layer 8.
  • the second region 15 has a second region thickness TR2 that is greater than the second thickness T2 of the second layer 9.
  • the intermediate width WM is approximately equal to the first width W1 of the first region 14.
  • the intermediate width WM may be greater than or equal to the first width W1, or less than the first width W1. It is preferable that the intermediate width WM is greater than or equal to 1 ⁇ m. It is preferable that the intermediate width WM is less than or equal to 5 ⁇ m.
  • the intermediate width WM may have a value falling within any one of the following ranges: 1 ⁇ m or more and 1.5 ⁇ m or less, 1.5 ⁇ m or more and 2 ⁇ m or less, 2 ⁇ m or more and 2.5 ⁇ m or less, 2.5 ⁇ m or more and 3 ⁇ m or less, 3 ⁇ m or more and 3.5 ⁇ m or less, 3.5 ⁇ m or more and 4 ⁇ m or less, 4 ⁇ m or more and 4.5 ⁇ m or less, and 4.5 ⁇ m or more and 5 ⁇ m or less.
  • the second region 15 preferably has an extension located within the first layer 8 and is connected to the intermediate region 25 within the first layer 8.
  • the second region 15 preferably is electrically connected to the first region 14 via the intermediate region 25 within the first layer 8.
  • the second region 15 forms one drift region 13 that extends continuously in the stacking direction together with the first region 14 and the intermediate region 25.
  • the extension of the second region 15 may be connected to both the intermediate region 25 and the first region 14 within the first layer 8.
  • the concentration gradient in the region between the first region 14 and the second region 15 is mitigated by the intermediate region 25, improving the accuracy of the charge balance.
  • FIG. 20 is a cross-sectional perspective view showing the column region 12 according to the seventh embodiment.
  • FIG. 21 is a graph showing an example of the concentration gradient of the column region 12 shown in FIG. 20.
  • the column region 12 according to the seventh embodiment has a shape obtained by modifying the first region 14 according to the first to sixth embodiments.
  • the second region 15 according to the seventh embodiment may have a shape similar to any one of the shapes of the second region 15 according to the first to sixth embodiments.
  • the second region 15 has an extension located within the first layer 8 and is connected to the first region 14 within the first layer 8.
  • the concentration gradient formed in the region between the first region 14 and the second region 15 is mitigated by the exposed portion of the first region 14, improving the accuracy of the charge balance.
  • Such a configuration can be obtained by partially removing the upper end of the first layer 8 after the formation of the first region 14 until part or all of the first gradually increasing portion 20A of the first region 14 disappears.
  • the upper end of the first layer 8 may be partially removed by a grinding method.
  • the grinding method may be a mechanical polishing method and/or a chemical mechanical polishing method.
  • the upper end of the first layer 8 is composed of a ground surface, and the first region 14 is exposed from the ground surface.
  • the second layer 9 is laminated on top of the ground surface of the first layer 8.
  • the second region 15 has a second peak value PB at the upper end of the second layer 9, and has a concentration gradient that gradually decreases toward the lower end of the second layer 9.
  • the second upper end 15b includes a part of the second gradually increasing portion 20B or a part of the second peak portion 21B, and a part of the second gradually increasing portion 20B or a part of the second peak portion 21B may be exposed from the upper end of the second layer 9.
  • the configuration in which the second region 15 is exposed from the upper end of the second layer 9 is effective when a device structure is formed using the second layer 9 (first main surface 3) and the second region 15 is used to adjust the electrical characteristics of the device structure.
  • the upper end (first main surface 3) of the second layer 9 may be partially removed by an etching method.
  • the etching method may be a wet etching method and/or a dry etching method.
  • the upper end of the second layer 9 is made of an etched surface, and the second region 15 is exposed from the etched surface.
  • FIG. 24 is a cross-sectional perspective view showing the column region 12 according to the ninth embodiment.
  • FIG. 25 is a cross-sectional perspective view showing the column region 12 according to the tenth embodiment.
  • the stacked portion 7 may have a stacked structure including a buffer layer 26, a first layer 8, and a second layer 9 stacked in this order from the base layer 6 side.
  • the buffer layer 26 may be referred to as a "buffer SiC layer", a "buffer region”, etc.
  • the buffer layer 26 includes SiC single crystals and has n-type conductivity.
  • the buffer layer 26 is stacked on the base layer 6.
  • the buffer layer 26 extends in a layered manner in the horizontal direction, forming the middle part of the chip 2 and forming part of the first to fourth side surfaces 5A to 5D.
  • the buffer layer 26 is made of an epitaxial layer (i.e., a SiC epitaxial layer) that is crystal-grown starting from the base layer 6.
  • the buffer axis channel CHBu is a region in which the atomic rows extend in the stacking direction and the atomic rows (atomic distance/atomic density) in the horizontal direction are sparse in a plan view. It is preferable that the buffer axis channel CHBu is a region surrounded by atomic rows along the low-index crystal axis among the crystal axes.
  • the buffer axis channel CHBu is composed of a region surrounded by atomic rows along the c-axis of the SiC single crystal.
  • the buffer axis channel CHBu extends along the c-axis and has an off-direction Doff and an off-angle ⁇ off.
  • the buffer axis channel CHBu is inclined from the vertical axis toward the off-direction Doff by the off-angle ⁇ off.
  • the n-type impurity concentration of the buffer layer 26 is preferably lower than the n-type impurity concentration of the base layer 6.
  • the buffer layer 26 may have a peak n-type impurity concentration of 1 ⁇ 10 15 cm -3 or more and 1 ⁇ 10 18 cm -3 or less.
  • the n-type impurity concentration of the buffer layer 26 may be approximately constant in the thickness direction.
  • the n-type impurity concentration of the buffer layer 26 may have a concentration gradient that gradually increases and/or gradually decreases in the stacking direction (crystal growth direction).
  • the buffer layer 26 has an n-type impurity concentration adjusted with at least one pentavalent element.
  • the n-type impurity concentration of the buffer layer 26 may be adjusted with at least one of nitrogen, phosphorus, arsenic, antimony, and bismuth. It is preferable that the buffer layer 26 contains a pentavalent element other than phosphorus.
  • the n-type impurity concentration of the buffer layer 26 is preferably adjusted with at least nitrogen.
  • the buffer layer 26 preferably contains nitrogen and a pentavalent element other than nitrogen.
  • the buffer layer 26 preferably contains either arsenic or antimony, or both, as the pentavalent element other than phosphorus and nitrogen.
  • the buffer layer 26 has a buffer thickness TBu.
  • the buffer thickness TBu is preferably less than the base thickness TB.
  • the buffer thickness TBu is preferably 1 ⁇ m or more.
  • the buffer thickness TBu is preferably 5 ⁇ m or less.
  • the buffer thickness TBu may have a value that falls within any one of the following ranges: 1 ⁇ m or more and 1.5 ⁇ m or less, 1.5 ⁇ m or more and 2 ⁇ m or less, 2 ⁇ m or more and 2.5 ⁇ m or less, 2.5 ⁇ m or more and 3 ⁇ m or less, 3 ⁇ m or more and 3.5 ⁇ m or less, 3.5 ⁇ m or more and 4 ⁇ m or less, 4 ⁇ m or more and 4.5 ⁇ m or less, and 4.5 ⁇ m or more and 5 ⁇ m or less.
  • the first layer 8 is stacked on the buffer layer 26, and the second layer 9 is stacked on the first layer 8.
  • the first layer 8 is made of an epitaxial layer (i.e., a SiC epitaxial layer) crystal-grown starting from the buffer layer 26, and has n-type conductivity. Therefore, the first layer 8 has an off-direction Doff and an off-angle ⁇ off that are approximately equal to the off-direction Doff and off-angle ⁇ off of the buffer layer 26.
  • the first axis channel CH1 approximately coincides with the buffer axis channel CHBu.
  • the first thickness T1 of the first layer 8 is preferably greater than the buffer thickness TBu.
  • the first thickness T1 may be less than the buffer thickness TBu.
  • the first thickness T1 may be approximately equal to the buffer thickness TBu.
  • the second thickness T2 of the second layer 9 is preferably greater than the buffer thickness TBu.
  • the second thickness T2 may be less than the buffer thickness TBu.
  • the second thickness T2 may be approximately equal to the buffer thickness TBu.
  • the first region 14 has a shape similar to any one of the shapes of the first region 14 in the first to eighth embodiment examples, and is formed in the first layer 8.
  • the second region 15 has a shape similar to any one of the shapes of the first region 14 in the first to eighth embodiment examples, and is formed in the second layer 9.
  • the first lower end 14a of the first region 14 may be formed with a gap from the lower end to the upper end of the first layer 8, and may face the buffer layer 26 across a part (lower end) of the first layer 8.
  • the entire area of the first region 14 (first gradually increasing portion 20A, first peak portion 21A, first gradually decreasing portion 22A, and first gradually decreasing portion 23A) may be located within the first layer 8.
  • the first lower end 14a may be approximately coincident with the lower end of the first layer 8 and connected to the buffer layer 26.
  • the first lower end 14a may have an extension that crosses the boundary between the buffer layer 26 and the first layer 8 and is located within the buffer layer 26. Since the first axial channel CH1 is approximately coincident with the buffer axial channel CHBu, the extension of the first lower end 14a is formed along the buffer axial channel CHBu within the buffer layer 26.
  • the extension of the first lower end 14a is preferably located on the upper end side of the buffer layer 26 relative to the middle part of the thickness range of the buffer layer 26.
  • the extension of the first lower end 14a includes the first gradually tapering portion 23A.
  • the extension of the first lower end 14a may include a part of the first gradual portion 22A and the first gradually tapering portion 23A.
  • FIG. 26 is a cross-sectional perspective view showing a column region 12 according to an eleventh embodiment.
  • a superjunction structure SJ having a stacked structure of three or more layers may be adopted.
  • FIG. 26 shows a stacked portion 7 having a three-layer structure and a column region 12 having a three-layer structure.
  • the laminated portion 7 includes an n-type third layer 27 made of single crystal SiC laminated on the second layer 9.
  • the third layer 27 may be referred to as a "third SiC layer", a "third semiconductor layer”, or the like.
  • the second layer 9 forms the middle portion of the chip 2 and forms part of the first to fourth side surfaces 5A to 5D.
  • the third layer 27 extends in a layered manner in the horizontal direction, forms the first main surface 3, and forms part of the first to fourth side surfaces 5A to 5D.
  • the third layer 27 is made of an epitaxial layer (i.e., a SiC epitaxial layer) that is crystal-grown starting from the second layer 9.
  • the third axis channel CH3 consists of a region surrounded by atomic rows along the c-axis of the SiC single crystal.
  • the third axis channel CH3 extends along the c-axis and has an off-direction Doff and an off-angle ⁇ off.
  • the third axis channel CH3 is inclined from the vertical axis toward the off-direction Doff by the off-angle ⁇ off.
  • the n-type impurity concentration of the third layer 27 is preferably lower than the n-type impurity concentration of the base layer 6.
  • the third layer 27 may have a peak n-type impurity concentration of 1 ⁇ 10 15 cm -3 or more and 1 ⁇ 10 18 cm -3 or less.
  • the n-type impurity concentration of the third layer 27 may be approximately constant in the thickness direction.
  • the n-type impurity concentration of the third layer 27 may have a concentration gradient that gradually increases and/or gradually decreases in the stacking direction (crystal growth direction).
  • the n-type impurity concentration of the third layer 27 is preferably adjusted with at least nitrogen.
  • the third layer 27 preferably contains nitrogen and a pentavalent element other than nitrogen.
  • the third layer 27 preferably contains either arsenic or antimony, or both, as the pentavalent element other than phosphorus and nitrogen.
  • the third layer 27 has a third thickness T3.
  • the third thickness T3 is preferably less than the base thickness TB.
  • the third thickness T3 may be approximately equal to the second thickness T2, may be greater than or equal to the second thickness T2, or may be less than the second thickness T2.
  • the third thickness T3 may be approximately equal to the first thickness T1, may be greater than or equal to the first thickness T1, or may be less than the first thickness T1.
  • the third thickness T3 is preferably 1 ⁇ m or more.
  • the third thickness T3 is preferably 5 ⁇ m or less.
  • the third thickness T3 may have a value that falls within any one of the following ranges: 1 ⁇ m or more and 1.5 ⁇ m or less, 1.5 ⁇ m or more and 2 ⁇ m or less, 2 ⁇ m or more and 2.5 ⁇ m or less, 2.5 ⁇ m or more and 3 ⁇ m or less, 3 ⁇ m or more and 3.5 ⁇ m or less, 3.5 ⁇ m or more and 4 ⁇ m or less, 4 ⁇ m or more and 4.5 ⁇ m or less, and 4.5 ⁇ m or more and 5 ⁇ m or less.
  • the multiple column regions 12 each include a third region 28 formed in the third layer 27.
  • the multiple third regions 28 are formed horizontally at intervals in the third layer 27, and define multiple n-type third drift regions 29 each made of a part of the third layer 27.
  • the multiple third regions 28 form multiple third pn junctions having charge balance together with the multiple third drift regions 29.
  • the multiple third regions 28 are formed in the third layer 27 so as to overlap the multiple second regions 15 in the stacking direction. Specifically, the multiple third regions 28 overlap the multiple second regions 15 in a one-to-one correspondence in the stacking direction. Therefore, the multiple third drift regions 29 are connected to the multiple second drift regions 17 at the boundary between the second layer 9 and the third layer 27, and form multiple drift regions 13 together with the multiple first drift regions 16 and the multiple second drift regions 17. The multiple third drift regions 29 form multiple current paths extending in the stacking direction together with the multiple first drift regions 16 and the multiple second drift regions 17.
  • the multiple third regions 28 are arranged at intervals in the first direction X in the third layer 27, and are each formed in a band shape extending in the second direction Y. In other words, the multiple third regions 28 are formed in stripes extending in the second direction Y, and the multiple third drift regions 29 are formed in stripes extending in the second direction Y. Furthermore, the multiple third regions 28 are arranged at intervals in the m-axis direction of the SiC single crystal, and extend in the a-axis direction of the SiC single crystal. In other words, the extension direction of the multiple third regions 28 coincides with the off direction Doff of the third layer 27.
  • the multiple third regions 28 extend in the vertical direction Z in a cross-sectional view from the a-plane of the SiC single crystal.
  • the multiple third regions 28 have ends that are inclined by approximately the off angle ⁇ off from the vertical axis toward the off direction Doff in a cross-sectional view from the m-plane of the SiC single crystal.
  • the third lower end 28a may have an extension that crosses the boundary between the second layer 9 and the third layer 27 and is located within the second layer 9.
  • the thickness of the extension of the third lower end 28a based on the upper end of the second layer 9 may be greater than 0 ⁇ m and less than 2 ⁇ m.
  • the thickness of the extension of the third lower end 28a may have a value that belongs to any one of the following ranges: greater than 0 ⁇ m and less than 0.5 ⁇ m, 0.5 ⁇ m to 1 ⁇ m, 1 ⁇ m to 1.5 ⁇ m, and 1.5 ⁇ m to 2 ⁇ m.
  • the third regions 28 each have a third width W3.
  • the third width W3 is the width in a direction perpendicular to the extension direction of the third regions 28.
  • the third width W3 is preferably less than the third thickness T3 of the third layer 27.
  • the third width W3 may be equal to or greater than the third thickness T3.
  • the third width W3 is preferably less than the first thickness T1 of the first layer 8.
  • the third width W3 may be equal to or greater than the first thickness T1.
  • the third width W3 is preferably less than the second thickness T2 of the second layer 9.
  • the third width W3 may be equal to or greater than the second thickness T2.
  • the top layer 30 is grown continuously from the second layer 9, so that the bottom end of the top layer 30 coincides with the top end of the second layer 9.
  • the boundary between the top layer 30 and the second layer 9 is not necessarily visible, and can be indirectly evaluated and/or determined from other configurations or elements.
  • the top layer 30 has an off-direction Doff and an off-angle ⁇ off that are approximately the same as the off-direction Doff and the off-angle ⁇ off of the second layer 9.
  • the top layer 30 has a top axis channel CHT along the stacking direction.
  • the top axis channel CHT is a region (channel) in which the interatomic distance (atomic spacing) is relatively wide with respect to the SiC single crystal that constitutes the top layer 30, and is surrounded by atomic rows along the crystal axis that extends in the stacking direction (crystal growth direction).
  • the top axis channel CHT is a region in which the atomic rows extend in the stacking direction and the atomic rows (atomic distance/atomic density) in the horizontal direction are sparse in a planar view. It is preferable that the top axis channel CHT is a region surrounded by atomic rows along the low-index crystal axis among the crystal axes.
  • the top axis channel CHT is composed of a region surrounded by atomic rows along the c-axis of the SiC single crystal.
  • the top axis channel CHT extends along the c-axis and has an off-direction Doff and an off-angle ⁇ off.
  • the top axis channel CHT is inclined from the vertical axis toward the off-direction Doff by the off-angle ⁇ off.
  • the SiC semiconductor device 1A includes a MIS structure 31 (Metal Insulator Semiconductor structure) as an example of a device structure formed in the active region 10.
  • the MIS structure 31 may be referred to as a "field effect transistor structure.”
  • the SiC semiconductor device 1A includes a plurality of p-type body regions 32 formed in the active region 10.
  • the body regions 32 are arranged at intervals in the first direction X, and are each formed in a strip shape extending in the second direction Y. That is, the body regions 32 are arranged at intervals in the m-axis direction of the SiC single crystal, and extend in the a-axis direction of the SiC single crystal.
  • the extension direction of the body regions 32 coincides with the off-direction Doff of the SiC single crystal.
  • the extension direction of the body regions 32 coincides with the extension direction of the column regions 12 (second regions 15).
  • the body regions 32 unlike the second region 15 etc., do not have a gradual portion 22 having a thickness of 0.5 ⁇ m or more, and have a concentration gradient including a gradually increasing portion 20, a peak portion 21 and a gradually decreasing portion 23 within a range of 0.5 ⁇ m.
  • the body regions 32 may have a peak value of a p-type impurity concentration of 1 ⁇ 10 15 cm ⁇ 3 or more and 1 ⁇ 10 18 cm ⁇ 3 or less.
  • the SiC semiconductor device 1A includes one or more n-type source regions 33 formed in the surface layer portion of the body regions 32 in the active region 10.
  • the source regions 33 (two in this embodiment) are formed at intervals in the surface layer portion of each body region 32.
  • the source regions 33 have an n-type impurity concentration higher than the n-type impurity concentration of the second layer 9 (the second drift regions 17).
  • the source regions 33 may have a peak n-type impurity concentration of 1 ⁇ 10 18 cm ⁇ 3 or more and 1 ⁇ 10 21 cm ⁇ 3 or less.
  • the multiple source regions 33 may each extend in a band shape along the extension direction of the corresponding body region 32. Of course, the multiple source regions 33 may be formed at intervals along the extension direction of the corresponding body region 32. The multiple source regions 33 are formed at intervals from the bottom of the corresponding body region 32 toward the first main surface 3, and are formed at intervals inward from the periphery of the corresponding body region 32. The multiple source regions 33, together with the multiple second drift regions 17, define a channel (current path) along the first main surface 3 at the periphery of the body region 32.
  • the SiC semiconductor device 1A includes multiple gate structures 35 of a planar electrode type arranged on the first main surface 3 in the active region 10.
  • the gate structures 35 may be referred to as "planar gate structures.”
  • the multiple gate structures 35 are arranged at intervals on the first main surface 3 so as to overlap at least one body region 32 (channel) in the stacking direction.
  • a gate potential is applied to the multiple gate structures 35 as a control potential.
  • the multiple gate structures 35 control the inversion and non-inversion of the channel (current path) in the body region 32 in response to the gate potential.
  • the bottoms of the multiple field regions 38 may be located closer to the first main surface 3 than the depth position of the second upper end 15b of the second region 15.
  • the bottoms of the multiple field regions 38 may be located closer to the second lower end 15a of the second region 15 than the depth position of the second upper end 15b of the second region 15.
  • it is preferable that the bottoms of the multiple field regions 38 are located closer to the first main surface 3 than the middle part of the thickness range of the second region 15.
  • the p-type impurity concentration of the multiple field regions 38 is preferably adjusted by at least one type of trivalent element.
  • the trivalent element of the field region 38 may be the same type as the trivalent element of the second region 15, etc., or may be a different type from the trivalent element of the second region 15, etc.
  • the trivalent element of the field region 38 may be at least one type of boron, aluminum, gallium, and indium.
  • the second insulating film 42 is laminated on the first insulating film 41.
  • the second insulating film 42 may include at least one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film.
  • the interlayer insulating film 40 preferably includes a silicon oxide film.
  • the second insulating film 42 covers the first main surface 3 in the active region 10 and the peripheral region 11, sandwiching the first insulating film 41 between them.
  • the gate pad 45 is disposed on a portion of the interlayer insulating film 40 that covers the active region 10.
  • the gate pad 45 may be disposed at a distance from the peripheral region 11 toward the active region 10.
  • the gate pad 45 is disposed on the periphery of the active region 10 in a plan view.
  • the source pad 47 is disposed on a portion of the interlayer insulating film 40 that covers the active region 10.
  • the source pad 47 may be disposed at a distance from the peripheral region 11 toward the active region 10.
  • the source pad 47 is formed in a polygonal shape having a recess that is recessed along the gate pad 45 in a plan view.
  • the source pad 47 may also be formed in a rectangular shape in a plan view.
  • the SiC semiconductor device 1A includes a drain pad 48 covering the second main surface 4.
  • the drain pad 48 is an electrode to which a drain potential is applied from the outside.
  • the drain pad 48 may be referred to as a "drain pad electrode", a “third pad electrode”, etc.
  • the drain pad 48 forms an ohmic contact with the base layer 6 exposed from the second main surface 4.
  • the drain pad 48 is electrically connected to the first layer 8 (the multiple first drift regions 16) and the second layer 9 (the multiple second drift regions 17) via the base layer 6.
  • the first wafer main surface 51 corresponds to the upper end of the base layer 6, and the second wafer main surface 52 corresponds to the lower end of the base layer 6.
  • the first wafer main surface 51 and the second wafer main surface 52 are formed by the c-plane of the SiC single crystal.
  • the first wafer main surface 51 is formed by the silicon surface of the SiC single crystal, and the second wafer main surface 52 is formed by the carbon surface of the SiC single crystal.
  • the wafer 50 (the first wafer main surface 51 and the second wafer main surface 52) has the off-direction Doff and off-angle ⁇ off described above.
  • the wafer 50 has a mark 54 on the wafer side surface 53 that indicates the crystal orientation of the SiC single crystal.
  • the mark 54 may include either or both of an orientation flat and an orientation notch.
  • the orientation flat consists of a cutout that is cut in a straight line in a plan view.
  • the orientation notch consists of a cutout that is cut in a concave shape (e.g., a tapered shape) toward the center of the first wafer main surface 51 in a plan view.
  • a plurality of device regions 55 and a plurality of cutting lines 56 are set on the wafer 50 by alignment marks or the like.
  • Each device region 55 corresponds to the SiC semiconductor device 1A.
  • Each of the plurality of device regions 55 is set to have a rectangular shape in a plan view.
  • FIG. 33 is a flowchart showing an example of a method for manufacturing a SiC semiconductor device 1A.
  • FIGS. 34A to 34H are cross-sectional perspective views showing an example of a method for manufacturing a SiC semiconductor device 1A.
  • FIGS. 35A to 35B are schematic diagrams for explaining the crystal orientation measurement process.
  • FIGS. 36A to 36B are schematic diagrams for explaining the ion implantation process.
  • FIGS. 34A to 34H show cross-sectional perspective views of a portion of an active region 10 of one device region 55.
  • step S1 in FIG. 33 the aforementioned wafer 50 preparation process is performed (step S1 in FIG. 33).
  • a determination process is performed as to whether or not an n-type buffer layer 26 (see FIG. 24 and FIG. 25) formation process is performed (step S2 in FIG. 33). If a buffer layer 26 is to be formed (step S2 in FIG. 33: YES), the buffer layer 26 is formed starting from the first wafer main surface 51 (wafer 50) by epitaxial growth (step S3 in FIG. 33). If a buffer layer 26 formation process is not performed (step S2 in FIG. 33: NO), this process is omitted.
  • a step of forming an n-type first layer 8 is performed (step S4 in FIG. 33). If the step of forming the buffer layer 26 is omitted, the first layer 8 is formed starting from the first wafer main surface 51 (wafer 50) by epitaxial growth. If the buffer layer 26 is formed, the first layer 8 is formed starting from the buffer layer 26 by epitaxial growth. In this case, the first layer 8 may be formed by continuous crystal growth from the buffer layer 26 using the step of forming the buffer layer 26 after the step of forming the buffer layer 26.
  • the crystal orientation of the first layer 8 includes a process for measuring the off angle ⁇ off of the first layer 8. In other words, this process includes a process for measuring the crystal orientation of the first axis channel CH1 of the first layer 8.
  • the wafer 50 is cut from an ingot (SiC ingot), which is a crystalline mass, but there is a risk that an error will occur in the off-angle ⁇ off due to process error. If an error occurs in the off-angle ⁇ off of the wafer 50, a process error will also occur in the off-angle ⁇ off of the first layer 8, which will become an obstacle during the channeling implantation process. Therefore, it is preferable that data (information) on the off-angle ⁇ off is obtained prior to the channeling implantation process, and the channeling implantation process is carried out based on the data (information) on the off-angle ⁇ off.
  • the crystal orientation of the first layer 8 is measured by an X-ray diffraction method (so-called ⁇ -2 ⁇ measurement method) using an X-ray diffraction device 57.
  • the X-ray diffraction device 57 may also be referred to as an "XRD (X-ray Diffraction) device.”
  • the X-ray diffraction device 57 includes an irradiation unit 58 and a detection unit 59, and performs the rocking curve measurement method.
  • the irradiation unit 58 irradiates the incident X-ray L1 having a predetermined incident angle ⁇ with respect to the upper end of the first layer 8 (the first wafer main surface 51 of the wafer 50).
  • the incident angle ⁇ is defined as the angle between the incident X-ray L1 and the upper end of the first layer 8 (the first wafer main surface 51 of the wafer 50).
  • the detector 59 is positioned at an angular position of diffraction angle 2 ⁇ ( ⁇ is the Bragg angle) relative to the irradiation position of the incident X-rays L1 on the wafer 50, and detects the diffracted X-rays L2.
  • the diffraction angle 2 ⁇ is the angle between the incident direction of the incident X-rays L1 and the diffraction direction of the diffracted X-rays L2.
  • the diffraction angle 2 ⁇ is fixed and the incident angle ⁇ is varied within a small angular range to measure a rocking curve that represents the intensity of the diffracted X-ray L2 (the intensity profile of the diffracted X-ray L2).
  • the rocking curve has the intensity of the diffracted X-ray L2 on the vertical axis and the incident angle ⁇ on the horizontal axis.
  • the incident angle ⁇ is determined as the angle position at which the intensity of the diffracted X-ray L2 reaches its peak value.
  • FIG. 35B shows the measurement points when the rocking curve measurement method is performed on multiple points (here, five points) on the upper end of the first layer 8.
  • the off angle ⁇ off of the first layer 8 is set to about 4° here.
  • the first to fifth measurement points Po1 to Po5 are shown.
  • the first measurement point Po1 is set in the center of the first layer 8.
  • the second measurement point Po2 is set on the periphery of the first layer 8 at a distance from the first measurement point Po1 to one side in the second direction Y (the opposite side from the mark 54).
  • the third measurement point Po3 is set on the periphery of the first layer 8 at a distance from the first measurement point Po1 to one side in the first direction X (to the right of the mark 54).
  • the fourth measurement point Po4 is set on the periphery of the first layer 8 at a distance from the first measurement point Po1 to the other side in the second direction Y (the side toward the mark 54).
  • the fifth measurement point Po5 is set on the periphery of the first layer 8 at a distance from the first measurement point Po1 to the other side in the first direction X (to the left of the mark 54).
  • the measurement results of the incident angle ⁇ , diffraction angle 2 ⁇ , and off angle ⁇ off at the first to fifth measurement points Po1 to Po5 are shown in the following Table 1.
  • the off angle ⁇ off is calculated using the incident angle ⁇ and diffraction angle 2 ⁇ by the formula " ⁇ -(2 ⁇ 1/2)".
  • the measurement point may be any one or more (all) of the first to fifth measurement points Po1 to Po5.
  • the measurement point may be only the first measurement point Po1.
  • the off angle ⁇ off may be measured at multiple points on the upper end of the first layer 8 (first wafer main surface 51 of the wafer 50) and an implantation angle may be set in the channeling implantation process according to the in-plane variation of the off angle ⁇ off.
  • the manufacturing man-hours manufactured costs
  • the in-plane error of the first region 14 formed in the first layer 8 is appropriately suppressed.
  • the off-angle ⁇ off of the first layer 8 is approximately equal to the off-angle ⁇ off of the wafer 50 and the off-angle ⁇ off of the buffer layer 26. Therefore, the crystal orientation measurement process may be performed on the wafer 50 or the buffer layer 26 prior to the formation process of the first layer 8. However, from the standpoint of ensuring accuracy, it is preferable that the crystal orientation measurement process be performed on the first layer 8.
  • a step of forming a first mask 60 having a predetermined pattern is carried out (step S6 in FIG. 33).
  • the first mask 60 is preferably an organic mask (resist mask).
  • the first mask 60 is disposed on the upper end of the first layer 8, and has a plurality of first openings 61 that expose areas in the first layer 8 where a plurality of first regions 14 are to be formed.
  • the multiple first openings 61 are formed at intervals in the first direction X, and are each partitioned into bands extending in the second direction Y. In other words, the multiple first openings 61 have an extension direction that extends along the off direction Doff in a planar view.
  • the process for forming a plurality of first regions 14 includes a channeling injection process of a trivalent element (p-type impurity) into the first layer 8.
  • the first layer 8 (wafer 50) has an off angle ⁇ off inclined at a predetermined angle in a predetermined off direction Doff with respect to the first wafer main surface 51.
  • the channeling injection process is carried out based on data (information) of the off angle ⁇ off.
  • a trivalent element is introduced into the first layer 8 with a predetermined implantation energy in a direction intersecting the first axial channel CH1 (off angle ⁇ off) (see also FIG. 7).
  • a trivalent element is implanted along the vertical direction Z perpendicular to the upper end of the first layer 8 (first wafer main surface 51).
  • the trivalent element is introduced along a direction in which the atomic rows are relatively dense in plan view, so the trivalent element collides with the atomic rows at a relatively shallow depth position. Therefore, the atomic rows prevent the introduction of the trivalent element into a relatively deep depth position of the first layer 8. As a result, a first region 14 that does not have a slow portion 22 is formed (see also FIG. 7).
  • the implantation angle of the trivalent element into the first layer 8 is controlled, and the trivalent element is introduced into the first layer 8 along the first axial channel CH1 (in this embodiment, the c-axis of the SiC single crystal) with a predetermined implantation energy (also refer to FIGS. 6A to 6E).
  • a predetermined implantation energy also refer to FIGS. 6A to 6E.
  • the wafer 50 may be supported horizontally and the trivalent element may be introduced into the first layer 8 along the first axial channel CH1.
  • the wafer 50 may be supported tilted by the off angle ⁇ off from the horizontal and the trivalent element may be introduced into the first layer 8 along the first axial channel CH1.
  • a plurality of first regions 14 having a predetermined thickness are formed at a predetermined depth (see also Figures 6A to 6E).
  • the implantation energy of the trivalent element may be 100 KeV or more and 2000 KeV or less.
  • the implantation energy may have a value that belongs to any one of the following ranges: 100 KeV or more and 250 KeV or less, 250 KeV or more and 500 KeV or less, 500 KeV or more and 750 KeV or less, 750 KeV or more and 1000 KeV or less, 1000 KeV or more and 1250 KeV or less, 1250 KeV or more and 1500 KeV or less, 1500 KeV or more and 1750 KeV or less, and 1750 KeV or more and 2000 KeV or less.
  • the injection temperature of the trivalent element may be adjusted in the range of 0°C to 1500°C.
  • the injection temperature may have a value that belongs to any one of the following ranges: 0°C to 25°C, 25°C to 50°C, 50°C to 100°C, 100°C to 250°C, 250°C to 500°C, 500°C to 750°C, 750°C to 1000°C, 1000°C to 1250°C, and 1250°C to 1500°C.
  • the trivalent element is introduced along the first axial channel CH1, in which the atomic rows are relatively sparse in plan view.
  • the trivalent element travels through the first axial channel CH1 while repeatedly undergoing small-angle scattering due to the channeling effect, and reaches a relatively deep position in the first layer 8.
  • the probability of the trivalent element colliding with the atomic rows of the SiC single crystal is reduced.
  • the injection temperature for the second region 15 may be approximately equal to the injection temperature for the first region 14, or may be different from the injection temperature for the first region 14.
  • the injection temperature for the second region 15 may be equal to or higher than the injection temperature for the first region 14. Also, the injection temperature for the second region 15 may be lower than the injection temperature for the first region 14.
  • the injection angle of the trivalent element is preferably set within a range of ⁇ 2° with respect to the axis along the second axial channel CH2 (in this embodiment, the c-axis of the SiC single crystal) as the reference (0°). It is particularly preferable that the injection angle of the trivalent element is set within a range of ⁇ 1° with respect to the axis along the second axial channel CH2 (in this embodiment, the c-axis of the SiC single crystal) as the reference (0°).
  • a trivalent element belonging to the heavy elements heavier than carbon is introduced into the second layer 9.
  • the trivalent element is a trivalent element other than boron (at least one of aluminum, gallium, and indium).
  • the trivalent element is aluminum.
  • the trivalent element may be electrically activated by an annealing method, and at the same time, lattice defects and the like that have occurred in the second layer 9 may be repaired.
  • the annealing temperature for the second layer 9 may be 500°C or higher and 2000°C or lower.
  • the annealing method for the multiple second regions 15 may also serve as the annealing method for the multiple first regions 14 described above. In this case, the annealing method for the multiple first regions 14 before the step of forming the second regions 15 may be omitted.
  • the thickness adjustment process may include a process of partially removing the upper end of the second layer 9 by a grinding method.
  • the grinding method may be a mechanical polishing method and/or a chemical mechanical polishing method.
  • the thinning process of the second layer 9 may include a process of partially removing the upper end of the second layer 9 by an etching method.
  • the etching method may be a wet etching method and/or a dry etching method.
  • a determination step is performed as to whether or not the top layer 30 (see also FIG. 27) formation step is performed (step S19 in FIG. 33). If the top layer 30 formation step is performed (step S19 in FIG. 33: YES), the top layer 30 is formed starting from the second layer 9 by epitaxial growth (step S20 in FIG. 33). If the top layer 30 formation step is not performed (step S19 in FIG. 33: NO), this step is omitted.
  • the MIS structure 31, multiple field regions 38, interlayer insulating film 40, gate pad 45, gate wiring 46, source pad 47, drain pad 48, etc. are formed (step S21 in FIG. 33).
  • the wafer 50 is cut along multiple cutting lines 56. In this way, multiple SiC semiconductor devices 1A are manufactured from one wafer 50.
  • the peripheral depth DO may be 0.1 ⁇ m or more and 2 ⁇ m or less.
  • the peripheral depth DO may have a value that falls within any one of the ranges of 0.1 ⁇ m or more and 0.25 ⁇ m or less, 0.25 ⁇ m or more and 0.5 ⁇ m or less, 0.5 ⁇ m or more and 0.75 ⁇ m or less, 0.75 ⁇ m or more and 1 ⁇ m or less, 1 ⁇ m or more and 1.5 ⁇ m or less, and 1.5 ⁇ m or more and 2 ⁇ m or less.
  • the peripheral depth DO is preferably 0.1 ⁇ m or more and 1.5 ⁇ m or less.
  • the first to fourth connection surfaces 73A to 73D may extend approximately vertically between the active surface 71 and the outer peripheral surface 72 so as to define a quadrangular prism-shaped active plateau 74.
  • the first to fourth connection surfaces 73A to 73D may be inclined obliquely downward from the active surface 71 toward the outer peripheral surface 72 so as to define a quadrangular pyramid-shaped active plateau 74.
  • the active plateau 74 is defined in a protruding shape in the second layer 9 on the first main surface 3.
  • the active plateau 74 is formed only in the second layer 9 and not in the first layer 8.
  • the second regions 15 are each formed within an area surrounded by the periphery of the active surface 71 (the first to fourth connection surfaces 73A to 73D) in a plan view.
  • the second regions 15 may be formed spaced apart inward from the periphery of the active surface 71 in a plan view.
  • the second regions 15 may be exposed from the first to fourth connection surfaces 73A to 73D.
  • FIG. 41 is a plan view showing a main portion of the active region 10.
  • FIG. 42 is a cross-sectional perspective view showing a gate structure 35 according to the first embodiment.
  • the SiC semiconductor device 1B includes a MIS structure 31 formed in the active region 10. The following components are described as components of the SiC semiconductor device 1B, but are also components of the MIS structure 31.
  • the SiC semiconductor device 1B includes a p-type body region 32 formed in the surface layer of the first main surface 3 (active surface 71).
  • the body region 32 is formed in a layer extending along the active surface 71.
  • the body region 32 may be formed over the entire active surface 71 and exposed from the first to fourth connection surfaces 73A to 73D.
  • the body region 32 is formed at a distance from the lower end of the second layer 9 toward the active surface 71, and overlaps a plurality of column regions 12 in the stacking direction. It is preferable that the body region 32 overlaps all of the column regions 12 in the stacking direction. It is preferable that the body region 32 is formed at a distance from the depth position of the outer peripheral surface 72 toward the active surface 71, and is exposed from the first main surface 3.
  • the body region 32 is formed in a region between the active surface 71 and the second upper ends 15b of the second regions 15. It is preferable that the body region 32 is connected to the second regions 15 (second upper ends 15b).
  • the body region 32 is composed of a random impurity region introduced into the surface layer of the second layer 9 by a random implantation method into the second layer 9 (see also FIG. 7). Therefore, the body region 32 has a thickness in the direction along the second axial channel CH2 that is less than the second region thickness TR2 of the second region 15. The thickness of the body region 32 is less than the first region thickness TR1 of the first region 14.
  • body region 32 does not have gradual portion 22 having a thickness of 0.5 ⁇ m or more, and has a concentration gradient including gradually increasing portion 20, peak portion 21, and gradually decreasing portion 23 within a range of 0.5 ⁇ m.
  • Body region 32 may have a peak value of a p-type impurity concentration of 1 ⁇ 10 15 cm ⁇ 3 or more and 1 ⁇ 10 18 cm ⁇ 3 or less.
  • the SiC semiconductor device 1B includes a plurality of trench electrode type gate structures 35 formed on the first main surface 3 (active surface 71) in the active region 10.
  • the gate structures 35 may be referred to as "trench gate structures.”
  • a gate potential is applied to the plurality of gate structures 35 as a control potential.
  • the plurality of gate structures 35 control the inversion and non-inversion of the channel (current path) in the body region 32 in response to the gate potential.
  • the SiC semiconductor device 1B includes a plurality of source regions 33 formed on both sides of a plurality of gate structures 35 in a surface layer portion of the first main surface 3 (active surface 71).
  • the plurality of source regions 33 are formed in a surface layer portion of the body region 32.
  • the plurality of source regions 33 have a higher n-type impurity concentration (peak value) than the second layer 9 (second drift region 17).
  • the plurality of source regions 33 may have an n-type impurity concentration of 1 ⁇ 10 18 cm ⁇ 3 or more and 1 ⁇ 10 21 cm ⁇ 3 or less as a peak value.
  • the bottom of the well region 78 is located closer to the lower end of the second layer 9 than the bottom wall of the gate structure 35. It is preferable that the bottom of the well region 78 is located closer to the outer circumferential surface 72 than the second lower ends 15a of the second regions 15. It is particularly preferable that the bottom of the well region 78 is located closer to the outer circumferential surface 72 than the intermediate portions of the thickness ranges of the second regions 15.
  • Well region 78 differs from second region 15 etc. in that it does not have a gradual portion 22 having a thickness of 0.5 ⁇ m or more, and has a concentration gradient in a range of 0.5 ⁇ m that includes a gradually increasing portion 20, a peak portion 21 and a gradually decreasing portion 23.
  • Well region 78 may have a peak value of a p-type impurity concentration of 1 ⁇ 10 15 cm ⁇ 3 or more and 1 ⁇ 10 18 cm ⁇ 3 or less.
  • the multiple gate wirings 46 are arranged on the active surface 71 at a distance from the outer peripheral surface 72 in a plan view.
  • the multiple gate wirings 46 include a first gate wiring 46A and a second gate wiring 46B.
  • the aforementioned interlayer insulating film 40 has a layered structure including a first insulating film 41 and a second insulating film 42.
  • the first insulating film 41 selectively covers the active surface 71, the outer peripheral surface 72, and the first to fourth connection surfaces 73A to 73D.
  • the buried electrode 77 has a multi-electrode structure (double electrode structure) including an upper electrode 83, a lower electrode 84, and an intermediate insulating film 85.
  • the upper electrode 83 is buried in the opening side of the trench 75 with an insulating film 76 in between.
  • the upper electrode 83 is buried in the opening side of the trench 75 with an upper insulating film 81 in between, and faces the body region 32 with the upper insulating film 81 in between.
  • the SiC semiconductor device 1C includes a second pad electrode 94 covering the second main surface 4.
  • the second pad electrode 94 is formed as a cathode pad.
  • the second pad electrode 94 forms an ohmic contact with the base layer 6 exposed from the second main surface 4.
  • the second pad electrode 94 is electrically connected to the first layer 8 (the multiple first drift regions 16) and the second layer 9 (the multiple second drift regions 17) via the base layer 6.
  • the multiple surface regions 95 are arranged at intervals in the m-axis direction of the SiC single crystal and extend in the a-axis direction of the SiC single crystal.
  • the extension direction of the multiple surface regions 95 coincides with the off-direction Doff of the SiC single crystal.
  • the extension direction of the multiple surface regions 95 coincides with the extension direction of the multiple column regions 12 (second regions 15).
  • the top layer 30 may be omitted.
  • the aforementioned channeling injection process (the process of injecting impurities into regions with sparse atomic rows) can also be applied to single crystals that form a cubic crystal.
  • the single crystal of the wide band gap semiconductor may be a cubic crystal or a hexagonal crystal.
  • these axial channels are formed by regions surrounded by atomic rows that are aligned along the low-index crystal axes of the cubic crystal axes.
  • a semiconductor device (1A, 1B, 1C) including a first layer (8) of a first conductivity type (n-type) including a semiconductor single crystal and having a first axial channel (CH1) along the stacking direction, a second layer (9) of a first conductivity type (n-type) including a semiconductor single crystal and having a second axial channel (CH2) along the stacking direction and stacked on the first layer (8), a first region (14) of a second conductivity type (p-type) extending along the first axial channel (CH1) in the first layer (8), and a second region (15) of a second conductivity type (p-type) extending along the second axial channel (CH2) in the second layer (9) and overlapping the first region (14) in the stacking direction.
  • p-type second conductivity type
  • first axis channel (CH1) has a first off angle ( ⁇ off) inclined toward a first off direction (Doff) with respect to a vertical axis
  • the second axis channel (CH2) has a second off angle ( ⁇ off) inclined toward a second off direction (Doff) with respect to the vertical axis.

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)
  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
PCT/JP2023/046704 2022-12-28 2023-12-26 ＳｉＣ半導体装置 Ceased WO2024143383A1 (ja)

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DE112023004899.1T DE112023004899T5 (de) 2022-12-28 2023-12-26 Sic-halbleiterbauelement
US19/245,480 US20250324691A1 (en) 2022-12-28 2025-06-23 Sic semiconductor device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014158045A (ja) * 2014-04-23 2014-08-28 Fuji Electric Co Ltd 超接合半導体装置の製造方法
JP2015192028A (ja) * 2014-03-28 2015-11-02 国立研究開発法人産業技術総合研究所 炭化珪素半導体装置およびその製造方法
JP2018206923A (ja) * 2017-06-02 2018-12-27 富士電機株式会社 絶縁ゲート型半導体装置及びその製造方法
JP2020087956A (ja) * 2018-11-15 2020-06-04 トヨタ自動車株式会社 スイッチング素子
JP2020150182A (ja) * 2019-03-14 2020-09-17 富士電機株式会社 超接合炭化珪素半導体装置および超接合炭化珪素半導体装置の製造方法
JP2022090527A (ja) * 2020-12-07 2022-06-17 株式会社デンソー 電界効果トランジスタの製造方法
WO2022163082A1 (ja) * 2021-02-01 2022-08-04 ローム株式会社 ＳｉＣ半導体装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015192028A (ja) * 2014-03-28 2015-11-02 国立研究開発法人産業技術総合研究所 炭化珪素半導体装置およびその製造方法
JP2014158045A (ja) * 2014-04-23 2014-08-28 Fuji Electric Co Ltd 超接合半導体装置の製造方法
JP2018206923A (ja) * 2017-06-02 2018-12-27 富士電機株式会社 絶縁ゲート型半導体装置及びその製造方法
JP2020087956A (ja) * 2018-11-15 2020-06-04 トヨタ自動車株式会社 スイッチング素子
JP2020150182A (ja) * 2019-03-14 2020-09-17 富士電機株式会社 超接合炭化珪素半導体装置および超接合炭化珪素半導体装置の製造方法
JP2022090527A (ja) * 2020-12-07 2022-06-17 株式会社デンソー 電界効果トランジスタの製造方法
WO2022163082A1 (ja) * 2021-02-01 2022-08-04 ローム株式会社 ＳｉＣ半導体装置

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