WO2024141888A1 - 半導体装置、および表示装置 - Google Patents

半導体装置、および表示装置 Download PDF

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Publication number
WO2024141888A1
WO2024141888A1 PCT/IB2023/063067 IB2023063067W WO2024141888A1 WO 2024141888 A1 WO2024141888 A1 WO 2024141888A1 IB 2023063067 W IB2023063067 W IB 2023063067W WO 2024141888 A1 WO2024141888 A1 WO 2024141888A1
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WIPO (PCT)
Prior art keywords
transistor
wiring
potential
electrically connected
source
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Ceased
Application number
PCT/IB2023/063067
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English (en)
French (fr)
Japanese (ja)
Inventor
川島進
宍戸英明
楠紘慈
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to KR1020257021974A priority Critical patent/KR20250132475A/ko
Priority to JP2024566919A priority patent/JPWO2024141888A1/ja
Priority to CN202380086525.9A priority patent/CN120359707A/zh
Publication of WO2024141888A1 publication Critical patent/WO2024141888A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements

Definitions

  • One aspect of the present invention relates to a semiconductor device and a display device.
  • At least a part of the semiconductor layer may be provided inside an opening formed in the insulating layer.
  • the transistors (transistors M11 to M19) constituting the semiconductor device 60 are enhancement type (normally off type) n-channel transistors unless otherwise specified. Therefore, the threshold voltage is assumed to be greater than 0 V.
  • the OS transistor has a characteristic of having an extremely small off-state current because the band gap of the oxide semiconductor in which the channel is formed is 2 eV or more.
  • the off-state current value of the OS transistor per 1 ⁇ m of channel width at room temperature can be 1 aA (1 ⁇ 10 ⁇ 18 A) or less, 1 zA (1 ⁇ 10 ⁇ 21 A) or less, or 1 yA (1 ⁇ 10 ⁇ 24 A) or less.
  • the off-state current value of a Si transistor (a transistor containing silicon in a channel formation region) per 1 ⁇ m of channel width at room temperature is 1 fA (1 ⁇ 10 ⁇ 15 A) or more and 1 pA (1 ⁇ 10 ⁇ 12 A) or less. Therefore, it can be said that the off-state current of an OS transistor is about 10 orders of magnitude smaller than that of a Si transistor.
  • the potential of the wiring OUT11 can be maintained for a long period of time.
  • the potential H is higher than the potential L.
  • the difference between the potential H and the potential L is greater than the threshold voltage of the transistor.
  • the potential H is a potential that, when input to the gate of a transistor constituting the semiconductor device 60, causes the transistor to be in an on state (conductive state).
  • the potential L is a potential that, when input to the gate of a transistor constituting the semiconductor device 60, causes the transistor to be in an off state (non-conductive state).
  • the threshold voltages of the transistors constituting the semiconductor device 60 are all the same value (voltage Vth).
  • the potential of wiring VL15 is "potential Vin - voltage Vth".
  • the timing chart shown in FIG. 2A shows the potential (potential H or potential L) applied to each of wiring SW11, wiring SW12, wiring SW13, wiring SW14, and wiring SW15 during each period of operation (periods T61 to T63).
  • a rise time and a fall time may occur due to, for example, a load (parasitic capacitance and parasitic resistance) such as a wiring.
  • the time is, for example, more than 0 seconds and less than 1000 nanoseconds, less than 100 nanoseconds, less than 10 nanoseconds, or less than 1 nanosecond.
  • the potential H or potential L applied to each of the multiple wirings does not have to be the same potential for each wiring.
  • the potential may be different for each wiring.
  • the input unit 62 acquires a voltage for correcting the threshold voltage of the transistor M11 in the transmission unit 61, and performs an operation (correction operation) of storing the voltage in the capacitance C11.
  • the generation unit 64 generates a potential according to the potential of the wiring IN11, and performs an operation (precharge operation) of providing the potential to the wiring OUT11 via the output unit 63.
  • an operation (input operation) is performed to input the potential of the wiring IN11 to the transmission unit 61 via the input unit 62.
  • an operation (output operation) is performed to provide the potential output from the transmission unit 61 to the wiring OUT11 via the output unit 63.
  • the transmission unit 61 can output a potential that is not dependent on the threshold voltage. This makes it possible to improve the display quality of a display device having the semiconductor device 60.
  • the correction operation is started. Specifically, a potential H is applied to the wiring SW12 and the wiring SW13. Then, the transistors M14 and M15 are turned on. Therefore, the potential of the gate of the transistor M11 becomes “potential Vpre", and the potential of one of the source or drain of the transistor M11 becomes “potential Vpre-voltage Vth". That is, the potential of one terminal of the capacitor C11 becomes “potential Vpre-voltage Vth", and the potential of the other terminal of the capacitor C11 becomes “potential Vpre”. That is, a state is created in which "voltage Vth", which is the threshold voltage of the transistor M11, is applied between the pair of terminals of the capacitor C11.
  • the input operation is terminated. Specifically, a potential L is applied to the wiring SW11. Then, the transistor M13 is turned off. Therefore, the state in which the potential of the gate of the transistor M11 is "potential Vin + voltage Vth" and the potential of either the source or the drain is “potential Vin” is maintained. Note that the precharge operation is continued.
  • a precharge operation is performed before an output operation is performed, and a correction operation and an input operation are performed during the period in which the precharge operation is performed. Therefore, it is possible to achieve both improved display quality and improved operating speed of a display device having the semiconductor device 60.
  • Figure 2B is a timing chart illustrating another example of the operation of the semiconductor device 60.
  • the timing chart shown in Figure 2B differs from the timing chart shown in Figure 2A in that the potential applied to the wiring SW15 changes at the same timing as the potential applied to the wiring SW12 and wiring SW13.
  • the timing chart shown in Figure 2B is an example of an operation in which a correction operation is performed during the period in which a precharge operation is performed, and an input operation is performed during the period from when the precharge operation is stopped to when an output operation is started.
  • the generation unit 64b has a function of providing the potential of the wiring VL61 to the wiring VL15 when the potential of the wiring IN11 is lower than the potential of the wiring VL62.
  • a general comparator circuit configuration can be used as the comparator unit 66. For example, it may be configured using both n-channel transistors and p-channel transistors, or it may be configured using only n-channel transistors or only p-channel transistors.
  • FIG. 7B is a circuit diagram illustrating generation unit 64c, which is another example of the configuration of generation unit 64.
  • Generation unit 64c is configured by combining generation units 64a and 64b.
  • Generation unit 64c has a function of providing a potential corresponding to the potential of wiring IN11 to wiring VL15 when the potential of wiring IN11 is lower than the potential of wiring VL62.
  • FIG. 7C is a circuit diagram illustrating generation unit 64d, which is another configuration example of generation unit 64.
  • Generation unit 64d has a comparator unit 66 and an AND operation unit 67.
  • the inverting input terminal of comparator unit 66 is electrically connected to wiring IN11.
  • the non-inverting input terminal of comparator unit 66 is electrically connected to wiring VL62.
  • the output terminal of comparator unit 66 is electrically connected to one input terminal of AND operation unit 67.
  • the other input terminal of AND operation unit 67 is electrically connected to wiring SW61.
  • the output terminal of AND operation unit 67 is electrically connected to wiring SW15.
  • Figure 7F is a circuit diagram illustrating buffer unit 65c, which is another configuration example of buffer unit 65.
  • Buffer unit 65c has transistor M1C in addition to buffer unit 65a.
  • One of the source or drain of transistor M1C is electrically connected to the other of the source or drain of transistor M18.
  • the other of the source or drain of transistor M1C is electrically connected to wiring VL16.
  • the gate of transistor M1C is electrically connected to wiring SW1C.
  • Transistor M1C has a function (function as a switch) of making the other of the source or drain of transistor M18 conductive or non-conductive to wiring VL16 depending on the potential of wiring SW1C.
  • the present invention is not limited to this, and for example, the transistor M1C may be provided between the other of the source or drain of the transistor M19 and the wiring VL17.
  • the potential applied to wiring SW1C may be, for example, the same as the potential applied to wiring SW15. That is, when transistor M17 is conductive, transistor M1C is also conductive, and when transistor M17 is non-conductive, transistor M1C is also non-conductive. With this configuration, current is supplied to transistors M18 and M19 only during the period when the potential of wiring VL15 is transmitted to wiring OUT11, and the supply of current is stopped outside this period. This allows power consumption to be reduced.
  • one aspect of the present invention is not limited to the configuration of the semiconductor device 60 described above.
  • One aspect of the present invention may be configured, for example, such that the generation unit 64 is provided outside the semiconductor device 60.
  • Example of the configuration of the display device> 8A to 8E are block diagrams illustrating configuration examples of a display device according to one embodiment of the present invention.
  • the display device 40 has a display section 42, a first drive circuit section 43, and a second drive circuit section 44.
  • the display section 42 has a plurality of pixels 41 arranged in a matrix of m rows and n columns (m and n are each an integer of 2 or more).
  • the pixel 41 arranged in the first row and first column is indicated as pixel 41[1,1]
  • the pixel 41 arranged in the first row and n column is indicated as pixel 41[1,n]
  • the pixel 41 arranged in the mth row and first column is indicated as pixel 41[m,1]
  • the pixel 41 arranged in the mth row and nth column is indicated as pixel 41[m,n].
  • the pixel 41 arranged in the uth row and vth column (u is an integer of 1 to m, v is an integer of 1 to n) may be indicated as pixel 41[u,v].
  • the circuit included in the first drive circuit unit 43 functions, for example, as a scanning line drive circuit (sometimes called a gate line drive circuit, gate driver, scan driver, or row driver).
  • a scanning line drive circuit sometimes called a gate line drive circuit, gate driver, scan driver, or row driver.
  • a configuration can be used in which a current to be passed through the light-emitting element is output to a monitor line.
  • the current output to the monitor line can be converted to an analog voltage (current-voltage conversion) or a digital signal (analog-digital conversion) in the second drive circuit unit 44, for example, and output to the outside of the display device 40.
  • analog voltage or digital signal for example, correction of image data (also called external correction) can be performed outside the display device.
  • the peripheral driving circuit can be configured using various element circuits.
  • the element circuits include a shift register circuit, a flip-flop circuit, a latch circuit, a buffer circuit, an inverter circuit, and a level shifter circuit.
  • the element circuits include a multiplexer circuit, a demultiplexer circuit, a source follower circuit, a source-grounded amplifier circuit, a sample-and-hold circuit, and a switch circuit (e.g., a transmission gate, an analog switch, etc.).
  • Si transistors may be used as some or all of the transistors constituting the peripheral driver circuit.
  • OS transistors and Si transistors may be used.
  • Si transistors have a faster operating speed than OS transistors.
  • a CMOS circuit for example, a circuit that operates complementarily, a CMOS logic gate, or a CMOS logic circuit, etc.
  • the first drive circuit unit 43L and the first drive circuit unit 43R can be configured to be disposed facing each other with the display unit 42 in between.
  • the display device 40B shown in FIG. 8C shows an example configuration having m wirings 45L whose potentials are controlled by a circuit included in the first drive circuit unit 43L, and m wirings 45R whose potentials are controlled by a circuit included in the first drive circuit unit 43R.
  • the potentials of one wiring 45L and one wiring 45R are each provided to n pixels 41 arranged in the row direction.
  • one embodiment of the present invention may be configured such that, in addition to the display device 40 having the various configurations described above, a sensor unit is provided so as to overlap the display unit 42 when viewed from above.
  • the sensor unit can have the function of, for example, a touch sensor, a near-touch sensor, or a fingerprint sensor. These sensors can be, for example, capacitive or optical.
  • the semiconductor device 20A has a pixel circuit 31A and a light-emitting element 32.
  • the pixel circuit 31A has a transistor M1, a transistor M2, a transistor M3, a transistor M4, a transistor M5, a transistor M6, a capacitance C1, and a capacitance C2.
  • the gate of transistor M2 is electrically connected to one terminal of capacitance C1.
  • One of the source and drain of transistor M2 is electrically connected to the other terminal of capacitance C1.
  • the other of the source and drain of transistor M2 is electrically connected to wiring 21.
  • Transistor M2 also has a backgate. The backgate of transistor M2 is electrically connected to one terminal of capacitance C2. The other terminal of capacitance C2 is electrically connected to one of the source and drain of transistor M2.
  • the gate of transistor M3 is electrically connected to wiring GLb.
  • One of the source and drain of transistor M3 is electrically connected to one terminal of capacitance C1.
  • the other of the source and drain of transistor M3 is electrically connected to the other terminal of capacitance C1.
  • Transistor M3 has a function (function as a switch) of establishing a conductive state or a non-conductive state between the gate of transistor M2 and one of the source and drain of transistor M2.
  • the gate of transistor M6 is electrically connected to wiring GLa.
  • One of the source or drain of transistor M6 is electrically connected to one of the source or drain of transistor M2.
  • the other of the source or drain of transistor M6 is electrically connected to wiring 23.
  • Transistor M6 has a function (function as a switch) of bringing one of the source or drain of transistor M2 into a conductive or non-conductive state with wiring 23.
  • Transistor M2 can change its drain current depending on the potential applied to its gate.
  • transistor M2 has the function of controlling the amount of current flowing through light-emitting element 32.
  • transistor M2 has the function of controlling the light-emitting intensity of light-emitting element 32.
  • a transistor having a function similar to that of transistor M2 may be referred to as a "drive transistor.”
  • node ND2 The region where the backgate of transistor M2, one of the source or drain of transistor M4, and one terminal of capacitance C2 are electrically connected to each other is sometimes referred to as node ND2.
  • the pixel arrangement can be changed from a pentile arrangement to a stripe arrangement without lowering the resolution of the display device.
  • the charge stored in each of the capacitors C1 and C2 can be held for a long period of time.
  • the potential applied to the back gate of the drive transistor can be maintained for a long period of time. Therefore, even if the operation to correct the threshold voltage of the drive transistor is performed not every frame but, for example, once every few frames or once every few seconds, the display quality of the display device can be improved.
  • Figure 10 is a timing chart illustrating an example of the operation of semiconductor device 20A.
  • a data potential Vdata is applied to the wiring DL.
  • a potential Va is applied to the wiring 21
  • a potential Vc is applied to the wiring 22
  • a potential V0 is applied to the wiring 23
  • a potential V1 is applied to the wiring 24.
  • a potential H or a potential L is applied to each of the wirings GLa, GLb, and GLc.
  • the potential H is higher than the potential L.
  • the difference between the potential H and the potential L is larger than the threshold voltage of the transistor.
  • the potential H is a potential that is input to the gate of a transistor constituting the semiconductor device 20A, thereby turning the transistor on (conducting).
  • the potential L is a potential that is input to the gate of a transistor constituting the semiconductor device 20A, thereby turning the transistor off (non-conducting).
  • each period may be illustrated as having the same length, but the length of each period may be different.
  • each period (periods T11 to T16) is illustrated as having the same length for ease of explanation, but the length of each period may be different.
  • period T11 a reset (initialization) operation is performed. Specifically, a potential H is applied to the wiring GLb. Then, the transistors M3 and M4 are turned on.
  • the potential of node ND1 becomes potential Ve0. Furthermore, the potential of node ND3 also becomes potential Ve0 via transistor M3.
  • potential Ve0 is a potential that is higher than potential Vc by the amount of the voltage drop in light-emitting element 32.
  • potential V1 is applied to node ND2 via transistor M4. It is assumed that transistor M2 is normally on when "potential V1-potential Ve0" is applied as the backgate voltage of transistor M2.
  • period T12 a potential L is applied to the wiring GLc. Then, the transistor M5 is turned off.
  • the back gate voltage of the transistor M2 is "potential V1-potential Ve0", so the transistor M2 is normally on. Therefore, charge is supplied to the node ND1 from the wiring 21 via the transistor M2. Therefore, the potential of the node ND1 increases over time. Also, because the transistor M3 is on, the potential of the node ND3 similarly increases. Here, as the potential of the node ND1 gradually increases, the back gate voltage of the transistor M2 gradually decreases. That is, the threshold voltage of the transistor M2 gradually increases (also called a plus shift). Then, when the threshold voltage of the transistor M2 approaches 0V, the transistor M2 is turned off, and the increase in the potential of the node ND1 stops.
  • the back gate voltage at which the threshold voltage of the transistor M2 becomes 0V is set to the correction voltage Vb. That is, when the increase in the potential of the node ND1 stops, the potential of the node ND1 becomes "potential V1-correction voltage Vb".
  • nodes ND2 and ND3 are in a floating state, and the charges of the respective nodes are retained. In other words, the state in which the correction voltage Vb obtained during period T12 is applied as the backgate voltage of transistor M2 is maintained.
  • period T14 a potential H is applied to the wiring GLa. Then, the transistors M1 and M6 are turned on.
  • the data potential Vdata is applied to node ND3, and the potential V0 is applied to node ND1.
  • data potential Vdata - potential V0 is applied as the gate voltage of transistor M2.
  • node ND2 is in a floating state, and nodes ND1 and ND2 are capacitively coupled via capacitance C2. Therefore, when the potential of node ND1 changes to potential V0, the potential of node ND2 also changes to "potential V0 + correction voltage Vb."
  • correction voltage Vb is applied as the backgate voltage of transistor M2, and data potential Vdata can be written while maintaining the state in which the threshold voltage of transistor M2 is corrected to 0V.
  • a potential L is applied to the wiring GLa. Then, the transistors M1 and M6 are turned off.
  • node ND3 is in a floating state, and the charge at node ND3 is retained.
  • charge is supplied to node ND1 from wiring 21 via transistor M2, so that the potential at node ND1 gradually increases.
  • node ND3 is floating, and nodes ND1 and ND3 are capacitively coupled via capacitance C1. Therefore, the potential of node ND3 also rises following the rise in the potential of node ND1. In other words, a state in which "data potential Vdata-potential V0" is applied as the gate voltage of transistor M2 is maintained.
  • node ND2 is floating, and nodes ND1 and ND2 are capacitively coupled via capacitance C2. Therefore, the potential of node ND2 also rises following the rise in the potential of node ND1. In other words, a state in which correction voltage Vb is applied as the backgate voltage of transistor M2 is maintained.
  • period T16 a potential H is applied to the wiring GLc. Then, the transistor M5 is turned on.
  • a current flows from wiring 21 to wiring 22 via transistor M2, transistor M5, and light-emitting element 32. That is, current Ie flows through light-emitting element 32, and light-emitting element 32 emits light with a light-emitting intensity according to current Ie.
  • the threshold voltage of the transistor M2 can be corrected to 0 V by performing the above-described threshold voltage correction operation (periods T11 to T13).
  • the state in which the threshold voltage of the transistor M2 is corrected to 0 V i.e., the state in which the correction voltage Vb is applied as the backgate voltage of the transistor M2 can be maintained for a long period of time.
  • the frequency of performing the above-described threshold voltage correction operation (periods T11 to T13) can be made lower than the frequency of performing the data write operation and the light-emitting operation (periods T14 to T16).
  • the threshold voltage of the transistor M2 can be maintained in a state where it is corrected to 0 V. Therefore, in a display device using the semiconductor device, it is possible to improve the display quality and reduce the power consumption.
  • Figure 12 is a circuit diagram illustrating semiconductor device 20C, which is a modified example of semiconductor device 20A.
  • Semiconductor device 20C has pixel circuit 31C instead of pixel circuit 31A.
  • Pixel circuit 31C differs from pixel circuit 31A in that it does not have transistor M6.
  • transistor M5 is made conductive so that the potential of node ND1 is increased by an amount corresponding to the voltage drop in light-emitting element 32.
  • Semiconductor device 20C does not further need to have wiring 23. This makes it possible to reduce the area occupied by pixel circuit 31C.
  • Figure 13 is a circuit diagram illustrating a semiconductor device 20D, which is a modified example of the semiconductor device 20A.
  • the semiconductor device 20D has a pixel circuit 31D instead of the pixel circuit 31A.
  • the pixel circuit 31D differs from the pixel circuit 31A in that it does not have a transistor M5. Therefore, one of the source and drain of the transistor M2 is electrically connected to one terminal of the light-emitting element 32.
  • a potential Va may be applied to the wiring 22 to prevent current from flowing through the light-emitting element 32.
  • the semiconductor device 20D does not further have to have the wiring GLc. Therefore, the area occupied by the pixel circuit 31D can be reduced.
  • Figure 14 is a circuit diagram illustrating semiconductor device 20E, which is a modified example of semiconductor device 20D.
  • Semiconductor device 20E has pixel circuit 31E instead of pixel circuit 31D.
  • Pixel circuit 31E differs from pixel circuit 31D in that it does not have transistor M3, transistor M4, or capacitance C2.
  • transistor M2 does not need to have a back gate.
  • pixel circuit 31E does not have an internal correction circuit.
  • Semiconductor device 20E also does not need to have wiring GLb and wiring 24. This makes it possible to reduce the area occupied by pixel circuit 31E.
  • node ND4 The region where one of the source or drain of transistor M1, the other of the source or drain of transistor M8, and one terminal of capacitance C3 are electrically connected to each other is sometimes referred to as node ND4.
  • Capacitor C3 has the function of holding the potential difference (voltage) between one of the source or drain of transistor M2 and one of the source or drain of transistor M1, for example, when node ND4 is in a floating state.
  • a potential L is applied to the wiring GLa and the wiring GLb, and a potential H is applied to the wiring GLc. Then, a potential H is applied to the wiring GLa. Then, a potential L is applied to the wiring GLc. Then, a potential L is applied to the wiring GLa. Then, a potential H is applied to the wiring GLb and the wiring GLc.
  • the gate of transistor M9 is electrically connected to wiring 26.
  • One of the source and drain of transistor M9 is electrically connected to the gate of transistor M5.
  • the other of the source and drain of transistor M9 is electrically connected to wiring GLc.
  • node ND5 The region where the gate of transistor M5, one of the source or drain of transistor M9, and one terminal of capacitor C4 are electrically connected to each other is sometimes referred to as node ND5.
  • Capacitor C4 has the function of holding the potential difference (voltage) between the other of the source or drain of transistor M5 and the gate of transistor M5, for example, when node ND5 is in a floating state.
  • Figure 17 is a circuit diagram illustrating semiconductor device 20H, which is a modified example of semiconductor device 20F.
  • Semiconductor device 20H has pixel circuit 31H instead of pixel circuit 31F.
  • pixel circuit 31H further has transistor M9 and capacitance C4.
  • pixel circuit 31H is configured by combining the internal correction circuit of pixel circuit 31F and the bootstrap capacitance of pixel circuit 31G.
  • Figure 18 is a circuit diagram illustrating the semiconductor device 20I.
  • the semiconductor device 20I has a pixel circuit 31I and a liquid crystal element 33.
  • the pixel circuit 31I has a transistor M1 and a capacitance C5.
  • the pixel circuit 31I has a transistor M1 and a capacitance C5.
  • the gate of the transistor M1 is electrically connected to the wiring GLa.
  • One of the source and the drain of the transistor M1 is electrically connected to one terminal of the liquid crystal element 33.
  • the other of the source and the drain of the transistor M1 is electrically connected to the wiring DL.
  • the transistor M1 has a function (a function as a switch) of bringing one terminal of the capacitor C5 and the wiring DL into a conductive or non-conductive state.
  • node ND6 The region where one of the source or drain of transistor M1, one terminal of capacitor C5, and one terminal of liquid crystal element 33 are electrically connected to each other is sometimes referred to as node ND6.
  • Capacitor C5 has the function of holding the potential difference between a pair of terminals of liquid crystal element 33, for example, when node ND6 is in a floating state.
  • [Shift Register] 19A to 19E and 20A to 20E are circuit diagrams illustrating examples of the configuration of a semiconductor device that can be used in a peripheral driving circuit.
  • the semiconductor device can be used, for example, as a part of a gate driver. Also, for example, the semiconductor device can be used as a part of a shift register.
  • the semiconductor device 70A shown in FIG. 19A has m register units 71 and m buffer units 72.
  • the semiconductor device 70A is electrically connected to m wirings GLa and m wirings GLb.
  • the m register units 71 are electrically connected to each other through m wirings SR.
  • FIG. 19A a part of the semiconductor device 70A is excerpted, and the register units 71_u to 71_u+2, the buffer units 72_u to 72_u+2, the wirings SR_u-1 to SR_u+4, the wirings GLa_u to GLa_u+2, and the wirings GLb_u to GLb_u+2 are illustrated.
  • m is an integer of 2 or more, and corresponds to the number m of rows of the pixels 41 arranged in a matrix in the display device 40 described above.
  • u is an integer of 1 to m.
  • Figure 19B is a circuit diagram for explaining an example of the configuration of the register unit 71 and the buffer unit 72.
  • Figure 19C is a circuit block corresponding to the register unit 71 and the buffer unit 72.
  • the register unit 71 can be applied to each of the register units 71_1 to 71_m.
  • the buffer unit 72 can be applied to each of the buffer units 72_1 to 72_m. That is, for example, in the register unit 71_u, the wiring IN21 is electrically connected to the wiring SR_u-1, the wiring IN22 is electrically connected to the wiring SR_u+2, and the wiring OUT21 is electrically connected to the wiring SR_u.
  • the wiring OUT31 is electrically connected to the wiring GLa_u
  • the wiring OUT32 is electrically connected to the wiring GLb_u.
  • the wiring IN21, the wiring IN31, the wiring IN32, the wiring VLD, and the wiring VLS are omitted from the illustration.
  • the buffer unit 72 shown in FIG. 19B includes transistors M31, M32, M33, and M34.
  • the transistor M31 has a function of bringing the wiring IN31 and the wiring OUT31 into a conductive state or a non-conductive state depending on the potential of the wiring NL21.
  • the transistor M32 has a function of bringing the wiring IN32 and the wiring OUT32 into a conductive state or a non-conductive state depending on the potential of the wiring NL21.
  • the transistor M33 has a function of bringing the wiring VLS and the wiring OUT31 into a conductive state or a non-conductive state depending on the potential of the wiring NL22.
  • the transistor M34 has a function of bringing the wiring VLS and the wiring OUT32 into a conductive state or a non-conductive state depending on the potential of the wiring NL22.
  • Figure 19E is a circuit diagram illustrating a modified example of the register unit 71 and the buffer unit 72.
  • the register unit 71a and the buffer unit 72a shown in Figure 19E differ from the register unit 71 and the buffer unit 72 in that they have a bootstrap circuit. That is, the register unit 71a has a transistor M27 and a capacitance C21 in addition to the register unit 71, and the buffer unit 72a has a transistor M35, a transistor M36, a capacitance C31, and a capacitance C32 in addition to the buffer unit 72. Note that the capacitances C21, C31, and C32 are sometimes referred to as bootstrap capacitances.
  • the gate of transistor M36 is electrically connected to the wiring VLD.
  • the gate of transistor M32 is electrically connected to the wiring NL21 via the source and drain of transistor M36.
  • the gate of transistor M32 is electrically connected to the wiring OUT32 via the capacitance C32.
  • the transistor M25 when the transistor M25 transmits the potential H from the wiring IN23 to the wiring OUT21, a drop in potential occurs due to the threshold voltage. Therefore, by adopting a bootstrap circuit as in the register unit 71a, the transistor M25 can be maintained in the on state by capacitive coupling due to the bootstrap capacitance. Therefore, the potential H can be transmitted to the wiring OUT21 without a drop in potential due to the threshold voltage.
  • the buffer unit 72 when the transistor M31 transmits the potential H from the wiring IN31 to the wiring OUT31, a potential drop occurs due to the threshold voltage, and when the transistor M32 transmits the potential H from the wiring IN32 to the wiring OUT32, a potential drop occurs due to the threshold voltage. Therefore, by employing a bootstrap circuit as in the buffer unit 72a, the on state can be maintained in each of the transistors M31 and M32 by capacitive coupling due to the bootstrap capacitance. Therefore, the potential H can be transmitted to each of the wirings OUT31 and OUT32 without a potential drop due to the threshold voltage.
  • the gate of transistor M45 is electrically connected to the wiring VLD.
  • the gate of transistor M43 is electrically connected to the wiring NL41 via the source and drain of transistor M45.
  • the gate of transistor M43 is electrically connected to the wiring OUT41 via the capacitance C41.
  • the semiconductor device 70A and the semiconductor device 70B can be used in the display device 40.
  • the semiconductor device 70A and the semiconductor device 70B can be used as part of a gate driver in the display device 40.
  • the wirings GLa_1 to GLa_m correspond to the wiring GLa in the case where the semiconductor device 20A is used for the pixel 41 in each of the pixels 41 arranged in the mth row.
  • the wirings GLb_1 to GLb_m correspond to the wiring GLb
  • the wirings GLc_1 to GLc_m correspond to the wiring GLc.
  • the selector unit 81 has a function of transmitting the potential of the wiring IN51 to either the wiring OUT51 or the wiring OUT52 depending on the potential of the wiring SW51 and the potential of the wiring SW52.
  • the selector unit 81 can be said to have one input (wiring IN51) and two outputs (wiring OUT51 and wiring OUT52).
  • the present invention is not limited to this and may be configured to have three or more outputs.
  • a source driver IC with n/3 outputs can be used.
  • the semiconductor device 90 shown in FIG. 22 has a shift register section 90A, a latch section 90B, a latch section 90C, and a source follower section 90D.
  • the shift register unit 90A is electrically connected to a plurality of wirings CLK, a plurality of wirings PWC, and a wiring SP.
  • the shift register unit 90A is electrically connected to the latch unit 90B via n/h wirings SMP (sometimes referred to as wirings SMP[1:n/h]).
  • the latch unit 90B is electrically connected to h wirings DAT (sometimes referred to as wirings DAT[1:h]).
  • the latch unit 90B is electrically connected to the latch unit 90C via n wirings LAT1 (sometimes referred to as wirings LAT1[1:n]).
  • the latch unit 90C is electrically connected to wirings SW1 and SW2.
  • the latch unit 90C is electrically connected to the source follower unit 90D via n wirings LAT2 (sometimes referred to as wirings LAT2[1:n]).
  • the source follower unit 90D is electrically connected to the wiring SW3, the wiring SW4, the wiring SW5, and the wiring SW6.
  • the source follower unit is also electrically connected to n wirings DL (sometimes referred to as wirings DL[1:n]).
  • n is an integer of 2 or more, and corresponds to, for example, the number of columns n of the pixels 41 arranged in a matrix in the display device 40 described above.
  • h is an integer of 1 or more, and corresponds to, for example, the number of data lanes input to the second drive circuit unit 44 from outside the display device 40 in the display device 40 described above.
  • the latch unit 90B has a function of storing and holding the potential input via the wiring DAT[1:h], triggered by a signal output sequentially to the wiring SMP[1:n/h], and outputting the potential to the wiring LAT1[1:n].
  • the latch unit 90B has a function of a sample-and-hold circuit.
  • the wiring DAT[1:h] is a wiring to which a data potential corresponding to the data of the image displayed on the display device 40 is applied.
  • the latch unit 90C has a function of storing and holding the potential of the wiring LAT1[1:n] using a signal input via the wiring SW1 as a trigger, and outputting the potential to the wiring LAT2[1:n].
  • the latch unit 90C has a function of a sample-and-hold circuit.
  • the latch unit 90C may also have a function of resetting (initializing) the potential of the wiring LAT2[1:n] in response to a signal input via the wiring SW2, for example.
  • the source follower unit 90D has a function of outputting a potential corresponding to the potential of the wiring LAT2[1:n] to the wiring DL[1:n]. By lowering the output impedance, the source follower unit 90D can shorten the time during which the potential of the wiring DL[1:n] changes in response to a change in the potential of the wiring LAT2[1:n] even when the load (parasitic capacitance) of the wiring DL[1:n] is large. That is, the source follower unit 90D has an impedance conversion function.
  • the source follower unit 90D may have a function of controlling the input from the wiring LAT2[1:n] in response to signals input via each of the wiring SW3 and the wiring SW4.
  • Figure 23B is a circuit diagram for explaining a configuration example of the register unit 91.
  • Figure 23C is a circuit block corresponding to the register unit 91.
  • the register unit 91 can be applied to each of the register units 91_1 to 91_n/h. That is, for example, in the register unit 91_w, the wiring IN71 is electrically connected to the wiring SR_w-1, the wiring IN72 is electrically connected to the wiring SR_w+1, the wiring IN73 is electrically connected to one of the multiple wirings CLK, and the wiring OUT71 is electrically connected to the wiring SR_w.
  • the wiring IN7A is electrically connected to one of the multiple wirings PWC, and the wiring OUT7A is electrically connected to the wiring SMP_w.
  • the timing chart shown in FIG. 23D shows the potential (potential H or potential L) applied to each of the wirings IN71, IN72, IN73, and IN7A during each period of operation (periods T91 to T93). It also shows changes in the potential of each of the wirings NL71, NL72, OUT71, and OUT7A.
  • a potential L is applied to wiring IN71 and wiring IN72.
  • the potential of wiring NL72 is also assumed to be potential H. Therefore, potential L is applied to wiring NL71.
  • transistors M75 and M7A are each in an off state (non-conductive state), and transistors M76 and M7B are each in an on state (conductive state). Therefore, potential L is applied to wiring OUT71 and wiring OUT7A, regardless of the potentials (potential H or potential L) of wiring IN73 and wiring IN7A. Note that in the following description of the operation, unless otherwise specified, the potential of each wiring is assumed to be maintained at the potential of the previous period.
  • Figure 23E is a circuit diagram illustrating a modified example of the register unit 91.
  • the register unit 91a shown in Figure 23E differs from the register unit 91 in that it has a bootstrap circuit. That is, in addition to the register unit 91, the register unit 91a has a transistor M77 and a capacitance C71, and also has a transistor M7C and a capacitance C7A. Note that the capacitance C71 and the capacitance C7A are sometimes referred to as bootstrap capacitances.
  • the gate of transistor M77 is electrically connected to the wiring VLD.
  • the gate of transistor M75 is electrically connected to the wiring NL71 via the source and drain of transistor M77.
  • the gate of transistor M75 is electrically connected to the wiring OUT71 via the capacitance C71.
  • the gate of transistor M7C is electrically connected to the wiring VLD.
  • the gate of transistor M7A is electrically connected to the wiring NL71 via the source and drain of transistor M7C.
  • the gate of transistor M7A is electrically connected to the wiring OUT7A via the capacitance C7A.
  • the transistor M75 when the transistor M75 transmits the potential H from the wiring IN73 to the wiring OUT71, a drop in potential occurs due to the threshold voltage. Therefore, by adopting a bootstrap circuit as in the register unit 91a, the transistor M75 can be maintained in the on state by capacitive coupling due to the bootstrap capacitance. Therefore, the potential H can be transmitted to the wiring OUT71 without a drop in potential due to the threshold voltage.
  • the transistor M7A when the transistor M7A transmits the potential H from the wiring IN7A to the wiring OUT7A, a drop in potential occurs due to the threshold voltage. Therefore, by adopting a bootstrap circuit as in the register unit 91a, the transistor M7A can be maintained in the on state by capacitive coupling due to the bootstrap capacitance. Therefore, the potential H can be transmitted to the wiring OUT7A without a drop in potential due to the threshold voltage.
  • Figure 24 is a circuit diagram explaining an example of the configuration of the latch section 90B, the latch section 90C, and the source follower section 90D.
  • the latch section 90B has n latch unit sections 92.
  • the latch section 90C has n latch unit sections 93.
  • the source follower section 90D has n source follower unit sections 94.
  • a part of the latch section 90B is excerpted to show latch unit section 92_1, latch unit section 92_h, latch unit section 92_n-h+1, and latch unit section 92_n.
  • a part of the latch section 90C is excerpted to show latch unit section 93_1, latch unit section 93_h, latch unit section 93_n-h+1, and latch unit section 93_n.
  • a part of the source follower section 90D is excerpted to show the source follower unit section 94_1, the source follower unit section 94_h, the source follower unit section 94_n-h+1, and the source follower unit section 94_n.
  • a part of the wiring SMP[1:n/h] is excerpted to show the wiring SMP_1 and the wiring SMP_n/h.
  • a part of the wiring DAT[1:h] is excerpted to show the wiring DAT_1 and the wiring DAT_h.
  • a part of the wiring LAT1[1:n] is excerpted to show the wiring LAT1_1, the wiring LAT1_h, the wiring LAT1_n-h+1, and the wiring LAT1_n.
  • a part of the wiring LAT2[1:n] is excerpted to show the wiring LAT2_1, the wiring LAT2_h, the wiring LAT2_n-h+1, and the wiring LAT2_n.
  • a part of the wiring DL[1:n] is excerpted to show the wiring DL_1, the wiring DL_h, the wiring DL_n-h+1, and the wiring DL_n.
  • the n latch unit parts 92 are each electrically connected to n wirings LAT1. Also, the h latch unit parts 92 are electrically connected together to any one of the n/h wirings SMP. Also, each of the h latch unit parts 92 is electrically connected to h wirings DAT.
  • the latch unit part 92_1 is electrically connected to the wiring LAT1_1
  • the latch unit part 92_h is electrically connected to the wiring LAT1_h
  • the latch unit part 92_n-h+1 is electrically connected to the wiring LAT1_n-h+1
  • the latch unit part 92_n is electrically connected to the wiring LAT1_n.
  • latch unit part 92_1 and the latch unit part 92_h are electrically connected to the wiring SMP_1, and the latch unit part 92_n-h+1 and the latch unit part 92_n are electrically connected to the wiring SMP_n/h.
  • latch unit portion 92_1 and latch unit portion 92_n-h+1 are electrically connected to wiring DAT_1
  • latch unit portion 92_h and latch unit portion 92_n are electrically connected to wiring DAT_h.
  • the n latch unit parts 93 are each electrically connected to n wirings LAT1 and n wirings LAT2. They are also electrically connected to wirings SW1 and SW2.
  • the latch unit part 93_1 is electrically connected to wirings LAT1_1, LAT2_1, SW1, and SW2
  • the latch unit part 93_h is electrically connected to wirings LAT1_h, LAT2_h, SW1, and SW2
  • the latch unit part 93_n-h+1 is electrically connected to wirings LAT1_n-h+1, LAT2_n-h+1, SW1, and SW2
  • the latch unit part 93_n is electrically connected to wirings LAT1_n, LAT2_n, SW1, and SW2.
  • the n source follower unit sections 94 are each electrically connected to n wirings LAT2 and n wirings DL. They are also electrically connected to wirings SW3, SW4, SW5, and SW6.
  • the source follower unit section 94_1 is electrically connected to the wiring LAT2_1, the wiring DL_1, the wiring SW3, the wiring SW4, the wiring SW5, and the wiring SW6,
  • the source follower unit section 94_h is electrically connected to the wiring LAT2_h, the wiring DL_h, the wiring SW3, the wiring SW4, the wiring SW5, and the wiring SW6,
  • the source follower unit section 94_n-h+1 is electrically connected to the wiring LAT2_n-h+1, the wiring DL_n-h+1, the wiring SW3, the wiring SW4, the wiring SW5, and the wiring SW6, and the source follower unit section 94_n is electrically connected to the wiring LAT2_n, the wiring DL_n, the wiring SW3, the wiring SW4, the wiring SW5, and the wiring SW6, and the
  • the wiring IN81 is electrically connected to the wiring DAT_h
  • the wiring SW81 is electrically connected to the wiring SMP_n/h
  • the wiring OUT81 is electrically connected to the wiring LAT1_n.
  • the wiring VL81 is omitted from the illustration in FIG. 24 and FIG. 25B. Note that the same is true for the latch unit sections 92_2 to 92_n-1.
  • the latch unit section 92 shown in FIG. 25A includes a transistor M81 and a capacitor C81.
  • the transistor M81 has a function of making the wiring IN81 and the wiring OUT81 conductive or non-conductive depending on the potential of the wiring SW81.
  • the capacitor C81 has a function of holding the potential difference (voltage) between the wiring OUT81 and the wiring VL81, for example, when the wiring OUT81 is in a floating state.
  • the latch unit 92 has a function of storing the potential of the wiring IN81 in the wiring OUT81 in accordance with the potential of the wiring SW81, and a function of holding the potential of the wiring OUT81. In other words, the latch unit 92 has a function of a sample-and-hold circuit.
  • the latch unit section 93 shown in FIG. 25C includes a transistor M82, a transistor M83, and a capacitor C82.
  • the transistor M82 has a function of bringing the wiring IN82 and the wiring OUT82 into a conductive state or a non-conductive state depending on the potential of the wiring SW82.
  • the transistor M83 has a function of bringing the wiring VL83 and the wiring OUT82 into a conductive state or a non-conductive state depending on the potential of the wiring SW83.
  • the capacitor C82 has a function of holding the potential difference (voltage) between the wiring OUT82 and the wiring VL82, for example, when the wiring OUT82 is in a floating state.
  • the latch unit 93 has a function of storing the potential of the wiring IN82 in the wiring OUT82 in accordance with the potential of the wiring SW82, and a function of holding the potential of the wiring OUT82. In other words, the latch unit 93 has a function of a sample-and-hold circuit.
  • Figure 25E is a circuit diagram for explaining a configuration example of the source follower unit section 94.
  • Figure 25F is a circuit block corresponding to the source follower unit section 94.
  • the source follower unit section 94 can be applied to each of the source follower unit sections 94_1 to 94_n. That is, for example, in the source follower unit section 94_1, the wiring IN83 is electrically connected to the wiring LAT2_1, the wiring SW84 is electrically connected to the wiring SW3, the wiring SW85 is electrically connected to the wiring SW4, the wiring SW86 is electrically connected to the wiring SW5, the wiring SW87 is electrically connected to the wiring SW6, and the wiring OUT83 is electrically connected to the wiring DL_1.
  • the source follower unit portion 94 shown in FIG. 25E includes a transistor M8A, a transistor M8B, a transistor M84, a transistor M85, a transistor M86, a transistor M87, a transistor M88, and a capacitor C83.
  • the gate of the transistor M8A is electrically connected to the wiring NL81.
  • One of the source or drain of the transistor M8A is electrically connected to one of the source or drain of the transistor M8B and the wiring NL82, and the other of the source or drain of the transistor M8A is electrically connected to the wiring VL8A.
  • the other of the source or drain of the transistor M8B is electrically connected to the wiring VL8B.
  • the gate of the transistor M8B is electrically connected to the wiring VL8C.
  • the configuration of the transistors M8A and M8B has a function of a source follower, with the gate of the transistor M8A as an input terminal and one of the source or drain of the transistor M8A as an output terminal.
  • the transistor M8A has a function of a drive transistor
  • the transistor M8B has a function of a load transistor.
  • the configuration of the transistors M8A and M8B can also have a function of a source-grounded amplifier circuit.
  • the transistor M8B, which has the function of a load transistor, can be replaced with, for example, a resistor element.
  • Transistor M84 has a function of bringing wiring NL82 and wiring IN83 into a conductive state or a non-conductive state depending on the potential of wiring SW85.
  • Transistor M85 has a function of bringing wiring VL84 and wiring NL81 into a conductive state or a non-conductive state depending on the potential of wiring SW85.
  • Transistor M88 has a function of bringing wiring IN83 and wiring NL81 into a conductive state or a non-conductive state depending on the potential of wiring SW84.
  • Capacitor C83 has a function of holding a potential difference (voltage) between wiring NL81 and wiring IN83, for example, when wiring NL81 is in a floating state.
  • Transistor M86 has a function of bringing the wiring NL82 and the wiring OUT83 into a conductive state or a non-conductive state depending on the potential of wiring SW86.
  • Transistor M87 has a function of bringing the wiring VL85 and the wiring OUT83 into a conductive state or a non-conductive state depending on the potential of wiring SW87.
  • the generation unit 64 of the semiconductor device 60 may be applied to the configuration of the latch unit section 93 and the source follower unit section 94. In other words, by providing the generation unit 64 between the wiring IN82 and the wiring VL85, a potential corresponding to the potential of the wiring IN82 may be generated and provided to the wiring VL85. In this case, the wiring VL85 corresponds to the wiring VL15.
  • the transistor TrC shown in FIG. 27C has a function of switching the conductive state or non-conductive state between the terminal S and the terminal D by changing the potential of the terminal G. Therefore, the transistor TrC includes the transistors Tr1 to Tr6 and functions as one transistor. That is, in FIG. 27C, one of the source or the drain of the transistor TrC is electrically connected to the terminal S, the other of the source or the drain is electrically connected to the terminal D, and the gate is electrically connected to the terminal G.
  • vertical OS transistors can be used as transistors constituting various element circuits as described above.
  • the area occupied by the circuit can be reduced. This makes it possible to achieve, for example, a narrower frame, higher resolution, and higher definition for the display device.
  • One aspect of the present invention is a semiconductor device having a transistor and a first insulating layer.
  • the transistor has a first conductive layer, a second conductive layer having a region overlapping with the first conductive layer through the first insulating layer, a semiconductor layer, a gate insulating layer, and a gate electrode.
  • the second conductive layer has a first opening in a region overlapping with the first conductive layer.
  • the first insulating layer has a second opening that reaches the first conductive layer in a region overlapping with the first opening.
  • the semiconductor layer contacts the top surface of the first conductive layer, the side surface of the first insulating layer, and the side surface of the second conductive layer in the first opening and the second opening.
  • a gate insulating layer is provided on the semiconductor layer, and a gate electrode is provided on the gate insulating layer.
  • a conductive layer 112a is provided on the substrate 102, and an insulating layer 110 is provided on the conductive layer 112a.
  • the insulating layer 110 is provided so as to cover the upper and side surfaces of the conductive layer 112a.
  • the insulating layer 110 has an opening 141 that reaches the conductive layer 112a in a region that overlaps with the conductive layer 112a. It can also be said that the conductive layer 112a is exposed in the opening 141.
  • the insulating layer 110 has a region sandwiched between the conductive layer 112a and the semiconductor layer 108. In other words, it can also be said that a portion of the semiconductor layer 108 is provided inside the opening 141 and the opening 143.
  • the region of the semiconductor layer 108 in contact with the conductive layer 112a functions as one of the source region and the drain region, and the region in contact with the conductive layer 112b functions as the other.
  • a channel formation region is provided between the source region and the drain region.
  • the insulating layer 106 is provided to cover the opening 141 and the opening 143.
  • the insulating layer 106 is provided on the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110.
  • the insulating layer 106 has an area that contacts the upper surface and side surfaces of the semiconductor layer 108, the upper surface and side surfaces of the conductive layer 112b, and the upper surface of the insulating layer 110.
  • the insulating layer 106 has a shape that follows the shapes of the upper surface and side surfaces of the semiconductor layer 108, the upper surface and side surfaces of the conductive layer 112b, and the upper surface of the insulating layer 110.
  • the channel length direction of the transistor 100 can be said to have a vertical component. Therefore, a transistor such as the transistor 100 of one embodiment of the present invention can be called a vertical transistor, a vertical transistor, a vertical channel transistor, a vertical channel transistor, or a VFET (Vertical Field Effect Transistor), etc.
  • a transistor such as the transistor 100 of one embodiment of the present invention can be called a vertical transistor, a vertical transistor, a vertical channel transistor, a vertical channel transistor, or a VFET (Vertical Field Effect Transistor), etc.
  • VFET Very Field Effect Transistor
  • the channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 (specifically, the insulating layer 110b) provided between the conductive layer 112a and the conductive layer 112b. Therefore, a transistor having a channel length smaller than the limit resolution of the exposure device used to manufacture the transistor can be manufactured with high precision. In addition, the characteristic variation between multiple transistors 100 is also reduced. Therefore, the operation of a semiconductor device including the transistor 100 can be stabilized and the reliability can be improved. Furthermore, the reduction in characteristic variation increases the degree of freedom in the circuit design of the semiconductor device, and the operating voltage can be reduced. Therefore, the power consumption of the semiconductor device can be reduced.
  • the transistor 100 can have a source electrode, a semiconductor layer having a channel formation region, and a drain electrode stacked on top of each other, so the area it occupies can be significantly reduced compared to a so-called planar transistor in which a semiconductor layer having a channel formation region is arranged in a planar shape.
  • the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can each function as wiring, and the transistor 100 can be provided in a region where these wirings overlap. That is, in a circuit having the transistor 100 and wiring, the area occupied by the transistor 100 and the wiring can be reduced. Therefore, the area occupied by the circuit can be reduced, and a small-sized semiconductor device can be obtained.
  • the transistor 200 includes a conductive layer 204, a conductive layer 212a, a conductive layer 212b, an insulating layer 106, a semiconductor layer 208, an insulating layer 120, and a conductive layer 202.
  • the conductive layer 204 functions as a gate electrode (also referred to as a first gate electrode), and a part of the insulating layer 106 functions as a gate insulating layer (also referred to as a first gate insulating layer).
  • the conductive layer 202 functions as a back gate electrode (also referred to as a second gate electrode), and a part of the insulating layer 120 functions as a back gate insulating layer (also referred to as a second gate insulating layer).
  • the conductive layer 212a functions as one of a source electrode and a drain electrode, and the conductive layer 212b functions as the other.
  • Each layer constituting the transistor 200 may have a single-layer structure or a stacked structure. Note that the transistor 200 does not necessarily have the conductive layer 202.
  • the entire region of the semiconductor layer 208 that overlaps with the gate electrode via the gate insulating layer between the source electrode and drain electrode functions as a channel formation region.
  • the semiconductor layer 208 has a pair of regions 208L that sandwich the channel formation region, and a pair of regions 208D on the outside of the pair.
  • an impurity element is supplied (also referred to as added or injected) to the semiconductor layer 208.
  • a region 208D is formed in a region of the semiconductor layer 208 that does not overlap with any of the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the insulating layer 106
  • a region 208L is formed in a region that does not overlap with any of the conductive layer 204, the conductive layer 212a, and the conductive layer 212b and overlaps with the insulating layer 106.
  • the region in contact with the conductive layer 212a and the region 208D adjacent to this region function as one of the source region and the drain region.
  • the region in contact with the conductive layer 212b and the region 208D adjacent to this region function as the other of the source region and the drain region.
  • An insulating layer 106 is provided on the semiconductor layer 208.
  • a part of the insulating layer 106 functions as a gate insulating layer for the transistor 100, and another part functions as a gate insulating layer for the transistor 200.
  • the insulating layer 106 has an opening 147a and an opening 147b in a region overlapping with the semiconductor layer 208.
  • Transistor 200 is a planar type transistor in which semiconductor layer 208 is arranged in a plane. It is also a so-called top-gate type transistor that has a gate electrode above semiconductor layer 208. For example, by adding an impurity element to semiconductor layer 208 using conductive layer 204 functioning as a gate electrode as a mask, regions 208D functioning as source and drain regions can be formed in a self-aligned manner. Transistor 200 can be said to be a TGSA (Top Gate Self-Aligned) type transistor.
  • TGSA Top Gate Self-Aligned
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be obtained.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, and a display device with a narrow frame can be obtained.
  • FIG. 28A and other figures a configuration is shown in which the other of the source electrode and drain electrode of the transistor 100 is electrically connected to one of the pair of electrodes of the capacitor 150, and one of the source electrode and drain electrode of the transistor 200 is electrically connected to the other of the pair of electrodes of the capacitor 150, but the electrical connection relationship between the transistor 100, the transistor 200, and the capacitor 150 is not particularly limited.
  • the semiconductor layer 108 and the semiconductor layer 208 can each be made of silicon.
  • silicon examples include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon.
  • polycrystalline silicon examples include low temperature polysilicon (LTPS).
  • LTPS low temperature polysilicon
  • a transistor using amorphous silicon in the channel formation region can be formed on a large glass substrate and can be manufactured at low cost.
  • a transistor using polycrystalline silicon in the channel formation region has high field effect mobility and can operate at high speed.
  • a transistor using microcrystalline silicon in the channel formation region has higher field effect mobility and can operate at high speed than a transistor using amorphous silicon.
  • the semiconductor layer 108 and the semiconductor layer 208 each preferably contain a metal oxide (also called an oxide semiconductor) that exhibits semiconductor characteristics.
  • a metal oxide also called an oxide semiconductor
  • the band gap of the metal oxide used in the semiconductor layer 108 and the semiconductor layer 208 is preferably 2.0 eV or more, and more preferably 2.5 eV or more.
  • OS transistors have extremely high field-effect mobility compared to transistors using amorphous silicon.
  • OS transistors have an extremely small off-state current and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time.
  • the use of OS transistors can reduce the power consumption of a semiconductor device.
  • FIGs. 29A and 29B are enlarged views of the transistor 100 shown in FIGs. 28A and 28B.
  • the insulating layer 110 preferably has one or more inorganic insulating films.
  • materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and nitride oxides.
  • oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, gallium zinc oxide, and hafnium aluminate.
  • nitrides include silicon nitride and aluminum nitride.
  • Examples of oxynitrides include silicon oxynitride, aluminum oxynitride, gallium oxynitride, yttrium oxynitride, and hafnium oxynitride.
  • Examples of nitride oxides include silicon nitride oxide and aluminum nitride oxide.
  • an oxynitride refers to a material whose composition contains more oxygen than nitrogen.
  • An oxynitride refers to a material whose composition contains more nitrogen than oxygen.
  • the insulating layer 110 has a region in contact with the semiconductor layer 108.
  • a metal oxide is used for the semiconductor layer 108
  • the region of the insulating layer 110 in contact with the channel formation region of the semiconductor layer 108 contains oxygen.
  • One or more of an oxide and an oxynitride can be used for the region of the insulating layer 110 in contact with the channel formation region of the semiconductor layer 108.
  • the insulating layer 110 preferably has a laminated structure.
  • Figure 28B etc. shows an example in which the insulating layer 110 has an insulating layer 110a, an insulating layer 110b on the insulating layer 110a, and an insulating layer 110c on the insulating layer 110b.
  • the region of the semiconductor layer 108 in contact with the insulating layer 110b functions as a channel formation region.
  • the insulating layer 110b preferably contains oxygen, and preferably uses one or more of the above-mentioned oxides and oxynitrides. Specifically, the insulating layer 110b can use one or both of silicon oxide and silicon oxynitride.
  • oxygen can be supplied to the semiconductor layer 108.
  • oxygen vacancies (V O ) are repaired and the oxygen vacancies (V O ) can be reduced. Therefore, a transistor having good electrical characteristics and high reliability can be obtained.
  • oxygen can be supplied to the insulating layer 110b by performing heat treatment in an oxygen-containing atmosphere or plasma treatment in an oxygen-containing atmosphere.
  • oxygen may be supplied to the insulating layer 110b by forming an oxide film on the upper surface of the insulating layer 110b by a sputtering method in an oxygen-containing atmosphere. Then, the oxide film may be removed.
  • hydrogen in the semiconductor layer 108 is preferably reduced as much as possible.
  • Hydrogen in the semiconductor layer 108 combines with oxygen vacancies to form VOH (defects in which hydrogen enters oxygen vacancies), which may deteriorate transistor characteristics (e.g., Id-Vg characteristics of an initial transistor or Id-Vg characteristics in a long-term reliability test).
  • transistor characteristics e.g., Id-Vg characteristics of an initial transistor or Id-Vg characteristics in a long-term reliability test.
  • it is preferable to use a material that releases less hydrogen as a material surrounding the semiconductor layer 108 for example, a material used for an insulating layer in contact with the semiconductor layer 108 (e.g., insulating layer 110a, insulating layer 110b, insulating layer 110c, insulating layer 106, etc.).
  • the insulating layer 110b is preferably formed by a deposition method such as a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method.
  • a deposition method such as a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method.
  • PECVD plasma enhanced chemical vapor deposition
  • the substance diffuses easily in the insulating layer 110b. It can also be said that it is preferable that the diffusion coefficient of the substance in the insulating layer 110b is large. In particular, it is preferable that oxygen diffuses easily in the insulating layer 110b. In other words, it is preferable that the diffusion coefficient of oxygen in the insulating layer 110b is large.
  • the oxygen contained in the insulating layer 110b diffuses in the insulating layer 110b and is supplied to the semiconductor layer 108 through the interface between the insulating layer 110b and the semiconductor layer 108. By making the insulating layer 110b into which oxygen diffuses easily, the oxygen contained in the insulating layer 110b can be efficiently supplied to the semiconductor layer 108 (particularly the channel formation region).
  • the transistor with a large on-current can be obtained.
  • a material with high conductivity oxygen vacancies (V O ) are easily formed, and when the oxygen vacancies (V O ) in the channel formation region increase, the threshold voltage of the transistor shifts, and the drain current (hereinafter also referred to as cutoff current) that flows when the gate voltage is 0 V may become large.
  • the cutoff current may become large due to a negative shift in the threshold voltage.
  • the region of the semiconductor layer 108 in contact with the conductive layer 112a functions as one of the source region and drain region of the transistor 100, and the region in contact with the conductive layer 112b functions as the other.
  • the source region and drain region are regions with lower electrical resistance than the channel formation region.
  • the source region and drain region can also be said to be regions with a higher carrier concentration or a higher oxygen vacancy density than the channel formation region.
  • the insulating layer 110a is provided between the insulating layer 110b and the conductive layer 112a.
  • the insulating layer 110c is provided between the insulating layer 110b and the conductive layer 112b. It is preferable that the insulating layer 110a and the insulating layer 110c each emit little impurities (e.g., hydrogen and water) from themselves and are difficult for impurities to penetrate. This can prevent the impurities contained in the insulating layer 110a and the insulating layer 110c from diffusing into the channel formation region. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.
  • impurities e.g., hydrogen and water
  • the insulating layer 110a and the insulating layer 110c are preferably made of a film through which oxygen does not easily permeate. This can suppress the oxygen contained in the insulating layer 110b from diffusing to the conductive layer 112a through the insulating layer 110a. Similarly, the oxygen contained in the insulating layer 110b can be suppressed from diffusing to the conductive layer 112b through the insulating layer 110c. This can suppress an increase in the electrical resistance of the conductive layer 112a and the conductive layer 112b.
  • the oxygen contained in the insulating layer 110b is suppressed from diffusing to the insulating layer 110a side and the insulating layer 110c side, so that the amount of oxygen supplied from the insulating layer 110b to the channel formation region is increased, and oxygen vacancies and VOH in the channel formation region can be reduced.
  • oxygen can be effectively supplied from the insulating layer 110b to the channel formation region. Note that a configuration in which one or both of the insulating layers 110a and 110c are not provided may also be used.
  • the insulating layer 110a and the insulating layer 110c each preferably contain nitrogen, and preferably use one or more of the above-mentioned nitrides and nitride oxides.
  • silicon nitride or silicon nitride oxide may be used for the insulating layer 110a and the insulating layer 110c.
  • one or both of the insulating layer 110a and the insulating layer 110c may use one or more of an oxide and an oxynitride.
  • aluminum oxide may be used for the insulating layer 110a and the insulating layer 110c.
  • the insulating layer 110a may use the same material as the insulating layer 110c, or a different material.
  • different materials refer to materials in which some or all of the constituent elements are different, or materials in which the constituent elements are the same but the composition is different.
  • the thickness T110a of the insulating layer 110a can be, for example, 3 nm or more, 5 nm or more, 10 nm or more, 20 nm or more, 50 nm or more, or 70 nm or more, and can be less than 1 ⁇ m, 500 nm or less, 400 nm or less, 300 nm or less, 200 nm or less, 150 nm or less, or 120 nm or less. As shown in FIG. 29B, the thickness T110a can be the shortest distance between the surface on which the insulating layer 110a is formed (here, the upper surface of the conductive layer 112a) and the lower surface of the insulating layer 110b in a cross-sectional view.
  • the thickness T110a of the insulating layer 110a When the thickness T110a of the insulating layer 110a is large, the amount of impurities released from the insulating layer 110a increases, and the amount of impurities diffusing into the channel formation region may increase. On the other hand, when the thickness T110a is small, oxygen contained in the insulating layer 110b may diffuse to the conductive layer 112a side through the insulating layer 110a, and the amount of oxygen supplied to the channel formation region may decrease. By setting the thickness T110a within the above range, oxygen vacancies (V O ) and V O H in the channel formation region can be reduced. In addition, the conductive layer 112a is oxidized by the oxygen contained in the insulating layer 110b, and the electrical resistance of the conductive layer 112a can be prevented from increasing.
  • the semiconductor layer 108 can be configured to have a low-resistance region between the region in contact with the conductive layer 112a (one of the source region and the drain region) and the channel formation region. Similarly, by using a material that releases impurities for the insulating layer 110c, the region in contact with the insulating layer 110c can be a low-resistance region.
  • the semiconductor layer 108 can be configured to have a low-resistance region between the region in contact with the conductive layer 112b (the other of the source region and the drain region) and the channel formation region.
  • the low resistance regions can function as buffer regions to reduce the drain electric field. These low resistance regions may also function as source or drain regions.
  • the top shape of the opening 141 refers to the shape of the top end of the insulating layer 110 on the opening 141 side.
  • the top shape of the opening 143 refers to the shape of the bottom end of the conductive layer 112b on the opening 143 side.
  • openings 141 and 143 do not have to be the same. Furthermore, when the top surface shapes of openings 141 and 143 are circular, openings 141 and 143 may or may not be concentric.
  • a transistor with an extremely small channel length that is difficult to realize with a conventional exposure device for mass production of flat panel displays for example, a minimum line width of about 2 ⁇ m or 1.5 ⁇ m.
  • a transistor with a channel length of less than 10 nm without using an extremely expensive exposure device used in cutting-edge LSI technology.
  • the thickness T110b of the insulating layer 110b can be, for example, 1 nm or more, 5 nm or more, 7 nm or more, or 10 nm or more, and can be less than 3 ⁇ m, 2.5 ⁇ m or less, 2 ⁇ m or less, 1.5 ⁇ m or less, 1.2 ⁇ m or less, 1 ⁇ m or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less.
  • the shape of the side of the insulating layer 110 on the opening 141 side is straight in cross section, but this is not a limitation of one embodiment of the present invention. In cross section, the shape of the side of the insulating layer 110 on the opening 141 side may be curved, or the side may have both straight and curved regions.
  • the width D141 of the opening 141 is indicated by a double-headed arrow with a two-dot chain line.
  • Figure 29A shows an example in which the top surface shape of the opening 141 is circular.
  • the width D141 corresponds to the diameter of the circle
  • the channel width W100 of the transistor 100 is the length of the circumference of the circle.
  • the channel width W100 is ⁇ x D141.
  • the maximum width of the top surface shape may be set as width D141.
  • the width D141 of the opening 141 is equal to or greater than the limit resolution of the exposure device.
  • the width D141 can be, for example, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more, and less than 5 ⁇ m, 4.5 ⁇ m or less, 4 ⁇ m or less, 3.5 ⁇ m or less, 3 ⁇ m or less, 2.5 ⁇ m or less, 2 ⁇ m or less, 1.5 ⁇ m or less, or 1 ⁇ m or less.
  • the width D141 can be, for example, 5 nm or more, 10 nm or more, or 20 nm or more, and 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, or 30 nm or less.
  • the thickness T110a of the insulating layer 110a and the thickness T110c of the insulating layer 110c are 1 nm or more, 3 nm or more, or 5 nm or more, and preferably 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. This makes it possible to reduce the amount of impurities that diffuse into the channel formation region, and to provide a transistor that exhibits good electrical characteristics and is highly reliable even when the channel length L100 is short.
  • the region of the semiconductor layer 108 in contact with the insulating layer 110b functions as a channel formation region
  • one embodiment of the present invention is not limited to this.
  • the region of the semiconductor layer 108 in contact with the insulating layer 110a may also function as a channel formation region.
  • the region in contact with the insulating layer 110c may also function as a channel formation region.
  • a step may be formed between the insulating layer 110 and the conductive layer 112a, and the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 may be provided along the step.
  • Transistor 200 Next, a detailed structure of the transistor 200 will be described with reference to Figures 30A to 30C.
  • Figures 30A to 30C are enlarged views of the transistor 200 shown in Figures 28A to 28C.
  • the conductive layer 202 which functions as the back gate electrode of the transistor 200, preferably extends beyond the end of the channel formation region. Specifically, the conductive layer 202 preferably has a portion that protrudes beyond the end of the conductive layer 204 in the channel length direction.
  • the conductive layer 204 and the conductive layer 202 may be electrically connected.
  • an electric field for inducing a channel in the semiconductor layer 208 can be effectively applied, and the on-current of the transistor 200 can be increased. Therefore, the transistor 200 can be miniaturized.
  • an opening reaching the conductive layer 202 can be provided in the insulating layer 106 and the insulating layer 120, and the conductive layer 204 can be formed so as to cover the opening.
  • the insulating layer 120 which is provided in contact with the upper and side surfaces of the conductive layer 202, can be made of a material that can be used for the insulating layer 110.
  • the insulating layer 120 preferably has a laminated structure.
  • FIG. 30B and other figures show that the insulating layer 120 has a laminated structure of an insulating layer 120a and an insulating layer 120b on the insulating layer 120a.
  • the insulating layers 120a and 120b can each be made of a material that can be used for the insulating layer 110.
  • oxygen can be supplied to the semiconductor layer 208, particularly to the channel formation region of the semiconductor layer 208.
  • the oxygen contained in the insulating layer 120b diffuses in the insulating layer 120b and is supplied to the semiconductor layer 208 through the interface between the insulating layer 120b and the semiconductor layer 208.
  • oxygen vacancies (V O ) are repaired and the oxygen vacancies (V O ) can be reduced. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.
  • the oxygen diffusion coefficient of the insulating layer 120b at 350° C. is preferably 1 ⁇ 10 ⁇ 12 cm 2 /sec or more, and more preferably 5 ⁇ 10 ⁇ 12 cm 2 /sec or more.
  • the insulating layer 120b can be made of a material that can be used for the insulating layer 110b.
  • the insulating layer 120b preferably contains oxygen, and can be made of one or more of an oxide and an oxynitride.
  • the insulating layer 120b can be made of, for example, silicon oxide or silicon oxynitride.
  • the amount of oxygen supplied from the insulating layer 120b to the semiconductor layer 208 may be smaller than the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108.
  • the amount of oxygen released from the insulating layer 120b may be smaller than the amount of oxygen released from the insulating layer 110b.
  • the diffusion coefficient of the substance in the insulating layer 110b is larger than that in the insulating layer 120b.
  • the diffusion coefficient of oxygen in the insulating layer 110b is larger than that in the insulating layer 120b. This allows the transistor 100, even with a short channel length, to exhibit good electrical characteristics and be a highly reliable transistor.
  • the insulating layer 120a in contact with the conductive layer 202 is preferably made of a material that does not easily diffuse the metal elements contained in the conductive layer 202. This makes it possible to prevent the metal elements contained in the conductive layer 202 from diffusing into the channel formation region of the semiconductor layer 208 through the insulating layer 120.
  • the insulating layer 120a is preferably made of a material that can be used for the insulating layer 110a and the insulating layer 110c.
  • the insulating layer 120a preferably contains nitrogen, and one or more of a nitride and a nitride oxide can be used.
  • the insulating layer 120a can be made of, for example, silicon nitride.
  • the insulating layer 120a may be made of one or more of an oxide and an oxynitride.
  • the insulating layer 120a can be made of, for example, aluminum oxide. Note that the insulating layer 120a, the insulating layer 110a, and the insulating layer 110c may be made of the same material or different materials.
  • the insulating layer 120a releases little impurities (e.g., water and hydrogen) from itself. This makes it possible to prevent impurities contained in the insulating layer 120a from diffusing into the channel formation region of the semiconductor layer 208 through the insulating layer 120b, resulting in a transistor that exhibits good electrical characteristics and is highly reliable.
  • impurities e.g., water and hydrogen
  • the insulating layer 120 is shown here as having a two-layer stacked structure, one embodiment of the present invention is not limited to this.
  • the insulating layer 120 may have a three or more layer stacked structure, or a single layer structure.
  • the insulating layer 120 is preferably provided in at least a region in contact with the channel formation region of the semiconductor layer 208 and is provided so as to cover the upper surface and side surface of the conductive layer 202.
  • FIG. 30B and other figures show a configuration in which the semiconductor layer 208 has a portion protruding from the end of the insulating layer 120.
  • the semiconductor layer 208 has a region in contact with the side surface of the insulating layer 120. A portion of the end of the semiconductor layer 208 is in contact with the upper surface of the insulating layer 120, and another portion is in contact with the upper surface of the insulating layer 110.
  • the insulating layer 120 may be provided in the region in which the semiconductor layer 208 is provided, and the entire lower surface of the semiconductor layer 208 is in contact with the upper surface of the insulating layer 120.
  • the thickness of the semiconductor layer 208 is uniform regardless of location, but one embodiment of the present invention is not limited to this.
  • the thickness may be different between the region of the semiconductor layer 208 that overlaps with the insulating layer 106 and the region that does not overlap with the insulating layer 106.
  • the thickness of the region of the semiconductor layer 208 that does not overlap with the insulating layer 106 may be thinner than the thickness of the overlapping region.
  • the thickness may be different between the region of the semiconductor layer 208 that overlaps with any of the insulating layer 106, the conductive layer 212a, and the conductive layer 212b, and the region that does not overlap with any of these.
  • the conductive layers 212a and 212b are formed, a part of the semiconductor layer 208 is removed, and the thickness of the region of the semiconductor layer 208 that does not overlap with any of the insulating layer 106, the conductive layer 212a, and the conductive layer 212b may be thinner than the thickness of the region that overlaps with any of these.
  • the thickness may be different between the region of the semiconductor layer 208 that overlaps with the insulating layer 106, the region that overlaps with any of the insulating layer 106, the conductive layer 212a, and the conductive layer 212b, and the region that does not overlap with any of these.
  • the region 208D has a lower electrical resistance than the channel formation region.
  • the region 208D can also be said to have a higher carrier concentration, a higher oxygen vacancy density, or a higher impurity concentration than the channel formation region.
  • Region 208L has the same or lower electrical resistance as the channel formation region. Region 208L can also be said to have the same or higher carrier concentration, the same or higher oxygen vacancy density, or the same or higher impurity concentration as the channel formation region. Furthermore, region 208L has the same or higher electrical resistance as region 208D. Region 208L can also be said to have the same or lower carrier concentration, the same or lower oxygen vacancy density, or the same or lower impurity concentration as region 208D.
  • Region 208L functions as a buffer region for alleviating the drain electric field.
  • Region 208L does not overlap with conductive layer 204, and therefore is a region in which a channel is hardly formed even when a gate voltage is applied to conductive layer 204.
  • Region 208L preferably has a higher carrier concentration than the channel formation region. This allows region 208L to function as an LDD (Lightly Doped Drain) region.
  • LDD Lightly Doped Drain
  • the carrier concentration in the semiconductor layer 208 is preferably distributed so that it is lowest in the channel formation region, and then increases in the order of region 208L and region 208D.
  • region 208L between the channel formation region and region 208D, the carrier concentration in the channel formation region can be kept extremely low, even if impurities such as hydrogen diffuse from region 208D during the manufacturing process.
  • the impurity element when the impurity element is added to the semiconductor layer 208 to form the regions 208L and 208D, the impurity element may be supplied to the semiconductor layer 108 through the insulating layer 106 using the conductive layer 104 as a mask. As a result, the region 108L is formed in a region of the semiconductor layer 108 that does not overlap with the conductive layer 104. Note that in the transistor 100, a region of the semiconductor layer 108 that is in contact with the conductive layer 112b functions as a source region or a drain region. The region 108L is formed in a part of the source region or the drain region. Note that the concentration of the impurity element in the region 108L may be different from the concentration of the impurity element in the region 208L.
  • the region 108L may not be formed.
  • the conductive layer 104 extends to cover the end of the semiconductor layer 108, the entire semiconductor layer 108 is masked by the conductive layer 104, so that the impurity element is not supplied to the semiconductor layer 108 and the region 108L is not formed.
  • a portion of the end of the conductive layer 212a and the conductive layer 212b is located inside the opening 147a and the opening 147b.
  • a portion of the end of the conductive layer 212a and the conductive layer 212b contacts the semiconductor layer 208 in the opening 147a and the opening 147b. This allows the region in contact with the conductive layer 212a to be adjacent to one of the pair of regions 208D, and similarly, the region in contact with the conductive layer 212b to be adjacent to the other of the pair of regions 208D.
  • top surface shapes of openings 147a and 147b are not particularly limited.
  • the top surface shapes of openings 147a and 147b can be shapes that can be applied to openings 141 and 143.
  • the top surface shapes of openings 147a and 147b are shown to be rectangular with rounded corners, which is different from the top surface shapes of openings 141 and 143, but one embodiment of the present invention is not limited to this.
  • the top surface shapes of openings 147a and 147b may be the same as the top surface shapes of openings 141 and 143.
  • the structure in which the conductive layer 212a and the conductive layer 212b are formed in the same process as the conductive layer 204 is shown here, one embodiment of the present invention is not limited to this.
  • the conductive layer 212a and the conductive layer 212b may be formed in a process different from that of the conductive layer 204.
  • the conductive layer 104 and the conductive layer 204 are formed over the insulating layer 106, and an impurity element is supplied to the semiconductor layer 208 using the conductive layer 204 as a mask to form a source region and a drain region.
  • An insulating layer 195 is formed over the conductive layer 104 and the conductive layer 204, and an opening reaching the source region and an opening reaching the drain region are formed in the insulating layer 106 and the insulating layer 195, and the conductive layer 212a and the conductive layer 212b can be formed so as to cover these openings.
  • Metal oxides that can be used for the semiconductor layer 108 and the semiconductor layer 208 will be specifically described.
  • metal oxides include indium oxide, gallium oxide, and zinc oxide.
  • the metal oxide preferably contains at least indium or zinc.
  • the metal oxide preferably contains two or three elements selected from indium, element M, and zinc.
  • the element M is a metal element or a metalloid element having a high bond energy with oxygen, for example, a metal element or a metalloid element having a bond energy with oxygen higher than that of indium.
  • the element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony.
  • the element M of the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably one or more of gallium and tin.
  • metal elements and metalloid elements may be collectively referred to as "metal elements", and the "metal element" described in this specification may include metalloid elements.
  • the semiconductor layer 108 and the semiconductor layer 208 may each be made of, for example, indium oxide (In oxide), indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide, or ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (In-W oxide, or IWO), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, or GZO), aluminum zinc oxide (Al-Zn oxide, Indium aluminum zinc oxide (In-Al-Zn oxide, IAZO), indium tin zinc oxide (In-Sn-Zn oxide, ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, IGZO), indium gallium tin zinc oxide (In-Ga-S
  • indium tin oxide containing silicon ITSO
  • gallium tin oxide Ga-Sn oxide
  • aluminum tin oxide Al-Sn oxide
  • materials not containing Zn such as indium oxide, are suitable because they have high affinity with Si processes.
  • materials containing Zn are suitable because they can improve crystallinity.
  • the metal oxide may have one or more metal elements with a large periodic number instead of or in addition to indium.
  • metal elements with a large periodic number include metal elements belonging to the fifth period and metal elements belonging to the sixth period.
  • Specific examples of the metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.
  • the atomic ratio of In in the In-M-Zn oxide may be less than the atomic ratio of M.
  • the ratio of the number of indium atoms to the sum of the numbers of atoms of all metal elements contained may be referred to as the indium content. The same applies to other metal elements.
  • the element M is preferably one or more of the above elements, and more preferably one or more selected from aluminum, gallium, tin, and yttrium.
  • the silicon content (the ratio of the number of silicon atoms to the sum of the number of atoms of all metal elements contained) is preferably 1% or more and 20% or less, more preferably 3% or more and 20% or less, even more preferably 3% or more and 15% or less, and even more preferably 5% or more and 15% or less.
  • energy dispersive X-ray spectrometry EDX
  • XPS X-ray photoelectron spectrometry
  • ICP-MS inductively coupled plasma mass spectrometry
  • ICP-AES inductively coupled plasma-atomic emission spectrometry
  • EDX energy dispersive X-ray spectrometry
  • XPS X-ray photoelectron spectrometry
  • ICP-MS inductively coupled plasma mass spectrometry
  • ICP-AES inductively coupled plasma-atomic emission spectrometry
  • the actual content may differ from the content obtained by analysis due to the influence of analytical accuracy. For example, if the content of element M is low, the content of element M obtained by analysis may be lower than the actual content.
  • the semiconductor layer 108 and the semiconductor layer 208 may each have a stacked structure having two or more metal oxide layers.
  • the two or more metal oxide layers in the semiconductor layer 108 and the semiconductor layer 208 may each have the same or approximately the same composition.
  • a stacked structure of metal oxide layers with the same composition for example, they can be formed using the same sputtering target, thereby reducing manufacturing costs.
  • the two or more metal oxide layers in each of the semiconductor layer 108 and the semiconductor layer 208 may have different compositions.
  • gallium, aluminum, or tin it is particularly preferable to use gallium, aluminum, or tin as the element M.
  • the element M in the first metal oxide layer and the second metal oxide layer may be the same or different from each other.
  • the first metal oxide layer and the second metal oxide layer may be IGZO layers having different compositions from each other.
  • the density of defect states in the channel formation region can be reduced.
  • a metal oxide with low crystallinity a transistor capable of passing a large current can be realized.
  • the crystallinity of the semiconductor layer 108 and the semiconductor layer 208 can be analyzed, for example, by an X-ray diffraction (XRD) pattern, a transmission electron microscope (TEM) image, or an electron diffraction (ED) pattern. Alternatively, the analysis may be performed by combining a plurality of these methods.
  • XRD X-ray diffraction
  • TEM transmission electron microscope
  • ED electron diffraction
  • the semiconductor layer 108 and the semiconductor layer 208 may each have a layered material that functions as a semiconductor.
  • a layered material is a general term for a group of materials that have a layered crystal structure.
  • a layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via bonds weaker than covalent bonds or ionic bonds, such as van der Waals bonds.
  • a layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity.
  • the configuration of the conductive layer 112a described above can also be applied to other configuration examples.
  • Silicon nitride and silicon nitride oxide have the characteristics of releasing little impurities (e.g., water and hydrogen) from themselves and being difficult for oxygen and hydrogen to permeate, and therefore can be used as the insulating layer 106.
  • impurities e.g., water and hydrogen
  • the electrical characteristics of the transistor can be improved and the reliability can be increased.
  • the gate leakage current may become large.
  • a material with a high relative dielectric constant also called a high-k material
  • examples of high-k materials that can be used for the insulating layer 106 include gallium oxide, hafnium oxide, zirconium oxide, oxides having aluminum and hafnium, oxynitrides having aluminum and hafnium, oxides having silicon and hafnium, oxynitrides having silicon and hafnium, and nitrides having silicon and hafnium.
  • the insulating layer 195 which functions as a protective layer for the transistor 100, the transistor 200, and the capacitor 150, is preferably made of a material from which impurities do not easily diffuse. By providing the insulating layer 195, diffusion of impurities from the outside into the transistor can be effectively suppressed, thereby improving the reliability of the semiconductor device. Examples of impurities include water and hydrogen.
  • Substrate 102 There is no significant limitation on the material of the substrate 102, but it is necessary that the material has at least a heat resistance sufficient to withstand subsequent heat treatment.
  • the substrate 102 for example, a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate made of silicon germanium or the like, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate may be used.
  • a semiconductor element may be provided on the substrate 102.
  • the shape of the semiconductor substrate and the insulating substrate may be circular or rectangular.
  • a flexible substrate may be used as the substrate 102, and the transistor 100 and the like may be formed directly on the flexible substrate.
  • a peeling layer may be provided between the substrate 102 and the transistor 100 and the like. By providing a peeling layer, after a semiconductor device is partially or entirely completed on the substrate, it can be separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like can also be transferred to a substrate with poor heat resistance or a flexible substrate.
  • the transistor 200 may be used as the driver transistor (transistor M11 and transistor M18) and the load transistor (transistor M12 and transistor M19), and the capacitance element 150 may be used as the capacitance C11.
  • a vertical transistor such as the transistor 100 for the transistor M1 and the transistors M3 to M6.
  • the transistor 200 may be used for the transistor M2
  • the capacitor 150 may be used for the capacitors C1 and C2.
  • ⁇ Configuration Example 2> 31 is a cross-sectional view of a transistor 100A that can be used in a semiconductor device of one embodiment of the present invention.
  • the transistor 100A is different from the transistor 100 illustrated in FIG. 28B and the like mainly in that it has a backgate. Note that the above description of the transistor 100 can be referred to, and detailed description thereof will be omitted.
  • Transistor 100A has conductive layer 112a, conductive layer 103, insulating layer 107, insulating layer 110, semiconductor layer 108, conductive layer 112b, insulating layer 106, and conductive layer 104. Each layer constituting transistor 100A may have a single-layer structure or a multilayer structure.
  • the conductive layer 112a is provided over the substrate 102.
  • the conductive layer 112a functions as one of the source electrode and drain electrode of the transistor 100A.
  • the insulating layer 107 is located on the conductive layer 112a.
  • the insulating layer 107 is provided to cover the upper and side surfaces of the conductive layer 112a.
  • the conductive layer 103 is located on the insulating layer 107.
  • the conductive layer 112a and the conductive layer 103 are electrically insulated from each other by the insulating layer 107.
  • the conductive layer 103 has an opening 148 that reaches the insulating layer 107 in the area overlapping with the conductive layer 112a.
  • the insulating layer 110 is provided on the insulating layer 107 and the conductive layer 103.
  • the insulating layer 110 is provided so as to cover the upper and side surfaces of the conductive layer 103 and the upper surface of the insulating layer 107.
  • the insulating layer 110 preferably has a laminated structure.
  • Figure 31 shows an example in which the insulating layer 110 has a laminated structure of an insulating layer 110a, an insulating layer 110b on the insulating layer 110a, and an insulating layer 110c on the insulating layer 110b.
  • the insulating layer 110a is located on the insulating layer 107 and the conductive layer 103.
  • the insulating layer 110a is provided so as to cover the upper surface and side surfaces of the conductive layer 103.
  • the insulating layer 110a is also provided so as to cover a portion of the opening 148.
  • the insulating layer 110a contacts the insulating layer 107 through the opening 148.
  • An insulating layer 110b is provided on insulating layer 110a, and an insulating layer 110c is provided on insulating layer 110b.
  • An opening 141 is provided in insulating layer 107 and insulating layer 110, reaching conductive layer 112a.
  • the conductive layer 112b is located on the insulating layer 110c.
  • the conductive layer 112b has an opening 143 that overlaps with the opening 141.
  • the conductive layer 112b functions as the other of the source electrode and drain electrode of the transistor 100A.
  • the conductive layer 112b has a region that overlaps with the conductive layer 112a through the insulating layer 107 and the insulating layer 110.
  • the opening 141 and the opening 148 are concentric. This allows the shortest distance between the semiconductor layer 108 and the conductive layer 103 in a cross-sectional view to be equal on the left and right sides of the opening 141. Also, the opening 141 and the opening 148 may not be concentric.
  • the semiconductor layer 108 is in contact with the top surface of the conductive layer 112a, the side surface of the insulating layer 107, the side surface of the insulating layer 110, and the top surface and side surface of the conductive layer 112b.
  • the semiconductor layer 108 is provided so as to cover the opening 141 and the opening 143.
  • the semiconductor layer 108 is provided in contact with the insulating layer 107, the side surface of the insulating layer 110 on the opening 141 side, and the end portion of the conductive layer 112b on the opening 143 side (which can also be said to be a part of the top surface and the side surface on the opening 143 side).
  • the semiconductor layer 108 is in contact with the conductive layer 112a through the opening 141 and the opening 143.
  • FIG. 31 an example is shown in which the end of the semiconductor layer 108 is in contact with the top surface of the conductive layer 112b, but one embodiment of the present invention is not limited to this.
  • the semiconductor layer 108 may cover the end of the conductive layer 112b, and the end of the semiconductor layer 108 may be in contact with the top surface of the insulating layer 110c.
  • the insulating layer 106 is located on the insulating layer 110c, the semiconductor layer 108, and the conductive layer 112b.
  • the insulating layer 106 is provided so as to cover the openings 141 and 143 via the semiconductor layer 108.
  • a portion of the insulating layer 106 functions as a gate insulating layer for the transistor 100A.
  • the conductive layer 104 is located on the insulating layer 106.
  • the conductive layer 104 overlaps with the semiconductor layer 108 through the insulating layer 106.
  • the conductive layer 104 functions as a gate electrode of the transistor.
  • the conductive layer 103 functions as a back gate electrode of the transistor 100A.
  • a part of the insulating layer 110 functions as a back gate insulating layer of the transistor 100A.
  • the potential on the back channel side of the semiconductor layer 108 is fixed, and the saturation of the transistor 100A can be increased.
  • the transistor 100A Since the transistor 100A has a back gate electrode, the potential on the back channel side of the semiconductor layer 108 can be fixed, and a shift in the threshold voltage can be suppressed.
  • the threshold voltage of the transistor shifts, the drain current (hereinafter also referred to as the cutoff current) that flows when the gate voltage is 0 V may become large.
  • the cutoff current By suppressing the shift in the threshold voltage of the transistor 100A, a transistor with a small cutoff current can be obtained. Note that a small cutoff current may be referred to as normally off.
  • a step may be formed by the insulating layer 107, the insulating layer 110, and the conductive layer 112b, and the conductive layer 112a, and the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 may be provided along the step.
  • FIG. 32A is a vertical cross-sectional view of a transistor 100B1 that can be used in a semiconductor device of one embodiment of the present invention, taken along the line passing through an opening 141.
  • FIG. 32B is a cross-sectional view of the transistor 100B1, including the conductive layer 112b in an opening 143, as viewed from the top.
  • Transistor 100B1 differs from transistor 100 shown in FIG. 28B etc. mainly in that the side of insulating layer 110 on the opening 141 side is vertical. That is, in transistor 100B1, in FIG. 29B, angle ⁇ 110 is 90 degrees. Transistor 100B1 also differs from transistor 100 shown in FIG. 28B etc. mainly in that insulating layer 110 is a single layer, conductive layer 104 is provided to fill openings 141 and 143, and conductive layer 104 extends to and covers the end of semiconductor layer 108 (i.e., region 108L is not formed). Note that the above description of transistor 100 can be referenced, so detailed description will be omitted.
  • FIG. 33A shows a vertical cross-sectional view of a transistor 100B2 that can be used in a semiconductor device according to one embodiment of the present invention, the vertical cross-sectional view passing through the center of an opening 141 and including a conductive layer 112b.
  • FIG. 33B shows a cross-sectional view of the transistor 100B2, including the conductive layer 112b at an opening 143, viewed from the top.
  • the transistor 100B2 is different from the transistor 100B1 mainly in that it does not include the conductive layer 112a, is provided over the insulating layer 105, includes conductive layers 112b1 and 112b2 instead of the conductive layer 112b, and has a different shape of the semiconductor layer 108.
  • the conductive layer 112b1 functions as one of a source electrode and a drain electrode, and the conductive layer 112b2 functions as the other.
  • the semiconductor layer 108 has a ring-shaped shape. Specifically, in the opening 141 and the opening 143, there is a region in contact with the side surface of the conductive layer 112b1, a region in contact with the side surface of the conductive layer 112b2, and a region in contact with the side surface of the insulating layer 110.
  • the semiconductor layer 108 is configured not to be in contact with the top surfaces of the conductive layer 112b1 and the conductive layer 112b2.
  • the semiconductor layer 108 having such a shape can be formed by processing, for example, by anisotropic etching.
  • the width H112b of the conductive layer 112b1 and the conductive layer 112b2 is smaller than the width D141 of the opening 141 and the opening 143.
  • the circumferential direction of the opening 141 and the opening 143 corresponds to the channel length direction of the transistor 100B2.
  • the semiconductor layer 108 since the semiconductor layer 108 has an annular shape, there are two current paths (i.e., channels) from the conductive layer 112b1 to the conductive layer 112b2. Note that the semiconductor layer 108 does not necessarily have to have an annular shape as long as it is configured to be in contact with both the conductive layer 112b1 and the conductive layer 112b2.
  • the channel length can be controlled by the shape and size of the opening 141 and the opening 143.
  • the perimeter of the opening 141 and the opening 143 may be increased.
  • the opening 141 and the opening 143 in the top view can be, for example, an ellipse or a rectangle with rounded corners.
  • a regular polygon such as an equilateral triangle, a square, and a regular pentagon, or a polygon other than a regular polygon, may be used.
  • a concave polygon such as a star-shaped polygon, in which at least one interior angle exceeds 180 degrees, can increase the channel width.
  • an ellipse, a polygon with rounded corners, or a closed curve combining straight lines and curves can be used.
  • the maximum width of the openings 141 and 143 may be calculated appropriately according to the shape of the top of the openings 141 and 143. For example, if the openings are square or rectangular when viewed from above, the maximum width of the openings 141 and 143 may be the length of the diagonal of the top of the openings 141 and 143.
  • the transistor 100B1 is a transistor that can achieve a very small channel length and a large channel width. Therefore, a large on-current can be realized.
  • the transistor 100B2 is a transistor that can achieve a very small channel width and a large channel length. Therefore, for example, a moderate on-current can be realized, and in the saturation region, it becomes easy to finely control the drain current according to the gate voltage. In addition, for example, short channel effects such as drain induced barrier lowering (DIBL) can be reduced.
  • DIBL drain induced barrier lowering
  • the transistors 100B1 and 100B2 can share a part of the manufacturing process and can be separately manufactured on the same substrate. For example, in a display device, the transistor 100B2 can be applied as a drive transistor for controlling the current flowing to a light-emitting element, and the transistor 100B1 can be applied as a transistor that functions as a switch.
  • transistor 100B1 can be applied to the transistors that function as switches (transistors M13 to M17), and transistor 100B2 can be applied to the driver transistors (transistors M11 and M18) and the load transistors (transistors M12 and M19).
  • the transistor 100B1 can be applied to the transistors that function as switches (transistor M1 and transistors M3 to M6), and the transistor 100B2 can be applied to the driving transistor (transistor M2).
  • ⁇ Configuration Example 5> 34A illustrates an equivalent circuit diagram of a transistor 100C that can be used in a semiconductor device of one embodiment of the present invention.
  • the transistor 100C is a group of transistors including transistors 100_1 to 100_p (p is an integer of 2 or more).
  • the transistors 100_1 to 100_p are connected in parallel, and the transistor 100C can be regarded as one transistor.
  • FIG. 34B shows an equivalent circuit diagram of a transistor 100C according to one embodiment of the present invention.
  • FIG. 34C shows a top view of the transistor 100C.
  • FIG. 35 shows a cross-sectional view of the cut surface taken along dashed line A3-A4 in FIG. 34C.
  • the transistors 100_1 to 100_4 are arranged in two rows and two columns, but the arrangement of the transistors is not particularly limited.
  • the transistors 100_1 to 100_4 may be arranged in one row and four columns.
  • the transistors may or may not be arranged in a matrix.
  • one or both of the transistors 100C and 100D can be used as transistors that form a peripheral driver circuit.
  • the display device of one embodiment of the present invention may have a function as a touch panel.
  • various detection elements also called sensor elements
  • a detection target such as a finger
  • Pixel 230R, pixel 230G, and pixel 230B each have a display element and a circuit (pixel circuit) that controls the driving of the display element.
  • light-emitting elements include self-emitting light-emitting elements such as LEDs (Light Emitting Diodes), organic EL (Electro Luminescence) elements (also called OLEDs (Organic LEDs)), and semiconductor lasers.
  • LEDs Light Emitting Diodes
  • organic EL Electro Luminescence
  • LEDs that can be used include mini LEDs and micro LEDs.
  • the light-emitting element can emit light of infrared, red, green, blue, cyan, magenta, yellow, or white.
  • the color purity can be increased by providing the light-emitting element with a microcavity structure.
  • one electrode functions as an anode (also called an anode electrode) and the other electrode functions as a cathode (also called a cathode electrode).
  • one embodiment of the present invention is a display device using an organic EL element.
  • the display device of one embodiment of the present invention may be a top emission type that emits light in a direction opposite to the substrate on which the light emitting elements are formed, a bottom emission type that emits light toward the substrate on which the light emitting elements are formed, or a dual emission type that emits light to both sides.
  • the semiconductor device of one embodiment of the present invention can reduce the area occupied by the device, and therefore can increase the aperture ratio of a pixel in a display device having a bottom emission structure.
  • a display device having an aperture ratio of 50% or more, 55% or more, or 60% or more can be realized.
  • the aperture ratio refers to the ratio of the area of the region through which light is emitted to the area of the pixel.
  • the display device 50A uses the SBS (Side By Side) structure.
  • SBS System By Side
  • the SBS structure allows the material and configuration to be optimized for each light-emitting element, which increases the freedom of material and configuration selection and makes it easier to improve the light emission intensity and reliability.
  • the display device 50A is a top emission type.
  • transistors and other components can be arranged so as to overlap the light-emitting region of the light-emitting element, which allows the aperture ratio of the pixel to be increased compared to a bottom emission type.
  • One or more of the above-mentioned transistors 100, 100A, 100B1, 100B2, 100C, 100D, and 200 can be applied to any one or more of transistors 205D, 205R, 205G, 207G, and 207B.
  • Figure 39A shows a configuration example in which the above-mentioned transistor 100 is applied to transistors 205D, 205R, and 205G, and the above-mentioned transistor 200 is applied to transistors 207G and 207B.
  • a high-definition display device can be obtained by using one or more of the above-mentioned transistors 100, 100A, 100B1, 100B2, 100C, and 100D as the transistors provided in the display portion 162.
  • the highly saturable transistor 200 can be used as the driving transistor of the light-emitting element 130. This allows the display device to be highly reliable.
  • the display device shown in this embodiment may have a Si transistor.
  • the OS transistor When the transistor operates in the saturation region, the OS transistor can reduce the change in the current flowing from the drain to the source in response to a change in the gate-source voltage compared to a Si transistor. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the current flowing from the drain to the source can be precisely determined by changing the gate-source voltage, and the amount of current flowing to the light-emitting element can be controlled. This allows a larger number of gray levels to be achieved in the pixel circuit.
  • the transistors in the circuit portion 164 and the transistors in the display portion 162 may have the same structure or different structures.
  • the transistors in the circuit portion 164 may all have the same structure or may have two or more types.
  • the transistors in the display portion 162 may all have the same structure or may have two or more types.
  • an LTPS transistor and an OS transistor in the display portion 162
  • a display device with low power consumption and high driving capability can be realized.
  • an OS transistor is used as a transistor that functions as a switch for controlling the conduction or non-conduction between wirings
  • an LTPS transistor is used as a transistor for controlling current
  • one of the transistors in the display unit 162 functions as a transistor for controlling the current flowing to the light-emitting element, and can also be called a driving transistor.
  • One of the source and drain of the driving transistor is electrically connected to the pixel electrode of the light-emitting element.
  • An LTPS transistor can be used as the driving transistor. This makes it possible to increase the current flowing to the light-emitting element in the pixel circuit.
  • the other transistor in the display unit 162 functions as a switch for controlling the selection or non-selection of a pixel and can also be called a selection transistor.
  • the gate of the selection transistor is electrically connected to a gate line (scanning line), and one of the source and drain is electrically connected to a source line (signal line). It is preferable to use an OS transistor as the selection transistor. This allows the gradation of the pixel to be maintained even if the refresh rate is significantly lowered (for example, 1 Hz or less), so that power consumption can be reduced by stopping the driver (driver circuit) when displaying a still image.
  • An insulating layer 195 is provided to cover transistor 205D, transistor 205R, transistor 205G, transistor 207G, and transistor 207B, and an insulating layer 235 is provided on insulating layer 195.
  • Light-emitting elements 130R, 130G, and 130B are provided on insulating layer 235.
  • the light-emitting element 130R has a pixel electrode 111R on the insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R.
  • the light-emitting element 130R shown in FIG. 39A emits red (R) light.
  • the EL layer 113R has a light-emitting layer that emits red light.
  • the light-emitting element 130G has a pixel electrode 111G on the insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G.
  • the light-emitting element 130G shown in FIG. 39A emits green (G) light.
  • the EL layer 113G has a light-emitting layer that emits green light.
  • the light-emitting element 130B has a pixel electrode 111B on the insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B.
  • the light-emitting element 130B shown in FIG. 39A emits blue (B) light.
  • the EL layer 113B has a light-emitting layer that emits blue light.
  • the ends of the pixel electrodes 111R, 111G, and 111B are covered with an insulating layer 237.
  • the insulating layer 237 functions as a partition wall.
  • the insulating layer 237 can be formed in a single layer structure or a multilayer structure using one or both of an inorganic insulating material and an organic insulating material.
  • the material that can be used for the insulating layer 195 and the material that can be used for the insulating layer 235 can be used for the insulating layer 237.
  • the insulating layer 237 can electrically insulate the pixel electrode and the common electrode.
  • the insulating layer 237 can electrically insulate adjacent light-emitting elements from each other.
  • the insulating layer 237 is provided at least in the display section 162.
  • the insulating layer 237 may be provided not only in the display section 162, but also in the connection section 140 and the circuit section 164.
  • the insulating layer 237 may also be provided up to the edge of the display device 50A.
  • the common electrode 115 is a continuous film that is provided in common to the light-emitting elements 130R, 130G, and 130B.
  • the common electrode 115 that is shared by the multiple light-emitting elements is electrically connected to the conductive layer 123 provided in the connection portion 140.
  • the conductive layer 123 it is preferable to use a conductive layer formed of the same material and in the same process as the pixel electrodes 111R, 111G, and 111B.
  • a conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted.
  • the light emitted from the EL layer may be reflected by the reflective layer and extracted from the display device.
  • a metal, an alloy, an electrically conductive compound, a mixture thereof, and the like can be appropriately used as a material for forming a pair of electrodes of a light-emitting element.
  • the material include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, and alloys containing these in appropriate combinations.
  • the light-emitting element preferably has a micro-optical resonator (microcavity) structure. Therefore, one of the pair of electrodes of the light-emitting element is preferably an electrode that is transparent and reflective to visible light (semi-transmissive/semi-reflective electrode), and the other is preferably an electrode that is reflective to visible light (reflective electrode).
  • the light-emitting element have a microcavity structure, the light emitted from the light-emitting layer can be resonated between both electrodes, thereby intensifying the light emitted from the light-emitting element.
  • the EL layer 113R, the EL layer 113G, and the EL layer 113B each have at least a light-emitting layer.
  • the light-emitting layer has one or more types of light-emitting material.
  • a material that emits light of a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red may be used as appropriate.
  • a material that emits near-infrared light may also be used as the light-emitting material.
  • Light-emitting materials include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.
  • the light-emitting element can be made of either a low molecular weight compound or a high molecular weight compound, and may contain an inorganic compound.
  • the layers constituting the light-emitting element can be formed by a deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.
  • EL layer 113R has a structure having multiple light-emitting units that emit red light
  • EL layer 113G has a structure having multiple light-emitting units that emit green light
  • EL layer 113B has a structure having multiple light-emitting units that emit blue light.
  • the protective layer 131 is provided at least on the display unit 162, and is preferably provided so as to cover the entire display unit 162.
  • the protective layer 131 is preferably provided so as to cover not only the display unit 162, but also the connection unit 140 and the circuit unit 164.
  • the protective layer 131 is also preferably provided up to the end of the display device 50A.
  • the connection unit 197 there are portions where the protective layer 131 is not provided in order to electrically connect the FPC 172 and the conductive layer 166.
  • the protective layer 131 has high transparency to visible light.
  • ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.
  • the protective layer 131 may have an organic film.
  • the protective layer 131 may have both an organic film and an inorganic film.
  • organic films that can be used for the protective layer 131 include the organic insulating film that can be used for the insulating layer 235.
  • the display device 50A is a top emission type. Light emitted by the light emitting elements is emitted toward the substrate 152. It is preferable to use a material that is highly transparent to visible light for the substrate 152.
  • the pixel electrodes 111R, 111G, and 111B contain a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.
  • the substrates 151 and 152 can be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like.
  • a material that transmits light is used for the substrate on the side from which light from the light-emitting element is extracted.
  • a flexible material is used for the substrates 151 and 152, the flexibility of the display device can be increased, and a flexible display (e.g., a bendable display, a foldable display, a rollable display, a slidable display, a stretchable display, etc.) can be realized.
  • a polarizing plate may be used for at least one of the substrates 151 and 152.
  • the substrates 151 and 152 may each be made of polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, and cellulose nanofiber. At least one of the substrates 151 and 152 may be made of glass having a thickness sufficient to provide flexibility.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • polyacrylonitrile resin acrylic resin
  • polyimide resin polymethyl methacrylate resin
  • PC
  • various curing adhesives can be used, such as photo-curing adhesives such as ultraviolet curing adhesives, reactive curing adhesives, heat curing adhesives, and anaerobic adhesives.
  • photo-curing adhesives such as ultraviolet curing adhesives, reactive curing adhesives, heat curing adhesives, and anaerobic adhesives.
  • These adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin.
  • materials with low moisture permeability such as epoxy resin are preferable.
  • Two-part mixed resins may also be used.
  • Adhesive sheets, etc. may also be used.
  • FIG. 39B shows an example of a cross section of the display unit 162 of the display device 50B.
  • the display device 50B is mainly different from the display device 50A in that a light-emitting element having a common EL layer 113 and a colored layer (such as a color filter) are used in each subpixel of each color.
  • the configuration shown in FIG. 39B can be combined with the region including the FPC 172, the circuit portion 164, the laminated structure from the substrate 151 to the insulating layer 235 of the display unit 162, the connection portion 140, and the configuration of the end portion shown in FIG. 39A. Note that in the following description of the display device, the description of the same parts as those of the display device described above may be omitted.
  • the light-emitting element 130R has a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130R is extracted as red light to the outside of the display device 50B via the colored layer 132R.
  • the light-emitting element 130G has a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130G is extracted as green light to the outside of the display device 50B via the colored layer 132G.
  • the light-emitting element 130B has a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130B is extracted as blue light to the outside of the display device 50B via the colored layer 132B.
  • a tandem structure For light-emitting elements that emit white light, it is preferable to use a tandem structure. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow (Y) light and a light-emitting unit that emits blue (B) light, a two-stage tandem structure having a light-emitting unit that emits red (R) light and green (G) light and a light-emitting unit that emits blue light, a three-stage tandem structure having, in this order, a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and a light-emitting unit that emits blue light, or a three-stage tandem structure having, in this order, a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light and red light, and a light-emitting unit that emits blue light, etc.
  • examples of the number of layers and color order of the light-emitting units include, from the anode side, a two-layer structure of B and Y, a two-layer structure of B and X (light-emitting unit X), a three-layer structure of B, Y, and B, and a three-layer structure of B, X, and B.
  • the light-emitting element 130B has a conductive layer 124B on the insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114.
  • the light-emitting element 130B shown in FIG. 40A emits blue (B) light.
  • the layer 133B has a light-emitting layer that emits blue light.
  • the layer 133B and the common layer 114 can be collectively referred to as an EL layer.
  • one or both of the conductive layers 124B and 126B can be referred to as a pixel electrode.
  • Layer 133R, layer 133G, and layer 133B are separated from each other.
  • the EL layer in an island shape for each light-emitting element, it is possible to suppress leakage current between adjacent light-emitting elements. This makes it possible to prevent unintended light emission caused by crosstalk, and to realize a display device with extremely high contrast.
  • the conductive layer 124R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 195, and the insulating layer 235.
  • the conductive layer 124G is electrically connected to the conductive layer 112b of the transistor 205G
  • the conductive layer 124B is electrically connected to the conductive layer 112b of the transistor 205B.
  • the common layer 114 has, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may have an electron transport layer and an electron injection layer stacked together, or may have a hole transport layer and a hole injection layer stacked together.
  • the common layer 114 is shared by the light-emitting element 130R, the light-emitting element 130G, and the light-emitting element 130B.
  • An insulating layer containing an organic material can be used as the insulating layer 127. It is preferable to use a photosensitive organic resin as the organic material, for example, a photosensitive resin composition containing an acrylic resin. Note that in this specification, acrylic resin does not only refer to polymethacrylic acid ester or methacrylic resin, but may refer to acrylic polymers in a broad sense.
  • Light-emitting element 130R, light-emitting element 130G, and light-emitting element 130B each have layer 133R, layer 133G, and layer 133B.
  • Layer 133R, layer 133G, and layer 133B are formed using the same material and in the same process.
  • Layer 133R, layer 133G, and layer 133B are separated from each other.
  • the light-emitting elements 130R, 130G, and 130B shown in FIG. 40B emit white light.
  • the white light emitted by the light-emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B to obtain light of the desired color.
  • the light-emitting element 130R, the light-emitting element 130G, and the light-emitting element 130B shown in FIG. 40B emit blue light.
  • the layer 133R, the layer 133G, and the layer 133B have one or more light-emitting layers that emit blue light.
  • the blue light emitted by the light-emitting element 130B can be extracted.
  • a color conversion layer is provided between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, so that the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength, and red or green light can be extracted.
  • the carrier concentration of a channel formation region of the oxide semiconductor is 1 ⁇ 10 18 cm ⁇ 3 or less, preferably less than 1 ⁇ 10 17 cm ⁇ 3 , more preferably less than 1 ⁇ 10 16 cm ⁇ 3 , further preferably less than 1 ⁇ 10 13 cm ⁇ 3 , and further preferably less than 1 ⁇ 10 10 cm ⁇ 3 and 1 ⁇ 10 ⁇ 9 cm ⁇ 3 or more.
  • the density of defect states in the oxide semiconductor may be reduced by reducing the impurity concentration in the oxide semiconductor.
  • a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor may have a low density of trap states due to a low density of defect states.
  • charges captured in the trap states of the oxide semiconductor may take a long time to disappear and may behave as if they were fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.
  • impurities in an oxide semiconductor refer to, for example, anything other than the main component constituting the oxide semiconductor.
  • an element with a concentration of less than 0.1 atomic % can be considered an impurity.
  • an OS transistor may form a defect (hereinafter sometimes referred to as VOH ) in which hydrogen is introduced into an oxygen vacancy in an oxide semiconductor, and generate electrons that serve as carriers.
  • VOH a defect
  • the donor concentration in the channel formation region may increase.
  • the threshold voltage of the OS transistor may vary as the donor concentration in the channel formation region increases. For this reason, when oxygen vacancies are present in the channel formation region of an oxide semiconductor, an OS transistor is likely to have normally-on characteristics (a drain current flows when a gate voltage is 0 V). Therefore, impurities, oxygen vacancies, and VOH are preferably reduced as much as possible in the channel formation region of an oxide semiconductor.
  • the band gap of the oxide semiconductor is preferably larger than that of silicon (typically 1.1 eV), and is preferably 2 eV or more, more preferably 2.5 eV or more, and further preferably 3.0 eV or more.
  • the off-state current (also referred to as Ioff) of the transistor can be reduced.
  • OS transistors use oxide semiconductors, which are semiconductor materials with a large band gap, and therefore the short channel effect can be suppressed. In other words, OS transistors are transistors that do not have a short channel effect or have an extremely small short channel effect.
  • the short channel effect is a degradation of electrical characteristics that becomes evident as transistors are miniaturized (reduced channel length).
  • Specific examples of short channel effects include a decrease in threshold voltage, an increase in subthreshold swing value (sometimes referred to as S value), and an increase in leakage current.
  • S value refers to the amount of change in gate voltage when the drain current is changed by one order of magnitude while the drain voltage is constant in the subthreshold region.
  • the OS transistor can also be considered to have an n + / n ⁇ /n + accumulation-type junction-less transistor structure or an n + /n ⁇ /n + accumulation-type non- junction transistor structure in which the channel formation region is an n ⁇ type region and the source region and the drain region are each an n + type region .
  • the cutoff frequency of the transistor can be improved.
  • the cutoff frequency of the transistor can be set to, for example, 50 GHz or more, preferably 100 GHz or more, and more preferably 150 GHz or more in a room temperature environment.
  • OS transistors have the excellent advantages of having a smaller off-state current than Si transistors and being capable of producing transistors with a short channel length.
  • the semiconductor device of one embodiment of the present invention can also be applied to portions other than the display portion of an electronic device.
  • the semiconductor device of one embodiment of the present invention in a control portion of an electronic device, it is possible to reduce power consumption, which is preferable.
  • the display device of one embodiment of the present invention preferably has an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels).
  • an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels).
  • HD 1280 x 720 pixels
  • FHD (1920 x 1080 pixels
  • WQHD 2560 x 1440 pixels
  • WQXGA 2560 x 1600 pixels
  • 4K 3840 x 2160 pixels
  • 8K 8K
  • the pixel density (resolution) of the display device of one embodiment of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, more preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 7000 ppi or more.
  • the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, or 16:10.
  • the electronic device of this embodiment may have a sensor (including the function of sensing, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light).
  • a sensor including the function of sensing, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light).
  • the electronic device of this embodiment can have various functions. For example, it can have a function to display various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date, or time, a function to execute various software (programs), a wireless communication function, and a function to read out programs or data recorded on a recording medium.
  • FIG. 41A to 41D An example of a wearable device that can be worn on the head will be described using Figures 41A to 41D.
  • These wearable devices have at least one of the following functions: a function to display AR content, a function to display VR content, a function to display SR content, and a function to display MR content.
  • a function to display AR content a function to display AR content
  • VR content a function to display VR content
  • SR content a function to display SR content
  • MR content a function to display MR content
  • a display device can be applied to the display panel 751. Therefore, the electronic device can display images with extremely high resolution.
  • Each of the electronic devices 700A and 700B can project an image displayed on the display panel 751 onto the display area 756 of the optical member 753. Because the optical member 753 is translucent, the user can see the image displayed in the display area superimposed on the transmitted image visually recognized through the optical member 753. Therefore, each of the electronic devices 700A and 700B is an electronic device capable of AR display.
  • Electronic device 700A and electronic device 700B may be provided with a camera capable of capturing an image of the front as an imaging unit.
  • electronic device 700A and electronic device 700B may each be provided with an acceleration sensor such as a gyro sensor, thereby detecting the orientation of the user's head and displaying an image corresponding to that orientation in display area 756.
  • the communication unit has a wireless communication device, and can supply video signals and the like via the wireless communication device.
  • a connector may be provided to which a cable through which a video signal and a power supply potential can be connected.
  • the housing 721 may be provided with a touch sensor module.
  • the touch sensor module has a function of detecting that the outer surface of the housing 721 is touched.
  • the touch sensor module can detect a tap operation or a slide operation by the user and execute various processes. For example, a tap operation can execute processes such as pausing or resuming a video, and a slide operation can execute processes such as fast-forwarding or rewinding. Furthermore, by providing a touch sensor module on each of the two housings 721, the range of operations can be expanded.
  • a photoelectric conversion element can be used as the light receiving element.
  • the active layer of the photoelectric conversion element can be made of either or both of an inorganic semiconductor and an organic semiconductor.
  • Each of the electronic devices 800A and 800B can be considered to be electronic devices for VR.
  • a user wearing the electronic device 800A or the electronic device 800B can view the image displayed on the display unit 820 through the lens 832.
  • the imaging unit 825 has a function of acquiring external information.
  • the data acquired by the imaging unit 825 can be output to the display unit 820.
  • An image sensor can be used for the imaging unit 825.
  • multiple cameras may be provided to support multiple angles of view, such as telephoto and wide angle.
  • Each of the electronic devices 800A and 800B may have an input terminal.
  • the input terminal can be connected to a cable that supplies a video signal from a video output device, power for charging a battery provided in the electronic device, and the like.
  • the electronic device 6500 shown in Figure 42A is a portable information terminal that can be used as a smartphone.
  • a display device of one embodiment of the present invention can be applied to the display portion 6502.
  • a transparent protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, optical members 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are arranged in the space surrounded by the housing 6501 and the protective member 6510.
  • the display panel 6511, the optical member 6512, and the touch sensor panel 6513 are fixed to the protective member 6510 by an adhesive layer (not shown).
  • Figure 42C shows an example of a television device.
  • a display unit 7000 is built into a housing 7101.
  • the housing 7101 is supported by a stand 7103.
  • the television device 7100 is configured to include a receiver and a modem.
  • the receiver can receive general television broadcasts.
  • by connecting to a wired or wireless communication network via the modem it is also possible to perform one-way (only from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication.
  • FIG 42D shows an example of a notebook personal computer.
  • the notebook personal computer 7200 has a housing 7211, a keyboard 7212, a pointing device 7213, and an external connection port 7214.
  • the display unit 7000 is built into the housing 7211.
  • a display device of one embodiment of the present invention can be applied to the display portion 7000.
  • Figure 42F shows a digital signage 7400 attached to a cylindrical pole 7401.
  • the digital signage 7400 has a display unit 7000 that is provided along the curved surface of the pole 7401.
  • the larger the display unit 7000 the more information can be provided at one time. Also, the larger the display unit 7000, the more easily it catches people's attention, which can increase the advertising effectiveness of, for example, advertisements.
  • a touch panel By applying a touch panel to the display unit 7000, not only can images or videos be displayed on the display unit 7000, but the user can also intuitively operate it, which is preferable. Furthermore, when used to provide information such as route information or traffic information, the intuitive operation can improve usability.
  • the digital signage 7300 or the digital signage 7400 can be linked via wireless communication with an information terminal 7311 or an information terminal 7411, such as a smartphone carried by a user.
  • advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411.
  • the display on the display unit 7000 can be switched by operating the information terminal 7311 or the information terminal 7411.
  • the digital signage 7300 or the digital signage 7400 can also be made to run a game using the screen of the information terminal 7311 or the information terminal 7411 as an operating means (controller). This allows an unspecified number of users to participate in and enjoy the game at the same time.
  • the electronic device shown in Figures 43A to 43G has various functions. For example, it can have a function of displaying various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function of displaying a calendar, date, or time, a function of controlling processing by various software (programs), a wireless communication function, and a function of reading and processing programs or data recorded on a recording medium.
  • the functions of the electronic device are not limited to these, and the electronic device can have various functions.
  • the electronic device may have multiple display units.
  • the electronic device may have a camera or the like to capture still images or videos and store them on a recording medium (external or built into the camera), and a function of displaying the captured images on the display unit.
  • Figure 43B is a perspective view showing a mobile information terminal 9102.
  • the mobile information terminal 9102 has a function of displaying information on three or more sides of the display unit 9001.
  • information 9052, information 9053, and information 9054 are each displayed on different sides.
  • a user can check information 9053 displayed in a position that can be observed from above the mobile information terminal 9102 while the mobile information terminal 9102 is stored in a breast pocket of clothes.
  • the user can check the display without taking the mobile information terminal 9102 out of the pocket and decide whether or not to answer a call.
  • one or more circuits that enable the functional connection between X and Y for example, a logic circuit (for example, an inverter, a NAND circuit, or a NOR circuit), a signal conversion circuit (for example, a digital-to-analog conversion circuit, an analog-to-digital conversion circuit, or a gamma correction circuit), a potential level conversion circuit (for example, a power supply circuit (for example, a step-up circuit or a step-down circuit), or a level shifter circuit that changes the potential level of a signal), a voltage source, a current source, a switching circuit, an amplifier circuit (for example, a circuit that can increase the signal amplitude or current amount, an operational amplifier, a differential amplifier circuit, a source follower circuit, or a buffer circuit), a signal generation circuit, a memory circuit, or a control circuit) can be connected between X and Y.
  • a logic circuit for example, an inverter, a NAND circuit, or a NOR circuit
  • the term “resistance element” may be, for example, a circuit element or wiring having a resistance value higher than 0 ⁇ . Therefore, in this specification, the term “resistance element” may include, for example, a wiring having a resistance value, a transistor in which a current flows from a drain to a source, a diode, or a coil. Therefore, the term “resistance element” may be rephrased as, for example, a “resistance”, a "load”, or a “region having a resistance value”. Conversely, the term “resistance”, “load”, or a "region having a resistance value” may be rephrased as, for example, a "resistance element”.
  • the term “capacitive element” may refer to, for example, a circuit element having a capacitance value higher than 0F, a region of wiring having a capacitance value higher than 0F, a parasitic capacitance, or a gate capacitance of a transistor. Therefore, in this specification, the term “capacitive element” is not limited to a circuit element including a pair of electrodes and a dielectric included between the electrodes. The term “capacitive element” includes, for example, a parasitic capacitance occurring between wirings, or a gate capacitance occurring between one of the source or drain of a transistor and the gate.
  • one of the two input/output terminals becomes a source and the other becomes a drain depending on the conductivity type of the transistor (n-channel or p-channel) and the level of the potential applied to the three terminals of the transistor.
  • the source function and the drain function may be interchanged.
  • the terms "source” and “drain” are interchangeable.
  • the terms "one of the source or drain” (or first electrode, or first terminal) or “the other of the source or drain” (or second electrode, or second terminal) are used.
  • the transistor may be a multi-gate transistor having two or more gate electrodes.
  • the channel formation regions are connected in series, so that a plurality of transistors are connected in series. Therefore, a multi-gate transistor can reduce the off-current and improve the withstand voltage (improve reliability) of the transistor.
  • a multi-gate transistor when a multi-gate transistor operates in the saturation region, even if the voltage between the drain and source changes, the current between the drain and source does not change much, and a voltage-current characteristic with a flat slope can be obtained.
  • a transistor having a voltage-current characteristic with a flat slope can realize an ideal current source circuit or an active load with a very high resistance value. As a result, a transistor having a voltage-current characteristic with a flat slope can realize, for example, a differential circuit with good characteristics or a current mirror circuit.
  • electrode B on insulating layer A does not necessarily mean that electrode B is formed in direct contact with insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B.
  • terms such as “row” or “column” may be used to describe components arranged in a matrix and their positional relationships. Furthermore, the positional relationships between components change as appropriate depending on the direction in which each component is depicted. Therefore, terms such as “row” or “column” described in this specification are not limited to these terms and can be rephrased appropriately depending on the situation. For example, the expression “row direction” can be rephrased as “column direction” by rotating the orientation of the drawing shown by 90 degrees.
  • terms such as “film” or “layer” may be interchangeable depending on the situation.
  • the term “conductive layer” may be interchangeable with the term “conductive film”.
  • the term “insulating film” may be interchangeable with the term “insulating layer”.
  • the term “film” or “layer” may be interchangeable with another term depending on the situation without using those terms.
  • the term “conductive layer” or “conductive film” may be interchangeable with the term “conductor”.
  • the term “conductor” may be interchangeable with the term “conductive layer” or “conductive film”.
  • the term “insulating layer” or “insulating film” may be interchangeable with the term “insulating body”.
  • the term “insulating body” may be interchangeable with the term “insulating layer” or “insulating film”.
  • Electrode may be used as a part of a “wiring”, and vice versa.
  • the terms “electrode” or “wiring” include, for example, cases where a plurality of “electrodes” or “wirings” are formed integrally.
  • a “terminal” may be used as a part of a “wiring” or “electrode”, and vice versa.
  • the term “terminal” includes, for example, cases where a plurality of "electrodes", “wirings”, or “terminals” are formed integrally.
  • an “electrode” can be a part of a “wiring” or “terminal”.
  • a “terminal” can be a part of a “wiring” or “electrode”.
  • terms such as “electrode”, “wiring”, or “terminal” may be replaced with a term such as "region”.
  • a switch is something that has the function of controlling whether or not a current flows.
  • a switch is something that has the function of selecting and switching the path through which a current flows.
  • a switch for example, an electrical switch or a mechanical switch can be used.
  • the switch is not limited to a specific one as long as it can control a current.
  • the difference between the height of the top surface of the first layer and the height of the top surface of the second layer is 20 nm or less, the term "having the same or approximately the same height" is also used.
  • metal oxide is a metal oxide in a broad sense.
  • Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), and oxide semiconductors (also referred to as oxide semiconductors or simply OS).
  • oxide semiconductors also referred to as oxide semiconductors or simply OS.
  • the metal oxide when a metal oxide is used for a semiconductor including a channel formation region of a transistor, the metal oxide may be called an oxide semiconductor.
  • a metal oxide when a metal oxide is used as a material that can constitute a channel formation region of a transistor having at least one of an amplification function, a rectification function, and a switching function, the metal oxide can be called a metal oxide semiconductor.
  • the description of an "OS transistor" can be rephrased as a transistor having a metal oxide or an oxide semiconductor.
  • one of the X-direction, Y-direction, and Z-direction may be called the "first direction” or “first direction”.
  • the other may be called the “second direction” or “second direction”.
  • the remaining one may be called the "third direction” or "third direction”.

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  • Computing Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
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PCT/IB2023/063067 2022-12-28 2023-12-21 半導体装置、および表示装置 Ceased WO2024141888A1 (ja)

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JP2004201297A (ja) * 2002-12-03 2004-07-15 Semiconductor Energy Lab Co Ltd アナログ回路及びそれを用いた表示装置並びに電子機器
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JP2005266365A (ja) 2004-03-18 2005-09-29 Semiconductor Energy Lab Co Ltd ソースフォロワ回路及びその駆動方法、ボルテージフォロワ回路、表示装置
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JPH06101563B2 (ja) * 1988-07-19 1994-12-12 工業技術院長 薄膜電界効果トランジスタとその製造方法
JP2002057537A (ja) * 2000-07-17 2002-02-22 Ind Technol Res Inst 補償Ｖｇｓを具えたソースフォロワ
JP2004004241A (ja) * 2002-05-31 2004-01-08 Sony Corp アナログバッファ回路、表示装置および携帯端末
JP2004201297A (ja) * 2002-12-03 2004-07-15 Semiconductor Energy Lab Co Ltd アナログ回路及びそれを用いた表示装置並びに電子機器
JP2004350256A (ja) * 2003-03-25 2004-12-09 Mitsubishi Electric Corp オフセット補償回路と、それを用いたオフセット補償機能付駆動回路および液晶表示装置
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