WO2024114604A1 - 发光元件、发光组件及制作方法 - Google Patents

发光元件、发光组件及制作方法 Download PDF

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Publication number
WO2024114604A1
WO2024114604A1 PCT/CN2023/134488 CN2023134488W WO2024114604A1 WO 2024114604 A1 WO2024114604 A1 WO 2024114604A1 CN 2023134488 W CN2023134488 W CN 2023134488W WO 2024114604 A1 WO2024114604 A1 WO 2024114604A1
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Prior art keywords
light
emitting
emitting element
epitaxial structure
groove
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PCT/CN2023/134488
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English (en)
French (fr)
Inventor
叶雪萍
夏德玲
李佳恩
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厦门三安光电有限公司
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Publication of WO2024114604A1 publication Critical patent/WO2024114604A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present invention relates to the field of semiconductor manufacturing technology, and in particular to a light-emitting element, a light-emitting component and a manufacturing method thereof.
  • Micro LED display technology refers to a display technology that uses self-luminous micron-sized LEDs as light-emitting pixel units and assembles them on a drive panel to form a high-density LED array. Due to the small size, high integration and self-luminescence of Micro LED chips, its display has greater advantages than LCD and OLED in terms of brightness, resolution, contrast, energy consumption, service life, response speed and thermal stability.
  • High-voltage Micro LED chips came into being. They use micro-machining technology to isolate adjacent LED cells on the epitaxial layer, and then deposit metal to connect the LED cell array in series, so that LED products have better optoelectronic properties and meet the market demand for high light power density as much as possible.
  • problems such as poor production yield and insufficient chip performance.
  • the present invention provides a light-emitting element, which comprises at least two adjacent light-emitting units and a bridging conductive bridge; the bridging conductive bridge is connected to the adjacent light-emitting units to form a series connection.
  • the light-emitting unit comprises an epitaxial structure and a dielectric layer.
  • the epitaxial structure has a first surface and a second surface opposite to each other, the first surface is a light emitting surface; a groove penetrating from the first surface to the second surface is provided between the light emitting units connected in series; and a plurality of removal areas that do not penetrate the epitaxial structure are provided on the second surface;
  • the dielectric layer covers the second surface of the light-emitting unit and extends across the groove to cover the second surface of the light-emitting unit connected in series therewith; the bridging conductive bridge is located on a side of the dielectric layer away from the epitaxial structure and is electrically connected to the epitaxial structure through at least one removed area.
  • the grooves used to divide a series of light-emitting units are set on the light-emitting surface of the epitaxial structure, and the bridging conductive bridge and the removal area and the dielectric layer used to connect the light-emitting units in series are set on the other side of the epitaxial structure.
  • the projections of the plurality of removed areas on the epitaxial structure are outside the projection range of the grooves on the epitaxial structure.
  • the removal area includes a first internal removal area located on the inner side of the epitaxial structure; the first internal removal area is used to achieve electrical connection between the epitaxial structure and the bridging conductive bridge; the distance H from the first internal removal area to the bottom of the groove is set to a range of 0.5 to 3 microns to shorten the spanning distance of the bridging conductive bridge while avoiding the distance being too small to affect the conductive performance of the series connection.
  • the thickness of the bridging conductive bridge is in the range of 0.5 to 1.5 micrometers
  • the material of the bridging conductive bridge includes at least one of a dielectric material, a metal, and a semiconductor material.
  • the epitaxial structure includes a first type semiconductor layer, a light-emitting layer and a second type semiconductor layer stacked in sequence from the first surface to the second surface; a first through hole and a second through hole are opened on the dielectric layer; the first through hole penetrates the dielectric layer and is connected to the first internal removal area; the first internal removal area extends from the second surface to the first surface to expose the first type semiconductor layer of the light-emitting unit; the second through hole penetrates the dielectric layer and exposes the second type semiconductor layer of another light-emitting unit connected in series with the light-emitting unit; the bridging conductive bridge is electrically connected to the first type semiconductor layer and the second type semiconductor layer of the two light-emitting units connected in series with each other through the first through hole and the second through hole, respectively.
  • the dielectric layer has a thickness ranging from 0.5 to 1.5 microns, and the dielectric layer at least includes a reflective layer.
  • the thickness of the dielectric layer is limited to prevent the dielectric layer from being too thin to play a supporting role, or too thick to waste materials and increase process etching.
  • the removal area also includes an external removal area located at the outer edge of the epitaxial structure; the external removal area is removed from the second surface of the epitaxial structure to the first surface to expose the first type of semiconductor layer; the dielectric layer extends to cover the external removal area.
  • the opening of the groove gradually decreases from the first surface to the second surface, which can effectively reduce the span distance of the bridge conductive bridge, thereby reducing the overall size of the chip.
  • the groove has a groove sidewall connecting the first surface and the second surface, and the groove sidewall is formed by at least one plane or at least one arc surface or a combination thereof.
  • the groove has a top edge located at the connection between the groove sidewall and the first surface and a bottom edge located at the connection between the groove sidewall and the second surface; an angle ⁇ between a common perpendicular line between the top edge and the bottom edge and the second surface is less than 90°.
  • the angle ⁇ is in a range of greater than or equal to 45° and less than 70°, or greater than or equal to 70° and less than 80°, or greater than or equal to 80° and less than 90°.
  • the angle ⁇ is in a range of greater than 45° and less than 75°, which is beneficial for covering the insulating layer to protect the epitaxial structure.
  • the groove sidewall is an inclined plane or an inclined arc surface.
  • an angle ⁇ between a tangent line of the inclined arc surface and the second surface is greater than 30° and less than 90°, and the angle ⁇ gradually increases or decreases.
  • the groove sidewall is formed by at least two planes with different inclination angles or at least two arc surfaces with different curvature radii or a combination thereof.
  • the groove has a structure of being wide at the top and narrow at the bottom, which is beneficial to reducing the bridging distance of the bridge conductive bridge, ensuring the stability of the bridge, making it less likely to have defects such as cracks or breaks, and improving the reliability of the device.
  • the grooves of the light-emitting units connected in series have a minimum horizontal distance between them, which is greater than or equal to 0.1 micrometers and less than or equal to 2 micrometers. This distance range is beneficial to the light-emitting effect of the light-emitting element and ensures the stability of the process.
  • the light-emitting units connected in series have a maximum horizontal distance therebetween, and the maximum horizontal distance is smaller than a minimum spacing between adjacent light-emitting elements.
  • the long side dimension of the light-emitting element does not exceed 200 microns, and the short side dimension of the light-emitting element does not exceed 100 microns.
  • the present invention also provides a light-emitting component, which includes multiple groups of light-emitting elements as described in any of the above embodiments; further includes a circuit substrate and multiple metal electrodes; the multiple groups of light-emitting elements are arranged on the circuit substrate at intervals; the metal electrodes are arranged between the circuit substrate and the light-emitting units, and are electrically connected to the circuit substrate and the light-emitting elements respectively.
  • the light-emitting component of the light-emitting element described in the above embodiments can not only ensure the deposition effect of the bridge conductive bridge and reduce the bridging distance of the bridge conductive bridge, but also reduce the damage caused by the removal process, thereby improving the stability and reliability of the device process.
  • the present invention also provides a method for manufacturing a light emitting component, comprising the following steps:
  • An epitaxial structure is fabricated on a growth substrate, wherein the epitaxial structure has a first surface and a second surface opposite to each other; the epitaxial structure comprises a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence from the first surface to the second surface; a portion of the outer edge of the epitaxial structure is removed on the outer edge of the second surface of the epitaxial structure to form an outer removal area, and a portion of the inner portion of the epitaxial structure is removed until the first semiconductor layer is exposed to form a first inner removal area; then, a dielectric layer is formed on the second surface and the outer removal area and extends to cover the sidewalls of the first inner removal area;
  • the insulating layer covers the dielectric layer, the bridging conductive bridge and the external removal area; making a plurality of metal electrodes on the insulating layer by an evaporation process and electrically contacting the first semiconductor layer and the second semiconductor layer of the epitaxial structure; making conductive pads on the metal electrodes and transferring them to a temporary substrate; then, peeling off the growth substrate and exposing the first surface of the epitaxial structure;
  • a portion of the epitaxial structure is removed from the first surface toward the second surface to form a groove, and the groove divides the epitaxial structure into a series of light-emitting units.
  • the projections of the outer removal area and the first inner removal area on the epitaxial structure are outside the projection range of the trench on the epitaxial structure.
  • FIG1 is a cross-sectional view of a light emitting component provided by the present invention.
  • FIG2 is a top view of the light emitting assembly provided by the present invention.
  • FIG3 is a partial structural cross-sectional view of a light emitting element provided by the present invention.
  • 9 to 13 are schematic diagrams of the process of manufacturing the light emitting component.
  • Fig. 1 is a schematic diagram of the structure of a light-emitting component provided by an embodiment of the present invention.
  • a light-emitting element 2 which may include at least two adjacent light-emitting units and a bridging conductive bridge 3.
  • the bridging conductive bridge 3 is connected to adjacent light-emitting units to form a series connection; wherein the thickness of the bridging conductive bridge 3 is in the range of 0.5 to 1.5 micrometers, and the thickness of the bridging conductive bridge 3 is limited to ensure the effective series connection of the light-emitting units by the bridging conductive bridge 3.
  • the material of the bridging conductive bridge 3 includes at least one of dielectric, metal, and semiconductor material. In this embodiment, metal material is preferred.
  • the light-emitting element 2 preferably includes two adjacent light-emitting units, which are bridged in series by a bridging conductive bridge 3. It should be noted that the light-emitting element 2 is not limited to the two light-emitting units shown in FIG1 , and those skilled in the art can set the number according to actual work requirements. In addition, the connection relationship between the light-emitting units is not limited to series connection, and can also be set to parallel connection or series-parallel mixed connection according to actual work requirements.
  • the light-emitting element 2 is generally rectangular or quasi-rectangular, the long side dimension of the light-emitting element 2 does not exceed 200 microns, and the short side dimension of the light-emitting element 2 does not exceed 100 microns.
  • the size of the light-emitting element 2 it is possible to ensure the performance of the light-emitting element while avoiding excessive size of the light-emitting element and reducing production costs.
  • Each light-emitting unit at least includes an epitaxial structure 21 and a dielectric layer 22.
  • the epitaxial structure 21 has a first surface and a second surface opposite to each other, and the first surface is a light-emitting surface.
  • the epitaxial structure 21 includes a first semiconductor layer 211, a light-emitting layer 212, and a second semiconductor layer 213 stacked in sequence from the first surface to the second surface.
  • the first type semiconductor layer 211 may be composed of a III-V group or a II-VI group compound semiconductor, and may be doped with a first dopant.
  • the first type semiconductor layer 211 may be composed of a semiconductor material having a chemical formula In X1Al Y1Ga 1-X1-Y1N (0 ⁇ X1 ⁇ 1, 0 ⁇ Y1 ⁇ 1, 0 ⁇ X1+Y1 ⁇ 1), such as GaN, AlGaN, InGaN, InAlGaN, etc., or a material selected from AlGaAs, GaP, GaAs, GaAsP and AlGaInP.
  • the first dopant may be an n-type dopant, such as Si, Ge, Sn, Se and Te.
  • the first type semiconductor layer 211 doped with the first dopant is an n-type semiconductor layer.
  • the first dopant may also be a p-type dopant, such as Mg, Zn, Ca, Sr and Ba, and the first type semiconductor layer 211 doped with the first dopant is a p-type semiconductor layer.
  • the first surface of the first type semiconductor layer 211 is a light emitting surface. In order to improve the light extraction efficiency of the light emitting element 2, the first surface of the first type semiconductor layer 211 may be roughened to form a roughened structure. In some optional embodiments, the first surface may not be roughened.
  • the light-emitting layer 212 is disposed between the first semiconductor layer 211 and the second semiconductor layer 213.
  • the light-emitting layer 212 is a region that provides light radiation for the recombination of electrons and holes. Different materials can be selected according to different luminescent wavelengths. By adjusting the composition ratio of the semiconductor materials in the light-emitting layer 212, it is expected to radiate light of different wavelengths.
  • the light-emitting layer 212 can be a periodic structure of a single quantum well or multiple quantum wells.
  • the light-emitting layer 212 includes a well layer and a barrier layer, wherein the barrier layer has a larger band gap than the well layer.
  • the material of the quantum well In order to improve the luminous efficiency of the light-emitting layer 212, it can be achieved by changing the material of the quantum well, the number of layers, thickness and/or other characteristics of the paired quantum wells and quantum barriers in the light-emitting layer 212.
  • the second type semiconductor layer 213 is formed on the light emitting layer 212 and may be composed of a III ⁇ V group or a II ⁇ VI group compound semiconductor.
  • the second type semiconductor layer 213 may be doped with a second dopant.
  • the second type semiconductor layer 213 may be composed of a semiconductor material having a chemical formula In X2Al Y2Ga 1 ⁇ X2 ⁇ Y2N (0 ⁇ X2 ⁇ 1, 0 ⁇ Y2 ⁇ 1, 0 ⁇ X2+Y2 ⁇ 1), or a material selected from AlGaAs, GaP, GaAs, GaAsP and AlGaInP.
  • the second type semiconductor layer 213 doped with the second dopant is a p-type semiconductor layer.
  • the second dopant may also be an n-type dopant, such as Si, Ge, Sn, Se and Te.
  • the second type semiconductor layer 213 doped with the second dopant is an n-type semiconductor layer.
  • the second type semiconductor layer 213 is a p-type semiconductor layer; conversely, when the first type semiconductor layer 211 is a p-type semiconductor layer, the second type semiconductor layer 213 is an n-type semiconductor layer.
  • the epitaxial structure 21 may also include other layer materials, such as a current spreading layer, a window layer or an ohmic contact layer, etc., which may be arranged as different layers according to different doping concentrations or component contents.
  • the epitaxial structure 21 is preferably made of GaN-based material, and the light-emitting layer 212 radiates blue light.
  • the dielectric layer 22 is used to support the entire light-emitting unit, and an insulating material may be selected.
  • the thickness of the dielectric layer 22 ranges from 0.5 to 1.5 microns to avoid the dielectric layer 22 being too thin to play a supporting role, and being too thick to waste materials and increase process etching.
  • the dielectric layer 22 may include at least a reflective layer, preferably a distributed Bragg reflector (DBR), but not limited to this. It includes a first layer and a second layer stacked alternately, wherein the refractive index of the first layer is different from the refractive index of the second layer.
  • the materials of the first layer and the second layer include dielectric oxides containing TiOX, SiOX or AlOX.
  • the reflective layer can also be an full-angle reflector (ODR); it includes selecting metal materials such as Al, Ag, Au and combining them with DBR to form a full-angle reflector.
  • ODR full-angle reflector
  • metal materials such as Al, Ag, Au and combining them with DBR to form a full-angle reflector.
  • a current spreading layer, a transparent conductive layer and other structures can be added to the dielectric layer 22 to improve the performance of the entire light-emitting element.
  • FIG. 1 there is a groove 24 running from the first surface to the second surface between the light-emitting units connected in series; the groove 24 is arranged on one side of the first surface, and divides the light-emitting element 2 into a series of light-emitting units.
  • the groove 24 can be removed by an ISO etching process.
  • the shape and structure of the groove 24 can be designed according to actual needs and are not limited here.
  • the second surface is provided with a plurality of removal areas 6 which do not penetrate the epitaxial structure 21;
  • the dielectric layer 22 covers the second surface of the light-emitting unit and extends across the groove 24 to cover the second surface of the light-emitting unit connected in series therewith;
  • the bridging conductive bridge 3 is located on the side of the dielectric layer 22 away from the epitaxial structure 21, and is electrically connected to the epitaxial structure 21 through at least one removal area 6.
  • the bridging conductive bridge 3 not need to be deposited across the groove 24, effectively avoiding the disconnection of the bridging conductive bridge 3, but also avoiding the secondary alignment when the groove 24 is formed and the existence of operational deviations, thereby effectively improving the yield of the light-emitting element.
  • the dielectric layer 22 is provided between the epitaxial structure 21 and the bridging conductive bridge 3, which not only enhances the structural support force of the entire light-emitting element 2 and improves the stability of the process, but also increases the contact area between the bridging conductive bridge 3 and the light-emitting element 2, ensuring that the bridging conductive bridge 3 will not have defects such as breakage or cracks during the process.
  • the projections of the removal areas 6 on the epitaxial structure 21 are outside the projection range of the grooves 24 on the epitaxial structure 21. That is, the position of the removal area 6 is staggered from the position of the grooves 24, and the removal can be performed at different positions during the removal process.
  • This design can effectively avoid the problems of poor process stability, increased damage to the device, height difference or coating fault of the bridge conductive bridge 3 when the two are located at the same overlapping position in the traditional removal process. It is only necessary to coat the dielectric layer 22 of the same height, which is beneficial to improve the transfer yield of the light-emitting element 2 and further improve the performance of the device.
  • the removal area 6 includes a first internal removal area 61 located inside the epitaxial structure 21; the first internal removal area 61 is used to realize the electrical connection between the epitaxial structure 21 and the bridging conductive bridge 3; please refer to FIG1 , the distance H from the first internal removal area 61 to the bottom of the groove 24 is set to a range of 0.5 to 3 microns, so as to further shorten the bridging distance of the bridging conductive bridge 3, and at the same time avoid the difficulty in manufacturing the removal area 6 caused by the bridging distance being too short, but the embodiments of the present disclosure are not limited to this.
  • the series connection method of the light-emitting unit and the bridging conductive bridge 3 is as follows: a first through hole 22a and a second through hole 22b are opened on the dielectric layer 22; the first through hole 22a penetrates the dielectric layer 22 and is connected to the first internal removal area 61; the first internal removal area 61 extends from the second surface to the first surface to expose the first type semiconductor layer 211 of the light-emitting unit; the second through hole 22b penetrates the dielectric layer 22 and exposes the second type semiconductor layer 213 of another light-emitting unit connected in series with the light-emitting unit; the bridging conductive bridge 3 is electrically connected to the first type semiconductor layer 211 and the second type semiconductor layer 213 of the two light-emitting units connected in series with each other through the first through hole 22a and the second through hole 22b respectively.
  • the light-emitting element 2 also includes an insulating layer 23, and the insulating layer 23 covers the dielectric layer 22 and the bridging conductive bridge 3.
  • the material of the insulating layer 23 can be a non-conductive material selected from inorganic oxides or nitrides, or silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, barium titanate, magnesium fluoride aluminum oxide or a combination thereof.
  • the removal area 6 also includes an external removal area 63 located at the outer edge of the epitaxial structure 21; the external removal area 63 is removed from the second surface of the epitaxial structure 21 to the first surface to expose the first type semiconductor layer 211; the dielectric layer 22 and the insulating layer 23 extend to cover the external removal area 63.
  • the light extraction efficiency can be further improved while enhancing the structural support of the entire light-emitting element 2.
  • the opening of the groove 24 gradually decreases from the first surface to the second surface.
  • This configuration makes the groove 24 have a structure with a wide top and a narrow bottom, wherein the narrow bottom portion is used for the bridging of the bridging conductive bridge 3, thereby ensuring that the bridging distance of the bridging conductive bridge 3 is effectively reduced, thereby reducing the overall size of the chip and improving the luminous efficiency.
  • it can not only reduce the thickness of the bridging conductive bridge 3 and reduce the production cost, but also ensure the stability of the bridge, making it less likely to have defects such as cracks or breaks, thereby improving the reliability of the device.
  • the groove 24 has a groove sidewall 24a connecting the first surface and the second surface, and the groove sidewall 24a is formed by at least one plane or at least one curved surface or a combination of the foregoing.
  • the groove sidewall 24a can be an inclined plane or an inclined arc surface, that is, its cross-sectional shape is an inverted trapezoid.
  • the angle ⁇ between the tangent of the inclined arc surface and the second surface is greater than 30° and less than 90°, and the angle ⁇ can gradually decrease from the first surface to the second surface to form a concave arc as shown in Figure 4, or gradually increase from the first surface to the second surface to form a convex arc as shown in Figure 5.
  • the convex arc design in Figure 5 can better protect the first internal removal area 61 from being over-exposed or even breaking through the epitaxial structure 21 during the process.
  • the groove sidewall 24a can also be formed by at least two planes with different inclination angles or at least two cambered surfaces with different curvature radii or a combination of the foregoing.
  • the groove sidewall 24a can include a first inclined surface, a horizontal surface and a second inclined surface extending sequentially from the first surface to the second surface, so that it is stepped, which can reduce the step difference during manufacturing and is beneficial to the stability of processing.
  • the inclination angle of the first inclined surface is less than or equal to the inclination angle of the second inclined surface.
  • the inclination angle is the angle between the inclined surface and the second surface.
  • groove sidewall 24a is not limited to that shown in the accompanying drawings. According to the concept of the invention, those skilled in the art may also replace it with other combinations. It may also be composed of three or four different plane and arc surface styles, such as shown in FIG8 . It is specifically arranged according to actual needs, and its replacement falls within the protection scope of the present invention.
  • the groove 24 has a top edge 24b located at the connection between the groove side wall 24a and the first surface, and a bottom edge 24c located at the connection between the groove side wall 24a and the second surface; the angle ⁇ between the common perpendicular line between the top edge 24b and the bottom edge 24c and the second surface is less than 90°. It should be noted that during the production process, the top edge 24b and the bottom edge 24c of the groove 24 are not completely parallel in space due to their own design or manufacturing errors.
  • the angle between the plane formed by the top edge 24b and the bottom edge 24c (that is, the plane where the common perpendicular line is located) and the second surface can be defined as ⁇ . If the top edge 24b and the bottom edge 24c are skew straight lines, the angle between the common perpendicular line between the top edge 24b and the bottom edge 24c and the second surface is defined as ⁇ .
  • Such a limitation of the angle ⁇ being less than 90° can effectively ensure that no matter how the groove sidewall 24a changes, the bottom area of the groove 24 is smaller than the top area, thereby facilitating the effective deposition of the dielectric layer 22 and the bridging conductive bridge 3 at the bottom of the groove 24. While improving the connection stability of the bridging conductive bridge 3, the bridging conductive bridge 3 can also be made thinner, thereby reducing the manufacturing cost of the device.
  • the range of the angle ⁇ is greater than or equal to 45° and less than 70°, or greater than or equal to 70° and less than 80°, or greater than or equal to 80° and less than 90°.
  • the range of the angle ⁇ is greater than 45° and less than 75°, and the range of the angle ⁇ can facilitate the back-plating of the insulating layer 23 of the light-emitting component, thereby effectively protecting the epitaxial structure 21 and the light-emitting layer 212.
  • the grooves 24 of the light-emitting units connected in series have a minimum horizontal distance, and the minimum horizontal distance is greater than or equal to 0.1 microns and less than or equal to 2 microns.
  • the use of this distance range is beneficial to the light-emitting effect of the light-emitting element 2 and ensures the stability of the process.
  • the light-emitting units connected in series have a maximum horizontal distance, and the maximum horizontal distance is less than the minimum spacing between adjacent light-emitting elements 2.
  • the present invention also provides a light-emitting component, which includes at least multiple groups of light-emitting elements 2 as described in any of the above embodiments; and also includes a circuit substrate 1 and multiple metal electrodes 5.
  • the multiple groups of light-emitting elements 2 are arranged at intervals on the circuit substrate 1;
  • the circuit substrate 1 can be a complementary metal oxide semiconductor (CMOS) substrate, a liquid crystal on silicon (LCOS) substrate, a thin film transistor (TFT) substrate or other substrates with working circuits to drive the multiple groups of light-emitting elements 2 to emit light of corresponding colors, which is not limited here.
  • CMOS complementary metal oxide semiconductor
  • LCOS liquid crystal on silicon
  • TFT thin film transistor
  • the metal electrode 5 is arranged between the circuit substrate 1 and the light-emitting unit, and is electrically connected to the circuit substrate 1 and the light-emitting element 2, respectively.
  • the metal electrode 5 can be a single-layer, double-layer or multi-layer structure, such as Ti/Al, Ti/Al/Ti/Au, Ti/Al/Ni/Au, V/Al/Pt/Au and other stacked structures.
  • the light-emitting component also includes a conductive pad 4, which is in direct contact with the circuit substrate 1 and the metal electrode 5, respectively, to achieve electrical connection between the light-emitting element 2 and the circuit substrate 1.
  • the removal area 6 also includes a second internal removal area 62 located inside the epitaxial structure 21; the second internal removal area 62 is used to achieve electrical connection between the epitaxial structure 21 and the metal electrode 5.
  • a second internal removal area 62 located inside the epitaxial structure 21; the second internal removal area 62 is used to achieve electrical connection between the epitaxial structure 21 and the metal electrode 5.
  • an opening corresponding to the second internal removal area 62 and connected to the second internal removal area 62 is provided on the insulating layer 23 and the dielectric layer 22, and the metal electrode 5 is electrically connected to the epitaxial structure 21 through the opening and the second internal removal area 62.
  • the two light-emitting units connected in series can be divided into a first light-emitting unit and a second light-emitting unit, and the specific circuit connection method between the two is: one end of the bridging conductive bridge 3 is connected to the first type semiconductor layer 211 of the first light-emitting unit, and the other end is connected to the second type semiconductor layer 213 of the second light-emitting unit; at least one metal electrode 5 is connected to the second type semiconductor layer 213 of the first light-emitting unit, and at least one other metal electrode 5 is connected to the first type semiconductor layer 211 of the second light-emitting unit, and at least one metal electrode 5 is electrically connected to the circuit substrate 1, thereby realizing a complete series circuit of the first light-emitting unit and the second light-emitting unit.
  • Figures 9 to 12 are schematic diagrams of the process of manufacturing the light-emitting component.
  • the manufacturing method of the light-emitting component of the present invention is described in detail below in conjunction with the schematic diagrams.
  • An epitaxial structure 21 is fabricated on a growth substrate 7.
  • the epitaxial structure 21 has a first surface and a second surface relative to each other.
  • the epitaxial structure 21 includes a first semiconductor layer 211, a light-emitting layer 212, and a second semiconductor layer 213 stacked in sequence from the first surface to the second surface.
  • the growth substrate 7 may be an insulating substrate or a conductive substrate.
  • the epitaxial structure 21 may be formed on the growth substrate 7 by physical vapor deposition (PVD), chemical vapor deposition (CVD), and epitaxial growth. Next, a portion of the outer edge of the epitaxial structure 21 is removed on the second surface of the epitaxial structure 21 to form an external removal area 63.
  • a portion of the interior of the epitaxial structure 21 is removed until the first semiconductor layer 211 is exposed to form a first internal removal area 61.
  • a dielectric layer 22 is formed on the second surface and the external removal area 63 and extends to cover the sidewalls of the first internal removal area 61.
  • a dielectric layer 22 is back-plated on the light-emitting element 2.
  • the dielectric layer 22 may be formed by vacuum evaporation, sputtering, or chemical evaporation.
  • the dielectric layer 22 at least includes a reflective layer, which is preferably a distributed Bragg reflector.
  • a portion of the dielectric layer 22 is removed from the dielectric layer 22 to form a first through hole 22a that passes through the first internal removal area 61; a portion of the dielectric layer 22 is removed from the dielectric layer 22 to form a second through hole 22b; a bridging conductive bridge 3 is made on the dielectric layer 22, and is electrically contacted with the first type semiconductor layer 211 and the second type semiconductor layer 213 of the epitaxial structure 21 through the first internal removal area 61, the first through hole 22a, and the second through hole 22b.
  • An insulating layer 23 is deposited, and the insulating layer 23 covers the dielectric layer 22, the bridging conductive bridge 3 and the external removal area 63.
  • the insulating layer 23 is preferably made of SiNx or SiO2 material. Part of the insulating layer 23 and part of the dielectric layer 22 are removed to form an opening, and then part of the epitaxial structure 21 is extended and removed until the first type semiconductor 211 layer is exposed to form a second internal removal area 62.
  • a plurality of metal electrodes 5 are made on the insulating layer 23 by an evaporation process and contact the first semiconductor layer 211 and the second semiconductor layer 213 of the epitaxial structure 21 through the opening and the second internal removal area 62.
  • a conductive pad 4 is made on the metal electrode 5 and transferred to a temporary substrate 8.
  • the growth substrate 7 is peeled off and the first surface of the epitaxial structure 21 is exposed. In this embodiment, the first surface may be roughened.
  • part of the epitaxial structure 21 is removed from the first surface to the second surface to form a groove 24, and the groove 24 divides the epitaxial structure 21 into a series of light-emitting units, as shown in Figure 1.
  • the specific structure of the groove 24 can be removed with reference to the embodiment of the aforementioned light-emitting element, and will not be elaborated here.
  • the removal process is at least one of laser, dry etching, and wet etching.
  • the specific selection can be based on actual needs and is not limited here.
  • the present embodiment preferably uses an ISO etching process.
  • the projections of the external removal area 63, the first internal removal area 61, and the second internal removal area 62 on the epitaxial structure 21 are outside the projection range of the groove 24 on the epitaxial structure 21.
  • the light-emitting element as described in any of the above embodiments, or the light-emitting component as described in any of the above embodiments, or the manufacturing method of the light-emitting component as described in any of the above embodiments is applied to a display device, which can effectively improve the performance of the display device.

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Abstract

本发明涉及半导体制造技术领域，特别涉及一种发光元件、发光组件及制作方法。发光元件包括至少两个相邻的发光单元及桥接在相邻发光单元上以形成彼此串联的桥接导电桥；发光单元包括外延结构、介质层；外延结构具有第一表面、第二表面；彼此串联的发光单元之间具有由第一表面向第二表面方向贯穿的沟槽；第二表面开设有若干移除区；介质层覆盖彼此串联的发光单元的第二表面并延伸跨过沟槽，桥接导电桥位于介质层背离外延结构一侧，并通过移除区与外延结构电连接。通过上述设置，使得桥接导电桥无需跨过沟槽进行沉积，从而有效避免桥接导电桥断开。并且在保证器件高压特性的同时，还能避开移除沟槽时的二次对位，有利于芯片制程的稳定性。

Description

发光元件、发光组件及制作方法 技术领域
本发明涉及半导体制造技术领域，特别涉及一种发光元件、发光组件及制作方法。
 背景技术
Micro LED显示技术是指以自发光的微米量级的LED为发光像素单元，将其组装到驱动面板上形成高密度LED阵列的显示技术。由于Micro LED芯片尺寸小、集成度高和自发光等特点, 其显示方面与 LCD、OLED相比在亮度、分辨率、对比度、能耗、使用寿命、响应速度和热稳定性等方面具有更大的优势。
为了满足对LED亮度的需求，高压Micro LED芯片应运而生，其通过微加工技术将在外延层上实现相邻LED单胞之间的相互隔离，再通过沉积金属对LED单胞阵列串联，以使得LED产品具有更好的光电特性，尽可能满足市场对于高光功率密度的需求。然而，现有高压MicroLED芯片在制作过程中，存在制作良率不佳而导致芯片性能不足等问题。
 技术解决方案
本发明提供一种发光元件，所述发光元件至少包括至少两个相邻的发光单元和桥接导电桥；所述桥接导电桥桥接在相邻的所述发光单元上以形成彼此串联。所述发光单元包括外延结构以及介质层。
所述外延结构具有彼此相对的第一表面、第二表面，所述第一表面为出光面；彼此串联的所述发光单元之间具有由所述第一表面向所述第二表面方向贯穿的沟槽；所述第二表面开设有若干不贯穿外延结构的移除区；
所述介质层覆盖所述发光单元的所述第二表面并跨过沟槽延伸覆盖至与之串联的所述发光单元的所述第二表面；所述桥接导电桥位于所述介质层背离所述外延结构的一侧，并通过至少一移除区与外延结构电连接。
通过上述对发光元件进行设计，将用于划分一系列发光单元的沟槽设置在外延结构的出光面，将用于串联发光单元的桥接导电桥及移除区、介质层设置在外延结构的另一面，不仅能够使得桥接导电桥无需跨过沟槽进行沉积，有效避免桥接导电桥断开，还能够避免沟槽形成时的二次对位而存在作业偏差，从而有效提高发光元件的良率。
在一实施例中，从发光元件的上方向外延结构俯视，若干所述移除区在外延结构上的投影位于所述沟槽在外延结构上的投影范围之外。通过沟槽与移除区的错开设置，可有效避免桥接导电桥存在高度差或者镀膜断层等问题，只需在等高的介质层上镀膜即可，从而有利于器件制程的稳定性，进一步提高器件的性能。
在一实施例中，所述移除区包括位于外延结构内侧的第一内部移除区；所述第一内部移除区用于实现外延结构与桥接导电桥的电连接；所述第一内部移除区到沟槽底部的距离H的范围设置为0.5~3微米，以缩短桥接导电桥跨接距离的同时避免距离过小而影响串联的导电性能。
在一实施例中，所述桥接导电桥的厚度范围为0.5~1.5微米，所述桥接导电桥的材料至少包括电介质、金属、半导体材料中的一种。
在一实施例中，所述外延结构包括由第一表面向第二表面依次层叠的第一类半导体层、发光层以及第二类半导体层；所述介质层上开设有第一通孔和第二通孔；所述第一通孔贯穿介质层且与所述第一内部移除区相连通；所述第一内部移除区由第二表面向第一表面延伸至裸露出所述发光单元的第一类半导体层；所述第二通孔贯穿介质层并裸露出与所述发光单元彼此串联的另一发光单元的第二类半导体层；所述桥接导电桥通过所述第一通孔、第二通孔分别与彼此串联的两个所述发光单元的所述第一类半导体层和第二类半导体层电连接。
在一实施例中，所述介质层的厚度范围是0.5~1.5微米，所述介质层至少包括反射层。通过对介质层的厚度限定以避免介质层太薄而无法起到支撑作用，太厚而浪费材料且增加工艺蚀刻。
在一实施例中，所述移除区还包括位于所述外延结构外边缘的外部移除区；所述外部移除区由外延结构的第二表面向第一表面移除至暴露出第一类半导体层；所述介质层延伸覆盖至外部移除区。通过上述介质层的覆盖设计，不仅能够提高出光效率，还能增强整个发光元件的结构支撑力，提高工艺制程的稳定性。同时，还增加了桥接导电桥与发光元件的接触面积，制程过程中不会出现断裂或者裂缝等缺陷，使得桥接导电桥厚度更薄。
在一实施例中，所述沟槽由所述第一表面向所述第二表面方向的开口逐渐减小，可以有效缩小桥接导电桥的跨接距离，进而减小芯片的整体尺寸。
在一实施例中，所述沟槽具有连接第一表面和第二表面的沟槽侧壁，所述沟槽侧壁由至少一平面或至少一弧面或前述组合形成。
在一实施例中，所述沟槽具有位于所述沟槽侧壁与所述第一表面连接处的顶边以及位于所述沟槽侧壁与所述第二表面连接处的底边；所述顶边与所述底边的公垂线与所述第二表面的夹角θ小于90°。
在一实施例中，所述夹角θ的范围为大于等于45°且小于70°，或大于等于70°且小于80°，或大于等于80°且小于90°。通过上述对夹角θ的限定，能够有效避免夹角θ过小而影响发光面积，过大而影响工艺制程。
在一实施例中，所述夹角θ的范围为大于45°且小于75°，从而有利于覆盖绝缘层，以保护外延结构。
在一实施例中，所述沟槽侧壁为一倾斜平面或一倾斜弧面。
在一实施例中，所述沟槽侧壁为倾斜弧面时，所述倾斜弧面的切线与第二表面的夹角β大于30°且小于90°，且夹角β逐渐增大或逐渐减小。
在一实施例中，所述沟槽侧壁为由至少两个倾斜角度不同的平面或至少两个曲率半径不同的弧面或前述组合形成。
通过上述对沟槽侧壁的限定，使得沟槽呈顶部宽底部窄的结构，从而有利于缩小桥接导电桥的跨接距离。保证桥接的稳定性，使其不易出现裂缝或者断裂等缺陷，提高器件的可靠性。
在一实施例中，彼此串联的所述发光单元的所述沟槽之间具有最小水平距离，所述最小水平距离大于等于0.1微米且小于等于2微米。采用该距离范围有利于发光元件的发光效果以及保证工艺制程的稳定性。
在一实施例中，彼此串联的所述发光单元之间具有最大水平距离，所述最大水平距离小于相邻发光元件之间的最小间距。
在一实施例中，在由彼此串联的两个所述发光单元组成的所述发光元件中，所述发光元件的长边尺寸不超过200微米，所述发光元件的短边尺寸不超过100微米。通过上述对发光元件尺寸的限定，避免发光组件过大，减少成本。
本发明还提供一种发光组件，所述发光组件包括多组采用如上任一实施例所述的发光元件；还包括电路基板和多个金属电极；所述多组发光元件间隔排布在所述电路基板上；所述金属电极设置在所述电路基板与所述发光单元之间，且分别与所述电路基板、所述发光元件电连接。通过采样上述实施例所述的发光元件的发光组件不仅保证桥接导电桥的沉积效果、减小桥接导电桥的跨接距离，还能减少移除工艺造成的损伤，提高器件制程的稳定性和可靠性。
本发明还提供一种发光组件的制作方法，包括以下步骤：
在生长衬底上制作外延结构，所述外延结构具有相对的第一表面、第二表面；所述外延结构包括由第一表面向第二表面依次层叠的第一类半导体层、发光层、第二类半导体层；在所述外延结构的第二表面外边缘上移除部分外延结构的外边缘以形成外部移除区，并移除部分外延结构的内部至暴露出第一类半导体层以形成第一内部移除区；接着，在第二表面、外部移除区上形成介质层并延伸覆盖至第一内部移除区的侧壁；
在所述介质层上移除部分介质层形成与所述第一内部移除区贯通的第一通孔；在所述介质层上移除部分介质层形成第二通孔；在所述介质层上制作桥接导电桥，并通过第一内部移除区、第一通孔、第二通孔与所述外延结构的第一类半导体层、第二类半导体层电接触；
沉积绝缘层，所述绝缘层覆盖介质层和桥接导电桥以及外部移除区；通过蒸镀工艺在所述绝缘层上制作若干金属电极并与所述外延结构的第一类半导体层、第二类半导体层电接触；在所述金属电极上制作导电垫块并转移到临时基板上；接着，剥离所述生长衬底，并暴露出所述外延结构的第一表面；
由所述第一表面向第二表面移除掉部分所述外延结构以形成沟槽，所述沟槽将所述外延结构划分一系列发光单元。
在一实施例中，从发光组件的上方向外延结构俯视，所述外部移除区、第一内部移除区在外延结构上的投影位于所述沟槽在外延结构上的投影范围之外。
本发明的其它特征和有益效果将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。
 附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1是本发明提供的发光组件的剖面图；
图2是本发明提供的发光组件的俯视图；
图3是本发明提供的发光元件的部分结构剖面图；
图4~图8是本发明提供的其他实施例的发光组件的剖视图；
图9~图13是发光组件的制作方法的过程示意图。
附图标记：
1-电路基板；2-发光元件；3-桥接导电桥；4-导电垫块；5-金属电极；21-外延结构；22-介质层；211-第一类半导体层；212-发光层；213-第二类半导体层；23-绝缘层；6-移除区；61-第一内部移除区；62-第二内部移除区；63-外部移除区；22a-第一通孔；22b-第二通孔；24-沟槽；24a-沟槽侧壁；24b-顶边；24c-底边；7-生长衬底；8-临时基板。
 本发明的实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述；下面所描述的本发明不同实施方式中所设计的技术特征只要彼此之间未构成冲突就可以相互结合。
请参阅图1，图1是本发明实施例提供的一种发光组件的结构示意图。为达所述优点至少其中之一或其他优点，本发明的一实施例提供一种发光元件2，发光元件2至少可以包括至少两个相邻的发光单元和桥接导电桥3。
桥接导电桥3桥接在相邻的所述发光单元上以形成彼此串联；其中，桥接导电桥3的厚度范围为0 .5～1 .5微米，通过该桥接导电桥3的厚度限定以保证桥接导电桥3对发光单元的有效串联。桥接导电桥3的材料至少包括电介质、金属、半导体材料中的一种。本实施例优选为金属材料。
 如图1所示，发光元件2优选为包括两个相邻的发光单元，并通过一个桥接导电桥3桥接串联。应当说明的是，发光元件2不局限包括如图1所示的两个发光单元，本领域技术人员可根据实际工作需求设置数量。此外各个发光单元的连接关系也不局限于串联，同样可根据实际工作需求设置为并联或串并混联等。较佳地，在由彼此串联的两个所述发光单元组成的所述发光元件2中，发光元件2一般为矩形或类矩形，所述发光元件2的长边尺寸不超过200微米，所述发光元件2的短边尺寸不超过100微米。通过上述对发光元件2尺寸的限定，能够保证发光元件性能的同时，避免发光元件尺寸过大，降低生产成本。
每一发光单元至少包括外延结构21以及介质层22。外延结构21具有彼此相对的第一表面、第二表面，所述第一表面为出光面。具体而言，外延结构21包括由第一表面向第二表面方向依次层叠的第一类半导体层211、发光层212和第二类半导体层213。
所述第一类半导体层211可以由III‑V族或II‑VI族化合物半导体组成，并且可以掺杂有第一掺杂剂。第一类半导体层211可以由具有化学式In X1Al Y1Ga 1‑X1‑Y1N(0≤X1≤1 ,0≤Y1≤1，0≤X1+Y1≤1)的半导体材料组成，例如GaN，AlGaN，InGaN，InAlGaN等，或选自AlGaAs，GaP，GaAs，GaAsP和AlGaInP的材料。另外，第一掺杂剂可以是n型掺杂剂，例如Si，Ge，Sn，Se和Te。当第一掺杂剂是n型掺杂剂时，掺杂有第一掺杂剂的第一类半导体层211为n型半导体层。第一掺杂剂也可以是p型掺杂剂，例如Mg，Zn，Ca，Sr和Ba时，掺杂有第一掺杂剂的第一类半导体层211为p型半导体层。所述第一类半导体层211的第一表面为出光面。为了提升发光元件2的出光效率，可对第一类半导体层211的第一表面进行粗化处理，形成粗化结构。在一些可选的实施例中，第一表面也可以不经过粗化处理。
所述发光层212设置在第一类半导体层211和第二类半导体层213之间。发光层212为提供电子和空穴复合提供光辐射的区域，根据发光波长的不同可选择不同的材料，通过调整发光层212中半导体材料的组成比，以期望辐射出不同波长的光。发光层212可以是单量子阱或多量子阱的周期性结构。发光层212包含阱层和垒层，其中垒层具有比阱层更大的带隙。为了提高发光层212的发光效率，可通过在发光层212中改变量子阱的材料、成对的量子阱和量子势垒的层数、厚度和/或其它特征来实现。
 所述第二类半导体层213形成在发光层212上，并且可以由III‑V族或II‑VI族化合物半导体组成。第二类半导体层213可以掺杂第二掺杂剂。第二类半导体层213可由具有化学式In X2Al Y2Ga 1‑X2‑Y2N(0≤X2≤1，0≤Y2≤1，0≤X2+Y2≤1)的半导体材料组成，或选自AlGaAs，GaP，GaAs，GaAsP和AlGaInP的材料。当第二掺杂剂为p型掺杂剂，例如Mg，Zn，Ca，Sr和Ba时，掺杂第二掺杂剂的第二类半导体层213为p型半导体层。第二掺杂剂也可以为n型掺杂剂，例如Si，Ge，Sn，Se和Te。当第二掺杂剂是n型掺杂剂时，掺杂有第二掺杂剂的第二类半导体层213为n型半导体层。当第一类半导体层211为n型半导体层时，第二类半导体层213为p型半导体层；反之，当第一类半导体层211为p型半导体层时，第二类半导体层213为n型半导体层。
外延结构21还可以包括其它层材料，如电流扩展层、窗口层或欧姆接触层等，根据掺杂浓度或组分含量不同进行设置为不同的多层。在本实施例中，优选所述外延结构21的材料为GaN基，发光层212辐射蓝光。
 所述介质层22用于支撑整个发光单元，可选择绝缘材料。较佳地，所述介质层22的厚度范围是0 .5～1 .5微米，以避免介质层22太薄而无法起到支撑作用，太厚而浪费材料且增加工艺蚀刻。为了提高发光效率，介质层22可至少包括反射层，优选为分布式布拉格反射镜(DBR)，但不以此为限。其包括交替堆叠的第一层和第二层，其中第一层的折射率不同于第二层的折射率。第一层和第二层的材料包括含有含有TiOX、SiOX或AlOX的介电氧化物。反射层还可以为全角反射镜(ODR)；其包括选择Al、Ag、Au等金属材料与DBR结合起来形成全角反射镜。当然，除了反射层，介质层22上还可增加电流扩展层、透明导电层等结构来提高整个发光元件的性能。
 传统的高压Micro LED芯片使用LED单胞跨接导电桥进行串联时，  一般是将MESA光刻结构、桥接导电桥以及ISO蚀刻设计在同一芯片表面，这将导致桥接导电桥在ISO蚀刻处的沉积效果不好，容易产生金属沉积断层；且在制程过程中，ISO蚀刻时需在MESA光刻结构上进行二次对位，这就存在作业偏差、不准确的问题，从而影响LED芯片的性能。
 为了有效解决上述问题，请继续参阅图1，在本实施例中，彼此串联的所述发光单元之间具有由所述第一表面向所述第二表面方向贯穿的沟槽24；沟槽24设置在第一表面一侧，并将发光元件2划分为一系列的发光单元，较佳地，沟槽24可通过ISO蚀刻工艺进行移除获得。其中，沟槽24的形状、结构可根据实际需求进行设计，在此不加以限制。
 请参阅图3，在本实施例中，所述第二表面开设有若干不贯穿外延结构21的移除区6；所述介质层22覆盖所述发光单元的所述第二表面并跨过沟槽24延伸覆盖至与之串联的所述发光单元的所述第二表面；所述桥接导电桥3位于所述介质层22背离所述外延结构21的一侧，并通过至少一移除区6与外延结构21电连接。
 通过上述将用于划分一系列发光单元的沟槽24设置在外延结构21的出光面，将用于串联发光单元的桥接导电桥3及移除区6、介质层22设置在出光面的相对面，不仅使得桥接导电桥3无需跨过沟槽24进行沉积，有效避免桥接导电桥3断开，还能够避免沟槽24形成时的二次对位而存在作业偏差，从而有效提高发光元件的良率。此外，在外延结构21和桥接导电桥3之间设置介质层22，不仅能增强整个发光元件2的结构支撑力，提高工艺制程的稳定性，还增加了桥接导电桥3与发光元件2之间的接触面积，保证制程过程中桥接导电桥3不会出现断裂或者裂缝等缺陷。
在一较佳的实施例中，请参阅图2、图3，从发光元件2的上方向外延结构21俯视，若干所述移除区6在外延结构21上的投影位于所述沟槽24在外延结构21上的投影范围之外。即，移除区6的位置与沟槽24的位置错开，在进行移除工艺时，可分别在不同的位置进行移除。通过该设计可有效避免传统的移除工艺中，这二者位于同一重叠位置存在制程稳定性差、增加对器件的损伤、桥接导电桥3存在高度差或者镀膜断层等问题，只需在等高的介质层22上镀膜即可，从而有利于提升发光元件2的转移良率，进一步提高器件的性能。
 所述移除区6包括位于外延结构21内侧的第一内部移除区61；所述第一内部移除区61用于实现外延结构21与桥接导电桥3的电连接；请参阅图1，所述第一内部移除区61到沟槽24底部的距离H的范围设置为0 .5～3微米，以进一步缩短桥接导电桥3的跨接距离，同时避免桥接距离过短而造成移除区6的制作困难，但本公开实施例并非以此为限。
 进一步地，发光单元与桥接导电桥3的串联方式为：所述介质层22上开设有第一通孔22a和第二通孔22b；所述第一通孔22a贯穿介质层22且与所述第一内部移除区61相连通；所述第一内部移除区61由第二表面向第一表面延伸至裸露出所述发光单元的第一类半导体层211；所述第二通孔22b贯穿介质层22并裸露出与所述发光单元彼此串联的另一发光单元的第二类半导体层213；所述桥接导电桥3通过所述第一通孔22a、第二通孔22b分别与彼此串联的两个所述发光单元的所述第一类半导体层211和第二类半导体层213电连接。
 此外，为了保护和绝缘发光元件2，避免异物进入发光元件2。所述发光元件2还包括绝缘层23，所述绝缘层23覆盖所述介质层22以及所述桥接导电桥3。具体的，绝缘层23的材料可以采用非导电材料，选择自无机氧化物或者氮化物，或者二氧化硅、氮化硅、氧化钛、氧化钽、氧化铌、钛酸钡、氟化镁氧化铝或者其组合。
 较佳的，为了进一步保护发光元件2，提高出光效率。所述移除区6还包括位于外延结构21外边缘的外部移除区63；所述外部移除区63由外延结构21的第二表面向第一表面移除至暴露出第一类半导体层211；所述介质层22、所述绝缘层23延伸覆盖至外部移除区63。通过该设置，能够进一步提高出光效率的同时，增强整个发光元件2的结构支撑力。
 在一较佳的实施例中，所述沟槽24由所述第一表面向所述第二表面方向的开口逐渐减小。通过该设置使得沟槽24呈顶部宽底部窄的结构，其中底部窄的位置用于桥接导电桥3的跨接，保证桥接导电桥3的跨接距离有效缩小，进而减小芯片的整体尺寸，提升发光效率。同时不仅能减薄桥接导电桥3的厚度，降低生产成本，还保证桥接的稳定性，使其不易出现裂缝或者断裂等缺陷，从而提高器件的可靠性。
 在另一实施例中，所述沟槽24具有连接第一表面和第二表面的沟槽侧壁24a，所述沟槽侧壁24a由至少一平面或至少一弧面或前述组合形成。
 具体而言，如图1、图4、图5所示，沟槽侧壁24a可以为一倾斜平面或一倾斜弧面，即，其剖面形状为倒梯形。当沟槽侧壁24a为一倾斜弧面时，所述倾斜弧面的切线与第二表面的夹角β的范围为大于30°且小于90°，且夹角β可如图4所示由第一表面向第二表面方向逐渐减小形成凹弧或如图5所示由第一表面向第二表面方向逐渐增大形成凸弧。相较于图4凹弧的设计，图5中凸弧设计能够更好地保护第一内部移除区61在制程中不会过度暴露甚至击穿外延结构21。
沟槽侧壁24a还可以为由至少两个倾斜角度不同的平面或至少两个曲率半径不同的弧面或前述组合形成。例如，如图6所示为两个倾斜角度不同平面组成。如图7所示，沟槽侧壁24a可以包括由所述第一表面向所述第二表面方向依次延伸的第一倾斜面、水平面以及第二倾斜面，使其呈台阶状，可以减少制作时的段差，有利于加工的稳定性。为了更便于对该沟槽侧壁24a的加工，所述第一倾斜面的倾斜角度小于或等于所述第二倾斜面的倾斜角度。该倾斜角度为倾斜面与第二表面之间的夹角。
 当然，沟槽侧壁24a的设置方式并不局限于附图所示，根据该发明构思，本领域技术人员还可替换成其他组合方式，还可以由三个或四个不同平面及弧面样式组合而成，例如图8所示，具体根据实际需求进行设置，其替换均落入本发明的保护范围。
 在另一较佳的实施例中，所述沟槽24具有位于所述沟槽侧壁24a与所述第一表面连接处的顶边24b以及位于所述沟槽侧壁24a与所述第二表面连接处的底边24c；所述顶边24b与所述底边24c的公垂线与所述第二表面的夹角θ小于90°。需要说明的是，在生产制造过程中，沟槽24的顶边24b和底边24c由于本身设计或制造误差并非呈空间上完全平行的关系。因此，若顶边24b与底边24c为相互平行的直线时，顶边24b与底边24c形成平面(即为公垂线所在的平面)与第二表面的夹角可定义为θ。若顶边24b与底边24c为异面直线时，限定顶边24b和底边24c之间的公垂线与第二表面的夹角定义为θ。如此对夹角θ小于90°的限定，可有效保证无论沟槽侧壁24a如何变化，沟槽24的最底部面积比最顶部面积小，从而便于介质层22、桥接导电桥3在沟槽24底部的有效沉积，在提高桥接导电桥3的连接稳定性的同时，还能将桥接导电桥3做的更薄，从而降低器件的制造成本。
 较佳地，所述夹角θ的范围为大于等于45°且小于70°，或大于等于70°且小于80°，或大于等于80°且小于90°。通过上述对夹角θ的限定，能够有效避免夹角θ过小而影响发光面积，过大而影响工艺制程。更进一步地，所述夹角θ的范围为大于45°且小于75°，该夹角θ的范围能够便于发光组件背镀绝缘层23，从而有效保护外延结构21以及发光层212。[0068] 可选地，彼此串联的所述发光单元的所述沟槽24之间具有最小水平距离，所述最小水平距离大于等于0 .1微米且小于等于2微米。采用该距离范围有利于发光元件2的发光效果以及保证工艺制程的稳定性。在另外一实施例中，彼此串联的所述发光单元之间具有最大水平距离，所述最大水平距离小于相邻发光元件2之间的最小间距。
 请再参阅图1，本发明还提供一种发光组件，所述发光组件至少包括多组采用如上任一实施例所述的一种发光元件2；还包括电路基板1和多个金属电极5。
 所述多组发光元件2间隔排布在所述电路基板1上；电路基板1可以是互补式金属氧化物半导体(Complementary Metal‑Oxide‑Semiconductor ,CMOS)基板、硅基液晶(Liquid Crystal on Silicon ,LCOS)基板、薄膜晶体管(Thin Film Transistor ,TFT)基板或是其他具有工作电路的基板，以驱动多组发光元件2发出对应颜色的光线，在此并不加以限制。
 所述金属电极5设置在所述电路基板1与所述发光单元之间，且分别与所述电路基板1、所述发光元件2电连接。其中，金属电极5可以为单层、双层或多层结构，例如Ti/Al、Ti/Al/Ti/Au、Ti/Al/Ni/Au、V/Al/Pt/Au等叠层结构。在一可选的实施例中，所述发光组件还包括导电垫块4，所述导电垫块4分别与所述电路基板1、所述金属电极5直接接触以实现发光元件2与电路基板1的电连接。
 可选地，所述移除区6还包括位于外延结构21内侧的第二内部移除区62；所述第二内部移除区62用于实现外延结构21与金属电极5的电连接。具体而言，绝缘层23和介质层22上开设有与第二内部移除区62相对应的与第二内部移除区62相连通的开口，金属电极5通过开口和第二内部移除区62与外延结构21电连接。
 应当说明的是，两个彼此串联的发光单元可分为第一发光单元和第二发光单元，二者具体的电路连接方式为：桥接导电桥3一端与第一发光单元的第一类半导体层211连接，另一端与第二发光单元的第二类半导体层213连接；至少一个金属电极5与第一发光单元的第二类半导体层213连接，另外至少一个金属电极5与第二发光单元的第一类半导体层211连接，至少一个金属电极5与另外至少一个金属电极5则与电路基板1电连接，从而实现第一发光单元与第二发光单元完整的串联回路。
 请参阅图9～图12是发光组件的制作方法的过程示意图，下面结合示意图对本发明的发光组件的制作方法进行详细描述。
 请参阅图9，在生长衬底7上制作外延结构21，所述外延结构21具有相对的第一表面、第二表面；所述外延结构21包括由第一表面向第二表面依次层叠的第一类半导体层211、发光层212、第二类半导体层213；其中，生长衬底7可以是绝缘性基板或导电性基板，外延结构21可以通过物理气相沉积(PVD)、化学气相沉积(CVD)和外延生长等方式形成在生长衬底7上。接着，在所述外延结构21的第二表面上移除部分外延结构21的外边缘以形成外部移除区63；并移除部分外延结构21的内部至暴露出第一类半导体层211以形成第一内部移除区61；接着，在第二表面、外部移除区63上形成介质层22并延伸覆盖至第一内部移除区61的侧壁。本实施例针对发光元件2进行背镀介质层22。该介质层22可采用真空蒸镀法、溅射法或者化学蒸镀法的方式形成。本实施例介质层22至少包括反射层，优选为分布式布拉格反射镜。
 请参阅图10，在所述介质层22上移除部分介质层22形成与所述第一内部移除区61贯通的第一通孔22a；在所述介质层22上移除部分介质层22形成第二通孔22b；在所述介质层22上制作桥接导电桥3，并通过第一内部移除区61、第一通孔22a、第二通孔22b与外延结构21的第一类半导体层211、第二类半导体层213电接触。
 请参阅图11，沉积绝缘层23，所述绝缘层23覆盖介质层22和桥接导电桥3以及外部移除区63，绝缘层23优选采用SiNx或者SiO2材料；移除部分绝缘层23、部分介质层22形成开口，再延伸移除部分外延结构21直至暴露出第一类半导体211层形成第二内部移除区62。
 请参阅图12，通过蒸镀工艺在所述绝缘层23上制作若干金属电极5并通过开口、第二内部移除区62与外延结构21的第一类半导体层211、第二类半导体层213接触；在金属电极5上制作导电垫块4并转移到临时基板8上；接着，请参阅图13，剥离生长衬底7，并暴露出外延结构21的第一表面。本实施例中，可对第一表面进行粗化处理。
 最后，由所述第一表面向所述第二表面移除掉部分外延结构21以形成沟槽24，所述沟槽24将外延结构21划分一系列发光单元，具体如图1所示。其中，沟槽24的具体结构可参照前述发光元件的实施例进行移除，在此不多加赘述。
 在一优选方案中，所述移除的工艺为激光、干蚀刻、湿蚀刻中的至少一种。具体可根据实际需求进行选择，在此不做限定。本实施例优选为ISO蚀刻工艺。
 较佳地，从发光组件的上方向外延结构21俯视，所述外部移除区63、第一内部移除区61、第二内部移除区62在外延结构21上的投影位于所述沟槽24在外延结构21上的投影范围之外。通过将外部移除区63、第一内部移除区61以及第二内部移除区62与沟槽24错开移除的设计，能够有效避免传统的移除工艺存在的缺陷，提升发光元件的转移良率。
 作为一种优选方案，将采用如上任一实施例所述的发光元件，或如上任一实施例所述的发光组件，或如上任一实施例所述的发光组件的制作方法应用于显示装置中，可有效提高显示装置的性能。
 最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (18)

  1. 一种发光元件，其特征在于，所述发光元件包括：
    至少两个相邻的发光单元；
    桥接导电桥，所述桥接导电桥桥接在相邻的所述发光单元上以形成彼此串联；
    所述发光单元包括外延结构以及介质层；
    所述外延结构具有彼此相对的第一表面、第二表面，所述第一表面为出光面；彼此串联的所述发光单元之间具有由所述第一表面向所述第二表面方向贯穿的沟槽；所述第二表面开设有若干不贯穿外延结构的移除区；
    所述介质层覆盖所述发光单元的所述第二表面并跨过沟槽延伸覆盖至与之串联的所述发光单元的所述第二表面；所述桥接导电桥位于所述介质层背离所述外延结构的一侧，并通过至少一移除区与外延结构电连接。
  2. 根据权利要求1所述的发光元件，其特征在于：从发光元件的上方向外延结构俯视，若干所述移除区在外延结构上的投影位于所述沟槽在外延结构上的投影范围之外。
  3. 根据权利要求1所述的发光元件，其特征在于：所述移除区包括位于外延结构内侧的第一内部移除区；所述第一内部移除区用于实现外延结构与桥接导电桥的电连接；所述第一内部移除区到沟槽底部的距离H的范围为0.5～3微米。
  4. 根据权利要求1所述的发光元件，其特征在于：所述桥接导电桥的厚度范围为0.5～1.5微米，所述桥接导电桥的材料至少包括电介质、金属、半导体材料中的一种。
  5. 根据权利要求3所述的发光元件，其特征在于：所述外延结构包括由第一表面向第二表面依次层叠的第一类半导体层、发光层以及第二类半导体层；所述介质层上开设有第一通孔和第二通孔；所述第一通孔贯穿介质层且与所述第一内部移除区相连通；所述第一内部移除区由第二表面向第一表面延伸至裸露出所述发光单元的第一类半导体层；所述第二通孔贯穿介质层并裸露出与所述发光单元彼此串联的另一发光单元的第二类半导体层；
    所述桥接导电桥通过所述第一通孔、第二通孔分别与彼此串联的两个所述发光单元的所述第一类半导体层和第二类半导体层电连接。
  6. 根据权利要求1所述的发光元件，其特征在于：所述介质层的厚度范围是0.5～1.5微米，所述介质层至少包括反射层。
  7. 根据权利要求5所述的发光元件，其特征在于：所述移除区还包括位于所述外延结构外边缘的外部移除区；所述外部移除区由所述外延结构的第二表面向第一表面移除至暴露出第一类半导体层；所述介质层延伸覆盖至外部移除区。
  8. 根据权利要求1所述的发光元件，其特征在于：所述沟槽由所述第一表面向所述第二表面方向的开口逐渐减小。
  9. 根据权利要求1所述的发光元件，其特征在于：所述沟槽具有连接第一表面和第二表面的沟槽侧壁，所述沟槽侧壁由至少一平面或至少一弧面或前述组合形成。
  10. 根据权利要求9所述的发光元件，其特征在于：所述沟槽具有位于所述沟槽侧壁与所述第一表面连接处的顶边以及位于所述沟槽侧壁与所述第二表面连接处的底边；所述顶边与所述底边的公垂线与所述第二表面的夹角θ小于90°。
  11. 根据权利要求10所述的发光元件，其特征在于：所述夹角θ的范围为大于等于45°且小于70°，或大于等于70°且小于80°，或大于等于80°且小于90°。
  12. 根据权利要求9-11任一项所述的发光元件，其特征在于：所述沟槽侧壁为一倾斜平面或一倾斜弧面。
  13. 根据权利要求12所述的发光元件，其特征在于：所述沟槽侧壁为倾斜弧面时，所述倾斜弧面的切线与第二表面的夹角β大于30°且小于90°，且夹角β逐渐增大或逐渐减小。
  14. 根据权利要求9-11任一项所述的发光元件，其特征在于：所述沟槽侧壁为由至少两个倾斜角度不同的平面或至少两个曲率半径不同的弧面或前述组合形成。
  15. 根据权利要求1所述的发光元件，其特征在于：彼此串联的所述发光单元的所述沟槽之间具有最小水平距离，所述最小水平距离大于等于0.1微米且小于等于2微米。
  16. 根据权利要求1所述的发光元件，其特征在于：彼此串联的所述发光单元之间具有最大水平距离，所述最大水平距离小于相邻发光元件之间的最小间距。
  17. 根据权利要求1所述的发光元件，其特征在于：在由彼此串联的两个所述发光单元组成的所述发光元件中，所述发光元件的长边尺寸不超过200微米，所述发光元件的短边尺寸不超过100微米。
  18. 一种发光组件，其特征在于，所述发光组件包括多组采用如权利要求1-17任一项所述的一种发光元件；还包括：
    电路基板；所述多组发光元件间隔排布在所述电路基板上；
    多个金属电极，所述金属电极设置在所述电路基板与所述发光单元之间，且分别与所述电路基板、所述发光元件电连接。
PCT/CN2023/134488 2022-11-29 2023-11-27 发光元件、发光组件及制作方法 WO2024114604A1 (zh)

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