WO2024108909A1

WO2024108909A1 - Control circuit of h-bridge circuit, driving apparatus, and electronic device

Info

Publication number: WO2024108909A1
Application number: PCT/CN2023/092682
Authority: WO
Inventors: 解亚平; 沈博超; 凌建钢; 何琳莉; 戴立忠
Original assignee: 湖南元景智造科技有限公司
Priority date: 2022-11-25
Filing date: 2023-05-08
Publication date: 2024-05-30
Also published as: CN118100705A

Abstract

Embodiments of the present invention provide a control circuit of an H-bridge circuit, a driving apparatus, and an electronic device. The control circuit comprises: a controller, used for outputting a switch control signal; a first logic conversion module, connected to a first level converter and a second switch tube and used for converting the switch control signal into a first logic conversion signal and a second logic conversion signal which are not at a high level at the same time; a second logic conversion module, connected to a second level converter and a fourth switch tube and used for converting the switch control signal into a third logic conversion signal and a fourth logic conversion signal which are not at a high level at the same time; the first level converter, connected to a first switch tube and used for controlling the first switch tube to be turned on; and the second level converter, connected to the second switch tube and used for controlling a third switch tube to be turned on. By means of the logic conversion modules, the control circuit outputs the control signals which are not at the high-level at the same time, so that the occurrence of short circuit due to simultaneous turn-on of switch tubes at two ends of a same side of the H-bridge circuit is avoided.

Description

Control circuit, drive device and electronic equipment of H-bridge circuit

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of Chinese patent application 202211493185.5 filed on November 25, 2022, the contents of which are incorporated herein by reference.

Technical Field

The present invention relates to the technical field of H-bridge circuits, and in particular to a control circuit, a driving device and an electronic device of an H-bridge circuit.

Background technique

H-bridge circuits are widely used in DC voltage control and in situations where phase change is required, such as the control of brushed DC motors. PWM speed control can be achieved through H-bridge circuits, and the forward and reverse switching of the motor can be achieved by switching the channels of the H-bridge circuit. The commonly used H-bridge circuit realizes the forward and reverse switching of the motor through different switch state combinations of the four power switches that make up the H-bridge circuit, and provides different driving power supply modes for the load.

However, if the control is improper and the upper and lower switches on the same side of the H-bridge circuit are closed at the same time, the power supply will form a short-circuit loop through the two switches, and the huge short-circuit current generated will quickly burn the two switches.

Summary of the invention

Based on this, the first aspect of the present invention provides a control circuit of an H-bridge circuit, the H-bridge circuit comprising: a motor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, the first end of the first switch tube is connected to a power supply, the second end of the first switch tube is connected to the first end of the second switch tube and the motor, the second end of the second switch tube is grounded, the first end of the third switch tube is connected to the power supply, the second end of the third switch tube is connected to the first end of the fourth switch tube and the motor, and the second end of the fourth switch tube is grounded, the control circuit comprises: a controller, a first logic conversion module, a second logic conversion module, a first level converter and a second level converter;

A controller, connected to the first logic conversion module and the second logic conversion module, and configured to output a switch control signal;

A first logic conversion module, connected to the first level converter and the second switch tube, for converting the switch control signal into a first logic conversion signal and a second logic conversion signal which are not high levels at the same time;

A second logic conversion module, connected to the second level converter and the fourth switch tube, for converting the switch control signal into a third logic conversion signal and a fourth logic conversion signal which are not high levels at the same time;

A first level converter, connected to the first switch tube, and used to control the first switch tube to be turned on;

The second level converter is connected to the second switch tube and is used to control the third switch tube to be turned on.

In an embodiment of the present invention, the circuit includes:

The first and second level output terminals of the controller are connected to the first and second input terminals of the first logic conversion module, and the third and fourth level output terminals of the controller are connected to the first and second input terminals of the second logic conversion module.

In an embodiment of the present invention, the circuit includes:

A first output end of the first logic conversion module is connected to one end of the first level converter, and the other end of the first level converter is used to connect to the control end of the first switch tube;

The second output terminal of the first logic conversion module is used to connect to the control terminal of the second switch tube;

A first output end of the second logic conversion module is connected to one end of the second level converter, and the other end of the second level converter is used to be connected to the control end of the third switch tube;

The second output end of the second logic conversion module is used to connect to the control end of the fourth switch tube.

In an embodiment of the present invention, the first level converter includes a fifth switch tube, a first resistor and a second resistor;

The control end of the fifth switch tube is connected to the first output end of the first logic conversion module; the first end of the fifth switch tube is connected to the first end of the first resistor; the second end of the first resistor is connected to the first end of the second resistor; the second end of the first resistor is also used to connect to the control end of the first switch tube; the second end of the second resistor is used to connect to the first end of the first switch tube; the second end of the fifth switch tube is grounded.

In an embodiment of the present invention, the second level converter includes a sixth switch tube, a third resistor and a fourth resistor;

The control end of the sixth switch tube is connected to the first output end of the second logic conversion module; the first end of the sixth switch tube is connected to the first end of the third resistor; the second end of the third resistor is connected to the first end of the fourth resistor; the second end of the third resistor is also used to connect to the control end of the third switch tube; the second end of the fourth resistor is used to connect to the first end of the third switch tube; the second end of the sixth switch tube is grounded.

In the embodiment of the present invention, the circuit includes: the fifth switch tube is an NMOS tube, and the sixth switch tube is an NMOS tube.

In an embodiment of the present invention, the first logic conversion module includes a first NAND gate, a first AND gate and a second AND gate;

The first level output end of the controller is connected to the first input end of the first NAND gate and the first input end of the first AND gate; the second level output end of the controller is connected to the second input end of the first NAND gate and the first input end of the second AND gate; the output end of the first NAND gate is connected to the second input end of the first AND gate and the second input end of the second AND gate; the output end of the first AND gate serves as the first output end of the first logic conversion module, and the output end of the second AND gate serves as the second output end of the first logic conversion module.

In an embodiment of the present invention, the second logic conversion module includes a second NAND gate, a third AND gate and a fourth AND gate;

The third level output terminal of the controller is connected to the first input terminal of the second NAND gate and the first input terminal of the third AND gate; the fourth level output terminal of the controller is connected to the second input terminal of the second NAND gate and the first input terminal of the fourth AND gate; the output terminal of the second NAND gate is connected to the second input terminal of the third AND gate and the second input terminal of the fourth AND gate; the third AND gate serves as the first output terminal of the second logic conversion module, and the output terminal of the fourth AND gate serves as the second output terminal of the second logic conversion module.

A second aspect of the present invention provides a driving device, comprising the control circuit of the above-mentioned H-bridge circuit and the H-bridge circuit, the H-bridge circuit comprising: a motor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, the first end of the first switch tube is connected to a power supply, the second end of the first switch tube is connected to the first end of the second switch tube and the motor, the second end of the second switch tube is grounded, the first end of the third switch tube is connected to the power supply, the second end of the third switch tube is connected to the first end of the fourth switch tube and the motor, and the second end of the fourth switch tube is grounded.

A third aspect of the present invention provides an electronic device, characterized in that it comprises the above-mentioned driving device.

Through the above technical solution, the H-bridge circuit includes: a motor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, the first end of the first switch tube is connected to a power supply, the second end of the first switch tube is connected to the first end of the second switch tube and the motor, the second end of the second switch tube is grounded, the first end of the third switch tube is connected to the power supply, the second end of the third switch tube is connected to the first end of the fourth switch tube and the motor, and the second end of the fourth switch tube is grounded, and the control circuit includes: a controller, a first logic conversion module, a second logic conversion module, a first level converter and a second level converter; the controller is connected to the first logic conversion module and the second logic conversion module, and is used to output a switch control signal; the first logic conversion module is connected to the first level converter and the second switch tube, and is used to convert the switch control signal into a first logic conversion signal and a second logic conversion signal that are not high at the same time; the second logic conversion module is connected to the second level converter and the fourth switch tube, and is used to convert the switch control signal into a third logic conversion signal and a fourth logic conversion signal that are not high at the same time; the first level converter is connected to the first switch tube, and is used to control the first switch tube to be turned on; the second level converter is connected to the second switch tube, and is used to control the third switch tube to be turned on. The control circuit outputs control signals of high level at different times through the logic conversion module, thereby preventing the switch tubes at both ends of the same side of the H-bridge circuit from being turned on at the same time and causing a short circuit.

Other features and advantages of the embodiments of the present invention will be described in detail in the subsequent detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present invention but do not constitute a limitation of the present invention. In the accompanying drawings:

FIG1 is a circuit diagram of a control circuit of an H-bridge circuit provided by an embodiment of the present invention;

2 is a circuit diagram of another control circuit of an H-bridge circuit provided by an embodiment of the present invention;

FIG3 is a schematic structural diagram of a driving device provided by an embodiment of the present invention;

FIG. 4 is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention.

Detailed ways

The specific implementation of the embodiment of the present invention is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described here is only used to illustrate and explain the embodiment of the present invention, and is not used to limit the embodiment of the present invention.

Based on this, the present application provides a control circuit of an H-bridge circuit, which uses a simple logic NAND gate device to control the level of the H-bridge switch device, ensuring that the level signals of the switches on the same side of the H-bridge circuit will not be high at the same time, forming a protective circuit. Figure 1 is a circuit schematic diagram of a control circuit of an H-bridge circuit provided by an embodiment of the present invention. As shown in Figure 1, the H-bridge circuit 200 includes: a motor 201, a first switch tube Q1, a second switch tube Q2, a third switch tube Q3 and a fourth switch tube Q4. The first end of the first switch tube Q1 is connected to a power supply, the second end of the first switch tube Q1 is connected to the first end of the second switch tube Q2 and the motor 201, the second end of the second switch tube Q2 is grounded, the first end of the third switch tube Q3 is connected to a power supply, the second end of the third switch tube Q3 is connected to the first end of the fourth switch tube Q4 and the motor 201, and the second end of the fourth switch tube Q4 is grounded;

The control circuit 100 includes: a controller 101, a first logic conversion module 102, a second logic conversion module 103, a first level converter 104 and a second level converter 105;

The controller 101 is connected to the first logic conversion module 102 and the second logic conversion module 103 and is used to output a switch control signal;

The first logic conversion module 102 is connected to the first level converter 104 and the second switch tube, and is used to convert the switch control signal into a first logic conversion signal and a second logic conversion signal which are not high levels at the same time;

The second logic conversion module 103 is connected to the second level converter 105 and the fourth switch tube, and is used to convert the switch control signal into a third logic conversion signal and a fourth logic conversion signal which are not high levels at the same time;

A first level converter 104 is connected to the first switch tube and is used to control the first switch tube to be turned on;

The second level converter 105 is connected to the second switch tube and is used to control the third switch tube to be turned on.

In practical applications, FIG2 is a circuit diagram of another control circuit of an H-bridge circuit provided by an embodiment of the present invention. As shown in FIG2, the first switch tube Q1 and the third switch tube Q3 of the H-bridge circuit 200 are PMOS tubes, the control ends of the first switch tube Q1 and the third switch tube Q3 are gates, the first ends are sources, and the second ends are drains. The second switch tube Q2 and the fourth switch tube Q4 are NMOS tubes, the control ends of the second switch tube Q2 and the fourth switch tube Q4 are gates, the first ends are drains, and the second ends are sources.

In practical applications, the H-bridge circuit 200 has five working states. Among them, the first working state is that the first switch tube Q1 and the fourth switch tube Q4 of the H-bridge circuit are closed, the second switch tube Q2 and the third switch tube Q3 are disconnected, and a power supply voltage with a positive left and a negative right is applied to the load to make the motor 201 rotate forward; the second working state is that the second switch tube Q2 and the third switch tube Q3 of the H-bridge circuit are closed, the first switch tube Q1 and the fourth switch tube Q4 are disconnected, and a power supply voltage with a negative left and a positive right is applied to the load to make the motor 201 reverse; the third working state is that all four switch tubes of the H-bridge circuit 200 are disconnected, and no power is supplied to the motor 201. At this time, the load of the motor 201 is equivalent to being suspended at both ends; if the motor 201 is moving at this time, the kinetic energy of its rotor will be gradually consumed under the action of friction, and the motor 201 Slowly stop; the fourth working state is that the upper or lower side of the H-bridge circuit 200, such as the first switch tube Q1 and the third switch tube Q3 or the second switch tube Q2 and the fourth switch tube Q4, is closed, and the corresponding other two switch tubes are disconnected. At this time, the two ends of the motor 201 are short-circuited together by the H-bridge circuit 200, and the voltage across the motor 201 is 0; if the motor 201 is moving at this time, the kinetic energy of its rotor will form a braking current in the external short-circuit bridge circuit loop through the generated reverse electromotive force, and the motor 201 will brake quickly; the fifth working state is that when the switches on the same side of the H-bridge circuit 200 are closed at the same time, the power supply will form a short-circuit loop through the two transistors, and the huge short-circuit current generated will quickly burn the two transistors.

In practical applications, the controller 101 is connected to the first logic conversion module 102 and the second logic conversion module 103, and the controller 101 is used to output a switch control signal. The first logic conversion module 102 is connected to the first level converter 104 and the second switch tube Q2 of the H-bridge circuit 200. The first logic conversion module 102 is used to convert the switch control signal of the controller 101 into a first logic conversion signal and a second logic conversion signal that are not high at the same time. The first level converter 104 is connected to the first switch tube Q1, and when receiving the first logic conversion signal, the first switch tube Q1 is controlled to be turned on. Based on the first logic conversion signal and the second logic conversion signal that are not high at the same time, the first switch tube Q1 and the second switch tube Q2 of the H-bridge circuit 200 will not be turned on at the same time to form a short circuit.

In practical applications, the second logic conversion module 103 is connected to the second level converter 105 and the fourth switch tube Q4 of the H-bridge circuit 200. The second logic conversion module 103 is used to convert the switch control signal of the controller 101 into a third logic conversion signal and a fourth logic conversion signal that are not high at the same time. The second level converter 105 is connected to the third switch tube Q3, and when receiving the third logic conversion signal, the third switch tube Q3 is controlled to be turned on. Based on the third logic conversion signal and the fourth logic conversion signal that are not high at the same time, the third switch tube Q3 and the fourth switch tube Q4 of the H-bridge circuit 200 will not be turned on at the same time to form a short circuit.

Through the above embodiment, the H-bridge circuit includes: a motor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, the first end of the first switch tube is connected to a power supply, the second end of the first switch tube is connected to the first end of the second switch tube and the motor, the second end of the second switch tube is grounded, the first end of the third switch tube is connected to the power supply, the second end of the third switch tube is connected to the first end of the fourth switch tube and the motor, and the second end of the fourth switch tube is grounded, and the control circuit includes: a controller, a first logic conversion module, a second logic conversion module, a first level converter and a second level converter; the controller is connected to the first logic conversion module and the second logic conversion module, and is used to output a switch control signal; the first logic conversion module is connected to the first level converter and the second switch tube, and is used to convert the switch control signal into a first logic conversion signal and a second logic conversion signal that are not high at the same time; the second logic conversion module is connected to the second level converter and the fourth switch tube, and is used to convert the switch control signal into a third logic conversion signal and a fourth logic conversion signal that are not high at the same time; the first level converter is connected to the first switch tube, and is used to control the first switch tube to be turned on; the second level converter is connected to the second switch tube, and is used to control the third switch tube to be turned on. The control circuit outputs control signals of high level at different times through the logic conversion module, thereby preventing the switch tubes at both ends of the same side of the H-bridge circuit from being turned on at the same time and causing a short circuit.

In one embodiment, the circuit comprises:

The first and second level output terminals of the controller 101 are connected to the first and second input terminals of the first logic conversion module, and the third and fourth level output terminals of the controller 101 are connected to the first and second input terminals of the second logic conversion module.

In one embodiment, the circuit comprises:

The first output terminal of the first logic conversion module 102 is connected to one end of the first level converter 104, and the other end of the first level converter 104 is used to connect to the control end of the first switch tube;

The second output terminal of the first logic conversion module 102 is used to connect to the control terminal of the second switch tube;

A first output terminal of the second logic conversion module 103 is connected to one end of the second level converter 105, and the other end of the second level converter 105 is used to connect to the control end of the third switch tube;

The second output terminal of the second logic conversion module 103 is used to connect to the control terminal of the fourth switch tube.

In actual application, the controller 101 sends a switch control to the first logic conversion module 102, and the first logic conversion module 102 satisfies that the first logic conversion signal and the second logic conversion signal are not high at the same time, so that the first switch tube Q1 and the second switch tube Q2 of the H-bridge circuit 200 will not receive the high level at the same time, preventing the first switch tube Q1 and the second switch tube Q2 from being turned on at the same time and causing a short circuit. The second logic conversion module 103 satisfies that the third logic conversion signal and the fourth logic conversion signal are not high at the same time, so that the third switch tube Q3 and the fourth switch tube Q4 of the H-bridge circuit 200 will not receive the high level at the same time, preventing the third switch tube Q3 and the fourth switch tube Q4 from being turned on at the same time and causing a short circuit.

In one embodiment, the first level converter 104 includes a fifth switch tube Q5, a first resistor R1 and a second resistor R2;

The control end of the fifth switch tube Q5 is connected to the first output end of the first logic conversion module 102; the first end of the fifth switch tube Q5 is connected to the first end of the first resistor R1; the second end of the first resistor R1 is connected to the first end of the second resistor R2; the second end of the first resistor R1 is also used to connect to the control end of the first switch tube Q1; the second end of the second resistor R2 is used to connect to the first end of the first switch tube Q1; the second end of the fifth switch tube Q5 is grounded.

In practical applications, the fifth switch tube Q5 can be an NMOS tube, the control end of the fifth switch tube Q5 is a gate, the first end is a drain, and the second end is a source. The control end of the fifth switch tube Q5 turns on the first switch tube Q1 of the H-bridge circuit 200 according to the first logic conversion signal received from the first output end of the first logic conversion module 102.

Specifically, when the first logic conversion signal of the first logic conversion module 102 is at a high level, that is, 1, the voltage Vgs of the gate to the source of the fifth switch tube Q5 is a positive voltage and is greater than the turn-on threshold voltage, so the drain and source of the fifth switch tube Q5 are turned on, and the drain of the fifth switch tube Q5 is connected to the power supply. The first resistor R1 and the second resistor R2 perform voltage division, so that the absolute value of the voltage of the gate to the source of the first switch tube Q1 of the H-bridge circuit 200 is greater than the turn-on threshold voltage, so that the source and drain of the first switch tube Q1 are turned on, and one end of the motor 201 is connected to the drain of the first switch tube Q1, so that the motor 201 is connected to the power supply.

Specifically, when the first logic conversion signal of the first logic conversion module 102 is at a low level, that is, 0, the voltage Vgs of the gate to the source of the fifth switch tube Q5 is 0 and is less than the conduction threshold voltage, so the drain and source of the fifth switch tube Q5 are not conducting, and the first resistor R1 has no current. Because the gate current of the first switch tube Q1 is extremely small, the second resistor R2 also has no current. The gate of the first switch tube Q1 is 24V, then the voltage of the gate to the source of the first switch tube Q1 is 0, and the absolute value of the voltage is less than the conduction threshold voltage of the first switch tube Q1, so the source and drain of the first switch tube Q1 are not conducting, and one end of the motor 201 is connected to the first switch tube Q1, but will not be conducted to the power supply.

Through the above embodiment, when the first logic conversion signal of the first logic conversion module 102 is at a high level, one end of the motor 201 is connected to the power supply, and when the first logic conversion signal of the first logic conversion module 102 is at a low level, the motor 201 is disconnected from the power supply. The first level converter 104 makes the signal received by the control end of the first switch tube Q1 to be 24V when the first logic conversion signal of the first logic conversion module 102 is at a high level, and one end of the motor 201 is connected to the power supply, so that the motor 201 runs.

In one embodiment, the second level converter 105 includes a sixth switch tube Q6, a third resistor R3 and a fourth resistor R4;

The control end of the sixth switch tube Q6 is connected to the third output end of the second logic conversion module 103; the first end of the sixth switch tube Q6 is connected to the first end of the third resistor R3; the second end of the third resistor R3 is connected to the first end of the fourth resistor R4; the second end of the third resistor R3 is also used to connect to the control end of the third switch tube Q3; the second end of the fourth resistor R4 is used to connect to the first end of the third switch tube Q3; the second end of the sixth switch tube Q6 is grounded.

In practical applications, the sixth switch tube Q6 can be an NMOS tube, the control end of the sixth switch tube Q6 is a gate, the first end is a drain, and the second end is a source. The control end of the sixth switch tube Q6 turns on the third switch tube Q3 of the H-bridge circuit 200 according to the third logic conversion signal, which is a level signal received from the third output end of the second logic conversion module 103.

Specifically, when the third logic conversion signal of the second logic conversion module 103 is at a high level, that is, 1, the voltage Vgs of the gate to the source of the sixth switch tube Q6 is a positive voltage and is greater than the turn-on threshold voltage, so the drain and source of the sixth switch tube Q6 are turned on, and the drain of the sixth switch tube Q6 is connected to the power supply. The third resistor R3 and the fourth resistor R4 perform voltage division, so that the absolute value of the voltage of the gate to the source of the third switch tube Q3 of the H-bridge circuit 200 is greater than the turn-on threshold voltage, so that the source and drain of the third switch tube Q3 are turned on, and the other end of the motor 201 is connected to the drain of the third switch tube Q3, so that the motor 201 is connected to the power supply.

Specifically, when the third logic conversion signal of the second logic conversion module 103 is at a low level, that is, 0, the voltage Vgs of the gate to the source of the sixth switch tube Q6 is 0 and is less than the conduction threshold voltage, so the drain and source of the sixth switch tube Q6 are not conductive, and the third resistor R3 has no current. Because the gate current of the third switch tube Q3 is extremely small, the fourth resistor R4 has no current either. The gate of the third switch tube Q3 is 24V, then the voltage of the gate to the source of the third switch tube Q3 is 0, and the absolute value of the voltage is less than the conduction threshold voltage of the third switch tube Q3, so the source and drain of the third switch tube Q3 are not conductive, and the other end of the motor 201 is connected to the third switch tube Q3, but will not be conductively connected to the power supply.

According to the above embodiment, when the third logic conversion signal of the second logic conversion module 103 is at a high level, the other end of the motor 201 is connected to the power supply, and when the third logic conversion signal of the second logic conversion module 103 is at a low level, the motor 201 is disconnected from the power supply. The second level converter 105 makes the third switch control end receive a signal of 24V when the third logic conversion signal of the second logic conversion module 103 is at a high level, and the other end of the motor 201 is connected to the power supply, so that the motor 201 runs.

In one embodiment, the fifth switch tube Q5 is an NMOS tube, and the sixth switch tube Q6 is an NMOS tube.

In one embodiment, the first logic conversion module 102 includes a first NAND gate U1 , a first AND gate U2 , and a second AND gate U3 ;

The first level output end of the controller 101 is connected to the first input end of the first NAND gate U1 and the first input end of the first AND gate U2; the second level output end of the controller is connected to the second input end of the first NAND gate U1 and the first input end of the second AND gate U3; the output end of the first NAND gate U1 is connected to the second input end of the first AND gate U2 and the second input end of the second AND gate U3; the output end of the first AND gate U2 serves as the first output end of the first logic conversion module 102, and the output end of the second AND gate U3 serves as the second output end of the first logic conversion module 102.

In actual application, when the second logic conversion signal of the second output terminal of the first logic conversion module 102 is 1, the gate receiving level signal of the second switch tube Q2 of the H-bridge circuit 200 is 1, the voltage Vgs of the gate of the second switch tube Q2 to the source is a positive voltage and greater than the conduction threshold voltage, the drain and source of the second switch tube Q2 are turned on, so that the drain of the second switch tube Q2 is connected to the power supply, and one end of the motor 201 is connected to the drain of the second switch tube Q2 and connected to the power supply. When the second logic conversion signal of the first logic conversion module 102 is 0, the voltage Vgs of the gate of the second switch tube Q2 to the source is 0, the voltage value is less than the conduction threshold voltage, the drain and source of the second switch tube Q2 are not turned on, so that the drain of the second switch tube Q2 is not turned on to the power supply, and one end of the motor 201 is connected to the second switch tube Q2, but will not be turned on to the power supply.

In practical applications, the first switch control signal at the first output terminal of the controller 101, the second switch control signal at the second output terminal and the level signal corresponding to the first logic conversion module 102 are as shown in Table 1:

Table 1

Specifically, the first output end of the controller 101 is connected to the first input end of the first NAND gate U1 and the first input end of the second AND gate U2, and the second output end of the controller 101 is connected to the second input end of the first NAND gate U1 and the first input end of the third AND gate U3. The output end of the second AND gate U2 is connected to the first level converter 104 as the first output end of the first logic conversion module 102, and the output end of the third AND gate U3 is connected to the second switch tube Q2 of the H-bridge circuit 200 as the second output end of the first logic conversion module 102.

Specifically, when the first switch control signal and the second switch control signal of the controller 101 are both 0, the level signal at the output end of the first NAND gate U1 is 1, the level signal at the output end of the second AND gate U2 is 0, and the level signal at the output end of the third AND gate U3 is 0. The level signal received by the first level converter 104 connected to the output end of the second AND gate U2 is 0, and the level signal received by the first switch tube Q1 of the H-bridge circuit 200 connected to the first level converter 104 is 0. The level signal received by the second level converter 105 connected to the output end of the third AND gate U3 is 0. The first logic conversion signal received by the first switch tube Q1 of the H-bridge circuit 200 and the second logic conversion signal received by the second switch tube Q2 are both 0, so that one end of the motor 201 is not conductive to the power supply.

Specifically, when the first switch control signal of the controller 101 is 0 and the second switch control signal is 1, the level signal at the output end of the first NAND gate U1 is 1, the level signal at the output end of the second AND gate U2 is 0, and the level signal at the output end of the third AND gate U3 is 1. The level signal received by the first level converter 104 connected to the output end of the second AND gate U2 is 0, and the first logic conversion signal received by the first switch tube Q1 of the H-bridge circuit 200 connected to the first level converter 104 is 0. The second logic conversion signal received by the second switch tube Q2 connected to the output end of the third AND gate U3 is 1.

Specifically, when the first switch control signal of the controller 101 is 1 and the second switch control signal is 0, the level signal at the output end of the first NAND gate U1 is 1, the level signal at the output end of the second AND gate U2 is 1, and the level signal at the output end of the third AND gate U3 is 0. The level signal received by the first level converter 104 connected to the output end of the second AND gate U2 is 1, and the first logic conversion signal received by the first switch tube Q1 of the H-bridge circuit 200 connected to the first level converter 104 is 1. The second logic conversion signal received by the second switch tube Q2 connected to the output end of the third AND gate U3 is 0.

Specifically, when the first switch control signal and the second switch control signal of the controller 101 are both 1, the level signal at the output end of the first NAND gate U1 is 0, the level signal at the output end of the second AND gate U2 is 0, and the level signal at the output end of the third AND gate U3 is 0. The level signal received by the first level converter 104 connected to the output end of the second AND gate U2 is 0, and the first logic conversion signal received by the first switch tube Q1 of the H-bridge circuit 200 connected to the first level converter 104 is 0. The second logic conversion signal received by the second switch tube Q2 connected to the output end of the third AND gate U3 is 0.

In one embodiment, the second logic conversion module 103 includes a second NAND gate U4, a third AND gate U5 and a fourth AND gate U6;

The third level output terminal of the controller 101 is connected to the first input terminal of the second NAND gate U4 and the first input terminal of the third AND gate U5; the fourth level output terminal of the controller 101 is connected to the second input terminal of the second NAND gate U4 and the first input terminal of the fourth AND gate U6; the output terminal of the second NAND gate U4 is connected to the second input terminal of the third AND gate U5 and the second input terminal of the fourth AND gate U6; the third AND gate U5 serves as the first output terminal of the second logic conversion module 103, and the output terminal of the fourth AND gate U4 serves as the fourth output terminal of the second logic conversion module 103.

In actual application, when the fourth logic conversion signal of the second output terminal of the second logic conversion module 103 is 1, the gate receiving level signal of the fourth switch tube Q4 of the H-bridge circuit 200 is 1, the voltage Vgs of the gate to the source of the fourth switch tube Q4 is a positive voltage and greater than the conduction threshold voltage, the drain and source of the fourth switch tube Q4 are turned on, so that the drain of the fourth switch tube Q4 is connected to the power supply, and the other end of the motor 201 is connected to the drain of the fourth switch tube Q4 and connected to the power supply. When the fourth logic conversion signal of the second logic conversion module 103 is 0, the voltage Vgs of the gate to the source of the fourth switch tube Q4 is 0, the voltage value is less than the conduction threshold voltage, the drain and source of the fourth switch tube Q4 are not turned on, so that the drain of the fourth switch tube Q4 is not turned on to the power supply, and the other end of the motor 201 is connected to the fourth switch tube Q4, but will not be turned on to the power supply.

In practical applications, the third switch control signal at the third output terminal of the controller 101, the fourth switch control signal at the fourth output terminal and the output level signal corresponding to the logic device in the second logic conversion module 103 are shown in Table 2:

Table 2

Specifically, the third output terminal of the controller 101 is connected to the first input terminal of the second NAND gate U4 and the first input terminal of the third AND gate U5, and the fourth output terminal of the controller 101 is connected to the second input terminal of the second NAND gate U4 and the first input terminal of the fourth AND gate U6. The output terminal of the third AND gate U5 is connected to the second level converter 105 as the first input terminal of the second logic conversion module 103, and the output terminal of the fourth AND gate U6 is connected to the fourth switch tube Q4 of the H-bridge circuit 200 as the second output terminal of the second logic conversion module 103.

Specifically, when the third switch control signal and the fourth switch control signal of the controller 101 are both 0, the level signal at the output end of the second NAND gate U4 is 1, then the level signal at the output end of the third AND gate U5 is 0, and the level signal at the output end of the fourth AND gate U6 is 0. The level signal received by the second level converter 105 connected to the output end of the third AND gate U5 is 0, and the third logic conversion signal received by the third switch tube Q3 of the H-bridge circuit 200 connected to the second level converter 105 is 0. The fourth logic conversion signal received by the fourth switch tube Q4 connected to the output end of the fourth AND gate U6 is 0. The level signals received by the third switch tube Q3 and the fourth switch tube Q4 of the H-bridge circuit 200 are both 0, so that the other end of the motor 201 is not conductive to the power supply.

Specifically, when the third switch control signal of the controller 101 is 0 and the fourth switch control signal is 1, the level signal at the output end of the second NAND gate U4 is 1, the level signal at the output end of the third AND gate U5 is 0, and the level signal at the output end of the fourth AND gate U6 is 1. The level signal received by the second level converter 105 connected to the output end of the third AND gate U5 is 0, and the third logic conversion signal received by the third switch tube Q3 of the H-bridge circuit 200 connected to the second level converter 105 is 0. The fourth logic conversion signal received by the fourth switch tube Q4 connected to the output end of the fourth AND gate U6 is 1.

Specifically, when the third switch control signal of the controller 101 is 1 and the fourth switch control signal is 0, the level signal at the output end of the second NAND gate U4 is 1, the level signal at the output end of the third AND gate U5 is 1, and the level signal at the output end of the fourth AND gate U6 is 0. The level signal received by the second level converter 105 connected to the output end of the third AND gate U5 is 1, and the third logic conversion signal received by the third switch tube Q3 of the H-bridge circuit 200 connected to the second level converter 105 is 1. The fourth logic conversion signal received by the fourth switch tube Q4 connected to the output end of the fourth AND gate U6 is 0.

Specifically, when the third switch control signal and the fourth switch control signal of the controller 101 are both 1, the level signal at the output end of the second NAND gate U4 is 0, the level signal at the output end of the third AND gate U5 is 0, and the level signal at the output end of the fourth AND gate U6 is 0. The level signal received by the second level converter 105 connected to the output end of the third AND gate U5 is 0, and the third logic conversion signal received by the third switch tube Q3 of the H-bridge circuit 200 connected to the second level converter 105 is 0. The fourth logic conversion signal received by the fourth switch tube Q4 connected to the output end of the fourth AND gate U6 is 0. The level signals received by the first switch tube Q1, the second switch tube Q2, the third switch tube Q3 and the fourth switch tube Q4 of the H-bridge circuit 200 are all 0, so that the two ends of the motor 201 are not connected to the power supply, avoiding the short circuit of the H-bridge circuit 200 when the controller 101 outputs high level at the same time.

Through the above embodiment, when the first switch control signal and the second switch control signal of the controller 101 are both 1, the first logic conversion signal and the second logic conversion signal received by the first switch tube Q1 and the second switch tube Q2 on the same side of the H-bridge circuit 200 are both 0, thereby avoiding the occurrence of a short circuit in the H-bridge circuit 200. When the third switch control signal and the fourth switch control signal of the controller 101 are both 1, the third logic conversion signal and the fourth logic conversion signal received by the third switch tube Q3 and the fourth switch tube Q4 on the same side of the H-bridge circuit 200 are both 0, thereby avoiding the occurrence of a short circuit in the H-bridge circuit 200. The circuit realizes the separate control of the four switch tubes of the H-bridge circuit 200, can achieve the function of braking, and performs PWM pulse width modulation control, can control the speed of the motor 201, and can control the heating and cooling speed of the TEC semiconductor chip; for the PWM speed regulation of the motor 201, there will be no jamming phenomenon, and the braking can be controlled by software only when braking is needed.

Although an example of a circuit structure of a control circuit of an H-bridge circuit according to an embodiment of the present invention is described with reference to FIGS. 1 and 2 , those skilled in the art will appreciate that the fifth switch tube Q5 of the first level converter 104 and the sixth switch tube Q6 of the second level converter 105 are not limited to NMOS tubes, as long as the first switch tube Q1 and the third switch tube Q3 of the H-bridge circuit 200 are turned on when receiving a logic conversion signal, such as a transistor or a level conversion chip.

Those skilled in the art can understand that the actual components in the embodiment of the present invention can be replaced with other models as long as the current and voltage characteristics are met to achieve short circuit protection of the H-bridge circuit 200. The embodiment of the present invention is not limited to the H-bridge circuit 200 of the motor 201, but also includes other load occasions that require phase switching; at the same time, the NMOS tube in the above embodiment can be replaced with an NPN transistor; the PMOS tube can be replaced with a PNP transistor.

3 is a schematic diagram of the structure of a driving device provided by an embodiment of the present invention. As shown in FIG3 , the driving device 300 includes the above-mentioned control circuit 100 and an H-bridge circuit 200, wherein the H-bridge circuit 200 includes: a motor 201, a first switch tube Q1, a second switch tube Q2, a third switch tube Q3 and a fourth switch tube Q4, wherein a first end of the first switch tube Q1 is connected to a power supply, a second end of the first switch tube Q1 is connected to a first end of the second switch tube Q2 and the motor 201, a second end of the second switch tube Q2 is grounded, a first end of the third switch tube Q3 is connected to a power supply, a second end of the third switch tube Q3 is connected to a first end of the fourth switch tube Q4 and the motor 201, and a second end of the fourth switch tube Q4 is grounded.

The driving device provided in the embodiment of the present application can realize each process of the control circuit of the H-bridge circuit in the circuit embodiment, and can achieve the same technical effect. To avoid repetition, it will not be described here.

FIG. 4 is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. As shown in FIG. 4 , the electronic device 400 includes the driving device 300 described above.

The electronic device provided in the embodiment of the present application can implement each process of the control circuit of the H-bridge circuit in the circuit embodiment and can achieve the same technical effect. To avoid repetition, it will not be described here.

Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

The present application is described with reference to the flowchart and/or block diagram of the method, device (system) and computer program product according to the embodiment of the present application. It should be understood that each process and/or box in the flowchart and/or block diagram, and the combination of the process and/or box in the flowchart and/or block diagram can be realized by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for realizing the function specified in one process or multiple processes in the flowchart and/or one box or multiple boxes in the block diagram.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and/or one or more boxes in the block diagram.

These computer program instructions may also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, whereby the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and/or one or more boxes in the block diagram.

In a typical configuration, a computing device includes one or more processors (CPU), input/output interfaces, network interfaces, and memory.

Memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and/or non-volatile memory in the form of read-only memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.

Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined in this article, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

A control circuit of an H-bridge circuit, the H-bridge circuit comprising: a motor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, wherein a first end of the first switch tube is connected to a power supply, a second end of the first switch tube is connected to a first end of the second switch tube and the motor, a second end of the second switch tube is grounded, a first end of the third switch tube is connected to a power supply, a second end of the third switch tube is connected to a first end of the fourth switch tube and the motor, and a second end of the fourth switch tube is grounded, characterized in that the control circuit comprises: a controller, a first logic conversion module, a second logic conversion module, a first level converter and a second level converter;

The controller is connected to the first logic conversion module and the second logic conversion module, and is used to output a switch control signal;

The first logic conversion module is connected to the first level converter and the second switch tube, and is used to convert the switch control signal into a first logic conversion signal and a second logic conversion signal which are not high levels at the same time;

The second logic conversion module is connected to the second level converter and the fourth switch tube, and is used to convert the switch control signal into a third logic conversion signal and a fourth logic conversion signal which are not high levels at the same time;

The first level converter is connected to the first switch tube and is used to control the first switch tube to be turned on;

The second level converter is connected to the second switch tube, and is used to control the third switch tube to be turned on.
The circuit according to claim 1, characterized in that it comprises:

The first level output terminal and the second level output terminal of the controller are connected to the first input terminal and the second input terminal of the first logic conversion module, and the third level output terminal and the fourth level output terminal of the controller are connected to the first input terminal and the second input terminal of the second logic conversion module.
The circuit according to claim 1, characterized in that it comprises:

The first output end of the first logic conversion module is connected to one end of the first level converter, and the other end of the first level converter is used to connect to the control end of the first switch tube;

The second output end of the first logic conversion module is used to connect to the control end of the second switch tube;

The first output end of the second logic conversion module is connected to one end of the second level converter, and the other end of the second level converter is used to be connected to the control end of the third switch tube;

The second output end of the second logic conversion module is used to connect to the control end of the fourth switch tube.
The circuit according to claim 1, characterized in that the first level converter comprises a fifth switch tube, a first resistor and a second resistor;

The control end of the fifth switch tube is connected to the first output end of the first logic conversion module; the first end of the fifth switch tube is connected to the first end of the first resistor; the second end of the first resistor is connected to the first end of the second resistor; the second end of the first resistor is also used to connect to the control end of the first switch tube; the second end of the second resistor is used to connect to the first end of the first switch tube; the second end of the fifth switch tube is grounded.
The circuit according to claim 1, characterized in that the second level converter comprises a sixth switch tube, a third resistor and a fourth resistor;

The control end of the sixth switch tube is connected to the first output end of the second logic conversion module; the first end of the sixth switch tube is connected to the first end of the third resistor; the second end of the third resistor is connected to the first end of the fourth resistor; the second end of the third resistor is also used to connect to the control end of the third switch tube; the second end of the fourth resistor is used to connect to the first end of the third switch tube; the second end of the sixth switch tube is grounded.
The circuit according to claim 4 or 5 is characterized in that the fifth switch tube is an NMOS tube, and the sixth switch tube is an NMOS tube.
The circuit according to claim 3, characterized in that the first logic conversion module comprises a first NAND gate, a first AND gate and a second AND gate;

The first level output end of the controller is connected to the first input end of the first NAND gate and the first input end of the first AND gate; the second level output end of the controller is connected to the second input end of the first NAND gate and the first input end of the second AND gate; the output end of the first NAND gate is connected to the second input end of the first AND gate and the second input end of the second AND gate; the output end of the first AND gate serves as the first output end of the first logic conversion module, and the output end of the second AND gate serves as the second output end of the first logic conversion module.
The circuit according to claim 3, characterized in that the second logic conversion module comprises a second NAND gate, a third AND gate and a fourth AND gate;

The third level output end of the controller is connected to the first input end of the second NAND gate and the first input end of the third AND gate; the fourth level output end of the controller is connected to the second input end of the second NAND gate and the first input end of the fourth AND gate; the output end of the second NAND gate is connected to the second input end of the third AND gate and the second input end of the fourth AND gate; the third AND gate serves as the first output end of the second logic conversion module, and the output end of the fourth AND gate serves as the second output end of the second logic conversion module.
A driving device, characterized in that it comprises a control circuit of the H-bridge circuit and an H-bridge circuit as described in any one of claims 1 to 8, wherein the H-bridge circuit comprises: a motor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, wherein the first end of the first switch tube is connected to a power supply, the second end of the first switch tube is connected to the first end of the second switch tube and the motor, the second end of the second switch tube is grounded, the first end of the third switch tube is connected to the power supply, the second end of the third switch tube is connected to the first end of the fourth switch tube and the motor, and the second end of the fourth switch tube is grounded.
An electronic device, characterized by comprising the driving device as claimed in claim 9.