WO2024104194A1 - Power amplifier - Google Patents

Power amplifier Download PDF

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Publication number
WO2024104194A1
WO2024104194A1 PCT/CN2023/129586 CN2023129586W WO2024104194A1 WO 2024104194 A1 WO2024104194 A1 WO 2024104194A1 CN 2023129586 W CN2023129586 W CN 2023129586W WO 2024104194 A1 WO2024104194 A1 WO 2024104194A1
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WO
WIPO (PCT)
Prior art keywords
impedance
capacitor
inductor
envelope
output
Prior art date
Application number
PCT/CN2023/129586
Other languages
French (fr)
Chinese (zh)
Inventor
何向阳
张煜
李文明
张旗
刘海军
王磊
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Publication of WO2024104194A1 publication Critical patent/WO2024104194A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42—Modifications of amplifiers to extend the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only

Definitions

  • the present application relates to the field of communication technology, and in particular to a power amplifier.
  • the power amplifier is used to amplify the power of the radio frequency signal and is the core component of the wireless communication system.
  • the efficiency of the power amplifier directly determines the size and weight of the wireless communication base station.
  • the power amplifier needs to have a good input and output impedance matching circuit to give full play to the high efficiency characteristics of the power amplifier under broadband signals.
  • the fundamental impedance, harmonic impedance and envelope impedance of the power amplifier is considered, and the fundamental impedance, harmonic impedance and envelope impedance based on the power amplifier are not considered at the same time, which may make the power amplifier have poor linear performance and low efficiency under broadband signals.
  • the present application provides a power amplifier, comprising a power amplification unit, an input matching circuit, an output matching circuit and an envelope impedance control circuit, wherein the input matching circuit is arranged in series between an input port of the power amplifier and an input end of the power amplification unit, the output matching circuit is arranged in series between an output end of the power amplification unit and an output end of the power amplifier, the envelope impedance control circuit is coupled to the output matching circuit, and the power amplification unit is configured to amplify a radio frequency signal;
  • the input matching circuit is configured to increase the fundamental impedance corresponding to the input end of the power amplifier unit to within a first preset impedance range, and to suppress the harmonic impedance input to the power amplifier unit;
  • the output matching circuit is configured to increase the fundamental impedance corresponding to the output end of the power amplifier unit to within a second preset impedance range, and to tune the harmonic impedance of the output end of the power amplifier unit to within a third preset impedance range;
  • FIG1 is a logic block diagram of a power amplifier provided in an embodiment of the present application.
  • FIG2 is a schematic diagram of a topological structure of a power amplifier provided in an embodiment of the present application.
  • FIG3 is a topological diagram of an output matching circuit provided in an embodiment of the present application.
  • FIG. 4 is a topological diagram of an output matching circuit provided in an embodiment of the present application.
  • FIG5 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application.
  • FIG6 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application.
  • FIG7 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application.
  • FIG8 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application.
  • FIG9 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application.
  • FIG. 10 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application
  • FIG. 11 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application.
  • Figure 1 is a logic block diagram of a power amplifier provided in an embodiment of the present application
  • Figure 2 is a schematic diagram of a topological structure of a power amplifier provided in an embodiment of the present application.
  • an embodiment of the present application provides a power amplifier, including a power amplification unit 100, an input matching circuit 200, an output matching circuit 300 and an envelope impedance control circuit 400.
  • the input matching circuit 200 is arranged in series between an input port of the power amplifier (corresponding to the input end of the signal, refer to Lead_in in Figure 2) and an input end 101 of the power amplification unit 100
  • the output matching circuit 300 is arranged in series between an output end 102 of the power amplification unit 100 and an output end of the power amplifier (corresponding to the signal output end, refer to Lead_out in Figure 2).
  • the envelope impedance control circuit 400 is coupled to the output matching circuit 300, and the power amplification unit 100 is configured to amplify a radio frequency signal.
  • the power amplification unit 100 is a core component of a power amplifier, which is used to amplify the radio frequency signal in the transmission link corresponding to a wireless communication system (for example: 4G, 5G base stations).
  • a wireless communication system for example: 4G, 5G base stations.
  • the input matching circuit 200 is configured to increase the fundamental impedance corresponding to the input end of the power amplification unit 100 to within a first preset impedance range, and to suppress the harmonic impedance of the input power amplification unit.
  • the impedance value interval corresponding to the first preset impedance range can be 1 to 50 ohms; in an embodiment of the present application, by adjusting the LC element parameters corresponding to the input matching circuit 200, the low impedance at the input end of the power amplification unit 100 (corresponding to the chip of the power amplifier) is increased to a high impedance (for example: 1 to 50 ohms) at the input pin (corresponding to the input end of the power amplifier, refer to Lead_in in Figure 2) at the fundamental frequency, and resonates at the harmonic frequency, suppressing the impedance at the harmonic frequency, and reducing the harmonic frequency energy entering the power amplification unit 100.
  • a high impedance for example: 1 to 50 ohms
  • the output matching circuit 300 is configured to increase the fundamental impedance corresponding to the output end of the power amplification unit 100 (i.e., the end connected to the output matching circuit 300) to a second preset impedance range, and to tune the harmonic impedance of the output end of the power amplification unit 100 to a third preset impedance range. Within the preset impedance range.
  • the impedance value interval corresponding to the second preset impedance range can be 1 to 50 ohms; in an embodiment of the present application, by adjusting the LC component parameters corresponding to the output matching circuit 300, the low impedance of the output end of the power amplification unit 100 (corresponding to the output end of the power amplifier chip) is increased to a high impedance (for example: 1 to 50 ohms) at the output pin (corresponding to the output end of the power amplifier, refer to Lead_out in Figure 2) at the fundamental frequency; and the impedance at the harmonic frequency is tuned to cooperate with the printed circuit board (PCB) matching circuit outside the output pin of the power amplifier to achieve better performance.
  • PCB printed circuit board
  • the envelope impedance control circuit 400 is configured to adjust the low-frequency load impedance corresponding to the output end of the power amplification unit 100 to within a fourth preset impedance range.
  • the total inductance of the inductance elements involved in the output matching circuit 300 and the loop inductance of the external PCB circuit is too large, which may cause a low envelope resonance frequency and affect the working bandwidth; by setting the envelope impedance control circuit 400, a shorter inductor is integrated, a higher envelope resonance frequency is achieved, and the envelope impedance is reduced.
  • the power amplifier provided in the embodiment of the present application tunes the harmonic impedance by setting an input matching circuit and an output matching circuit to improve the efficiency of the power amplifier; and reduces the envelope impedance by setting an envelope impedance control circuit, thereby improving the linear performance of the power amplifier under broadband signals, thereby solving the problem of poor linear performance and low efficiency of the power amplifier under broadband signals in the related art.
  • the input matching circuit 200 includes a single-section L-type matching network 201 and a single-section T-type matching network 202, the input end of the single-section L-type matching network 201 is electrically connected to the input port of the power amplifier (refer to Lead_in in Figure 2), the ground end of the single-section L-type matching network 201 is connected to the ground, the output end of the single-section L-type matching network 201 is electrically connected to the input end of the single-section T-type matching network 202, the ground end of the single-section T-type matching network 202 is connected to the ground, the output end of the single-section T-type matching network 202 is electrically connected to the input end of the power amplification unit 100, the single-section L-type matching network 201 resonates with the single-section T-type matching network 202 to increase the fundamental impedance corresponding to the input end of the power amplification unit 100 to within the first preset impedance range, and suppress the harmonic im
  • the single-section L-type matching network 201 includes a first inductor Ls1 and the first capacitor Cs1
  • the single-section T-type matching network 202 includes a second inductor Ls2, a third inductor Ls3 and a second capacitor Cs2, one end of the first inductor Ls1 is connected to the input end of the single-section L-type matching network 201, and the other end is electrically connected to the first capacitor Cs1 and the second inductor Ls2 respectively, the other end of the first capacitor Cs1 is connected to the ground
  • the other end of the second inductor Ls2 is electrically connected to the second capacitor Cs2 and the third inductor Ls3 respectively
  • the other end of the second capacitor Cs2 is connected to the ground
  • the other end of the third inductor Ls3 is connected to the output end of the single-section T-type matching network 202, the first inductor Ls1 and the first capacitor Cs1 form an L-type LC resonant circuit;
  • the power amplification unit 100 includes a power transistor Q1, an output capacitor Cds1, and a source inductor Ls.
  • the gate of the power transistor Q1 is connected to the input end of the power amplification unit 100, the drain of the power transistor Q1 is electrically connected to the input end of the output matching circuit 300 and one end of the output capacitor Cds1, respectively, the other end of the output capacitor Cds1 is electrically connected to the source of the power transistor Q1 and one end of the source inductor Ls, and the other end of the source inductor Ls is connected to the ground.
  • the power transistor includes but is not limited to one of the following: a gallium nitride (GaN) transistor, a gallium arsenide (GaAs) transistor, and a silicon transistor.
  • GaN gallium nitride
  • GaAs gallium arsenide
  • the output matching circuit 300 includes a first impedance modulation network 301, a second impedance modulation network 302 and a resonant branch 303, the input end of the first impedance modulation network 301 is connected to the input end of the output matching circuit 300, the output end of the first impedance modulation network 301 is electrically connected to the input end of the second impedance modulation network 302 and the input end of the resonant branch 303, respectively, the output end of the second impedance modulation network 302 is connected to the output end of the output matching circuit 300, the output end of the resonant branch 303 is connected to the ground, and the first impedance modulation network 301 is configured to cooperate with the second impedance modulation network 302 and the resonant branch 303 to increase the fundamental impedance corresponding to the output end of the power amplification unit 100 to within a second preset impedance range.
  • the resonant branch 303 is configured to cooperate with the first impedance modulation network 301 and the second impedance modulation network 302 to tune the harmonic impedance of the output end of the power amplification unit 100 to a third preset impedance range.
  • the first impedance modulation network 301 and the second impedance modulation network 302 are both inductors.
  • the first impedance modulation network 301 corresponds to The inductor is inductor Ls6, and the inductor corresponding to the second impedance modulation network 302 is inductor Ls7; and/or, the resonant branch 303 includes a fourth inductor Ls4 and a third capacitor Cs3 connected in series, an end of the fourth inductor Ls4 away from an end electrically connected to the third capacitor Cs3 is connected to the input end of the resonant branch 303, and an end of the third capacitor Cs3 away from an end electrically connected to the fourth inductor Ls4 is connected to the ground.
  • FIG3 is a topological diagram of an output matching circuit provided in an embodiment of the present application
  • FIG4 is a topological diagram of an output matching circuit provided in an embodiment of the present application.
  • the output matching circuit shown in FIG3 or FIG4 can be used to implement at least one of the following operations: raising the fundamental impedance corresponding to the output end of the power amplification unit 100 to within the second preset impedance range, or tuning the harmonic impedance of the output end of the power amplification unit 100 to within the third preset impedance range.
  • the inductor Ls6 and the third capacitor Cs3 can raise the fundamental impedance corresponding to the output end of the power amplification unit 100, and the fourth inductor Ls4 and the third capacitor Cs3 can tune the harmonic impedance of the output end of the power amplification unit 100 to within the third preset impedance range; when the output matching circuit shown in FIG4 is used, the fourth inductor Ls4 and the inductor Ls7 can raise the fundamental impedance corresponding to the output end of the power amplification unit 100, and tune the harmonic impedance of the output end of the power amplification unit 100 to within the third preset impedance range.
  • the envelope impedance control circuit 400 includes an envelope impedance control branch 401 and an envelope grounding unit 402, wherein a first end of the envelope impedance control branch 401 is electrically connected to an electrical connection point between a fourth inductor Ls4 and a third capacitor Cs3, a second end of the envelope impedance control branch 401 is coupled and electrically connected to a first end of the envelope grounding unit 402, a second end of the envelope grounding unit 402 is connected to ground, and the envelope impedance control branch 401 is configured to cooperate with the envelope grounding unit 402 to connect the power amplifier unit 100
  • the low-frequency load impedance corresponding to the output end is adjusted to a fourth preset impedance range; as shown in Figure 2, the envelope impedance control branch 401 includes a resistor Rs and a fifth inductor Ls5 connected in series, the envelope grounding unit 402 includes a fourth capacitor Cs4, one end of the resistor Rs away from the end electrically connected to the fifth in
  • FIG. 5 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application
  • FIG. 6 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application.
  • the envelope grounding unit 400 further includes a fifth capacitor Cs5 connected in parallel with the fourth capacitor Cs4 .
  • Figure 7 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application
  • Figure 8 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application
  • Figure 9 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application.
  • the first end of the envelope impedance control branch 401 is electrically connected to the fourth capacitor Cs4 through the microstrip line TL1; it should be noted that, in some embodiments, as shown in Figures 7 to 9, the microstrip line TL1 is electrically connected to the envelope impedance control circuit 400 through the electrical connection point Lead_Z.
  • Figure 10 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application.
  • the envelope impedance control circuit 400 also includes a fundamental bypass branch, and the fundamental bypass branch includes a sixth capacitor Cs6, and the sixth capacitor Cs6 is connected in parallel with the fifth inductor Ls5 and one of the envelope impedance control branches 401.
  • FIG 11 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application.
  • the envelope impedance control circuit also includes a fundamental bypass branch, the fundamental bypass branch includes a seventh capacitor Cs7 and an eighth capacitor Cs8, the seventh capacitor Cs7 is connected in parallel with the resistor Rs, and the eighth capacitor Cs8 is connected in parallel with the fifth inductor Ls5.
  • the power amplifier provided in the embodiment of the present application includes a power amplification unit, an input matching circuit, an output matching circuit and an envelope impedance control circuit, wherein the input matching circuit is arranged in series between the input port of the power amplifier and the input end of the power amplifier unit, the output matching circuit is arranged in series between the output end of the power amplifier unit and the output end of the power amplifier, and the envelope impedance control circuit is coupled to the output matching circuit.
  • the fundamental impedance corresponding to the input end of the power amplifier unit is increased to within a first preset impedance range, and the harmonic impedance input to the power amplifier unit is suppressed;
  • the output matching circuit the fundamental impedance corresponding to the output end of the power amplifier unit is increased to within a second preset impedance range, and the harmonic impedance of the output end of the power amplifier unit is tuned to within a third preset impedance range, and the low-frequency load impedance corresponding to the output end of the power amplifier unit is adjusted to within a fourth preset impedance range through the envelope impedance control circuit; at the same time, by setting the input matching circuit and the output matching circuit, the harmonic impedance is tuned to improve the efficiency of the power amplifier; through An envelope impedance control circuit is provided to reduce the envelope impedance, thereby improving the linear performance of the power amplifier under broadband signals, and solving the problem of poor linear performance and low efficiency of the power amplifier under broadband signals in the related art.

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  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

The present application relates to a power amplifier, comprising a power amplification unit, an input matching circuit, an output matching circuit and an envelope impedance control circuit, the input matching circuit being arranged in series between an input port of the power amplifier and an input end of the power amplification unit, the output matching circuit being arranged in series between an output end of the power amplification unit and an output end of the power amplifier, and the envelope impedance control circuit being coupled to the output matching circuit.

Description

功率放大器Power Amplifier
相关申请的交叉引用CROSS-REFERENCE TO RELATED APPLICATIONS
本申请要求于2022年11月16日提交的中国专利申请NO.202211436625.3的优先权，该中国专利申请的内容通过引用的方式整体合并于此。This application claims priority to Chinese patent application No. 202211436625.3 filed on November 16, 2022, the contents of which are incorporated herein by reference in their entirety.
技术领域Technical Field
本申请涉及通信技术领域，尤其涉及功率放大器。The present application relates to the field of communication technology, and in particular to a power amplifier.
背景技术Background technique
随着无线技术的发展，通信系统的调制方式越来越复杂，需要处理的信号带宽也越来越宽；功率放大器用来放大射频信号的功率，是无线通信系统的核心部件，功率放大器效率的高低直接决定了无线通信基站的体积和重量。With the development of wireless technology, the modulation methods of communication systems are becoming more and more complex, and the signal bandwidth that needs to be processed is becoming wider and wider; the power amplifier is used to amplify the power of the radio frequency signal and is the core component of the wireless communication system. The efficiency of the power amplifier directly determines the size and weight of the wireless communication base station.
功率放大器需要具有良好的输入输出阻抗匹配电路，才能发挥功率放大器宽带信号下高效率的特性；相关技术中，在功率放大器的设计中，仅考虑功率放大器的基波阻抗、谐波阻抗和包络阻抗中一项，并不同时考虑基于功率放大器的基波阻抗、谐波阻抗及包络阻抗，可能使得功率放大器在宽带信号下的线性性能差且效率低。The power amplifier needs to have a good input and output impedance matching circuit to give full play to the high efficiency characteristics of the power amplifier under broadband signals. In the related art, in the design of the power amplifier, only one of the fundamental impedance, harmonic impedance and envelope impedance of the power amplifier is considered, and the fundamental impedance, harmonic impedance and envelope impedance based on the power amplifier are not considered at the same time, which may make the power amplifier have poor linear performance and low efficiency under broadband signals.
公开内容Public Content
第一方面，本申请提供了一种功率放大器，包括功率放大单元、输入匹配电路、输出匹配电路和包络阻抗控制电路，所述输入匹配电路串联设置在所述功率放大器的输入端口和所述功率放大单元的输入端之间，所述输出匹配电路串联设置在所述功率放大单元的输出端和所述功率放大器的输出端之间，所述包络阻抗控制电路耦接至所述输出匹配电路，所述功率放大单元配置为对射频信号进行放大；所述 输入匹配电路配置为将所述功率放大单元的输入端所对应的基波阻抗提升至第一预设阻抗范围内，以及抑制输入所述功率放大单元的谐波阻抗；所述输出匹配电路配置为将所述功率放大单元的输出端所对应的基波阻抗提升至第二预设阻抗范围内，以及调谐所述功率放大单元的输出端的谐波阻抗至第三预设阻抗范围内；所述包络阻抗控制电路配置为将所述功率放大单元的输出端对应的低频负载阻抗调整至第四预设阻抗范围内。In a first aspect, the present application provides a power amplifier, comprising a power amplification unit, an input matching circuit, an output matching circuit and an envelope impedance control circuit, wherein the input matching circuit is arranged in series between an input port of the power amplifier and an input end of the power amplification unit, the output matching circuit is arranged in series between an output end of the power amplification unit and an output end of the power amplifier, the envelope impedance control circuit is coupled to the output matching circuit, and the power amplification unit is configured to amplify a radio frequency signal; The input matching circuit is configured to increase the fundamental impedance corresponding to the input end of the power amplifier unit to within a first preset impedance range, and to suppress the harmonic impedance input to the power amplifier unit; the output matching circuit is configured to increase the fundamental impedance corresponding to the output end of the power amplifier unit to within a second preset impedance range, and to tune the harmonic impedance of the output end of the power amplifier unit to within a third preset impedance range; the envelope impedance control circuit is configured to adjust the low-frequency load impedance corresponding to the output end of the power amplifier unit to within a fourth preset impedance range.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本申请的部分实施例，并与说明书一起用于解释本申请的原理。The accompanying drawings herein are incorporated in and constitute a part of the specification, illustrate some embodiments consistent with the present application, and together with the description, are used to explain the principles of the present application.
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，对于本领域普通技术人员而言，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.
图1为本申请实施例提供的一种功率放大器的逻辑框图；FIG1 is a logic block diagram of a power amplifier provided in an embodiment of the present application;
图2为本申请实施例提供的一种功率放大器的拓扑结构示意图；FIG2 is a schematic diagram of a topological structure of a power amplifier provided in an embodiment of the present application;
图3为本申请实施例提供的输出匹配电路的拓扑图；FIG3 is a topological diagram of an output matching circuit provided in an embodiment of the present application;
图4为本申请实施例提供的输出匹配电路的拓扑图FIG. 4 is a topological diagram of an output matching circuit provided in an embodiment of the present application
图5为本申请实施例提供的包络阻抗控制电路的拓扑图；FIG5 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application;
图6为本申请实施例提供的包络阻抗控制电路的拓扑图；FIG6 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application;
图7为本申请实施例提供的包络阻抗控制电路的拓扑图；FIG7 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application;
图8为本申请实施例提供的包络阻抗控制电路的拓扑图；FIG8 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application;
图9是本申请实施例提供的包络阻抗控制电路的拓扑图；FIG9 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application;
图10为本申请实施例提供的包络阻抗控制电路的拓扑图；以及图11为本申请实施例提供的包络阻抗控制电路的拓扑图。FIG. 10 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application; and FIG. 11 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application.
具体实施方式Detailed ways
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、 完整地描述，显然，所描述的实施例是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都属于本申请保护的范围。In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be explained in detail below in conjunction with the accompanying drawings in the embodiments of the present application. It is obvious that the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.
图1为本申请实施例提供的一种功率放大器的逻辑框图，图2为本申请实施例提供的一种功率放大器的拓扑结构示意图，如图1至图2所示，本申请实施例提供一种功率放大器，包括功率放大单元100、输入匹配电路200、输出匹配电路300和包络阻抗控制电路400，输入匹配电路200串联设置在功率放大器的输入端口(对应信号的输入端，参考图2中的Lead_in)和功率放大单元100的输入端101之间，输出匹配电路300串联设置在功率放大单元100的输出端102和功率放大器的输出端(对应的信号输出端，参考图2中的Lead_out)之间，包络阻抗控制电路400耦接至输出匹配电路300，功率放大单元100配置为对射频信号进行放大。Figure 1 is a logic block diagram of a power amplifier provided in an embodiment of the present application, and Figure 2 is a schematic diagram of a topological structure of a power amplifier provided in an embodiment of the present application. As shown in Figures 1 and 2, an embodiment of the present application provides a power amplifier, including a power amplification unit 100, an input matching circuit 200, an output matching circuit 300 and an envelope impedance control circuit 400. The input matching circuit 200 is arranged in series between an input port of the power amplifier (corresponding to the input end of the signal, refer to Lead_in in Figure 2) and an input end 101 of the power amplification unit 100, and the output matching circuit 300 is arranged in series between an output end 102 of the power amplification unit 100 and an output end of the power amplifier (corresponding to the signal output end, refer to Lead_out in Figure 2). The envelope impedance control circuit 400 is coupled to the output matching circuit 300, and the power amplification unit 100 is configured to amplify a radio frequency signal.
在本申请实施例中，功率放大单元100为功率放大器的核心组成部件，用于对无线通信系统(例如：4G、5G基站)对应的发射链路中的射频信号进行放大。In an embodiment of the present application, the power amplification unit 100 is a core component of a power amplifier, which is used to amplify the radio frequency signal in the transmission link corresponding to a wireless communication system (for example: 4G, 5G base stations).
输入匹配电路200配置为将功率放大单元100的输入端所对应的基波阻抗提升至第一预设阻抗范围内，以及抑制输入功率放大单元的谐波阻抗。The input matching circuit 200 is configured to increase the fundamental impedance corresponding to the input end of the power amplification unit 100 to within a first preset impedance range, and to suppress the harmonic impedance of the input power amplification unit.
在本申请实施例中，第一预设阻抗范围所对应的阻抗值区间可以为1到50欧；在本申请实施例中，通过调节输入匹配电路200对应的LC元件参数，在基波频率处将功率放大单元100(对应功率放大器的芯片)输入端的低阻抗提升到输入管脚处(对应功率放大器的输入端，参考图2中的Lead_in)的高阻抗(例如：1到50欧)，并在谐波频率处谐振，抑制谐波频率处的阻抗，降低进入功率放大单元100的谐波频率能量。In an embodiment of the present application, the impedance value interval corresponding to the first preset impedance range can be 1 to 50 ohms; in an embodiment of the present application, by adjusting the LC element parameters corresponding to the input matching circuit 200, the low impedance at the input end of the power amplification unit 100 (corresponding to the chip of the power amplifier) is increased to a high impedance (for example: 1 to 50 ohms) at the input pin (corresponding to the input end of the power amplifier, refer to Lead_in in Figure 2) at the fundamental frequency, and resonates at the harmonic frequency, suppressing the impedance at the harmonic frequency, and reducing the harmonic frequency energy entering the power amplification unit 100.
输出匹配电路300配置为将功率放大单元100的输出端(即，与输出匹配电路300连接的一端)所对应的基波阻抗提升至第二预设阻抗范围内，以及调谐功率放大单元100的输出端的谐波阻抗至第三 预设阻抗范围内。The output matching circuit 300 is configured to increase the fundamental impedance corresponding to the output end of the power amplification unit 100 (i.e., the end connected to the output matching circuit 300) to a second preset impedance range, and to tune the harmonic impedance of the output end of the power amplification unit 100 to a third preset impedance range. Within the preset impedance range.
在本申请实施例中，第二预设阻抗范围对应的阻抗值区间可以为1到50欧；在本申请实施例中，通过调节输出匹配电路300对应的LC元件参数，在基波频率处将功率放大单元100输出端(对应功率放大器芯片的输出端)的低阻抗提升到输出管脚处(对应功率放大器的输出端，参考图2中的Lead_out)的高阻抗(例如：1到50欧)；并且对谐波频率处的阻抗进行调谐，配合功率放大器的输出管脚外的印制电路板(PCB)匹配电路发挥更好的性能。In an embodiment of the present application, the impedance value interval corresponding to the second preset impedance range can be 1 to 50 ohms; in an embodiment of the present application, by adjusting the LC component parameters corresponding to the output matching circuit 300, the low impedance of the output end of the power amplification unit 100 (corresponding to the output end of the power amplifier chip) is increased to a high impedance (for example: 1 to 50 ohms) at the output pin (corresponding to the output end of the power amplifier, refer to Lead_out in Figure 2) at the fundamental frequency; and the impedance at the harmonic frequency is tuned to cooperate with the printed circuit board (PCB) matching circuit outside the output pin of the power amplifier to achieve better performance.
包络阻抗控制电路400配置为将功率放大单元100的输出端对应的低频负载阻抗调整至第四预设阻抗范围内。The envelope impedance control circuit 400 is configured to adjust the low-frequency load impedance corresponding to the output end of the power amplification unit 100 to within a fourth preset impedance range.
在本申请实施例中，在不引入包络阻抗控制电路400的情况下，输出匹配电路300涉及的电感元件及外部PCB电路的回路电感的总电感过大，可能会导致包络谐振频率低，影响工作带宽；而通过设置包络阻抗控制电路400，集成较短的电感，实现了更高的包络谐振频率，降低了包络阻抗。In the embodiment of the present application, without introducing the envelope impedance control circuit 400, the total inductance of the inductance elements involved in the output matching circuit 300 and the loop inductance of the external PCB circuit is too large, which may cause a low envelope resonance frequency and affect the working bandwidth; by setting the envelope impedance control circuit 400, a shorter inductor is integrated, a higher envelope resonance frequency is achieved, and the envelope impedance is reduced.
本申请实施例提供的功率放大器，通过设置输入匹配电路、输出匹配电路，对谐波阻抗进行调谐，提升功率放大器的效率；通过设置包络阻抗控制电路，降低包络阻抗，提高了功率放大器宽带信号下的线性性能，解决了相关技术中功率放大器在宽带信号下的线性性能差且效率低的问题。The power amplifier provided in the embodiment of the present application tunes the harmonic impedance by setting an input matching circuit and an output matching circuit to improve the efficiency of the power amplifier; and reduces the envelope impedance by setting an envelope impedance control circuit, thereby improving the linear performance of the power amplifier under broadband signals, thereby solving the problem of poor linear performance and low efficiency of the power amplifier under broadband signals in the related art.
参考图1至图2，在一些实施方式中，输入匹配电路200包括单节L型匹配网络201和单节T型匹配网络202，单节L型匹配网络201的输入端电连接功率放大器的输入端口(参考图2中的Lead_in)，单节L型匹配网络201的接地端对地，单节L型匹配网络201的输出端电连接单节T型匹配网络202的输入端，单节T型匹配网络202的接地端对地，单节T型匹配网络202的输出端电连接功率放大单元100的输入端，单节L型匹配网络201与同单节T型匹配网络202进行谐振，以将功率放大单元100的输入端所对应的基波阻抗提升至第一预设阻抗范围内，以及抑制输入功率放大单元的谐波阻抗。Referring to Figures 1 to 2, in some embodiments, the input matching circuit 200 includes a single-section L-type matching network 201 and a single-section T-type matching network 202, the input end of the single-section L-type matching network 201 is electrically connected to the input port of the power amplifier (refer to Lead_in in Figure 2), the ground end of the single-section L-type matching network 201 is connected to the ground, the output end of the single-section L-type matching network 201 is electrically connected to the input end of the single-section T-type matching network 202, the ground end of the single-section T-type matching network 202 is connected to the ground, the output end of the single-section T-type matching network 202 is electrically connected to the input end of the power amplification unit 100, the single-section L-type matching network 201 resonates with the single-section T-type matching network 202 to increase the fundamental impedance corresponding to the input end of the power amplification unit 100 to within the first preset impedance range, and suppress the harmonic impedance of the input power amplification unit.
在一些实施方式中，单节L型匹配网络201包括第一电感Ls 1 和第一电容Cs1，单节T型匹配网络202包括第二电感Ls2、第三电感Ls3和第二电容Cs2，第一电感Ls1的一端对接单节L型匹配网络201的输入端，另一端分别与第一电容Cs1和第二电感Ls2电连接，第一电容Cs1的另一端对地，第二电感Ls2的另一端分别与第二电容Cs2和第三电感Ls3电连接，第二电容Cs2的另一端对地，第三电感Ls3的另一端对接单节T型匹配网络202的输出端，第一电感Ls1和第一电容Cs1组成L型LC谐振电路；第二电感Ls2、第三电感Ls3和第二电容Cs2组成T型LC谐振电路。In some embodiments, the single-section L-type matching network 201 includes a first inductor Ls1 and the first capacitor Cs1, the single-section T-type matching network 202 includes a second inductor Ls2, a third inductor Ls3 and a second capacitor Cs2, one end of the first inductor Ls1 is connected to the input end of the single-section L-type matching network 201, and the other end is electrically connected to the first capacitor Cs1 and the second inductor Ls2 respectively, the other end of the first capacitor Cs1 is connected to the ground, the other end of the second inductor Ls2 is electrically connected to the second capacitor Cs2 and the third inductor Ls3 respectively, the other end of the second capacitor Cs2 is connected to the ground, and the other end of the third inductor Ls3 is connected to the output end of the single-section T-type matching network 202, the first inductor Ls1 and the first capacitor Cs1 form an L-type LC resonant circuit; the second inductor Ls2, the third inductor Ls3 and the second capacitor Cs2 form a T-type LC resonant circuit.
在一些实施方式中，参考图1和图2，功率放大单元100包括功率晶体管Q1、输出电容Cds1、源极电感Ls，功率晶体管Q1的栅极对接功率放大单元100的输入端，功率晶体管Q1的漏极分别电连接输出匹配电路300的输入端和输出电容Cds1的一端，输出电容Cds1的另一端分别电连接功率晶体管Q1的源极和源极电感Ls的一端，源极电感Ls的另一端对地。In some embodiments, referring to FIG. 1 and FIG. 2 , the power amplification unit 100 includes a power transistor Q1, an output capacitor Cds1, and a source inductor Ls. The gate of the power transistor Q1 is connected to the input end of the power amplification unit 100, the drain of the power transistor Q1 is electrically connected to the input end of the output matching circuit 300 and one end of the output capacitor Cds1, respectively, the other end of the output capacitor Cds1 is electrically connected to the source of the power transistor Q1 and one end of the source inductor Ls, and the other end of the source inductor Ls is connected to the ground.
在一些实施方式中，功率晶体管包括但不限于以下一种：氮化镓GaN晶体管、砷化稼GaAs晶体管、硅晶体管。In some embodiments, the power transistor includes but is not limited to one of the following: a gallium nitride (GaN) transistor, a gallium arsenide (GaAs) transistor, and a silicon transistor.
在一些实施方式中，参考图1和图2，输出匹配电路300包括第一阻抗调制网络301、第二阻抗调制网络302和谐振支路303，第一阻抗调制网络301的输入端对接输出匹配电路300的输入端，第一阻抗调制网络301的输出端分别与第二阻抗调制网络302的输入端和谐振支路303的输入端电连接，第二阻抗调制网络302的输出端对接输出匹配电路300的输出端，谐振支路303的输出端对地，第一阻抗调制网络301配置为配合第二阻抗调制网络302和谐振支路303，将功率放大单元100的输出端所对应的基波阻抗提升至第二预设阻抗范围内。In some embodiments, referring to Figures 1 and 2, the output matching circuit 300 includes a first impedance modulation network 301, a second impedance modulation network 302 and a resonant branch 303, the input end of the first impedance modulation network 301 is connected to the input end of the output matching circuit 300, the output end of the first impedance modulation network 301 is electrically connected to the input end of the second impedance modulation network 302 and the input end of the resonant branch 303, respectively, the output end of the second impedance modulation network 302 is connected to the output end of the output matching circuit 300, the output end of the resonant branch 303 is connected to the ground, and the first impedance modulation network 301 is configured to cooperate with the second impedance modulation network 302 and the resonant branch 303 to increase the fundamental impedance corresponding to the output end of the power amplification unit 100 to within a second preset impedance range.
谐振支路303配置为配合第一阻抗调制网络301和第二阻抗调制网络302，调谐功率放大单元100的输出端的谐波阻抗至第三预设阻抗范围内。The resonant branch 303 is configured to cooperate with the first impedance modulation network 301 and the second impedance modulation network 302 to tune the harmonic impedance of the output end of the power amplification unit 100 to a third preset impedance range.
在一些实施方式中，第一阻抗调制网络301和第二阻抗调制网络302均为电感，在本申请实施例中，第一阻抗调制网络301对应的 电感为电感Ls6，第二阻抗调制网络302对应的电感为电感Ls7；和/或，谐振支路303包括串联连接的第四电感Ls4和第三电容Cs3,第四电感Ls4背离与第三电容Cs3电连接的一端的一端对接谐振支路303的输入端，第三电容Cs3背离与第四电感Ls4电连接的一端的一端对地。In some implementations, the first impedance modulation network 301 and the second impedance modulation network 302 are both inductors. In the embodiment of the present application, the first impedance modulation network 301 corresponds to The inductor is inductor Ls6, and the inductor corresponding to the second impedance modulation network 302 is inductor Ls7; and/or, the resonant branch 303 includes a fourth inductor Ls4 and a third capacitor Cs3 connected in series, an end of the fourth inductor Ls4 away from an end electrically connected to the third capacitor Cs3 is connected to the input end of the resonant branch 303, and an end of the third capacitor Cs3 away from an end electrically connected to the fourth inductor Ls4 is connected to the ground.
图3为本申请实施例提供的输出匹配电路的拓扑图；图4为本申请实施例提供的输出匹配电路的拓扑图，参考图3和图4，在一些实施方式中，采用图3或图4所示的输出匹配电路，可以实现以下操作中的至少一者：将功率放大单元100的输出端所对应的基波阻抗提升至第二预设阻抗范围内，或将调谐功率放大单元100的输出端的谐波阻抗至第三预设阻抗范围内。当采用图3所示的输出匹配电路时，电感Ls6和第三电容Cs3可以提升功率放大单元100的输出端所对应的基波阻抗，第四电感Ls4和第三电容Cs3可以将功率放大单元100的输出端的谐波阻抗调谐至第三预设阻抗范围内；当采用图4所示的输出匹配电路时，第四电感Ls4和电感Ls7可以提升功率放大单元100的输出端所对应的基波阻抗，同时将功率放大单元100的输出端的谐波阻抗调谐至第三预设阻抗范围内。FIG3 is a topological diagram of an output matching circuit provided in an embodiment of the present application; FIG4 is a topological diagram of an output matching circuit provided in an embodiment of the present application. Referring to FIG3 and FIG4, in some embodiments, the output matching circuit shown in FIG3 or FIG4 can be used to implement at least one of the following operations: raising the fundamental impedance corresponding to the output end of the power amplification unit 100 to within the second preset impedance range, or tuning the harmonic impedance of the output end of the power amplification unit 100 to within the third preset impedance range. When the output matching circuit shown in FIG3 is used, the inductor Ls6 and the third capacitor Cs3 can raise the fundamental impedance corresponding to the output end of the power amplification unit 100, and the fourth inductor Ls4 and the third capacitor Cs3 can tune the harmonic impedance of the output end of the power amplification unit 100 to within the third preset impedance range; when the output matching circuit shown in FIG4 is used, the fourth inductor Ls4 and the inductor Ls7 can raise the fundamental impedance corresponding to the output end of the power amplification unit 100, and tune the harmonic impedance of the output end of the power amplification unit 100 to within the third preset impedance range.
在一些实施方式中，参考图2，包络阻抗控制电路400包括包络阻抗控制支路401和包络接地单元402，包络阻抗控制支路401的第一端电连接第四电感Ls4与第三电容Cs3的电连接点，包络阻抗控制支路401的第二端耦合电连接包络接地单元402的第一端，包络接地单元402的第二端对地，包络阻抗控制支路401配置为配合包络接地单元402，将功率放大单元100的输出端对应的低频负载阻抗调整至第四预设阻抗范围内；参考图2所示，包络阻抗控制支路401包括串联的电阻器Rs和第五电感Ls5，包络接地单元402包括第四电容Cs4，电阻器Rs背离与第五电感Ls5电连接的一端的一端对接包络阻抗控制支路401的第一端，第五电感Ls5背离与电阻器Rs电连接的一端的一端耦合电连接第四电容Cs4,第四电容Cs4的另一端对地。In some embodiments, referring to FIG. 2 , the envelope impedance control circuit 400 includes an envelope impedance control branch 401 and an envelope grounding unit 402, wherein a first end of the envelope impedance control branch 401 is electrically connected to an electrical connection point between a fourth inductor Ls4 and a third capacitor Cs3, a second end of the envelope impedance control branch 401 is coupled and electrically connected to a first end of the envelope grounding unit 402, a second end of the envelope grounding unit 402 is connected to ground, and the envelope impedance control branch 401 is configured to cooperate with the envelope grounding unit 402 to connect the power amplifier unit 100 The low-frequency load impedance corresponding to the output end is adjusted to a fourth preset impedance range; as shown in Figure 2, the envelope impedance control branch 401 includes a resistor Rs and a fifth inductor Ls5 connected in series, the envelope grounding unit 402 includes a fourth capacitor Cs4, one end of the resistor Rs away from the end electrically connected to the fifth inductor Ls5 is connected to the first end of the envelope impedance control branch 401, one end of the fifth inductor Ls5 away from the end electrically connected to the resistor Rs is coupled and electrically connected to the fourth capacitor Cs4, and the other end of the fourth capacitor Cs4 is grounded.
图5为本申请实施例提供的包络阻抗控制电路的拓扑图，图6为本申请实施例提供的包络阻抗控制电路的拓扑图，参考图5和图6， 在一些实施方式中，包络接地单元400还包括与第四电容Cs4并联的第五电容Cs5。FIG. 5 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application, and FIG. 6 is a topological diagram of an envelope impedance control circuit provided in an embodiment of the present application. Referring to FIG. 5 and FIG. 6, In some implementations, the envelope grounding unit 400 further includes a fifth capacitor Cs5 connected in parallel with the fourth capacitor Cs4 .
图7为本申请实施例提供的包络阻抗控制电路的拓扑图，图8为本申请实施例提供的包络阻抗控制电路的拓扑图，图9是本申请实施例提供的包络阻抗控制电路的拓扑图，参考图7、图8、图9，在一些实施方式中，包络阻抗控制支路401的第一端通过微带线TL1与第四电容Cs4电连接；需要说明的是，在一些实施方式中，如图7至图9中所示，微带线TL1通过电连接点Lead_Z与包络阻抗控制电路400电连接。Figure 7 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application, Figure 8 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application, and Figure 9 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application. Referring to Figures 7, 8, and 9, in some embodiments, the first end of the envelope impedance control branch 401 is electrically connected to the fourth capacitor Cs4 through the microstrip line TL1; it should be noted that, in some embodiments, as shown in Figures 7 to 9, the microstrip line TL1 is electrically connected to the envelope impedance control circuit 400 through the electrical connection point Lead_Z.
图10为本申请实施例提供的包络阻抗控制电路的拓扑图，在一些实施方式中，参考图2、图5、图6、图8和图9，包络阻抗控制电路400还包括基波旁路支路，基波旁路支路包括第六电容Cs6,第六电容Cs6与第五电感Ls5和包络阻抗控制支路401中之一并联。Figure 10 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application. In some embodiments, referring to Figures 2, 5, 6, 8 and 9, the envelope impedance control circuit 400 also includes a fundamental bypass branch, and the fundamental bypass branch includes a sixth capacitor Cs6, and the sixth capacitor Cs6 is connected in parallel with the fifth inductor Ls5 and one of the envelope impedance control branches 401.
图11为本申请实施例提供的包络阻抗控制电路的拓扑图，参考图11，在一些实施方式中，包络阻抗控制电路还包括基波旁路支路，基波旁路支路包括第七电容Cs7和第八电容Cs8,第七电容Cs7与电阻器Rs并联，第八电容Cs8与第五电感Ls5并联。Figure 11 is a topological diagram of the envelope impedance control circuit provided in an embodiment of the present application. Referring to Figure 11, in some embodiments, the envelope impedance control circuit also includes a fundamental bypass branch, the fundamental bypass branch includes a seventh capacitor Cs7 and an eighth capacitor Cs8, the seventh capacitor Cs7 is connected in parallel with the resistor Rs, and the eighth capacitor Cs8 is connected in parallel with the fifth inductor Ls5.
本申请实施例提供的功率放大器，包括功率放大单元、输入匹配电路、输出匹配电路和包络阻抗控制电路，所述输入匹配电路串联设置在所述功率放大器的输入端口和所述功率放大单元的输入端之间，所述输出匹配电路串联设置在所述功率放大单元的输出端和所述功率放大器的输出端之间，所述包络阻抗控制电路耦接至所述输出匹配电路，通过所述输入匹配电路，将所述功率放大单元的输入端所对应的基波阻抗提升至第一预设阻抗范围内，以及抑制输入所述功率放大单元的谐波阻抗；通过所述输出匹配电路，将所述功率放大单元的输出端所对应的基波阻抗提升至第二预设阻抗范围内，以及调谐所述功率放大单元的输出端的谐波阻抗至第三预设阻抗范围内，以及通过所述包络阻抗控制电路将所述功率放大单元的输出端对应的低频负载阻抗调整至第四预设阻抗范围内；同时，通过设置输入匹配电路、输出匹配电路，对谐波阻抗进行调谐，提升功率放大器的效率；通过 设置包络阻抗控制电路，降低包络阻抗，提高了功率放大器宽带信号下的线性性能，解决了相关技术中功率放大器在宽带信号下的线性性能差且效率低的问题。The power amplifier provided in the embodiment of the present application includes a power amplification unit, an input matching circuit, an output matching circuit and an envelope impedance control circuit, wherein the input matching circuit is arranged in series between the input port of the power amplifier and the input end of the power amplifier unit, the output matching circuit is arranged in series between the output end of the power amplifier unit and the output end of the power amplifier, and the envelope impedance control circuit is coupled to the output matching circuit. Through the input matching circuit, the fundamental impedance corresponding to the input end of the power amplifier unit is increased to within a first preset impedance range, and the harmonic impedance input to the power amplifier unit is suppressed; through the output matching circuit, the fundamental impedance corresponding to the output end of the power amplifier unit is increased to within a second preset impedance range, and the harmonic impedance of the output end of the power amplifier unit is tuned to within a third preset impedance range, and the low-frequency load impedance corresponding to the output end of the power amplifier unit is adjusted to within a fourth preset impedance range through the envelope impedance control circuit; at the same time, by setting the input matching circuit and the output matching circuit, the harmonic impedance is tuned to improve the efficiency of the power amplifier; through An envelope impedance control circuit is provided to reduce the envelope impedance, thereby improving the linear performance of the power amplifier under broadband signals, and solving the problem of poor linear performance and low efficiency of the power amplifier under broadband signals in the related art.
需要说明的是，在本文中，诸如“第一”和“第二”等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
以上所述仅是本申请的具体实施方式，使本领域技术人员能够理解或实现本申请。对这些实施例的多种修改对本领域的技术人员来说将是显而易见的，本文中所定义的一般原理可以在不脱离本申请的精神或范围的情况下，在其它实施例中实现。因此，本申请将不会被限制于本文所示的这些实施例，而是要符合与本文所申请的原理和新颖特点相一致的最宽的范围。 The above description is only a specific implementation of the present application, so that those skilled in the art can understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features applied for herein.

Claims (13)

  1. 一种功率放大器，包括功率放大单元、输入匹配电路、输出匹配电路和包络阻抗控制电路，所述输入匹配电路串联设置在所述功率放大器的输入端口和所述功率放大单元的输入端之间，所述输出匹配电路串联设置在所述功率放大单元的输出端和所述功率放大器的输出端之间，所述包络阻抗控制电路耦接至所述输出匹配电路，其中，A power amplifier comprises a power amplification unit, an input matching circuit, an output matching circuit and an envelope impedance control circuit, wherein the input matching circuit is arranged in series between an input port of the power amplifier and an input end of the power amplification unit, the output matching circuit is arranged in series between an output end of the power amplification unit and an output end of the power amplifier, and the envelope impedance control circuit is coupled to the output matching circuit, wherein:
    所述功率放大单元配置为对射频信号进行放大；The power amplification unit is configured to amplify the radio frequency signal;
    所述输入匹配电路配置为将所述功率放大单元的输入端所对应的基波阻抗提升至第一预设阻抗范围内，以及抑制输入所述功率放大单元的谐波阻抗；The input matching circuit is configured to increase the fundamental impedance corresponding to the input end of the power amplification unit to within a first preset impedance range, and suppress the harmonic impedance input to the power amplification unit;
    所述输出匹配电路配置为将所述功率放大单元的输出端所对应的基波阻抗提升至第二预设阻抗范围内，以及调谐所述功率放大单元的输出端的谐波阻抗至第三预设阻抗范围内；The output matching circuit is configured to increase the fundamental impedance corresponding to the output end of the power amplification unit to within a second preset impedance range, and to tune the harmonic impedance of the output end of the power amplification unit to within a third preset impedance range;
    所述包络阻抗控制电路配置为将所述功率放大单元的输出端对应的低频负载阻抗调整至第四预设阻抗范围内。The envelope impedance control circuit is configured to adjust the low-frequency load impedance corresponding to the output end of the power amplification unit to within a fourth preset impedance range.
  2. 根据权利要求1所述的功率放大器，其中，所述输入匹配电路包括单节L型匹配网络和单节T型匹配网络，所述单节L型匹配网络的输入端电连接所述功率放大器的输入端口，所述单节L型匹配网络的接地端对地，所述单节L型匹配网络的输出端电连接所述单节T型匹配网络的输入端，所述单节T型匹配网络的接地端对地，所述单节T型匹配网络的输出端电连接所述功率放大单元的输入端，其中，所述单节L型匹配网络与同所述单节T型匹配网络进行谐振，以将所述功率放大单元的输入端所对应的基波阻抗提升至第一预设阻抗范围内，以及抑制输入所述功率放大单元的谐波阻抗。The power amplifier according to claim 1, wherein the input matching circuit comprises a single-section L-type matching network and a single-section T-type matching network, the input end of the single-section L-type matching network is electrically connected to the input port of the power amplifier, the ground end of the single-section L-type matching network is connected to the ground, the output end of the single-section L-type matching network is electrically connected to the input end of the single-section T-type matching network, the ground end of the single-section T-type matching network is connected to the ground, and the output end of the single-section T-type matching network is electrically connected to the input end of the power amplification unit, wherein the single-section L-type matching network resonates with the single-section T-type matching network to increase the fundamental impedance corresponding to the input end of the power amplification unit to within a first preset impedance range, and suppress the harmonic impedance input to the power amplification unit.
  3. 根据权利要求2所述的功率放大器，其中，所述单节L型匹配网络包括第一电感Ls1和第一电容Cs1，所述单节T型匹配网络包括第二电感Ls2、第三电感Ls3和第二电容Cs2，所述第一电感Ls1 的一端对接所述单节L型匹配网络的输入端，另一端分别与所述第一电容Cs1和所述第二电感Ls2电连接，所述第一电容Cs1的另一端对地，所述第二电感Ls2的另一端分别与所述第二电容Cs2和所述第三电感Ls3电连接，所述第二电容Cs2的另一端对地，所述第三电感Ls3的另一端对接所述单节T型匹配网络的输出端，其中，所述第一电感Ls1和所述第一电容Cs1组成L型LC谐振电路；所述第二电感Ls2、所述第三电感Ls3和所述第二电容Cs2组成T型LC谐振电路。The power amplifier according to claim 2, wherein the single-section L-type matching network includes a first inductor Ls1 and a first capacitor Cs1, and the single-section T-type matching network includes a second inductor Ls2, a third inductor Ls3 and a second capacitor Cs2, and the first inductor Ls1 One end of is connected to the input end of the single-section L-type matching network, and the other end is electrically connected to the first capacitor Cs1 and the second inductor Ls2 respectively, the other end of the first capacitor Cs1 is connected to the ground, the other end of the second inductor Ls2 is electrically connected to the second capacitor Cs2 and the third inductor Ls3 respectively, the other end of the second capacitor Cs2 is connected to the ground, and the other end of the third inductor Ls3 is connected to the output end of the single-section T-type matching network, wherein the first inductor Ls1 and the first capacitor Cs1 form an L-type LC resonant circuit; the second inductor Ls2, the third inductor Ls3 and the second capacitor Cs2 form a T-type LC resonant circuit.
  4. 根据权利要求1所述的功率放大器，其中，所述功率放大单元包括功率晶体管、输出电容Cds1、源极电感Ls，所述功率晶体管的栅极对接所述功率放大单元的输入端，所述功率晶体管的漏极分别电连接所述输出匹配电路的输入端和所述输出电容Cds1的一端，所述输出电容Cds1的另一端分别电连接所述功率晶体管的源极和所述源极电感Ls的一端，所述源极电感Ls的另一端对地。The power amplifier according to claim 1, wherein the power amplification unit comprises a power transistor, an output capacitor Cds1, and a source inductor Ls, the gate of the power transistor is connected to the input end of the power amplification unit, the drain of the power transistor is electrically connected to the input end of the output matching circuit and one end of the output capacitor Cds1, respectively, the other end of the output capacitor Cds1 is electrically connected to the source of the power transistor and one end of the source inductor Ls, and the other end of the source inductor Ls is connected to the ground.
  5. 根据权利要求4所述的功率放大器，其中，所述功率晶体管包括以下一种：氮化镓GaN晶体管、砷化稼GaAs晶体管、硅晶体管。The power amplifier according to claim 4, wherein the power transistor comprises one of the following: a gallium nitride (GaN) transistor, a gallium arsenide (GaAs) transistor, or a silicon transistor.
  6. 根据权利要求4所述的功率放大器，其中，所述输出匹配电路包括第一阻抗调制网络、第二阻抗调制网络和谐振支路，其中，所述第一阻抗调制网络的输入端对接所述输出匹配电路的输入端，所述第一阻抗调制网络的输出端分别与所述第二阻抗调制网络的输入端和所述谐振支路的输入端电连接，所述第二阻抗调制网络的输出端对接所述输出匹配电路的输出端，所述谐振支路的输出端对地，其中，The power amplifier according to claim 4, wherein the output matching circuit comprises a first impedance modulation network, a second impedance modulation network and a resonant branch, wherein the input end of the first impedance modulation network is connected to the input end of the output matching circuit, the output end of the first impedance modulation network is electrically connected to the input end of the second impedance modulation network and the input end of the resonant branch respectively, the output end of the second impedance modulation network is connected to the output end of the output matching circuit, and the output end of the resonant branch is connected to the ground, wherein,
    所述第一阻抗调制网络配置为配合所述第二阻抗调制网络和所述谐振支路，将所述功率放大单元的输出端所对应的基波阻抗提升至第二预设阻抗范围内；The first impedance modulation network is configured to cooperate with the second impedance modulation network and the resonant branch to increase the fundamental impedance corresponding to the output end of the power amplification unit to within a second preset impedance range;
    所述谐振支路配置为配合所述第一阻抗调制网络和所述第二阻抗调制网络，调谐所述功率放大单元的输出端的谐波阻抗至第三预设阻抗范围内。 The resonant branch is configured to cooperate with the first impedance modulation network and the second impedance modulation network to tune the harmonic impedance of the output end of the power amplification unit to within a third preset impedance range.
  7. 根据权利要求6所述的功率放大器，其中，所述第一阻抗调制网络和所述第二阻抗调制网络均为电感，和/或，所述谐振支路包括串联连接的第四电感Ls4和第三电容Cs3,所述第四电感Ls4背离与所述第三电容Cs3电连接一端的一端对接所述谐振支路的输入端，所述第三电容Cs3背离与所述第四电感Ls4电连接一端的一端对地。The power amplifier according to claim 6, wherein the first impedance modulation network and the second impedance modulation network are both inductors, and/or the resonant branch includes a fourth inductor Ls4 and a third capacitor Cs3 connected in series, an end of the fourth inductor Ls4 away from an end electrically connected to the third capacitor Cs3 is connected to the input end of the resonant branch, and an end of the third capacitor Cs3 away from an end electrically connected to the fourth inductor Ls4 is connected to ground.
  8. 根据权利要求7所述的功率放大器，其中，所述包络阻抗控制电路包括包络阻抗控制支路和包络接地单元，所述包络阻抗控制支路的第一端电连接所述第四电感Ls4与所述第三电容Cs3的电连接点，所述包络阻抗控制支路的第二端耦合电连接所述包络接地单元的第一端，所述包络接地单元的第二端对地，其中，所述包络阻抗控制支路配置为配合所述包络接地单元，将所述功率放大单元的输出端对应的低频负载阻抗调整至所述第四预设阻抗范围内。The power amplifier according to claim 7, wherein the envelope impedance control circuit comprises an envelope impedance control branch and an envelope grounding unit, wherein a first end of the envelope impedance control branch is electrically connected to an electrical connection point between the fourth inductor Ls4 and the third capacitor Cs3, a second end of the envelope impedance control branch is coupled and electrically connected to a first end of the envelope grounding unit, and a second end of the envelope grounding unit is connected to ground, wherein the envelope impedance control branch is configured to cooperate with the envelope grounding unit to adjust the low-frequency load impedance corresponding to the output end of the power amplification unit to within the fourth preset impedance range.
  9. 根据权利要求8所述的功率放大器，其中，所述包络阻抗控制支路包括串联的电阻器Rs和第五电感Ls5，所述包络接地单元包括第四电容Cs4，其中，所述电阻器Rs背离与所述第五电感Ls5电连接一端的一端对接所述包络阻抗控制支路的第一端，所述第五电感Ls5背离与所述电阻器Rs电连接一端的一端耦合电连接所述第四电容Cs4,所述第四电容Cs4的另一端对地。The power amplifier according to claim 8, wherein the envelope impedance control branch comprises a resistor Rs and a fifth inductor Ls5 connected in series, and the envelope grounding unit comprises a fourth capacitor Cs4, wherein an end of the resistor Rs away from an end electrically connected to the fifth inductor Ls5 is connected to the first end of the envelope impedance control branch, an end of the fifth inductor Ls5 away from an end electrically connected to the resistor Rs is coupled and electrically connected to the fourth capacitor Cs4, and the other end of the fourth capacitor Cs4 is connected to the ground.
  10. 根据权利要求9所述的功率放大器，其中，所述包络接地单元还包括与所述第四电容Cs4并联的第五电容Cs5。The power amplifier according to claim 9, wherein the envelope grounding unit further includes a fifth capacitor Cs5 connected in parallel with the fourth capacitor Cs4.
  11. 根据权利要求10所述的功率放大器，其中，所述包络阻抗控制支路的第一端通过微带线与所述第四电容Cs4电连接。The power amplifier according to claim 10, wherein the first end of the envelope impedance control branch is electrically connected to the fourth capacitor Cs4 through a microstrip line.
  12. 根据权利要求9所述的功率放大器，其中，所述包络阻抗控制电路还包括基波旁路支路，所述基波旁路支路包括第六电容Cs6, 所述第六电容Cs6与所述第五电感Ls5和所述包络阻抗控制支路其中之一并联。The power amplifier according to claim 9, wherein the envelope impedance control circuit further comprises a fundamental bypass branch, wherein the fundamental bypass branch comprises a sixth capacitor Cs6, The sixth capacitor Cs6 is connected in parallel with one of the fifth inductor Ls5 and the envelope impedance control branch.
  13. 根据权利要求9所述的功率放大器，其中，所述包络阻抗控制电路还包括基波旁路支路，所述基波旁路支路包括第七电容Cs7和第八电容Cs8,所述第七电容Cs7与所述电阻器Rs并联，所述第八电容Cs8与所述第五电感Ls5并联。 The power amplifier according to claim 9, wherein the envelope impedance control circuit further includes a fundamental bypass branch, the fundamental bypass branch includes a seventh capacitor Cs7 and an eighth capacitor Cs8, the seventh capacitor Cs7 is connected in parallel with the resistor Rs, and the eighth capacitor Cs8 is connected in parallel with the fifth inductor Ls5.
PCT/CN2023/129586 2022-11-16 2023-11-03 Power amplifier WO2024104194A1 (en)

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CN109286380A (en) * 2017-07-21 2019-01-29 成都华为技术有限公司 Power amplifier
US20190356284A1 (en) * 2018-05-18 2019-11-21 Nxp Usa, Inc. Broadband power transistor devices and amplifiers and methods of manufacture thereof
CN111654249A (en) * 2020-05-22 2020-09-11 重庆大学 Envelope impedance control structure and power amplifier structure
CN114139483A (en) * 2021-11-19 2022-03-04 南京航空航天大学 Design method of broadband radio frequency power amplifier and broadband radio frequency power amplifier

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109286380A (en) * 2017-07-21 2019-01-29 成都华为技术有限公司 Power amplifier
US20190356284A1 (en) * 2018-05-18 2019-11-21 Nxp Usa, Inc. Broadband power transistor devices and amplifiers and methods of manufacture thereof
CN111654249A (en) * 2020-05-22 2020-09-11 重庆大学 Envelope impedance control structure and power amplifier structure
CN114139483A (en) * 2021-11-19 2022-03-04 南京航空航天大学 Design method of broadband radio frequency power amplifier and broadband radio frequency power amplifier

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