WO2024093229A1 - 电子设备及其控制方法、装置和存储介质 - Google Patents

电子设备及其控制方法、装置和存储介质 Download PDF

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Publication number
WO2024093229A1
WO2024093229A1 PCT/CN2023/098073 CN2023098073W WO2024093229A1 WO 2024093229 A1 WO2024093229 A1 WO 2024093229A1 CN 2023098073 W CN2023098073 W CN 2023098073W WO 2024093229 A1 WO2024093229 A1 WO 2024093229A1
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WO
WIPO (PCT)
Prior art keywords
phase
electronic device
pfc circuit
way
load
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Application number
PCT/CN2023/098073
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English (en)
French (fr)
Inventor
徐锦清
孙书川
郭双林
魏育芳
Original Assignee
广东美的制冷设备有限公司
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Publication of WO2024093229A1 publication Critical patent/WO2024093229A1/zh

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0012—Control circuits using digital or numerical techniques
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present application relates to the field of circuit control, and in particular to an electronic device and a control method, device and storage medium thereof.
  • PFC Power Factor Correction circuits
  • UPS uninterruptible power supplies
  • the single-phase three-way interleaved PFC circuit can perform power factor correction based on the interleaved conduction of the three-way PFC within one power cycle, and raise the bus voltage to the required target voltage, thereby meeting the needs of high-power application scenarios.
  • an analog or digital IC (Integrated Circuit) drive control scheme is adopted.
  • the control scheme often controls the three-way PFC to work in an interleaved manner regardless of the power of the load.
  • the duty cycle of the PFC conduction decreases when the load is light, and the duty cycle of the PFC conduction increases when the load is heavy.
  • the total switching frequency of the three-way PFC remains unchanged. Under non-heavy load conditions, the switching loss is large and the overall efficiency is low.
  • an embodiment of the present application provides an electronic device and a control method, device and storage medium thereof, aiming to effectively reduce the power loss of a single-phase three-way interleaved PFC circuit.
  • an embodiment of the present application provides a control method of an electronic device, wherein the electronic device includes: a load powered by a single-phase three-way interleaved PFC circuit, and the control method includes:
  • the operation modes of the single-phase three-way interleaved PFC circuit include: a first mode of driving three PFCs to be interleaved, a second mode of driving two PFCs to be interleaved, and a third mode of driving one PFC to be turned on.
  • the load state includes: a first state indicating a heavy load, a second state indicating a medium load, and a third state indicating a light load, and based on the load state, controlling the single-phase three-way interleaved PFC circuit to operate in a target operation mode includes:
  • load state is the second state, controlling the single-phase three-way interleaved PFC circuit to operate in the second mode
  • the single-phase three-way interleaved PFC circuit is controlled to operate in the third mode.
  • controlling the single-phase three-way interleaved PFC circuit to operate in the second mode includes:
  • the single-phase three-way interleaved PFC circuit is controlled to cycle the driving of the two-way PFC to be interleaved and turned on according to the switching sequence of the specified two-way PFC combination.
  • controlling the single-phase three-way interleaved PFC circuit to operate in the third mode includes:
  • the single-phase three-way interleaved PFC circuit is controlled to cyclically drive one PFC to turn on according to the switching sequence of the specified one PFC.
  • obtaining the current load state of the electronic device includes:
  • a load state of the electronic device currently running is determined.
  • the method further comprises:
  • three-way PFC of the single-phase three-way interleaved PFC circuit is turned off.
  • the method before obtaining the load status of the electronic device currently running, the method further includes:
  • an embodiment of the present application further provides a control device for an electronic device, the electronic device comprising: a load powered by a single-phase three-way interleaved PFC circuit, the control device comprising:
  • An acquisition module configured to acquire a current load state of the electronic device
  • control module configured to control the single-phase three-way interleaved PFC circuit to operate in a target operation mode based on the load state
  • the operation modes of the single-phase three-way interleaved PFC circuit include: a first mode of driving three PFCs to be interleaved, a second mode of driving two PFCs to be interleaved, and a third mode of driving one PFC to be turned on.
  • an embodiment of the present application provides an electronic device, comprising: a load powered by a single-phase three-way interleaved PFC circuit, the electronic device also comprising: a processor and a memory for storing a computer program that can be run on the processor, wherein the processor is configured to execute the steps of the method described in the embodiment of the present application when running the computer program.
  • the electronic device is an air conditioner.
  • an embodiment of the present application provides a storage medium, on which a computer program is stored.
  • the computer program is executed by a processor, the steps of the method described in the embodiment of the present application are implemented.
  • the electronic device includes: a load powered by a single-phase three-way interleaved PFC circuit, obtaining the load state of the electronic device currently running; based on the load state, controlling the single-phase three-way interleaved PFC circuit to run in a target operation mode; wherein the operation mode of the single-phase three-way interleaved PFC circuit includes: a first mode of driving three-way PFC to be interleaved, a second mode of driving two-way PFC to be interleaved, and a third mode of driving one PFC to be turned on.
  • the single-phase three-way interleaved PFC circuit can be automatically switched between the above three operation modes based on the load state of the electronic device currently running, which can effectively reduce the power loss of the single-phase three-way interleaved PFC circuit, thereby improving the energy saving effect of the electronic device.
  • FIG1 is a schematic structural diagram of a single-phase three-way interleaved PFC circuit according to an embodiment of the present application
  • FIG2 is a schematic structural diagram of another single-phase three-way interleaved PFC circuit according to an embodiment of the present application.
  • FIG3 is a schematic diagram of the duty cycle of the power devices in the single-phase three-way interleaved PFC circuit according to an embodiment of the present application
  • FIG4 is a schematic flow chart of a control method of an electronic device according to an embodiment of the present application.
  • FIG5 is a flow chart of a control method of an electronic device in an application example of the present application.
  • FIG6 is a schematic diagram of the structure of a control device of an electronic device according to an embodiment of the present application.
  • FIG. 7 is a schematic diagram of the structure of an electronic device according to an embodiment of the present application.
  • the present application embodiment provides a control method of an electronic device, the electronic device comprising: a load powered by a single-phase three-way interleaved PFC circuit.
  • a control method of an electronic device comprising: a load powered by a single-phase three-way interleaved PFC circuit.
  • a single-phase three-way interleaved PFC circuit includes: four rectifier diodes D1 to D4, three high-frequency PFC inductors L1 to L3, three fast recovery diodes FRD1 to FRD3, three power devices Q1 to Q3, a bus electrolytic capacitor E1 and four sampling resistors Rs, R1 to R3.
  • the PFC inductor and the corresponding power device constitute a PFC
  • the AC power supply is rectified by diodes D1 to D4 and supplied to the three-way PFC.
  • the PFC drive conversion circuit controls the conduction of the power devices Q1 to Q3 to achieve alternating conduction control of the three-way PFC, thereby achieving boost control at the output end.
  • the PFC drive conversion circuit is connected to a digitally driven microprocessor (MCU), and the IO (input and output) port of the MCU is connected to the current detection circuit, the AC voltage detection circuit and the bus voltage detection circuit.
  • the current detection circuit can sample the bus current from the sampling resistor Rs and feed it back to the MCU.
  • the MCU can output a PWM (pulse width modulation) signal to the PFC drive conversion circuit, and the PFC drive conversion circuit controls the conduction of power devices Q1 to Q3.
  • a single-phase three-way interleaved PFC circuit includes: four rectifier diodes D1 to D4, three high-frequency PFC inductors L1 to L3, three fast recovery diodes FRD1 to FRD3, three power devices Q1 to Q3, a bus electrolytic capacitor E1 and three sampling resistors R1 to R3.
  • the current detection loop shown in Figure 2 can perform three-way current detection sampling from the sampling resistors R1, R2, and R3 respectively, and then calculate the bus current and feed it back to the MCU.
  • the aforementioned power devices Q1 to Q3 can be power switching tubes, for example, they can be IGBTs (Insulated Gate Bipolar Transistor) or MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistor), and the embodiments of the present application do not limit this.
  • IGBTs Insulated Gate Bipolar Transistor
  • MOSFETs Metal-Oxide-Semiconductor Field-Effect Transistor
  • the single-phase three-way interleaved PFC circuit includes three-way PFC.
  • This PFC includes: PFC inductor L1, power device Q1 and fast recovery diode FRD1.
  • the power device Q1 is closed.
  • the rectified DC current passes through the PFC inductor L1.
  • the fast recovery diode FRD1 is used to prevent the bus electrolytic capacitor E1 from discharging to the ground. Since the input is direct current, the current on the PFC inductor L1 increases linearly at a certain ratio, and this ratio is related to the size of the inductor.
  • the PFC inductor L1 As the inductor current increases, some energy is stored in the PFC inductor L1. During the discharge process, the power device Q1 is disconnected. At this time, due to the current holding characteristics of the PFC inductor L1, the current flowing through the PFC inductor L1 will not immediately become 0, but slowly change from the value at the time of charging to 0. The original circuit has been disconnected, so the PFC inductor L1 can only discharge through the new circuit, that is, the PFC inductor L1 starts to charge the bus electrolytic capacitor E1, and the voltage across the bus electrolytic capacitor E1 (that is, the output voltage VDC) increases, achieving boost control.
  • the above process can be referred to for the PFC of other paths. It can be understood that the PFC control based on the staggered conduction of the three-path PFC can raise the bus voltage. to the desired target supply voltage.
  • the ratio of the on-time t on of the power device Q1 in a cycle T to the cycle T is the duty cycle.
  • the three PFCs are controlled to work in an alternating manner.
  • the duty cycle of each PFC is reduced, and when the load is heavy, the duty cycle of each PFC is increased.
  • the sum of the switching frequencies of the three PFCs remains unchanged, resulting in large switching losses and low overall efficiency under non-heavy load conditions.
  • the single-phase three-way interleaved PFC circuit can be adjusted according to the load state of the current operation of the electronic device, so that the single-phase three-way interleaved PFC circuit can automatically switch between three-way PFC alternating conduction, two-way PFC alternating conduction and one-way PFC conduction, thereby effectively reducing the power loss of the single-phase three-way interleaved PFC circuit.
  • control method of the embodiment of the present application includes:
  • Step 401 obtaining the current load status of the electronic device.
  • control method may be executed by a control device of the electronic device, for example, the aforementioned digital drive MCU.
  • obtaining the current load state of the electronic device includes:
  • the load state of the electronic device currently running is determined.
  • the current value can be determined based on the sampled value of the bus current sampled from the sampling resistor Rs, or based on the sampled values of the three-way current detection sampled from the sampling resistors R1, R2, and R3.
  • the load power value can be determined based on the current value and the bus voltage value detected by the bus voltage detection loop.
  • the classification threshold may include a current threshold corresponding to the current value, and may also include a power threshold corresponding to the load power value.
  • the load status includes: a first status indicating a heavy load, a second status indicating a medium load, and a third status indicating a light load.
  • the current thresholds include: a first current threshold I1, a second current threshold I2, a third current threshold I3, and a fourth current threshold I4, if I1 ⁇ current current value ⁇ I2, the load state is determined to be the third state indicating a light load; if I2 ⁇ current current value ⁇ I3, the load state is determined to be the second state indicating a medium load; if I3 ⁇ current current value ⁇ I4, the load state is determined to be the first state indicating a heavy load.
  • I1 ⁇ I2 ⁇ I3 ⁇ I4, I4 can be understood as the current threshold for determining whether the single-phase three-way interleaved PFC circuit is overloaded.
  • I1 to I4 can be reasonably determined based on the capacitance performance of the circuit, for example, based on test data, which will not be elaborated here.
  • Step 402 based on the load state, control the single-phase three-way interleaved PFC circuit to operate in a target operation mode; wherein the operation modes of the single-phase three-way interleaved PFC circuit include: a first mode of driving three PFCs to be interleaved, a second mode of driving two PFCs to be interleaved, and a third mode of driving one PFC to be turned on.
  • the target operation mode is one of the first mode, the second mode and the third mode.
  • the single-phase three-way interleaved PFC circuit can be automatically switched among the three operation modes based on the load state of the electronic device currently running, which can effectively reduce the power loss of the single-phase three-way interleaved PFC circuit, thereby improving the energy saving effect of the electronic device.
  • the switching frequency of the power device when the single-phase three-way interleaved PFC circuit operates in the second mode, the switching frequency of the power device can be 2/3 of that when the three-way PFC is interleaved and turned on.
  • the switching frequency of the power device when the single-phase three-way interleaved PFC circuit operates in the third mode, the switching frequency of the power device can be 1/3 of that when the three-way PFC is interleaved and turned on, thereby effectively reducing the switching loss of the power device.
  • controlling the single-phase three-way interleaved PFC circuit to operate in a target operation mode includes:
  • the single-phase three-way interleaved PFC circuit is controlled to operate in the first mode
  • the single-phase three-way interleaved PFC circuit is controlled to operate in the second mode
  • the single-phase three-way interleaved PFC circuit is controlled to operate in the third mode.
  • the single-phase three-way interleaved PFC circuit switches to the second mode, so that the switching frequency of the power device can be 2/3 of that when the three-way PFC is interleaved and turned on;
  • the load state of the electronic device is currently in the third state, that is, light load, the single-phase three-way interleaved PFC circuit switches to the third mode, so that the switching frequency of the power device can be 1/3 of that when the three-way PFC is interleaved and turned on.
  • controlling the single-phase three-way interleaved PFC circuit to operate in the second mode includes:
  • the single-phase three-way interleaved PFC circuit is controlled to cyclically drive the two-way PFC to be interleaved and turned on according to the switching sequence of the specified two-way PFC combination.
  • the switching order of the specified two-way PFC combination can be A and B ⁇ B and C ⁇ C and A.
  • the switching sequence drives the two PFCs to be interlaced in a cycle, that is, when the working time of driving A and B to be interlaced reaches the first switching cycle, then B and C are driven to be interlaced, and when the working time reaches the first switching cycle, C and A are driven to be interlaced, and the cycle is repeated. Therefore, when the load is medium, any two of the three PFCs can be interlaced in turn for a certain working time. Compared with fixed control of the two PFCs to be alternately turned on, the total working time of the PFC loop power devices can be reduced, the reliability is improved and the service life is extended.
  • controlling the single-phase three-way interleaved PFC circuit to operate in the third mode includes:
  • the single-phase three-way interleaved PFC circuit is controlled to cyclically drive one PFC to turn on according to the switching sequence of the specified one PFC.
  • the switching order of a specified PFC may be A ⁇ B ⁇ C.
  • one PFC may be driven to work cyclically based on the above switching order, that is, when the working time of driving A reaches the second switching cycle, then driving B, and when the working time reaches the second switching cycle, then driving C, and so on.
  • This cycle allows each of the three PFCs to be turned on for a certain working time in turn when the load is light. Compared with fixedly controlling one PFC to be turned on, the total working time of the PFC loop power device can be reduced, thereby improving reliability and extending service life.
  • the method further includes: if it is determined based on the current value or the load power value that the single-phase three-way interleaved PFC circuit is overloaded, shutting down three-way PFC of the single-phase three-way interleaved PFC circuit.
  • three-way PFC of the single-phase three-way interleaved PFC circuit may be turned off to perform overload protection on the circuit.
  • the method further includes:
  • the input voltage peak value of the single-phase three-way interleaved PFC circuit can be obtained, and the input voltage peak value can be compared with the bus voltage required by the load. If the input voltage peak value is greater than the bus voltage required by the load, there is no need to start the single-phase three-way interleaved PFC circuit, that is, none of the three-way PFC is turned on. If the input voltage peak value is less than or equal to the bus voltage required by the load, the load state of the electronic device currently running is obtained, and based on the load state, the single-phase three-way interleaved PFC circuit is controlled to run in the target operation mode.
  • control method of the electronic device in the embodiment of the present application is illustrated below with reference to an application example.
  • control method of the electronic device includes:
  • Step 501 determine whether the required bus voltage is ⁇ the input voltage peak value, if so, execute step 502, if not, execute step 503.
  • the electronic device when the electronic device starts running, it first detects and determines whether the required bus voltage is ⁇ the input voltage peak. For example, the input voltage peak of the single-phase three-way interleaved PFC circuit is obtained based on the AC voltage detection circuit.
  • the required bus voltage can be set based on the load characteristics. If the required bus voltage is ⁇ the input voltage peak, step 502 is executed, otherwise step 503 is executed.
  • Step 502 determine whether the average value of the bus current Is is ⁇ I1 , if not, execute step 503 ; if yes, execute step 504 .
  • the average value of the bus current Is can be obtained based on the average value of the bus current values collected within a set time period, and is used to determine the load state of the current operation of the electronic device.
  • Step 503 All three PFCs are turned off.
  • Step 504 determine whether the average value of the bus current Is is ⁇ I2, if so, execute step 505, if not, execute step 508.
  • Step 505 determine whether the average value of the bus current Is is ⁇ I3, if so, execute step 506 , if not, execute step 509 .
  • Step 506 determine whether the average value of the bus current Is is ⁇ I4, if so, execute step 507, if not, execute step 510.
  • Step 507 All three PFCs stop working.
  • the single-phase three-way interleaved PFC circuit is overloaded, and the three-way PFC is controlled to stop working, that is, the A, B and C paths of the three-way PFC are all stopped working.
  • Step 508 any one of the three PFCs is turned on.
  • the single-phase three-way interleaved PFC circuit is switched to the third operation mode, that is, any one of the three-way PFC is turned on.
  • Step 509 any two of the three PFCs are turned on and switched on in an interleaved manner.
  • the electronic device is medium-loaded, and the single-phase three-way interleaved PFC circuit is switched to the second operation mode, that is, any two of the three-way PFC are turned on and interleaved.
  • step 510 the three PFCs are all turned on and switched on in an interleaved manner.
  • the single-phase three-way interleaved PFC circuit is switched to the first operation mode, that is, the three-way PFC is turned on and interleaved.
  • step 508 that is, when I1 ⁇ average value of bus current Is ⁇ I2, any one of the three PFCs is turned on and the following steps are performed:
  • Step 508A determine whether the cumulative running time is an integer multiple of S1 seconds, if not, execute step 508B, if yes, execute step 508C;
  • Step 508B keep the currently opened path working
  • Step 508C then switch to the next operation in sequence, for example, in a cycle of A ⁇ B ⁇ C, and each operation lasts for the same time S1 seconds.
  • step 509 that is, when I2 ⁇ average value of bus current Is ⁇ I3, any two of the three PFCs are turned on and the following steps are performed:
  • Step 509A determine whether the cumulative running time is an integer multiple of S2 seconds, if not, execute step 509B, if yes, execute step 509C;
  • Step 509B keep the two currently enabled paths working
  • Step 509C switch to the next two interleaved operations in sequence, and cycle according to A&B ⁇ B&C ⁇ C&A, and each two-way operation lasts the same time S2 seconds.
  • the value relationship of the aforementioned I1, I2, I3, and I4 is: I4 ⁇ I3 ⁇ I2 ⁇ I1.
  • the embodiment of the present application also provides a control device of an electronic device, which corresponds to the control method of the above-mentioned electronic device, and each step in the embodiment of the control method of the above-mentioned electronic device is also fully applicable to the embodiment of the control device of the present electronic device.
  • the control device of the electronic device includes: an acquisition module 601 and a control module 602.
  • the acquisition module 601 is configured to acquire the load state of the current operation of the electronic device;
  • the control module 602 is configured to control the single-phase three-way interleaved PFC circuit to operate in a target operation mode based on the load state; wherein the operation modes of the single-phase three-way interleaved PFC circuit include: a first mode of driving three-way PFC to be interleaved, a second mode of driving two-way PFC to be interleaved, and a third mode of driving one-way PFC to be turned on.
  • the load state includes: a first state indicating a heavy load, a second state indicating a medium load, and a third state indicating a light load.
  • the control module 602 is specifically configured as follows:
  • load state is the second state, controlling the single-phase three-way interleaved PFC circuit to operate in the second mode
  • the single-phase three-way interleaved PFC circuit is controlled to operate in the third mode.
  • control module 602 controls the single-phase three-way interleaved PFC circuit to operate in the second mode, including:
  • the single-phase three-way interleaved PFC circuit is controlled to cycle the driving of the two-way PFC to be interleaved and turned on according to the switching sequence of the specified two-way PFC combination.
  • control module 602 controls the single-phase three-way interleaved PFC circuit to operate in the third mode, including:
  • the single-phase three-way interleaved PFC circuit is controlled to cyclically drive one PFC to turn on according to the switching sequence of the specified one PFC.
  • the acquisition module 601 is specifically configured as follows:
  • the electronic Based on the current value or the load power value and the set classification threshold, the electronic The current load status of the device.
  • control module 602 is further configured to:
  • three-way PFC of the single-phase three-way interleaved PFC circuit is turned off.
  • the acquisition module 601 before acquiring the load status of the electronic device currently running, is further configured to:
  • the acquisition module 601 and the control module 602 can be implemented by a processor of the electronic device.
  • the processor needs to run the computer program in the memory to implement its functions.
  • control device of the electronic device provided in the above embodiment only uses the division of the above program modules as an example when controlling the electronic device.
  • the above processing can be assigned to different program modules as needed, that is, the internal structure of the device is divided into different program modules to complete all or part of the processing described above.
  • control device of the electronic device provided in the above embodiment and the control method embodiment of the electronic device belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.
  • Figure 7 only shows an exemplary structure of the electronic device rather than the entire structure. Part or all of the structure shown in Figure 7 can be implemented as needed.
  • the electronic device 700 provided in the embodiment of the present application includes: at least one processor 701, a memory 702 and a user interface 703.
  • the various components in the electronic device 700 are coupled together via a bus system 704.
  • the bus system 704 is used to realize the connection and communication between these components.
  • the bus system 704 also includes a power bus, a control bus and a status signal bus.
  • various buses are marked as bus system 704 in FIG. 7 .
  • the user interface 703 may include a display, a keyboard, a mouse, a trackball, a click wheel, keys, buttons, a touch pad or a touch screen.
  • the memory 702 in the embodiment of the present application is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program used to operate on the electronic device.
  • the control method of the electronic device disclosed in the embodiment of the present application can be applied to the processor 701, or implemented by the processor 701.
  • the processor 701 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the control method of the electronic device can be completed by an integrated logic circuit of hardware in the processor 701 or instructions in the form of software.
  • the above-mentioned processor 701 can be a general-purpose processor, a digital signal processor (DSP, Digital Signal Processor), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
  • the processor 701 can implement or execute the various methods, steps and logic disclosed in the embodiments of the present application.
  • the general processor may be a microprocessor or any conventional processor.
  • the steps of the method disclosed in the embodiment of the present application may be directly embodied as being executed by a hardware decoding processor, or may be executed by a combination of hardware and software modules in the decoding processor.
  • the software module may be located in a storage medium, which is located in the memory 702.
  • the processor 701 reads the information in the memory 702 and completes the steps of the control method of the electronic device provided in the embodiment of the present application in combination with its hardware.
  • the electronic device can be implemented by one or more application specific integrated circuits (ASIC), DSP, programmable logic device (PLD), complex programmable logic device (CPLD), field programmable gate array (FPGA), general processor, controller, microcontroller (MCU), microprocessor, or other electronic components to execute the aforementioned method.
  • ASIC application specific integrated circuits
  • DSP digital signal processor
  • PLD programmable logic device
  • CPLD complex programmable logic device
  • FPGA field programmable gate array
  • general processor controller, microcontroller (MCU), microprocessor, or other electronic components to execute the aforementioned method.
  • MCU microcontroller
  • the memory 702 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories.
  • the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disk, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a disk memory or a tape memory.
  • the volatile memory can be a random access memory (RAM), which is used as an external cache.
  • RAM random access memory
  • SRAM static random access memory
  • SSRAM synchronous static random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous dynamic random access memory
  • DDRSDRAM double data rate synchronous dynamic random access memory
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous link dynamic random access memory
  • DRRAM direct memory bus random access memory
  • the electronic device of the embodiment of the present application may be an air conditioner. It should be noted that the electronic device of the embodiment of the present application may also be other devices that apply a single-phase three-way interleaved PFC circuit topology, for example, including but not limited to: photovoltaic power generation equipment, uninterruptible power supply (UPS), vehicle inverter and other electronic products.
  • UPS uninterruptible power supply
  • the present application also provides a storage medium, namely a computer storage medium, which may be a computer-readable storage medium, for example, a memory 702 storing a computer program, and the computer program may be executed by a processor 701 of an electronic device to complete the steps described in the method of the present application.
  • the computer-readable storage medium may be a memory such as a ROM, a PROM, an EPROM, an EEPROM, a Flash Memory, a magnetic surface memory, an optical disk, or a CD-ROM.

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Abstract

本申请公开了一种电子设备及其控制方法、装置和存储介质。该电子设备包括：由单相三路交错式PFC电路供电的负载，该方法包括：获取电子设备当前运行的负载状态；基于负载状态，控制单相三路交错式PFC电路运行在目标运行模式；其中，单相三路交错式PFC电路的运行模式包括：驱动三路PFC交错导通的第一模式、驱动两路PFC交错导通的第二模式及驱动一路PFC导通的第三模式。

Description

电子设备及其控制方法、装置和存储介质
相关申请的交叉引用
本申请基于申请号为202211349914.X、申请日为2022年10月31日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本申请涉及电路控制领域，尤其涉及一种电子设备及其控制方法、装置和存储介质。
背景技术
PFC(Power Factor Correction，功率因数校正)电路广泛应用在通信电源和不间断电源(UPS，Uninterrupted Power Supply)中，它除了需要把交流电压转换为直流电压外，同时还要校正输入的功率因数，满足各种标准对输入特性的要求。
单相三路交错式PFC电路可以在一个电源周期内，基于三路PFC交错式导通进行功率因数校正，并抬升母线电压至需求目标电压，进而能够满足大功率应用场景的需求。
实际应用中，单相三路交错式PFC电路应用于空调器时，采用模拟或数字IC(Integrated Circuit，集成电路)驱动控制方案，而控制方案往往不论负载的功率大小，均控制三路PFC交错导通工作，在轻载时PFC导通的占空比减小，在重载时PFC导通的占空比增加，但是，在一个电源周期内，三路FPC的开关频率总和不变，在非重载情况下，开关损耗较大，整机效率较低。
发明内容
有鉴于此，本申请实施例提供了一种电子设备及其控制方法、装置和存储介质，旨在有效降低单相三路交错式PFC电路的功率损耗。
本申请实施例的技术方案是这样实现的：
第一方面，本申请实施例提供了一种电子设备的控制方法，所述电子设备包括：由单相三路交错式PFC电路供电的负载，所述控制方法包括：
获取所述电子设备当前运行的负载状态；
基于所述负载状态，控制所述单相三路交错式PFC电路运行在目标运行模式；
其中，所述单相三路交错式PFC电路的运行模式包括：驱动三路PFC交错导通的第一模式、驱动两路PFC交错导通的第二模式及驱动一路PFC导通的第三模式。
在一些实施方案中，所述负载状态包括：表示重载的第一状态、表示中载的第二状态和表示轻载的第三状态，所述基于所述负载状态，控制所述单相三路交错式PFC电路运行在目标运行模式，包括：
若所述负载状态为所述第一状态，则控制所述单相三路交错式PFC电路运行在所述第一模式；
若所述负载状态为所述第二状态，则控制所述单相三路交错式PFC电路运行在所述第二模式；
若所述负载状态为所述第三状态，则控制所述单相三路交错式PFC电路运行在所述第三模式。
在一些实施方案中，所述控制所述单相三路交错式PFC电路运行在所述第二模式，包括：
基于设定的第一切换周期，控制所述单相三路交错式PFC电路按照指定的两路PFC组合的切换顺序，循环所述驱动两路PFC交错导通。
在一些实施方案中，所述控制所述单相三路交错式PFC电路运行在所述第三模式，包括：
基于设定的第二切换周期，控制所述单相三路交错式PFC电路按照指定的一路PFC的切换顺序，循环所述驱动一路PFC导通。
在一些实施方案中，所述获取所述电子设备当前运行的负载状态，包括：
获取所述单相三路交错式PFC电路的电流值或者所述电子设备的负载功率值；
基于所述电流值或者所述负载功率值和设定分类阈值，判定所述电子设备当前运行的负载状态。
在一些实施方案中，所述方法还包括：
若基于所述电流值或者所述负载功率值判定所述单相三路交错式PFC电路超载，则关闭所述单相三路交错式PFC电路的三路PFC。
在一些实施方案中，所述获取所述电子设备当前运行的负载状态之前，所述方法还包括：
获取所述单相三路交错式PFC电路的输入电压峰值；
基于所述输入电压峰值，确定是否获取所述电子设备当前运行的负载状态。
第二方面，本申请实施例还提供了一种电子设备的控制装置，所述电子设备包括：由单相三路交错式PFC电路供电的负载，所述控制装置包括：
获取模块，配置为获取所述电子设备当前运行的负载状态；
控制模块，配置为基于所述负载状态，控制所述单相三路交错式PFC电路运行在目标运行模式；
其中，所述单相三路交错式PFC电路的运行模式包括：驱动三路PFC交错导通的第一模式、驱动两路PFC交错导通的第二模式及驱动一路PFC导通的第三模式。
第三方面，本申请实施例提供了一种电子设备，所述电子设备包括：由单相三路交错式PFC电路供电的负载，所述电子设备还包括：处理器和用于存储能够在处理器上运行的计算机程序的存储器，其中，所述处理器配置为运行计算机程序时，执行本申请实施例所述方法的步骤。
在一些实施方案中，所述电子设备为空调器。
第四方面，本申请实施例提供了一种存储介质，所述存储介质上存储有计算机程序，所述计算机程序被处理器执行时，实现本申请实施例所述方法的步骤。
本申请实施例提供的技术方案，所述电子设备包括：由单相三路交错式PFC电路供电的负载，获取电子设备当前运行的负载状态；基于负载状态，控制单相三路交错式PFC电路运行在目标运行模式；其中，单相三路交错式PFC电路的运行模式包括：驱动三路PFC交错导通的第一模式、驱动两路PFC交错导通的第二模式及驱动一路PFC导通的第三模式。如此，可以基于电子设备当前运行的负载状态，实现单相三路交错式PFC电路在上述三种运行模式中的自动切换，可以有效降低单相三路交错式PFC电路的功率损耗，进而改善电子设备的节能效果。
附图说明
图1为本申请实施例单相三路交错式PFC电路的结构示意图；
图2为本申请实施例另一单相三路交错式PFC电路的结构示意图；
图3为本申请实施例单相三路交错式PFC电路中功率器件工作的占空比示意图；
图4为本申请实施例电子设备的控制方法的流程示意图；
图5为本申请一应用示例中电子设备的控制方法的流程示意图；
图6为本申请实施例电子设备的控制装置的结构示意图；
图7为本申请实施例电子设备的结构示意图。
具体实施方式
下面结合附图及实施例对本申请再作进一步详细的描述。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所 使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请。
本申请实施例提供了一种电子设备的控制方法，该电子设备包括：由单相三路交错式PFC电路供电的负载。在对该控制方法进行说明之前，先对申请实施例涉及的单相三路交错式PFC电路进行示例性说明。
参照图1，在一个示例中，单相三路交错式PFC电路包括：四个整流的二极管D1至D4、三个高频PFC电感L1至L3、三个快速恢复二极管FRD1至FRD3、三个功率器件Q1至Q3、一个母线电解电容E1和四个采样电阻Rs、R1至R3。其中，PFC电感与对应的功率器件构成一路PFC，交流电源经二极管D1至D4整流后供电给三路PFC，由PFC驱动转换回路对功率器件Q1至Q3进行导通控制，实现三路PFC的交替导通控制，进而实现输出端的升压控制。PFC驱动转换回路连接有数字驱动的微处理器(MCU)，MCU的IO(输入输出)端口连接电流检测回路、交流电压检测回路及母线电压检测回路。该电流检测回路可以从采样电阻Rs处进行母线电流采样并反馈给MCU。MCU可以输出PWM(脉宽调制)信号给PFC驱动转换回路，由PFC驱动转换回路对功率器件Q1至Q3进行导通控制。
参照图2，在另一示例中，单相三路交错式PFC电路包括：四个整流的二极管D1至D4、三个高频PFC电感L1至L3、三个快速恢复二极管FRD1至FRD3、三个功率器件Q1至Q3、一个母线电解电容E1和三个采样电阻R1至R3。相较于图1而言，图2所示的电流检测回路可以从采样电阻R1、R2、R3处分别进行三路电流检测采样，再计算得到母线电流，并反馈给MCU。
需要说明的是，前述的功率器件Q1至Q3可以是功率开关管，例如，可以是IGBT(Insulated Gate Bipolar Transistor，绝缘栅双极型晶体管)，也可以是MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor，功率场效应晶体管)，本申请实施例对此不做限定。
可以理解的是，单相三路交错式PFC电路包括三路PFC，下面以上述PFC电感L1所在支路为例，对一路PFC的工作过程进行示例性说明。该路PFC包括：PFC电感L1、功率器件Q1及快速恢复二极管FRD1。在充电过程中，功率器件Q1闭合，这时，整流后的直流电流过PFC电感L1，该快速恢复二极管FRD1用于防止母线电解电容E1对地放电。由于输入是直流电，所以PFC电感L1上的电流以一定的比率线性增加，这个比率跟电感大小有关。随着电感电流增加，PFC电感L1里储存了一些能量。在放电过程中，功率器件Q1断开，这时，由于PFC电感L1的电流保持特性，流经PFC电感L1的电流不会马上变为0，而是缓慢的由充电完毕时的值变为0。而原来的电路已断开，于是PFC电感L1只能通过新电路放电，即PFC电感L1开始给母线电解电容E1充电，母线电解电容E1两端的电压(即输出电压VDC)升高，实现升压控制。其他路的PFC可以参照上述过程。可以理解的是，基于三路PFC的交错式导通进行PFC控制，可以抬升母线电 压至所需的目标供电电压。
需要说明的是，功率器件Q1开通及关断一次为一个周期T，对应的开关频率为如图3所示，ton为功率器件Q1在一个周期T内的开通时长，toff为功率器件Q1在一个周期T内的关断时长，周期T＝ton+toff，功率器件Q1在一个周期T内的开通时长ton所占周期T的比例为占空比
相关技术中，不论负载的功率大小，均控制三路PFC交错导通工作，在轻载时各路PFC导通的占空比减小，在重载时各路PFC导通的占空比增加，但是，在一个电源周期内，三路FPC的开关频率总和不变，导致非重载情况下，开关损耗较大，整机效率较低。
基于此，本申请各种实施例中，可以根据电子设备当前运行的负载状态，对单相三路交错式PFC电路进行调节，使得单相三路交错式PFC电路可以在三路PFC交替导通、两路PFC交替导通及一路PFC导通之间进行自动切换，进而有效降低单相三路交错式PFC电路的功率损耗。
如图4所示，本申请实施例的控制方法包括：
步骤401，获取电子设备当前运行的负载状态。
这里，控制方法可以由电子设备的控制装置运行，例如，可以为前述的数字驱动的MCU。
示例性地，获取电子设备当前运行的负载状态，包括：
获取单相三路交错式PFC电路的电流值或者电子设备的负载功率值；
基于电流值或者负载功率值和设定分类阈值，判定电子设备当前运行的负载状态。
示例性地，电流值可以基于前述的从采样电阻Rs处进行母线电流采样的采样值确定，或者基于前述的从采样电阻R1、R2、R3处分别进行三路电流检测采样的采样值确定。负载功率值可以基于电流值和母线电压检测回路检测的母线电压值确定。
这里，设定分类阈值包括与电流值对应的电流阈值，还可以包括与负载功率值对应的功率阈值。
示例性地，负载状态包括：表示重载的第一状态、表示中载的第二状态和表示轻载的第三状态。
下面以电流阈值为例，进行示例性说明：
假定电流阈值包括：第一电流阈值I1、第二电流阈值I2、第三电流阈值I3及第四电流阈值I4，若I1≤当前的电流值﹤I2，则判定负载状态为表示轻载的第三状态；若I2≤当前的电流值﹤I3，则判定负载状态为表示中载的第二状态；若I3≤当前的电流值﹤I4，则判定负载状态为表示重载的第一状 态。其中，I1﹤I2﹤I3﹤I4，I4可以理解为判定单相三路交错式PFC电路是否超载的电流阈值。
需要说明的是，对于本领域技术人员而言，上述I1～I4的取值可以基于电路的容载性能进行合理确定，例如，基于试验数据进行确定，在此不做赘述。
步骤402，基于负载状态，控制单相三路交错式PFC电路运行在目标运行模式；其中，单相三路交错式PFC电路的运行模式包括：驱动三路PFC交错导通的第一模式、驱动两路PFC交错导通的第二模式及驱动一路PFC导通的第三模式。
可以理解的是，目标运行模式为前述的第一模式、第二模式及第三模式中一种。如此，可以基于电子设备当前运行的负载状态，实现单相三路交错式PFC电路在上述三种运行模式中的自动切换，可以有效降低单相三路交错式PFC电路的功率损耗，进而改善电子设备的节能效果。
举例来说，当单相三路交错式PFC电路运行在第二模式时，功率器件的开关频率可以为三路PFC交错导通时的2/3，当单相三路交错式PFC电路运行在第三模式时，功率器件的开关频率可以为三路PFC交错导通时的1/3，进而可以有效减小功率器件的开关损耗。
示例性地，基于负载状态，控制单相三路交错式PFC电路运行在目标运行模式，包括：
若负载状态为第一状态，则控制单相三路交错式PFC电路运行在第一模式；
若负载状态为第二状态，则控制单相三路交错式PFC电路运行在第二模式；
若负载状态为第三状态，则控制单相三路交错式PFC电路运行在第三模式。
可以理解的是，当电子设备当前运行的负载状态为第二状态时，即中载时，单相三路交错式PFC电路切换至第二模式，如此，功率器件的开关频率可以为三路PFC交错导通时的2/3；当电子设备当前运行的负载状态为第三状态时，即轻载时，单相三路交错式PFC电路切换至第三模式，如此，功率器件的开关频率可以为三路PFC交错导通时的1/3。
实际应用中，若单相三路交错式PFC电路的各路PFC持续处于工作状态，则会导致功率器件一直处于发热状态，导致可靠性降低，且使用寿命缩短。基于此，在一些实施例中，控制单相三路交错式PFC电路运行在第二模式，包括：
基于设定的第一切换周期，控制单相三路交错式PFC电路按照指定的两路PFC组合的切换顺序，循环驱动两路PFC交错导通。
举例来说，假定三路PFC划分为A、B、C路，指定的两路PFC组合的切换顺序可以为A和B路→B和C路→C和A路，如此，可以基于上述 切换顺序循环驱动两路PFC交错导通，即在驱动A和B路交错导通的工作时长达到第一切换周期，则驱动B和C路交错导通的工作，且在工作时长达到第一切换周期，再驱动C和A路交错导通，如此循环，从而可以使得中载时，让三路PFC中的任意两路轮流交错导通一定的工作时长，相较于固定控制两路PFC交替导通，可以减少PFC回路功率器件的总工作时长，提高可靠性并延长使用寿命。
示例性地，控制单相三路交错式PFC电路运行在第三模式，包括：
基于设定的第二切换周期，控制单相三路交错式PFC电路按照指定的一路PFC的切换顺序，循环驱动一路PFC导通。
举例来说，假定三路PFC划分为A、B、C路，指定的一路PFC的切换顺序可以为A路→B路→C路，如此，可以基于上述切换顺序循环驱动一路PFC工作，即在驱动A路工作的工作时长达到第二切换周期，则驱动B路工作，且在工作时长达到第二切换周期，再驱动C路工作，如此循环，从而可以使得轻载时，让三路PFC中的每一路轮流导通一定的工作时长，相较于固定控制一路PFC导通，可以减少PFC回路功率器件的总工作时长，提高可靠性并延长使用寿命。
示例性地，该方法还包括：若基于电流值或者负载功率值判定单相三路交错式PFC电路超载，则关闭单相三路交错式PFC电路的三路PFC。
举例来说，若当前的电流值≥I4，则可以关闭单相三路交错式PFC电路的三路PFC，以对该电路进行过载保护。
示例性地，获取电子设备当前运行的负载状态之前，该方法还包括：
获取单相三路交错式PFC电路的输入电压峰值；
基于输入电压峰值，确定是否获取所述电子设备当前运行的负载状态。
这里，可以基于图1及图2所示的交流电压检测回路，获取单相三路交错式PFC电路的输入电压峰值，并将该输入电压峰值与负载所需的母线电压进行比较，若输入电压峰值＞负载所需的母线电压，则无需启动单相三路交错式PFC电路，即三路PFC均不开启。若输入电压峰值≤负载所需的母线电压，则获取电子设备当前运行的负载状态，并基于所述负载状态，控制所述单相三路交错式PFC电路运行在目标运行模式。
下面结合一应用示例对本申请实施例电子设备的控制方法进行举例说明。
如图5所示，本应用示例中，电子设备的控制方法包括：
步骤501，判断需求母线电压是否≥输入电压峰值，若是，则执行步骤502，若否，则执行步骤503。
这里，电子设备开始运行时，首先检测并判断需求母线电压是否≥输入电压峰值，例如，基于交流电压检测回路获取单相三路交错式PFC电路的输入电压峰值，该需求母线电压可以基于负载特性进行设定，若该需求母线电压≥输入电压峰值，则执行步骤502，否则执行步骤503。
步骤502，判断母线电流Is平均值是否≥I1，若否，则执行步骤503；若是，则执行步骤504。
这里，母线电流Is平均值可以基于设定时长内采集的母线电流值取均值得到，用于判定电子设备当前运行的负载状态。
步骤503，三路PFC均不开启。
可以理解的是，若需求母线电压﹤输入电压峰值，或者需求母线电压≥输入电压峰值且母线电流Is平均值﹤I1，则单相三路交错式PFC电路的三路PFC均不开启。
步骤504，判断母线电流Is平均值是否≥I2，若是，则执行步骤505，若否，则执行步骤508。
步骤505，判断母线电流Is平均值是否≥I3，若是，则执行步骤506，若否，则执行步骤509。
步骤506，判断母线电流Is平均值是否≥I4，若是，则执行步骤507，若否，则执行步骤510。
步骤507，三路PFC均停止工作。
此时，判定单相三路交错式PFC电路已超载，控制三路PFC均停止工作，即三路PFC中的A、B及C路均停止工作。
步骤508，三路PFC任意一路开启。
此时，判定电子设备为轻载，单相三路交错式PFC电路切换至第三运行模式，即开启三路PFC中的任意一路。
步骤509，三路PFC任意两路开启并进行交错式导通。
此时，判定电子设备为中载，单相三路交错式PFC电路切换至第二运行模式，即开启三路PFC中的任意两路并进行交错式导通。
步骤510，三路PFC均开启并进行交错式导通。
此时，判定电子设备为重载，单相三路交错式PFC电路切换至第一运行模式，即开启三路PFC并进行交错式导通。
需要说明的是，对于上述步骤508，即当I1≤母线电流Is平均值﹤I2时，开启三路PFC中的任意一路运行，并执行以下步骤：
步骤508A，判断是否运行累计时长＝S1秒整数倍值，若否，则执行步骤508B，若是，则执行步骤508C；
步骤508B，保持当前开启的一路继续工作；
步骤508C，则依次切换至下一路工作，例如，按A→B→C周期循环，且每一路工作持续相同的时间S1秒。
需要说明的是，对于上述步骤509，即当I2≤母线电流Is平均值﹤I3时，开启三路PFC中的任意二路运行，并执行以下步骤：
步骤509A，判断是否运行累计时长＝S2秒整数倍值，若否，则执行步骤509B，若是，则执行步骤509C；
步骤509B，保持当前开启的两路继续工作；
步骤509C，依次切换至下两路交错式工作，并按A&B→B&C→C&A周期循环，且每两路工作持续相同的时间S2秒。
其中，前述的I1、I2、I3、I4的值大小关系为：I4≥I3≥I2≥I1。
可以理解是，基于上述对一路PFC及两路PFC的周期循环切换的控制方式，避免了电子设备在轻载下三路交错式PFC固定开通一路PFC带来的该路功率器件的开关时间长缺陷，及避免了电子设备在中载下三路交错式PFC固定开通两路PFC带来的两路功率器件的开关时间长缺陷，进而可以提高整机的工作可靠性，并延长使用寿命。
为了实现本申请实施例的方法，本申请实施例还提供一种电子设备的控制装置，该电子设备的控制装置与上述电子设备的控制方法对应，上述电子设备的控制方法实施例中的各步骤也完全适用于本电子设备的控制装置实施例。
如图6所示，该电子设备的控制装置包括：获取模块601和控制模块602。获取模块601配置为获取所述电子设备当前运行的负载状态；控制模块602配置为基于所述负载状态，控制所述单相三路交错式PFC电路运行在目标运行模式；其中，所述单相三路交错式PFC电路的运行模式包括：驱动三路PFC交错导通的第一模式、驱动两路PFC交错导通的第二模式及驱动一路PFC导通的第三模式。
在一些实施例中，所述负载状态包括：表示重载的第一状态、表示中载的第二状态和表示轻载的第三状态，控制模块602具体配置为：
若所述负载状态为所述第一状态，则控制所述单相三路交错式PFC电路运行在所述第一模式；
若所述负载状态为所述第二状态，则控制所述单相三路交错式PFC电路运行在所述第二模式；
若所述负载状态为所述第三状态，则控制所述单相三路交错式PFC电路运行在所述第三模式。
在一些实施例中，控制模块602控制所述单相三路交错式PFC电路运行在所述第二模式，包括：
基于设定的第一切换周期，控制所述单相三路交错式PFC电路按照指定的两路PFC组合的切换顺序，循环所述驱动两路PFC交错导通。
在一些实施例中，控制模块602控制所述单相三路交错式PFC电路运行在所述第三模式，包括：
基于设定的第二切换周期，控制所述单相三路交错式PFC电路按照指定的一路PFC的切换顺序，循环所述驱动一路PFC导通。
在一些实施例中，获取模块601具体配置为：
获取所述单相三路交错式PFC电路的电流值或者所述电子设备的负载功率值；
基于所述电流值或者所述负载功率值和设定分类阈值，判定所述电子 设备当前运行的负载状态。
在一些实施例中，控制模块602还配置为：
若基于所述电流值或者所述负载功率值判定所述单相三路交错式PFC电路超载，则关闭所述单相三路交错式PFC电路的三路PFC。
在一些实施例中，获取模块601在获取所述电子设备当前运行的负载状态之前，还配置为：
获取所述单相三路交错式PFC电路的输入电压峰值；
基于所述输入电压峰值，确定是否获取所述电子设备当前运行的负载状态。
实际应用时，获取模块601和控制模块602可以由电子设备的处理器来实现。当然，处理器需要运行存储器中的计算机程序来实现它的功能。
需要说明的是：上述实施例提供的电子设备的控制装置在进行电子设备控制时，仅以上述各程序模块的划分进行举例说明，实际应用中，可以根据需要而将上述处理分配由不同的程序模块完成，即将装置的内部结构划分成不同的程序模块，以完成以上描述的全部或者部分处理。另外，上述实施例提供的电子设备的控制装置与电子设备的控制方法实施例属于同一构思，其具体实现过程详见方法实施例，这里不再赘述。
基于上述程序模块的硬件实现，且为了实现本申请实施例的方法，本申请实施例还提供一种电子设备。图7仅仅示出了该电子设备的示例性结构而非全部结构，根据需要可以实施图7示出的部分结构或全部结构。
如图7所示，本申请实施例提供的电子设备700包括：至少一个处理器701、存储器702和用户接口703。电子设备700中的各个组件通过总线系统704耦合在一起。可以理解，总线系统704用于实现这些组件之间的连接通信。总线系统704除包括数据总线之外，还包括电源总线、控制总线和状态信号总线。但是为了清楚说明起见，在图7中将各种总线都标为总线系统704。
其中，用户接口703可以包括显示器、键盘、鼠标、轨迹球、点击轮、按键、按钮、触感板或者触摸屏等。
本申请实施例中的存储器702用于存储各种类型的数据以支持电子设备的操作。这些数据的示例包括：用于在电子设备上操作的任何计算机程序。
本申请实施例揭示的电子设备的控制方法可以应用于处理器701中，或者由处理器701实现。处理器701可能是一种集成电路芯片，具有信号的处理能力。在实现过程中，电子设备的控制方法的各步骤可以通过处理器701中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器701可以是通用处理器、数字信号处理器(DSP，Digital Signal Processor)，或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。处理器701可以实现或者执行本申请实施例中的公开的各方法、步骤及逻 辑框图。通用处理器可以是微处理器或者任何常规的处理器等。结合本申请实施例所公开的方法的步骤，可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于存储介质中，该存储介质位于存储器702，处理器701读取存储器702中的信息，结合其硬件完成本申请实施例提供的电子设备的控制方法的步骤。
在示例性实施例中，电子设备可以被一个或多个应用专用集成电路(ASIC，Application Specific Integrated Circuit)、DSP、可编程逻辑器件(PLD，Programmable Logic Device)、复杂可编程逻辑器件(CPLD，Complex Programmable Logic Device)、现场可编程逻辑门阵列(FPGA，Field Programmable Gate Array)、通用处理器、控制器、微控制器(MCU，Micro Controller Unit)、微处理器(Microprocessor)、或者其他电子元件实现，用于执行前述方法。
可以理解，存储器702可以是易失性存储器或非易失性存储器，也可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(ROM，Read Only Memory)、可编程只读存储器(PROM，Programmable Read-Only Memory)、可擦除可编程只读存储器(EPROM，Erasable Programmable Read-Only Memory)、电可擦除可编程只读存储器(EEPROM，Electrically Erasable Programmable Read-Only Memory)、磁性随机存取存储器(FRAM，ferromagnetic random access memory)、快闪存储器(Flash Memory)、磁表面存储器、光盘、或只读光盘(CD-ROM，Compact Disc Read-Only Memory)；磁表面存储器可以是磁盘存储器或磁带存储器。易失性存储器可以是随机存取存储器(RAM，Random Access Memory)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(SRAM，Static Random Access Memory)、同步静态随机存取存储器(SSRAM，Synchronous Static Random Access Memory)、动态随机存取存储器(DRAM，Dynamic Random Access Memory)、同步动态随机存取存储器(SDRAM，Synchronous Dynamic Random Access Memory)、双倍数据速率同步动态随机存取存储器(DDRSDRAM，Double Data Rate Synchronous Dynamic Random Access Memory)、增强型同步动态随机存取存储器(ESDRAM，Enhanced Synchronous Dynamic Random Access Memory)、同步连接动态随机存取存储器(SLDRAM，SyncLink Dynamic Random Access Memory)、直接内存总线随机存取存储器(DRRAM，Direct Rambus Random Access Memory)。本申请实施例描述的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
本申请实施例的电子设备可以为空调器。需要说明的是，本申请实施例的电子设备还可以为应用单相三路交错式PFC电路拓扑的其他设备，例如，包括但不限于：光伏发电设备、不间断电源(Uninterruptible Power Supply，UPS)、车载逆变器等电子产品。
在示例性实施例中，本申请实施例还提供了一种存储介质，即计算机存储介质，具体可以是计算机可读存储介质，例如包括存储计算机程序的存储器702，上述计算机程序可由电子设备的处理器701执行，以完成本申请实施例方法所述的步骤。计算机可读存储介质可以是ROM、PROM、EPROM、EEPROM、Flash Memory、磁表面存储器、光盘、或CD-ROM等存储器。
需要说明的是：“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
另外，本申请实施例所记载的技术方案之间，在不冲突的情况下，可以任意组合。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请披露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (11)

  1. 一种电子设备的控制方法，所述电子设备包括：由单相三路交错式PFC电路供电的负载，所述控制方法包括：
    获取所述电子设备当前运行的负载状态；
    基于所述负载状态，控制所述单相三路交错式PFC电路运行在目标运行模式；
    其中，所述单相三路交错式PFC电路的运行模式包括：驱动三路PFC交错导通的第一模式、驱动两路PFC交错导通的第二模式及驱动一路PFC导通的第三模式。
  2. 根据权利要求1所述的方法，其中，所述负载状态包括：表示重载的第一状态、表示中载的第二状态和表示轻载的第三状态，所述基于所述负载状态，控制所述单相三路交错式PFC电路运行在目标运行模式，包括：
    若所述负载状态为所述第一状态，则控制所述单相三路交错式PFC电路运行在所述第一模式；
    若所述负载状态为所述第二状态，则控制所述单相三路交错式PFC电路运行在所述第二模式；
    若所述负载状态为所述第三状态，则控制所述单相三路交错式PFC电路运行在所述第三模式。
  3. 根据权利要求2所述的方法，其中，所述控制所述单相三路交错式PFC电路运行在所述第二模式，包括：
    基于设定的第一切换周期，控制所述单相三路交错式PFC电路按照指定的两路PFC组合的切换顺序，循环所述驱动两路PFC交错导通。
  4. 根据权利要求2所述的方法，其中，所述控制所述单相三路交错式PFC电路运行在所述第三模式，包括：
    基于设定的第二切换周期，控制所述单相三路交错式PFC电路按照指定的一路PFC的切换顺序，循环所述驱动一路PFC导通。
  5. 根据权利要求1所述的方法，其中，所述获取所述电子设备当前运行的负载状态，包括：
    获取所述单相三路交错式PFC电路的电流值或者所述电子设备的负载功率值；
    基于所述电流值或者所述负载功率值和设定分类阈值，判定所述电子设备当前运行的负载状态。
  6. 根据权利要求5所述的方法，其中，所述方法还包括：
    若基于所述电流值或者所述负载功率值判定所述单相三路交错式PFC电路超载，则关闭所述单相三路交错式PFC电路的三路PFC。
  7. 根据权利要求1所述的方法，其中，所述获取所述电子设备当前运 行的负载状态之前，所述方法还包括：
    获取所述单相三路交错式PFC电路的输入电压峰值；
    基于所述输入电压峰值，确定是否获取所述电子设备当前运行的负载状态。
  8. 一种电子设备的控制装置，所述电子设备包括：由单相三路交错式PFC电路供电的负载，所述控制装置包括：
    获取模块，配置为获取所述电子设备当前运行的负载状态；
    控制模块，配置为基于所述负载状态，控制所述单相三路交错式PFC电路运行在目标运行模式；
    其中，所述单相三路交错式PFC电路的运行模式包括：驱动三路PFC交错导通的第一模式、驱动两路PFC交错导通的第二模式及驱动一路PFC导通的第三模式。
  9. 一种电子设备，所述电子设备包括：由单相三路交错式PFC电路供电的负载，所述电子设备还包括：处理器和用于存储能够在处理器上运行的计算机程序的存储器，其中，
    所述处理器，配置为运行计算机程序时，执行权利要求1至7任一项所述方法的步骤。
  10. 根据权利要求9所述的电子设备，其中，所述电子设备为空调器。
  11. 一种存储介质，所述存储介质上存储有计算机程序，所述计算机程序被处理器执行时，实现权利要求1至7任一项所述方法的步骤。
PCT/CN2023/098073 2022-10-31 2023-06-02 电子设备及其控制方法、装置和存储介质 WO2024093229A1 (zh)

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