WO2024093227A1 - 电子设备及其控制方法、装置和存储介质 - Google Patents

电子设备及其控制方法、装置和存储介质 Download PDF

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Publication number
WO2024093227A1
WO2024093227A1 PCT/CN2023/097871 CN2023097871W WO2024093227A1 WO 2024093227 A1 WO2024093227 A1 WO 2024093227A1 CN 2023097871 W CN2023097871 W CN 2023097871W WO 2024093227 A1 WO2024093227 A1 WO 2024093227A1
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WIPO (PCT)
Prior art keywords
load
bus
voltage value
electronic device
pair
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PCT/CN2023/097871
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English (en)
French (fr)
Inventor
徐锦清
朱良红
Original Assignee
广东美的制冷设备有限公司
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Publication of WO2024093227A1 publication Critical patent/WO2024093227A1/zh

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/06—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration

Definitions

  • the present application relates to the field of circuit control, and in particular to an electronic device and a control method, device and storage medium thereof.
  • PFC Power Factor Correction circuits
  • UPS uninterruptible power supplies
  • the voltage stress of the switch tube in the three-level PFC circuit is half of the voltage stress of the switch tube in the two-level PFC circuit under the same bus voltage.
  • the inductor volume in the three-level PFC circuit under the same power and switching frequency is smaller than the inductor volume in the two-level PFC circuit. Therefore, the three-level PFC circuit is widely used.
  • the load form of the full-bus compressor COMP and the full-bus fan FM is generally adopted. Due to the high bus voltage, the power device needs to select a model with higher voltage resistance performance. For example, the intelligent power module IPM1 of the fan FM needs to use a model with higher voltage resistance performance, which increases the hardware cost.
  • the load form of the full-bus compressor COMP and the half-bus fan FM' is adopted, when the half-bus fan FM' is operated alone, the half-bus voltage will drop, thereby causing a midpoint potential imbalance problem. In severe cases, it will lead to an inability to start and operate normally. In order to solve the midpoint potential imbalance problem, it is necessary to adopt the compressor winding preheating that matches the fan load power in the full bus load, which increases the power consumption loss and waste of the machine.
  • an embodiment of the present application provides an electronic device and a control method, device and storage medium thereof, which are intended to effectively balance the midpoint potential of a three-level PFC circuit.
  • an embodiment of the present application provides a control method of an electronic device, the electronic device comprising: at least one group of half-bus load pairs arranged on an upper half bus and a lower half bus of a three-level PFC circuit, each group of half-bus load pairs comprising a first load powered by the upper half bus and a second load powered by the lower half bus, the method comprising:
  • the first load and the second load of the target half-bus load pair are controlled based on the first voltage value and the second voltage value, thereby adjusting the midpoint potential of the three-level PFC circuit.
  • controlling the first load and the second load of the target half-bus load pair based on the first voltage value and the second voltage value includes:
  • the second set threshold is less than or equal to the first set threshold.
  • the driving one of the first load and the second load of the target half-bus load pair to operate based on the magnitude relationship between the first voltage value and the second voltage value includes:
  • the second load of the target half-bus load pair is driven to operate.
  • the method further includes:
  • the first load and the second load of the target half-bus load pair are driven to operate synchronously, and after the input current value of the three-level PFC circuit is greater than or equal to the third set threshold, the PFC module of the three-level PFC circuit is turned on and the remaining loads of the electronic device are driven to operate.
  • controlling the first load and the second load of the target half-bus load pair based on the first voltage value and the second voltage value includes:
  • the PFC module of the three-level PFC circuit is turned off, and when the absolute value of the difference between the first voltage value and the second voltage value is greater than the first set threshold, based on the magnitude relationship between the first voltage value and the second voltage value, one of the first load and the second load of the target half-bus load pair is driven to operate until the absolute value of the difference between the first voltage value and the second voltage value is less than or equal to the second set threshold;
  • the second set threshold is less than or equal to the first set threshold.
  • the driving one of the first load and the second load of the target half-bus load pair to operate based on the magnitude relationship between the first voltage value and the second voltage value includes:
  • the second load of the target half-bus load pair is driven to operate.
  • the method further includes:
  • the PFC module of the three-level PFC circuit is turned off and the first load and the second load of the target half-bus load pair are synchronously turned off; or,
  • the first load and the second load of the target half-bus load pair are synchronously closed.
  • controlling the first load and the second load of the target half-bus load pair based on the first voltage value and the second voltage value includes:
  • the second set threshold is less than or equal to the first set threshold.
  • adjusting the operating power of the first load and/or the second load of the target half-bus load pair based on the magnitude relationship between the first voltage value and the second voltage value includes:
  • first voltage value is greater than the second voltage value, lowering the operating power of the second load of the target half-bus load pair and/or increasing the operating power of the first load of the target half-bus load pair;
  • the operating power of the first load of the target half-bus load pair is reduced and/or the operating power of the second load of the target half-bus load pair is increased.
  • an embodiment of the present application provides a control device of an electronic device, the electronic device comprising: at least one group of half-bus load pairs arranged on an upper half bus and a lower half bus of a three-level PFC circuit, each group of half-bus load pairs comprising a first load powered by the upper half bus and a second load powered by the lower half bus, the control device comprising:
  • An acquisition module configured to acquire a first voltage value of the upper bus and a second voltage value of the lower bus
  • the control module is configured to control the electronic device in at least one of the power-on phase, the power-off phase and the operation phase based on the The first voltage value and the second voltage value control the first load and the second load of the target half-bus load pair, thereby adjusting the midpoint potential of the three-level PFC circuit.
  • an embodiment of the present application provides an electronic device, comprising: at least one group of half-bus load pairs arranged on the upper half bus and the lower half bus of a three-level PFC circuit, each group of half-bus load pairs comprising a first load powered by the upper half bus and a second load powered by the lower half bus, the electronic device also comprising: a processor and a memory for storing a computer program that can be run on the processor, wherein the processor is configured to execute the steps of the method described in the first aspect of the embodiment of the present application when running the computer program.
  • the electronic device is an air conditioner
  • the air conditioner includes a compressor arranged on a full bus of the three-level PFC circuit, and the first load and the second load of the half-bus load pair are fans.
  • the electronic device is an air conditioner
  • the at least one set of half-bus load pairs includes: a pair of half-bus compressors and a pair of half-bus fans.
  • an embodiment of the present application provides a storage medium, on which a computer program is stored.
  • the computer program is executed by a processor, the steps of the method described in the first aspect of the embodiment of the present application are implemented.
  • the technical solution provided by the embodiment of the present application is an electronic device comprising: at least one group of half-bus load pairs arranged on the upper half bus and the lower half bus of a three-level PFC circuit, each group of half-bus load pairs including a first load powered by the upper half bus and a second load powered by the lower half bus; obtaining a first voltage value of the upper half bus and a second voltage value of the lower half bus; in at least one of a startup phase, a shutdown phase and an operation phase of the electronic device, based on the first voltage value and the second voltage value, controlling the first load and the second load of the target half-bus load pair, thereby adjusting the midpoint potential of the three-level PFC circuit, effectively suppressing the imbalance of the midpoint potential of the three-level PFC circuit, thereby avoiding the waste of additional power consumption loss of the full bus load when the midpoint is balanced under a single half-bus load, and avoiding the high cost problem caused by the need to select power devices with higher withstand voltage performance for the full bus load due to the
  • FIG1 is a schematic diagram of a three-level PFC circuit applied to an air conditioner in the related art
  • FIG2 is a second schematic diagram of a three-level PFC circuit applied to an air conditioner in the related art
  • FIG3 is a schematic flow chart of a control method of an electronic device according to an embodiment of the present application.
  • FIG4 is a schematic structural diagram of an air conditioner connected to a three-level PFC circuit in an application example of the present application
  • FIG5 is a schematic diagram of the startup logic of the air conditioner shown in FIG4 ;
  • FIG6 is a schematic diagram of the shutdown logic of the air conditioner shown in FIG4 ;
  • FIG7 is a schematic diagram of the operation logic of the air conditioner shown in FIG4 ;
  • FIG8 is a structural schematic diagram of another application example of the present invention, in which an air conditioner is connected to a three-level PFC circuit;
  • FIG9 is a schematic diagram of the startup logic of the air conditioner shown in FIG8 ;
  • FIG10 is a schematic diagram of the shutdown logic of the air conditioner shown in FIG8;
  • FIG11 is a schematic diagram of the operation logic of the air conditioner shown in FIG8 ;
  • FIG12 is a schematic diagram of the structure of a control device of an electronic device according to an embodiment of the present application.
  • FIG. 13 is a schematic diagram of the structure of an electronic device according to an embodiment of the present application.
  • the three-level PFC circuit based on VIENNA includes: three PFC inductors L1 to L2. L3, six rectifier diodes D1 to D6, six power devices T1 to T6 and two half-bus capacitors C1 and C2 (i.e., two-stage electrolytic capacitors); the three PFC inductors are connected to a three-phase power supply for filtering the three-phase power supply; the six rectifier diodes D1 to D6 rectify the filtered three-phase power supply, and then three pairs of power devices are used to perform power factor correction; wherein the connection point between the half-bus capacitors C1 and C2 serves as a neutral point O.
  • Full bus refers to the line between the positive and negative busbars of the two-stage electrolytic capacitors connected in series in the high-voltage DC bus filter circuit;
  • Half bus refers to the high voltage DC bus filter circuit using two-stage electrolytic capacitors in series.
  • the area between the midpoint of the two-stage electrolytic capacitors in series and the negative bus is the lower half bus
  • the area between the midpoint of the two-stage electrolytic capacitors in series and the positive bus is the upper half bus.
  • Both the upper half bus and the lower half bus are half buses.
  • Midpoint potential the voltage between the midpoint of the two-stage electrolytic capacitor and the capacitor ground, that is, the voltage between the neutral point O and the grounding point.
  • the three-level PFC circuit uses the level of the neutral point O as a reference, and there are upper half bus voltage Upo and lower half bus voltage Uon.
  • the three-level PFC circuit can be connected to a full bus load and a half bus load.
  • the full bus load is a load connected between the positive bus and the negative bus, that is, a load connected to the full bus
  • the half bus load is a load connected to either end of any capacitor in the two-stage electrolytic capacitor.
  • the half bus load is divided into a first load corresponding to the upper half bus (i.e., the upper half bus load) and a second load corresponding to the lower half bus (i.e., the lower half bus load).
  • the embodiment of the present application provides a control method of an electronic device, the electronic device comprising: at least one set of half-bus load pairs arranged on the upper half bus and the lower half bus of a three-level PFC circuit, each set of half-bus load pairs comprising a first load powered by the upper half bus and a second load powered by the lower half bus. It should be noted that the first load and the second load of each set of half-bus load pairs have equal power, that is, the paired upper and lower half-bus loads are designed with equal power. As shown in FIG3 , the method comprises:
  • Step 301 obtaining a first voltage value of an upper bus and a second voltage value of a lower bus.
  • the electronic device can obtain a first voltage value of the upper bus (ie, the upper bus voltage Upo) and a second voltage value of the lower bus (ie, the lower bus voltage Uon) based on a voltage detection circuit.
  • Step 302 In at least one of a power-on phase, a power-off phase, and an operation phase of the electronic device, based on a first voltage value and a second voltage value, a first load and a second load of a target half-bus load pair are controlled to thereby adjust a midpoint potential of the three-level PFC circuit.
  • the target half-bus load pair may be at least one of the at least one set of half-bus load pairs arranged on the upper half-bus and the lower half-bus of the three-level PFC circuit.
  • the midpoint potential of the three-level PFC circuit can be adjusted based on the first load (corresponding to the upper half-bus) and the second load (corresponding to the lower half-bus) in the selected half-bus load pair, the adjustment of the midpoint potential of the three-level PFC circuit may be achieved.
  • control method of the embodiment of the present application controls the first load and the second load of the target half-bus load pair based on the first voltage value and the second voltage value in at least one of the power-on stage, the power-off stage and the operation stage of the electronic device, thereby adjusting the midpoint potential of the three-level PFC circuit, and effectively suppressing the imbalance of the midpoint potential of the three-level FPC circuit, thereby avoiding the waste of additional power consumption loss of the full bus load when balancing the midpoint under a single half-bus load, and avoiding the high cost problem caused by the need to select power devices with higher voltage resistance performance for the full bus load due to the high bus voltage, thereby reducing power consumption loss and hardware cost.
  • controlling the first load and the second load of the target half-bus load pair based on the first voltage value and the second voltage value includes:
  • the absolute value of the difference between the first voltage value and the second voltage value is greater than the first set threshold, based on the magnitude relationship between the first voltage value and the second voltage value, one of the first load and the second load of the target half-bus load pair is driven to operate until the absolute value of the difference between the first voltage value and the second voltage value is less than or equal to the second set threshold; wherein the second set threshold is less than or equal to the first set threshold.
  • the first set threshold value can be understood as a reference threshold value for determining whether the midpoint potential deviates from the normal value, which can be determined based on the withstand voltage performance of the three-level PFC circuit. If the absolute value of the difference between the first voltage value and the second voltage value is greater than the first set threshold value, it is determined that the midpoint potential balance adjustment is required, and then based on the magnitude relationship between the first voltage value and the second voltage value, one of the first load and the second load of the target half-bus load pair is driven to operate.
  • the second set threshold value can be a value less than or equal to the first set threshold value, so that the deviation value of the midpoint potential after the balance adjustment can be smaller, that is, the midpoint potential is more balanced.
  • the first load and the second load of the target half-bus load pair are driven.
  • One of two loads is running, including:
  • the second load of the target half-bus load pair is driven to operate.
  • control method further includes:
  • the first load and the second load of the target half-bus load pair are driven to operate synchronously, and after the input current value of the three-level PFC circuit is greater than or equal to the third set threshold, the PFC module of the three-level PFC circuit and the remaining loads of the driving electronic device are turned on to operate.
  • the absolute value of the difference between the initially acquired first voltage value and the second voltage value is less than or equal to the first set threshold, or the absolute value of the difference between the first voltage value and the second voltage value after the above-mentioned balance adjustment is less than or equal to the second set threshold, it is determined that the midpoint potential is normal, the first load and the second load of the target half-bus load pair are driven to operate synchronously, and after the input current value of the three-level PFC circuit is greater than or equal to the third set threshold, the PFC module of the three-level PFC circuit and the remaining loads of the driving electronic device are turned on to operate.
  • the third set threshold can be understood as a current threshold for determining whether the PFC module of the three-level PFC circuit needs to be started.
  • the input current value of the three-level PFC circuit can be obtained based on the current sampling circuit, for example, it can be obtained based on the phase current value collected on each phase line, or obtained through the bus current collected on the bus, and the embodiment of the present application does not limit this.
  • controlling the first load and the second load of the target half-bus load pair based on the first voltage value and the second voltage value includes:
  • the PFC module of the three-level PFC circuit is turned off, and when the absolute value of the difference between the first voltage value and the second voltage value is greater than the first set threshold, based on the magnitude relationship between the first voltage value and the second voltage value, one of the first load and the second load of the target half-bus load pair is driven to operate until the absolute value of the difference between the first voltage value and the second voltage value is less than or equal to the second set threshold; wherein the second set threshold is less than or equal to the first set threshold.
  • the imbalance of the midpoint potential can be effectively suppressed through the above control.
  • the PFC module is turned off, if the absolute value of the difference between the first voltage value and the second voltage value is greater than the first set threshold, it is determined that the midpoint potential balance adjustment needs to be performed, and then based on the magnitude relationship between the first voltage value and the second voltage value, one of the first load and the second load of the target half-bus load pair is driven to operate.
  • driving one of the first load and the second load of the target half-bus load pair to operate includes:
  • the second load of the target half-bus load pair is driven to operate.
  • control method further includes:
  • the PFC module of the three-level PFC circuit is turned off and the first load and the second load of the target half-bus load pair are turned off synchronously; or,
  • the target semi-motor If it is determined that the absolute value of the difference between the first voltage value and the second voltage value is less than or equal to the first set threshold, or the target semi-motor is driven If the absolute value of the difference between the first voltage value and the second voltage value of one of the first load and the second load of the line load pair after operation is less than or equal to the second set threshold, the first load and the second load of the target half-bus load pair are synchronously closed.
  • the PFC module and the first load and the second load of the target half-bus load pair can be turned off at the same time. In this way, since the target half-bus load pair is turned off along with the PFC circuit, it will not cause an imbalance in the midpoint potential, and can effectively avoid an imbalance in the midpoint potential when the electronic device is turned on next time.
  • the midpoint potential is normal, and the first load and the second load of the target half-bus load pair can be turned off synchronously.
  • controlling the first load and the second load of the target half-bus load pair based on the first voltage value and the second voltage value includes:
  • the operating power of the first load and/or the second load of the target half-bus load pair is adjusted until the absolute value of the difference between the first voltage value and the second voltage value is less than or equal to the second set threshold; wherein the second set threshold is less than or equal to the first set threshold.
  • the operating power of the first load and/or the second load of the target half-bus load pair is adjusted to achieve midpoint potential balance adjustment until the absolute value of the difference between the first voltage value and the second voltage value is less than or equal to the second set threshold value.
  • adjusting the operating power of the first load and/or the second load of the target half-bus load pair based on the magnitude relationship between the first voltage value and the second voltage value includes:
  • first voltage value is greater than the second voltage value, lowering the operating power of the second load of the target half-bus load pair and/or increasing the operating power of the first load of the target half-bus load pair;
  • the operating power of the first load of the target half-bus load pair is reduced and/or the operating power of the second load of the target half-bus load pair is increased.
  • the operating power of the second load of the target half-bus load pair can be lowered and/or the operating power of the first load of the target half-bus load pair can be increased, thereby relatively reducing the voltage of the upper bus and suppressing the imbalance of the midpoint potential; if the upper bus voltage Upo is less than the lower bus voltage Uon, the operating power of the first load of the target half-bus load pair can be lowered and/or the operating power of the second load of the target half-bus load pair can be increased, thereby relatively reducing the voltage of the lower bus and suppressing the imbalance of the midpoint potential.
  • the first load and the second load of the target half-bus load pair are driven to operate with equal efficiency.
  • control method of the electronic device in the embodiment of the present application is illustrated below with reference to application examples.
  • the electronic device is an air conditioner, as shown in Figure 4, the air conditioner includes a compressor COMP arranged on the full bus of the three-level PFC circuit, and a fan FM1 arranged on the upper half bus and a fan FM2 arranged on the lower half bus.
  • the compressor COMP is driven by an intelligent power module IPM2
  • the fan FM1 is driven by an intelligent power module IPM1
  • the fan FM2 is driven by an intelligent power module IPM3.
  • the driving motor of the compressor COMP can be any one of a single-phase asynchronous motor, an induction motor, a three-phase brushless DC motor, a three-phase permanent magnet synchronous motor, a synchronous reluctance motor, and a switched reluctance motor;
  • the driving motors of the fans FM1 and FM2 can be any one of a single-phase asynchronous motor, an induction motor, a brushed DC motor, a single-phase brushless DC motor, a three-phase brushless DC motor, a three-phase permanent magnet synchronous motor, a synchronous reluctance motor, and a switched reluctance motor.
  • control method of the air conditioner includes:
  • Step 501 determine whether the upper and lower half bus voltage difference
  • the air conditioner first detects the upper bus voltage Upo and the lower bus voltage Uon, and determines whether the absolute value of the upper and lower bus pressure difference
  • Step 502 determine whether the upper and lower half bus pressure difference Upo-Uon>0, if not, execute step 503; if yes, execute step 504.
  • Step 503 drive IPM3 to operate fan FM2.
  • the upper bus voltage Upo is less than the lower bus voltage Uon, and the intelligent power module IPM3 is driven alone, thereby operating the fan FM2 of the lower bus to reduce the lower bus voltage.
  • Step 504 drive IPM1 to operate fan FM1.
  • the upper bus voltage Upo is greater than the lower bus voltage Uon, and the intelligent power module IPM1 is driven alone, thereby operating the fan FM1 of the upper bus to reduce the upper bus voltage.
  • Step 505 determining whether the upper and lower half busbar pressure difference
  • V2 is the aforementioned second set threshold. If the upper and lower half bus voltage difference
  • Step 506 drive IPM1 & IPM3 simultaneously, and run FM1 & FM2 synchronously.
  • the intelligent power modules IPM1 and IPM3 are driven simultaneously, so that the fans FM1 and FM2 operate synchronously.
  • Step 507 determining whether the input current Iin ⁇ I1 , if not, returning to step 506 ; if yes, executing step 508 .
  • the input current Iin of the three-level PFC circuit is obtained to determine whether the input current Iin ⁇ I1, where I1 is the third set threshold value mentioned above. If not, the fans FM1 and FM2 continue to operate synchronously until the input current Iin ⁇ I1, and step 508 is executed.
  • Step 508 start the three-level Vienna PFC.
  • Step 509 drive IPM2 to run COMP.
  • the intelligent power module IPM2 can be controlled to drive the compressor COMP as the full bus load to operate.
  • control method of the air conditioner includes:
  • Step 601 turn off IPM2 and stop COMP.
  • the air conditioner first turns off the intelligent power module IPM2 and then stops the compressor COMP.
  • Step 602 after waiting for S seconds, determine whether the input current Iin ⁇ I1, if not, execute step 603; if yes, execute step 604.
  • the input current Iin may be obtained to determine whether the input current Iin ⁇ I1. If not, step 603 is executed; if yes, step 604 is executed.
  • Step 603 turn off the three-level Vienna PFC, turn off IPM1 & IPM3 at the same time, and stop FM1 & FM2 synchronously.
  • the three-level Vienna PFC can be turned off, and the intelligent power modules IPM1 and IPM3 can be turned off at the same time, and the fans FM1 and FM2 can be stopped synchronously, so as to achieve shutdown.
  • Step 604 shut down the three-level Vienna PFC.
  • Step 605 determining whether the upper and lower half bus voltage difference
  • step 606 the air conditioner still needs to determine whether the absolute value of the upper and lower half bus voltage difference
  • Step 606 determine whether the upper and lower half bus pressure difference Upo-Uon>0, if not, execute step 607; if yes, execute step 608.
  • Step 607 drive IPM3 to operate fan FM2.
  • the upper bus voltage Upo is less than the lower bus voltage Uon, and the intelligent power module IPM3 is driven alone, thereby operating the fan FM2 of the lower bus to reduce the lower bus voltage.
  • Step 608 drive IPM1 to operate fan FM1.
  • the upper bus voltage Upo is greater than the lower bus voltage Uon, and the intelligent power module IPM1 is driven alone to operate the upper bus voltage.
  • the fan FM1 of the half bus can reduce the voltage of the upper half bus.
  • Step 609 determining whether the upper and lower half busbar pressure difference
  • step 610 is executed; otherwise, return to step 606 to continue midpoint potential balance control.
  • Step 610 shut down IPM1 & IPM3 at the same time, and stop FM1 & FM2 synchronously.
  • the intelligent power modules IPM1 and IPM3 are turned off at the same time, and the fans FM1 and FM2 are stopped synchronously, thereby achieving shutdown.
  • control method of the air conditioner includes:
  • Step 701 determine whether the upper and lower half bus voltage difference
  • the air conditioner can periodically detect the upper bus voltage Upo and the lower bus voltage Uon to determine whether the absolute value of the upper and lower bus pressure difference
  • Step 702 drive IPM1 & IPM3 to operate FM1 & FM2 at the same power, and drive IPM2 to operate COMP.
  • the intelligent power modules IPM1 and IPM3 are driven simultaneously to control the fans FM1 and FM2 to operate at the same power, and the intelligent power module IPM2 is driven simultaneously to drive the compressor COMP to operate.
  • Step 703 determine whether the upper and lower half bus pressure difference Upo-Uon>0, if not, execute step 704; if yes, execute step 705.
  • Step 704 drive IPM1 to reduce the operating power of fan FM1.
  • the upper bus voltage Upo is less than the lower bus voltage Uon, driving the intelligent power module IPM1 to reduce the operating power of the fan FM1, thereby relatively reducing the lower bus voltage.
  • Step 705 drive IPM3 to reduce the operating power of fan FM2.
  • the upper bus voltage Upo is greater than the lower bus voltage Uon, driving the intelligent power module IPM3 to reduce the operating power of the fan FM2, thereby relatively reducing the upper bus voltage.
  • Step 706 determine whether the upper and lower half bus voltage difference
  • step 707 is executed; otherwise, return to step 703 to continue midpoint potential balance control.
  • Step 707 drive IPM1 & IPM3 to operate FM1 & FM2 at the same power.
  • the intelligent power modules IPM1 and IPM3 can be driven simultaneously to control the fans FM1 and FM2 to operate at the same power.
  • the electronic device is an air conditioner, as shown in FIG8 , and the air conditioner includes two groups of half-bus load pairs, wherein compressors COMP1 and COMP2 constitute one group, and fans FM1 and FM2 constitute another group, fan FM1 is driven by intelligent power module IPM1, compressor COMP1 is driven by intelligent power module IPM2, fan FM2 is driven by intelligent power module IPM3, and compressor COMP2 is driven by intelligent power module IPM4.
  • control method of the air conditioner includes:
  • Step 901 determine whether the upper and lower half bus voltage difference
  • the air conditioner first detects the upper bus voltage Upo and the lower bus voltage Uon, and determines whether the absolute value of the upper and lower bus pressure difference
  • Step 902 determine whether the upper and lower half bus pressure difference Upo-Uon>0, if not, execute step 903; if yes, execute step 904.
  • Step 903 drive IPM3 to operate fan FM2.
  • the upper bus voltage Upo is less than the lower bus voltage Uon, and the intelligent power module IPM3 is driven alone to operate the lower bus voltage.
  • the fan FM2 of the half bus can reduce the voltage of the lower half bus.
  • Step 904 drive IPM1 to operate fan FM1.
  • the upper bus voltage Upo is greater than the lower bus voltage Uon, and the intelligent power module IPM1 is driven alone, thereby operating the fan FM1 of the upper bus to reduce the upper bus voltage.
  • Step 905 determine whether the upper and lower half bus voltage difference
  • V2 is the aforementioned second set threshold. If the upper and lower half bus voltage difference
  • Step 906 drive IPM1 & IPM3 simultaneously, and run FM1 & FM2 synchronously.
  • the intelligent power modules IPM1 and IPM3 are driven simultaneously, so that the fans FM1 and FM2 operate synchronously.
  • Step 907 determining whether the input current Iin ⁇ I1 , if not, returning to step 906 ; if yes, executing step 908 .
  • the input current Iin of the three-level PFC circuit is obtained to determine whether the input current Iin ⁇ I1, where I1 is the third set threshold value mentioned above. If not, the fans FM1 and FM2 continue to operate synchronously until the input current Iin ⁇ I1, and step 908 is executed.
  • Step 908 start the three-level Vienna PFC.
  • Step 909 drive IPM2 & IPM4 simultaneously, and run COMP1 & COMP2 synchronously.
  • the intelligent power modules IPM2 and IPM4 can be controlled to drive the compressors COMP1 and COMP2 as half-bus loads to run synchronously.
  • the control method of the air conditioner includes:
  • Step 1001 turn off IPM2 & IPM4, and stop COMP1 & COMP2 simultaneously.
  • the air conditioner first turns off the intelligent power modules IPM2 and IPM4, and then stops the compressors COMP1 and COMP2.
  • Step 1002 after waiting for S seconds, determine whether the input current Iin ⁇ I1, if not, execute step 1003; if yes, execute step 1004.
  • the input current Iin may be obtained to determine whether the input current Iin ⁇ I1. If not, step 1003 is executed; if yes, step 1004 is executed.
  • Step 1003 turn off the three-level Vienna PFC, turn off IPM1 & IPM3 at the same time, and stop FM1 & FM2 synchronously.
  • the three-level Vienna PFC can be turned off, and the intelligent power modules IPM1 and IPM3 can be turned off at the same time, and the fans FM1 and FM2 can be stopped synchronously, so as to achieve shutdown.
  • Step 1004 turning off the three-level Vienna PFC.
  • Step 1005 determine whether the upper and lower half busbar pressure difference
  • step 1010 is executed.
  • Step 1006 determine whether the upper and lower half bus pressure difference Upo-Uon>0, if not, execute step 1007; if yes, execute step 1008.
  • Step 1007 drive IPM3 to operate fan FM2.
  • the upper bus voltage Upo is less than the lower bus voltage Uon, and the intelligent power module IPM3 is driven alone, thereby operating the fan FM2 of the lower bus to reduce the lower bus voltage.
  • Step 1008 drive IPM1 to operate fan FM1.
  • the upper bus voltage Upo is greater than the lower bus voltage Uon, and the intelligent power module IPM1 is driven alone, thereby operating the fan FM1 of the upper bus to reduce the upper bus voltage.
  • Step 1009 determine whether the upper and lower half bus voltage difference
  • step 1010 is executed; otherwise, return to step 1006 to continue midpoint potential balance control.
  • Step 1010 shut down IPM1 & IPM3 at the same time, and stop FM1 & FM2 synchronously.
  • the intelligent power modules IPM1 and IPM3 are turned off at the same time, and the fans FM1 and FM3 are stopped synchronously. FM2, thereby achieving shutdown.
  • control method of the air conditioner includes:
  • Step 1101 determine whether the upper and lower half bus voltage difference
  • the air conditioner can periodically detect the upper bus voltage Upo and the lower bus voltage Uon to determine whether the absolute value of the upper and lower bus pressure difference
  • the upper and lower bus voltages can be controlled without pressure difference based on fans FM1 and FM2; if not, compressors COMP1 and COMP2 are selected as the target half-bus load pair to adjust the midpoint potential balance.
  • Step 1102 determine whether the upper and lower half bus pressure difference Upo-Uon>0, if not, execute step 1103; if yes, execute step 1104.
  • Step 1103 drive IPM1 to reduce the operating power of fan FM1.
  • the upper bus voltage Upo is less than the lower bus voltage Uon, driving the intelligent power module IPM1 to reduce the operating power of the fan FM1, thereby relatively reducing the lower bus voltage.
  • Step 1104 drive IPM3 to reduce the operating power of fan FM2.
  • the upper bus voltage Upo is greater than the lower bus voltage Uon, driving the intelligent power module IPM3 to reduce the operating power of the fan FM2, thereby relatively reducing the upper bus voltage.
  • Step 1105 determine whether the upper and lower half bus voltage difference
  • step 1106 is executed; otherwise, return to step 1102 to continue the midpoint potential balance control.
  • Step 1106 drive IPM1 & IPM3 to operate FM1 & FM2 at the same power.
  • the intelligent power modules IPM1 and IPM3 can be driven simultaneously to control the fans FM1 and FM2 to operate at the same power.
  • Step 1107 determine whether the upper and lower half bus pressure difference Upo-Uon>0, if not, execute step 1108; if yes, execute step 1109.
  • Step 1108 driving IPM2 to reduce the operating power of COMP1.
  • the upper bus voltage Upo is less than the lower bus voltage Uon, driving the intelligent power module IPM2 to reduce the operating power of the compressor COMP1, thereby relatively reducing the lower bus voltage.
  • Step 1109 driving IPM4 to reduce the operating power of COMP2.
  • the upper bus voltage Upo is greater than the lower bus voltage Uon, driving the intelligent power module IPM4 to reduce the operating power of the compressor COMP2, thereby relatively reducing the upper bus voltage.
  • Step 1110 determine whether the upper and lower half bus voltage difference
  • step 1111 is executed; otherwise, return to step 1107 to continue the midpoint potential balance control.
  • Step 1111 drive IPM2 & IPM4 to operate COMP1 & COMP2 at the same power simultaneously.
  • the intelligent power modules IPM2 and IPM4 can be driven simultaneously to control the compressors COMP1 and COMP2 to operate at the same power.
  • the embodiment of the present application also provides a control device of an electronic device, which corresponds to the control method of the above-mentioned electronic device, and each step in the embodiment of the control method of the above-mentioned electronic device is also fully applicable to the embodiment of the control device of the present electronic device.
  • the control device of the electronic device includes: an acquisition module 1201 and a control module 1202.
  • the acquisition module 1201 is configured to acquire a first voltage value of the upper half bus and a second voltage value of the lower half bus;
  • the control module 1202 is configured to control the first load and the second load of the target half bus load pair based on the first voltage value and the second voltage value in at least one of the startup phase, shutdown phase and operation phase of the electronic device, thereby adjusting the midpoint potential of the three-level PFC circuit.
  • control module 1202 is specifically configured as follows:
  • the second set threshold is less than or equal to the first set threshold.
  • control module 1202 drives one of the first load and the second load of the target half-bus load pair to operate based on the magnitude relationship between the first voltage value and the second voltage value, including:
  • the second load of the target half-bus load pair is driven to operate.
  • control module 1202 is further configured to:
  • the first load and the second load of the target half-bus load pair are driven to operate synchronously, and after the input current value of the three-level PFC circuit is greater than or equal to the third set threshold, the PFC module of the three-level PFC circuit is turned on and the remaining loads of the electronic device are driven to operate.
  • control module 1202 is specifically configured as follows:
  • the PFC module of the three-level PFC circuit is turned off, and when the absolute value of the difference between the first voltage value and the second voltage value is greater than the first set threshold, based on the magnitude relationship between the first voltage value and the second voltage value, one of the first load and the second load of the target half-bus load pair is driven to operate until the absolute value of the difference between the first voltage value and the second voltage value is less than or equal to the second set threshold;
  • the second set threshold is less than or equal to the first set threshold.
  • control module 1202 drives one of the first load and the second load of the target half-bus load pair to operate based on the magnitude relationship between the first voltage value and the second voltage value, including:
  • the second load of the target half-bus load pair is driven to operate.
  • control module 1202 is further configured to:
  • the PFC module of the three-level PFC circuit is turned off and the first load and the second load of the target half-bus load pair are synchronously turned off; or,
  • the first load and the second load of the target half-bus load pair are synchronously shut down.
  • control module 1202 is specifically configured as follows:
  • the second set threshold is less than or equal to the first set threshold.
  • control module 1202 adjusts the operating power of the first load and/or the second load of the target half-bus load pair based on the magnitude relationship between the first voltage value and the second voltage value, including:
  • first voltage value is greater than the second voltage value, lowering the operating power of the second load of the target half-bus load pair and/or increasing the operating power of the first load of the target half-bus load pair;
  • the operating power of the first load of the target half-bus load pair is reduced and/or the operating power of the second load of the target half-bus load pair is increased.
  • the acquisition module 1201 and the control module 1202 can be implemented by a processor of the electronic device.
  • the processor needs to run the computer program in the memory to implement its function.
  • control device of the electronic device provided in the above embodiment controls the electronic device
  • only the above-mentioned procedures are used.
  • the division of the program modules is illustrated by way of example.
  • the above-mentioned processing can be assigned to different program modules as needed, that is, the internal structure of the device is divided into different program modules to complete all or part of the above-mentioned processing.
  • the control device of the electronic device provided in the above embodiment and the control method embodiment of the electronic device belong to the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.
  • Figure 13 only shows an exemplary structure of the electronic device rather than the entire structure. Part or all of the structure shown in Figure 13 can be implemented as needed.
  • the electronic device 1300 provided in the embodiment of the present application includes: at least one processor 1301, a memory 1302 and a user interface 1303.
  • the various components in the electronic device 1300 are coupled together via a bus system 1304.
  • the bus system 1304 is used to realize the connection and communication between these components.
  • the bus system 1304 also includes a power bus, a control bus and a status signal bus.
  • various buses are marked as bus system 1304 in FIG13 .
  • the user interface 1303 may include a display, a keyboard, a mouse, a trackball, a click wheel, keys, buttons, a touch pad or a touch screen.
  • the memory 1302 in the embodiment of the present application is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program used to operate on the electronic device.
  • the control method of the electronic device disclosed in the embodiment of the present application can be applied to the processor 1301, or implemented by the processor 1301.
  • the processor 1301 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the control method of the electronic device can be completed by the hardware integrated logic circuit in the processor 1301 or the instructions in the form of software.
  • the above-mentioned processor 1301 can be a general-purpose processor, a digital signal processor (DSP, Digital Signal Processor), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc.
  • the processor 1301 can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiment of the present application.
  • the general-purpose processor can be a microprocessor or any conventional processor, etc.
  • the decoding processor In combination with the steps of the method disclosed in the embodiment of the present application, it can be directly embodied as a hardware decoding processor to execute, or it can be executed by a combination of hardware and software modules in the decoding processor.
  • the software module can be located in a storage medium, which is located in the memory 1302.
  • the processor 1301 reads the information in the memory 1302 and completes the steps of the control method of the electronic device provided in the embodiment of the present application in combination with its hardware.
  • the electronic device can be implemented by one or more application specific integrated circuits (ASIC), DSP, programmable logic device (PLD), complex programmable logic device (CPLD), field programmable gate array (FPGA), general processor, controller, microcontroller (MCU), microprocessor, or other electronic components to execute the aforementioned method.
  • ASIC application specific integrated circuits
  • DSP digital signal processor
  • PLD programmable logic device
  • CPLD complex programmable logic device
  • FPGA field programmable gate array
  • general processor controller, microcontroller (MCU), microprocessor, or other electronic components to execute the aforementioned method.
  • MCU microcontroller
  • the memory 1302 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories.
  • the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disk, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a disk memory or a tape memory.
  • the volatile memory can be a random access memory (RAM), which is used as an external cache.
  • RAM random access memory
  • SRAM static random access memory
  • SSRAM synchronous static random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous dynamic random access memory
  • DDRSDRAM double data rate synchronous dynamic random access memory
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous link dynamic random access memory
  • DRRAM direct memory bus random access memory
  • the electronic device of the embodiment of the present application may be an air conditioner. It should be noted that the electronic device of the embodiment of the present application may also be other devices that apply the three-level PFC circuit topology, for example, including but not limited to: photovoltaic power generation equipment, uninterruptible power supply (UPS), vehicle inverter and other electronic products.
  • UPS uninterruptible power supply
  • vehicle inverter and other electronic products.
  • the present application also provides a storage medium, namely a computer storage medium, which may be a computer-readable storage medium, for example, a memory 1302 storing a computer program, and the computer program may be executed by a processor 1301 of an electronic device to complete the steps described in the method of the present application.
  • the computer-readable storage medium may be a memory such as a ROM, a PROM, an EPROM, an EEPROM, a Flash Memory, a magnetic surface memory, an optical disk, or a CD-ROM.

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Abstract

本申请公开了一种电子设备及其控制方法、装置和存储介质。该电子设备包括：布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对，每组半母线负载对均包括由上半母线供电的第一负载和由下半母线供电的第二负载；该方法包括：获取上半母线的第一电压值和下半母线的第二电压值；在电子设备的开机阶段、关机阶段及运行阶段中的至少之一，基于第一电压值和第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，进而调节三电平PFC电路的中点电位。

Description

电子设备及其控制方法、装置和存储介质
相关申请的交叉引用
本申请基于申请号为202211351374.9、申请日为2022年10月31日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本申请涉及电路控制领域，尤其涉及一种电子设备及其控制方法、装置和存储介质。
背景技术
PFC(Power Factor Correction，功率因数校正)电路广泛应用在通信电源和不间断电源(UPS，Uninterrupted Power Supply)中，它除了需要把交流电压转换为直流电压外，同时还要校正输入的功率因数，满足各种标准对输入特性的要求。三电平PFC电路中的开关管的电压应力是相同母线电压下两电平PFC电路的开关管的电压应力的一半，同时，相同功率和开关频率下的三电平PFC电路中的电感体积小于两电平PFC电路中的电感体积，因此，三电平PFC电路得到广泛应用。
实际应用中，三电平PFC电路应用于空调器时，如图1所示，普遍采用全母线的压缩机COMP和全母线的风机FM的负载形式，由于母线电压较高，导致功率器件需要选择耐压性能较高的型号，例如，风机FM的智能功率模块IPM1需要使用耐压性能较高的型号，进而增加了硬件成本；此外，如图2所示，若采用全母线的压缩机COMP和半母线的风机FM’的负载形式，则在半母线的风机FM’单独运行时，会导致半母线电压下降，从而引起中点电位不平衡问题，严重时会导致无法开机正常运行，为了解决中点电位不平衡问题，需要在全母线负载采取匹配风机负载功率的压缩机绕组预热来对应，增加了机器的功耗损失浪费。
发明内容
有鉴于此，本申请实施例提供了一种电子设备及其控制方法、装置和存储介质，旨在有效平衡三电平PFC电路的中点电位。
本申请实施例的技术方案是这样实现的：
第一方面，本申请实施例提供了一种电子设备的控制方法，所述电子设备包括：布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对，每组半母线负载对均包括由所述上半母线供电的第一负载和由所述下半母线供电的第二负载，该方法包括：
获取所述上半母线的第一电压值和所述下半母线的第二电压值；
在所述电子设备的开机阶段、关机阶段及运行阶段中的至少之一，基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，进而调节所述三电平PFC电路的中点电位。
在一些实施方案中，若所述电子设备处于开机阶段，所述基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，包括：
若确定所述第一电压值与所述第二电压值的差值绝对值大于第一设定阈值，则基于所述第一电压值和所述第二电压值的大小关系，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行，直至所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值；
其中，所述第二设定阈值小于或等于所述第一设定阈值。
在一些实施方案中，所述基于所述第一电压值和所述第二电压值的大小关系，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行，包括：
若确定所述第一电压值大于所述第二电压值，则驱动目标半母线负载对的所述第一负载运行；
若确定所述第一电压值小于所述第二电压值，则驱动目标半母线负载对的所述第二负载运行。
在一些实施方案中，若所述电子设备处于开机阶段，所述方法还包括：
若确定所述第一电压值与所述第二电压值的差值绝对值小于或等于所述第一设定阈值，或者，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行之后的所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值，则驱动目标半母线负载对的所述第一负载和所述第二负载同步运行，并在所述三电平PFC电路的输入电流值大于或等于第三设定阈值后，开启所述三电平PFC电路的PFC模块及驱动所述电子设备的余下负载运行。
在一些实施方案中，若所述电子设备处于关机阶段，所述基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，包括：
关闭所述电子设备除所述目标半母线负载对之外的负载；
若确定所述三电平PFC电路的输入电流值小于第三设定阈值，则关闭所述三电平PFC电路的PFC模块，并在所述第一电压值和所述第二电压值的差值绝对值大于第一设定阈值时，基于所述第一电压值和所述第二电压值的大小关系，驱动所述目标半母线负载对的所述第一负载和所述第二负载中的一个运行，直至所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值；
其中，所述第二设定阈值小于或等于所述第一设定阈值。
在一些实施方案中，所述基于所述第一电压值和所述第二电压值的大小关系，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行，包括：
若确定所述第一电压值大于所述第二电压值，则驱动目标半母线负载对的所述第一负载运行；
若确定所述第一电压值小于所述第二电压值，则驱动目标半母线负载对的所述第二负载运行。
在一些实施方案中，若所述电子设备处于关机阶段，所述方法还包括：
若确定所述三电平PFC电路的输入电流值大于或等于第三设定阈值，则关闭所述三电平PFC电路的PFC模块以及同步关闭所述目标半母线负载对的所述第一负载和所述第二负载；或者，
若确定所述第一电压值与所述第二电压值的差值绝对值小于或等于所述第一设定阈值，或者，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行之后的所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值，则同步关闭所述目标半母线负载对的所述第一负载和所述第二负载。
在一些实施方案中，若所述电子设备处于运行阶段，所述基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，包括：
若确定所述第一电压值与所述第二电压值的差值绝对值大于第一设定阈值，则基于所述第一电压值和所述第二电压值的大小关系，调节目标半母线负载对的所述第一负载和/或所述第二负载的运行功率，直至所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值；
其中，所述第二设定阈值小于或等于所述第一设定阈值。
在一些实施方案中，所述基于所述第一电压值和所述第二电压值的大小关系，调节目标半母线负载对的所述第一负载和/或所述第二负载的运行功率，包括：
若确定所述第一电压值大于所述第二电压值，则调低目标半母线负载对的所述第二负载的运行功率和/或调高目标半母线负载对的所述第一负载的运行功率；
若确定所述第一电压值小于所述第二电压值，则调低目标半母线负载对的所述第一负载的运行功率和/或调高目标半母线负载对的所述第二负载的运行功率。
第二方面，本申请实施例提供了一种电子设备的控制装置，所述电子设备包括：布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对，每组半母线负载对均包括由所述上半母线供电的第一负载和由所述下半母线供电的第二负载，所述控制装置包括：
获取模块，配置为获取所述上半母线的第一电压值和所述下半母线的第二电压值；
控制模块，配置为在所述电子设备的开机阶段、关机阶段及运行阶段中的至少之一，基于所述 第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，进而调节所述三电平PFC电路的中点电位。
第三方面，本申请实施例提供了一种电子设备，所述电子设备包括：布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对，每组半母线负载对均包括由所述上半母线供电的第一负载和由所述下半母线供电的第二负载，所述电子设备还包括：处理器和用于存储能够在处理器上运行的计算机程序的存储器，其中，所述处理器配置为运行计算机程序时，执行本申请实施例第一方面所述方法的步骤。
在一些实施方案中，所述电子设备为空调器，所述空调器包括布置于所述三电平PFC电路的全母线上的压缩机，所述半母线负载对的所述第一负载和所述第二负载为风机。
在一些实施方案中，所述电子设备为空调器，所述至少一组半母线负载对包括：成对的半母线压缩机和成对的半母线风机。
第四方面，本申请实施例提供了一种存储介质，所述存储介质上存储有计算机程序，所述计算机程序被处理器执行时，实现本申请实施例第一方面所述方法的步骤。
本申请实施例提供的技术方案，电子设备包括：布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对，每组半母线负载对均包括由上半母线供电的第一负载和由下半母线供电的第二负载；获取上半母线的第一电压值和下半母线的第二电压值；在电子设备的开机阶段、关机阶段及运行阶段中的至少之一，基于第一电压值和第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，进而调节三电平PFC电路的中点电位，有效抑制了三电平FPC电路的中点电位不平衡，从而既避免了单独半母线负载下平衡中点时，增加的全母线负载的额外功耗损失浪费，又避免了全母线负载因母线电压较高需选择耐压性能较高的功率器件导致的成本高的问题，可以降低功耗损失及硬件成本。
附图说明
图1为相关技术中三电平PFC电路应用于空调器的示意图之一；
图2为相关技术中三电平PFC电路应用于空调器的示意图之二；
图3为本申请实施例电子设备的控制方法的流程示意图；
图4为本申请一应用示例空调器连接三电平PFC电路的结构示意图；
图5为图4所示的空调器的开机逻辑示意图；
图6为图4所示的空调器的关机逻辑示意图；
图7为图4所示的空调器的运行逻辑示意图；
图8为本申请另一应用示例空调器连接三电平PFC电路的结构示意图；
图9为图8所示的空调器的开机逻辑示意图；
图10为图8所示的空调器的关机逻辑示意图；
图11为图8所示的空调器的运行逻辑示意图；
图12为本申请实施例电子设备的控制装置的结构示意图；
图13为本申请实施例电子设备的结构示意图。
具体实施方式
下面结合附图及实施例对本申请再作进一步详细的描述。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请。
在对本申请实施例的控制方法进行说明之前，先对本申请实施例涉及的三电平PFC电路进行示例性说明。
如图1及图2所示，基于VIENNA(维也纳)的三电平PFC电路包括：三个PFC电感L1至 L3、六个整流二极管D1至D6、六个功率器件T1至T6和两个半母线电容C1、C2(即两级电解电容)；该三个PFC电感连接三相电源，用于对所述三相电源进行滤波处理；六个整流二极管D1至D6对滤波后的三相电源进行整流处理，再由三路成对设置的功率器件进行功率因数校正处理；其中，半母线电容C1与C2之间的连接点作为中性点O。
针对上述三电平PFC电路，定义如下术语：
全母线，指在采用两级电解电容串联的高压直流母线滤波电路中，两级电解电容串联的正负母线之间的线路；
半母线，指在采用两级电解电容串联的高压直流母线滤波电路中，两级电解电容串联的中点到负母线之间为下半母线，两级电解电容串联的中点与正母线之间为上半母线，上半母线和下半母线都是半母线；
中点电位，两级电解电容的中点相对于电容地的电压，即中性点O到接地点之间的电压。
需要说明的是，三电平PFC电路以中性点O的电平为基准，存在上半母线电压Upo和下半母线电压Uon。三电平PFC电路可以连接全母线负载和半母线负载。其中，全母线负载为连接于正母线与负母线之间的负载，即接入至全母线上的负载，半母线负载为连接于两级电解电容中任一个电容两端的负载，半母线负载分为对应于上半母线的第一负载(即上半母线负载)和对应于下半母线的第二负载(即下半母线负载)。
本申请实施例提供了一种电子设备的控制方法，该电子设备包括：布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对，每组半母线负载对均包括由上半母线供电的第一负载和由下半母线供电的第二负载。需要说明的是，每组半母线负载对的第一负载和第二负载功率相等，即成对的上、下半母线负载等功率设计。如图3所示，该方法包括：
步骤301，获取上半母线的第一电压值和下半母线的第二电压值。
这里，电子设备可以基于电压检测电路获取上半母线的第一电压值(即上半母线电压Upo)和下半母线的第二电压值(即下半母线电压Uon)。
步骤302，在电子设备的开机阶段、关机阶段及运行阶段中的至少之一，基于第一电压值和第二电压值，对目标半母线负载对的第一负载和第二负载进行控制，进而调节三电平PFC电路的中点电位。
这里，目标半母线负载对可以为前述的布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对中的至少一对。只要能够基于选择的半母线负载对中的第一负载(对应于上半母线)和第二负载(对应于下半母线)，实现三电平PFC电路的中点电位的调节即可。
可以理解的是，本申请实施例的控制方法，在电子设备的开机阶段、关机阶段及运行阶段中的至少之一，基于第一电压值和第二电压值，对目标半母线负载对的第一负载和第二负载进行控制，进而调节三电平PFC电路的中点电位，有效抑制了三电平FPC电路的中点电位不平衡，从而既避免了单独半母线负载下平衡中点时，增加的全母线负载的额外功耗损失浪费，又避免了全母线负载因母线电压较高需选择耐压性能较高的功率器件导致的成本高的问题，可以降低功耗损失及硬件成本。
下面分别对前述的开机阶段、关机阶段和运行阶段的控制过程进行示例性说明。
示例性地，若电子设备处于开机阶段，基于第一电压值和第二电压值，对目标半母线负载对的第一负载和第二负载进行控制，包括：
若确定第一电压值与第二电压值的差值绝对值大于第一设定阈值，则基于第一电压值和第二电压值的大小关系，驱动目标半母线负载对的第一负载和第二负载中的一个运行，直至第一电压值与第二电压值的差值绝对值小于或等于第二设定阈值；其中，第二设定阈值小于或等于第一设定阈值。
这里，第一设定阈值可以理解为判定中点电位是否偏离正常的基准阈值，其可以基于三电平PFC电路的耐压性能进行确定，若第一电压值与第二电压值的差值绝对值大于第一设定阈值，则判定需要进行中点电位平衡调节，进而基于第一电压值和第二电压值的大小关系，驱动目标半母线负载对的第一负载和第二负载中的一个运行。该第二设定阈值可以为小于或等于第一设定阈值的数值，如此，可以使得平衡调节后的中点电位的偏离值更小，即中点电位更平衡。
示例性地，基于第一电压值和第二电压值的大小关系，驱动目标半母线负载对的第一负载和第 二负载中的一个运行，包括：
若确定第一电压值大于第二电压值，则驱动目标半母线负载对的第一负载运行；
若确定第一电压值小于第二电压值，则驱动目标半母线负载对的第二负载运行。
可以理解的是，在开机阶段确定需要进行中点电位平衡调节时，若上半母线电压Upo大于下半母线电压Uon，则驱动目标半母线负载对的第一负载运行，此时，相应的第二负载不运行，可以有效降低上半母线的电压，进而抑制中点电位的不平衡；若上半母线电压Upo小于下半母线电压Uon，则驱动目标半母线负载对的第二负载运行，此时，相应的第一负载不运行，可以有效降低下半母线的电压，进而抑制中点电位的不平衡。
在一些实施例中，若电子设备处于开机阶段，该控制方法还包括：
若确定第一电压值与第二电压值的差值绝对值小于或等于第一设定阈值，或者，驱动目标半母线负载对的第一负载和第二负载中的一个运行之后的第一电压值与第二电压值的差值绝对值小于或等于第二设定阈值，则驱动目标半母线负载对的第一负载和第二负载同步运行，并在三电平PFC电路的输入电流值大于或等于第三设定阈值后，开启三电平PFC电路的PFC模块及驱动电子设备的余下负载运行。
可以理解的是，若初始获取的第一电压值与第二电压值的差值绝对值小于或等于第一设定阈值，或者，经上述的平衡调节之后的第一电压值与第二电压值的差值绝对值小于或等于第二设定阈值，则判定中点电位正常，驱动目标半母线负载对的第一负载和第二负载同步运行，并在三电平PFC电路的输入电流值大于或等于第三设定阈值后，开启三电平PFC电路的PFC模块及驱动电子设备的余下负载运行。
需要说明的是，开启三电平PFC电路的PFC模块后，则可以基于功率器件的导通控制，实现中点电位的平衡调节。其中，第三设定阈值可以理解为判定三电平PFC电路的PFC模块是否需要启动的电流阈值。三电平PFC电路的输入电流值可以基于电流采样电路获取，例如，可以基于各相线上采集的相电流值得到，或者经母线上采集的母线电流得到，本申请实施例对此不做限定。
示例性地，若电子设备处于关机阶段，基于第一电压值和第二电压值，对目标半母线负载对的第一负载和第二负载进行控制，包括：
关闭电子设备除目标半母线负载对之外的负载；
若确定三电平PFC电路的输入电流值小于第三设定阈值，则关闭三电平PFC电路的PFC模块，并在第一电压值和第二电压值的差值绝对值大于第一设定阈值时，基于第一电压值和第二电压值的大小关系，驱动目标半母线负载对的第一负载和第二负载中的一个运行，直至第一电压值与第二电压值的差值绝对值小于或等于第二设定阈值；其中，第二设定阈值小于或等于第一设定阈值。
可以理解的是，在关机阶段，通过上述控制，可以有效抑制中点电位的不平衡。其中，在关闭PFC模块后，若第一电压值和第二电压值的差值绝对值大于第一设定阈值，则判定需要进行中点电位平衡调节，进而基于第一电压值和第二电压值的大小关系，驱动目标半母线负载对的第一负载和第二负载中的一个运行。
示例性地，基于第一电压值和第二电压值的大小关系，驱动目标半母线负载对的第一负载和第二负载中的一个运行，包括：
若确定第一电压值大于第二电压值，则驱动目标半母线负载对的第一负载运行；
若确定第一电压值小于第二电压值，则驱动目标半母线负载对的第二负载运行。
可以理解的是，在关机阶段确定需要进行中点电位平衡调节时，若上半母线电压Upo大于下半母线电压Uon，则驱动目标半母线负载对的第一负载运行，此时，相应的第二负载不运行，可以有效降低上半母线的电压，进而抑制中点电位的不平衡；若上半母线电压Upo小于下半母线电压Uon，则驱动目标半母线负载对的第二负载运行，此时，相应的第一负载不运行，可以有效降低下半母线的电压，进而抑制中点电位的不平衡。
在一些实施例中，若电子设备处于关机阶段，该控制方法还包括：
若确定三电平PFC电路的输入电流值大于或等于第三设定阈值，则关闭三电平PFC电路的PFC模块以及同步关闭目标半母线负载对的第一负载和第二负载；或者，
若确定第一电压值与第二电压值的差值绝对值小于或等于第一设定阈值，或者，驱动目标半母 线负载对的第一负载和第二负载中的一个运行之后的第一电压值与第二电压值的差值绝对值小于或等于第二设定阈值，则同步关闭目标半母线负载对的第一负载和第二负载。
需要说明的是，关闭电子设备除目标半母线负载对之外的负载后，若确定三电平PFC电路的输入电流值大于或等于第三设定阈值，则可以同时关闭PFC模块以及目标半母线负载对的第一负载和第二负载，如此，由于目标半母线负载对跟随PFC电路一并关闭，不会造成中点电位的不平衡，能够有效避免电子设备下次开机运行时的中点电位不平衡。同理，若在关机阶段获取的第一电压值与第二电压值的差值绝对值小于或等于第一设定阈值，或者，经上述的平衡调节之后的第一电压值与第二电压值的差值绝对值小于或等于第二设定阈值，则判定中点电位正常，可以同步关闭目标半母线负载对的第一负载和第二负载。
示例性地，若电子设备处于运行阶段，基于第一电压值和第二电压值，对目标半母线负载对的第一负载和第二负载进行控制，包括：
若确定第一电压值与第二电压值的差值绝对值大于第一设定阈值，则基于第一电压值和第二电压值的大小关系，调节目标半母线负载对的第一负载和/或第二负载的运行功率，直至第一电压值与第二电压值的差值绝对值小于或等于第二设定阈值；其中，第二设定阈值小于或等于第一设定阈值。
可以理解的是，电子设备运行阶段，若第一电压值与第二电压值的差值绝对值大于第一设定阈值，则判定需要进行中点电位平衡调节，进而基于第一电压值和第二电压值的大小关系，调节目标半母线负载对的第一负载和/或第二负载的运行功率，实现中点电位平衡调节，直至第一电压值与第二电压值的差值绝对值小于或等于第二设定阈值。
示例性地，基于第一电压值和第二电压值的大小关系，调节目标半母线负载对的第一负载和/或第二负载的运行功率，包括：
若确定第一电压值大于第二电压值，则调低目标半母线负载对的第二负载的运行功率和/或调高目标半母线负载对的第一负载的运行功率；
若确定第一电压值小于第二电压值，则调低目标半母线负载对的第一负载的运行功率和/或调高目标半母线负载对的第二负载的运行功率。
可以理解的是，在运行阶段确定需要进行中点电位平衡调节时，若上半母线电压Upo大于下半母线电压Uon，则可以调低目标半母线负载对的第二负载的运行功率和/或调高目标半母线负载对的第一负载的运行功率，从而可以相对地降低上半母线的电压，进而抑制中点电位的不平衡；若上半母线电压Upo小于下半母线电压Uon，则可以调低目标半母线负载对的第一负载的运行功率和/或调高目标半母线负载对的第二负载的运行功率，从而可以相对地降低下半母线的电压，进而抑制中点电位的不平衡。
示例性地，在运行阶段若确定不需要进行中点电位平衡调节，例如，确定第一电压值与第二电压值的差值绝对值小于或等于第二设定阈值，则驱动目标半母线负载对的第一负载和第二负载等功效运行。
下面结合应用示例对本申请实施例电子设备的控制方法进行举例说明。
应用示例一
本应用示例中，电子设备为空调器，如图4所示，空调器包括布置于三电平PFC电路的全母线上的压缩机COMP及布置于上半母线的风机FM1和下半母线的风机FM2。其中，压缩机COMP由智能功率模块IPM2驱动，风机FM1由智能功率模块IPM1驱动，风机FM2由智能功率模块IPM3驱动。
这里，压缩机COMP的驱动电机可以是单相异步电机、感应电机、三相无刷直流电机、三相永磁同步电机、同步磁阻电机、开关磁阻电机中的任意一种；风机FM1和FM2的驱动电机可以是单相异步电机、感应电机、有刷直流电机、单相无刷直流电机、三相无刷直流电机、三相永磁同步电机、同步磁阻电机、开关磁阻电机中的任意一种。
参照图5，在开机阶段，空调器的控制方法包括：
步骤501，判断是否上下半母线压差|Upo-Uon|≤V1，若否，则执行步骤502；若是，则执行步骤506。
这里，空调器先检测上半母线电压Upo和下半母线电压Uon，判断是否上下半母线压差绝对值|Upo-Uon|≤V1，其中，V1即前述的第一设定阈值，若否，则判定需要进行中点电位平衡调节，执行步骤502；若是，则执行步骤506。
步骤502，判断是否上下半母线压差Upo-Uon>0，若否，则执行步骤503；若是，则执行步骤504。
步骤503，驱动IPM3，运行风机FM2。
此处，上半母线电压Upo小于下半母线电压Uon，单独驱动智能功率模块IPM3，进而运行下半母线的风机FM2以降低下半母线电压。
步骤504，驱动IPM1，运行风机FM1。
此处，上半母线电压Upo大于下半母线电压Uon，单独驱动智能功率模块IPM1，进而运行上半母线的风机FM1以降低上半母线电压。
步骤505，判断是否上下半母线压差|Upo-Uon|≤V2，若否，则返回步骤502；若是，则执行步骤506。
这里，V2即前述的第二设定阈值，若上下半母线压差|Upo-Uon|≤V2，则表明中点电位恢复平衡，执行步骤506，否则，返回步骤502，以继续进行中点电位平衡控制。
步骤506，同时驱动IPM1&IPM3，同步运行FM1&FM2。
这里，同时驱动智能功率模块IPM1和IPM3，使得风机FM1和FM2同步运行。
步骤507，判断是否输入电流Iin≥I1，若否，则返回步骤506；若是，则执行步骤508。
这里，在上下半母线的负载同步工作之后，获取三电平PFC电路的输入电流Iin，判断是否输入电流Iin≥I1，其中，I1即前述的第三设定阈值，若否，则继续同步运行风机FM1和FM2，直到输入电流Iin≥I1，并执行步骤508。
步骤508，开启三电平维也纳PFC。
步骤509，驱动IPM2运行COMP。
可以理解的是，开启三电平维也纳PFC之后，即开启PFC模块后，可以控制智能功率模块IPM2带动作为全母线负载的压缩机COMP运行。
参照图6，在关机阶段，空调器的控制方法包括：
步骤601，关闭IPM2，停止COMP。
这里，空调器先关闭智能功率模块IPM2，进而停止压缩机COMP。
步骤602，等待S秒后，判断是否输入电流Iin<I1，若否，则执行步骤603；若是，则执行步骤604。
示例性地，在停止压缩机COMP设定时长S秒之后，可以获取输入电流Iin，判断是否输入电流Iin<I1，若否，则执行步骤603；若是，则执行步骤604。
步骤603，关闭三电平维也纳PFC，同时关闭IPM1&IPM3，同步停止FM1&FM2。
这里，可以关闭三电平维也纳PFC，并同时关闭智能功率模块IPM1和IPM3，同步停止风机FM1和FM2，从而实现关机。
步骤604，关闭三电平维也纳PFC。
步骤605，判断是否上下半母线压差|Upo-Uon|≤V1，若否，则执行步骤606；若是，则执行步骤610。
此时，空调器在关闭三电平维也纳PFC之后，还需要判断是否上下半母线压差绝对值|Upo-Uon|≤V1，若否，则判定需要进行中点电位平衡调节，执行步骤606；若是，则执行步骤610。
步骤606，判断是否上下半母线压差Upo-Uon>0，若否，则执行步骤607；若是，则执行步骤608。
步骤607，驱动IPM3，运行风机FM2。
此处，上半母线电压Upo小于下半母线电压Uon，单独驱动智能功率模块IPM3，进而运行下半母线的风机FM2以降低下半母线电压。
步骤608，驱动IPM1，运行风机FM1。
此处，上半母线电压Upo大于下半母线电压Uon，单独驱动智能功率模块IPM1，进而运行上 半母线的风机FM1以降低上半母线电压。
步骤609，判断是否上下半母线压差|Upo-Uon|≤V2，若否，则返回步骤606；若是，则执行步骤610。
这里，若上下半母线压差|Upo-Uon|≤V2，则表明中点电位恢复平衡，执行步骤610，否则，返回步骤606，以继续进行中点电位平衡控制。
步骤610，同时关闭IPM1&IPM3，同步停止FM1&FM2。
这里，在中点电位平衡之后，同时关闭智能功率模块IPM1和IPM3，同步停止风机FM1和FM2，从而实现关机。
参照图7，在运行阶段，空调器的控制方法包括：
步骤701，判断是否上下半母线压差|Upo-Uon|≤V1，若是，则执行步骤702；若否，则执行步骤703。
这里，空调器在运行阶段，可以周期性地检测上半母线电压Upo和下半母线电压Uon，判断是否上下半母线压差绝对值|Upo-Uon|≤V1，若是，则表明中点电位正常，执行步骤702；若否，则判定需要进行中点电位平衡调节，执行步骤703。
步骤702，同时驱动IPM1&IPM3相同功率运行FM1&FM2，同时驱动IPM2运行COMP。
这里，同时驱动智能功率模块IPM1和IPM3，控制风机FM1和FM2以相同功率运行，并同时驱动智能功率模块IPM2带动压缩机COMP运行。
步骤703，判断是否上下半母线压差Upo-Uon>0，若否，则执行步骤704；若是，则执行步骤705。
步骤704，驱动IPM1，减小风机FM1运行功率。
此处，上半母线电压Upo小于下半母线电压Uon，驱动智能功率模块IPM1，减小风机FM1运行功率，从而可以相对地降低下半母线电压。
步骤705，驱动IPM3，减小风机FM2运行功率。
此处，上半母线电压Upo大于下半母线电压Uon，驱动智能功率模块IPM3，减小风机FM2运行功率，从而可以相对地降低上半母线电压。
步骤706，判断是否上下半母线压差|Upo-Uon|≤V2，若否，则返回步骤703；若是，则执行步骤707。
这里，若上下半母线压差|Upo-Uon|≤V2，则表明中点电位恢复平衡，执行步骤707，否则，返回步骤703，以继续进行中点电位平衡控制。
步骤707，同时驱动IPM1&IPM3相同功率运行FM1&FM2。
这里，在中点电位恢复平衡后，可以同时驱动智能功率模块IPM1和IPM3，控制风机FM1和FM2以相同功率运行。
应用示例二
本应用示例中，电子设备为空调器，如图8所示，空调器包括两组半母线负载对，其中，压缩机COMP1和COMP2构成一组，风机FM1和FM2构成另一组，风机FM1由智能功率模块IPM1驱动，压缩机COMP1由智能功率模块IPM2驱动，风机FM2由智能功率模块IPM3驱动，压缩机COMP2由智能功率模块IPM4驱动。
参照图9，在开机阶段，空调器的控制方法包括：
步骤901，判断是否上下半母线压差|Upo-Uon|≤V1，若否，则执行步骤902；若是，则执行步骤906。
这里，空调器先检测上半母线电压Upo和下半母线电压Uon，判断是否上下半母线压差绝对值|Upo-Uon|≤V1，其中，V1即前述的第一设定阈值，若否，则判定需要进行中点电位平衡调节，执行步骤902；若是，则执行步骤906。
步骤902，判断是否上下半母线压差Upo-Uon>0，若否，则执行步骤903；若是，则执行步骤904。
步骤903，驱动IPM3，运行风机FM2。
此处，上半母线电压Upo小于下半母线电压Uon，单独驱动智能功率模块IPM3，进而运行下 半母线的风机FM2以降低下半母线电压。
步骤904，驱动IPM1，运行风机FM1。
此处，上半母线电压Upo大于下半母线电压Uon，单独驱动智能功率模块IPM1，进而运行上半母线的风机FM1以降低上半母线电压。
步骤905，判断是否上下半母线压差|Upo-Uon|≤V2，若否，则返回步骤902；若是，则执行步骤906。
这里，V2即前述的第二设定阈值，若上下半母线压差|Upo-Uon|≤V2，则表明中点电位恢复平衡，执行步骤906，否则，返回步骤902，以继续进行中点电位平衡控制。
步骤906，同时驱动IPM1&IPM3，同步运行FM1&FM2。
这里，同时驱动智能功率模块IPM1和IPM3，使得风机FM1和FM2同步运行。
步骤907，判断是否输入电流Iin≥I1，若否，则返回步骤906；若是，则执行步骤908。
这里，在上下半母线的负载同步工作之后，获取三电平PFC电路的输入电流Iin，判断是否输入电流Iin≥I1，其中，I1即前述的第三设定阈值，若否，则继续同步运行风机FM1和FM2，直到输入电流Iin≥I1，并执行步骤908。
步骤908，开启三电平维也纳PFC。
步骤909，同时驱动IPM2&IPM4，同步运行COMP1&COMP2。
可以理解的是，开启三电平维也纳PFC之后，即开启PFC模块后，可以控制智能功率模块IPM2、IPM4，带动作为半母线负载的压缩机COMP1和COMP2同步运行。
参照图10，在关机阶段，空调器的控制方法包括：
步骤1001，关闭IPM2&IPM4，同步停止COMP1&COMP2。
这里，空调器先关闭智能功率模块IPM2和IPM4，进而停止压缩机COMP1和COMP2。
步骤1002，等待S秒后，判断是否输入电流Iin<I1，若否，则执行步骤1003；若是，则执行步骤1004。
示例性地，在停止压缩机COMP1和COMP2设定时长S秒之后，可以获取输入电流Iin，判断是否输入电流Iin<I1，若否，则执行步骤1003；若是，则执行步骤1004。
步骤1003，关闭三电平维也纳PFC，同时关闭IPM1&IPM3，同步停止FM1&FM2。
这里，可以关闭三电平维也纳PFC，并同时关闭智能功率模块IPM1和IPM3，同步停止风机FM1和FM2，从而实现关机。
步骤1004，关闭三电平维也纳PFC。
步骤1005，判断是否上下半母线压差|Upo-Uon|≤V1，若否，则执行步骤1006；若是，则执行步骤1010。
此时，空调器在关闭三电平维也纳PFC之后，还需要判断是否上下半母线压差绝对值|Upo-Uon|≤V1，若否，则判定需要进行中点电位平衡调节，执行步骤1006；若是，则执行步骤1010。
步骤1006，判断是否上下半母线压差Upo-Uon>0，若否，则执行步骤1007；若是，则执行步骤1008。
步骤1007，驱动IPM3，运行风机FM2。
此处，上半母线电压Upo小于下半母线电压Uon，单独驱动智能功率模块IPM3，进而运行下半母线的风机FM2以降低下半母线电压。
步骤1008，驱动IPM1，运行风机FM1。
此处，上半母线电压Upo大于下半母线电压Uon，单独驱动智能功率模块IPM1，进而运行上半母线的风机FM1以降低上半母线电压。
步骤1009，判断是否上下半母线压差|Upo-Uon|≤V2，若否，则返回步骤1006；若是，则执行步骤1010。
这里，若上下半母线压差|Upo-Uon|≤V2，则表明中点电位恢复平衡，执行步骤1010，否则，返回步骤1006，以继续进行中点电位平衡控制。
步骤1010，同时关闭IPM1&IPM3，同步停止FM1&FM2。
这里，在中点电位平衡之后，同时关闭智能功率模块IPM1和IPM3，同步停止风机FM1和 FM2，从而实现关机。
参照图11，在运行阶段，空调器的控制方法包括：
步骤1101，判断是否上下半母线压差|Upo-Uon|≤V1，若是，则执行步骤1102；若否，则执行步骤1107。
空调器在运行阶段，可以周期性地检测上半母线电压Upo和下半母线电压Uon，判断是否上下半母线压差绝对值|Upo-Uon|≤V1，若是，则表明中点电位正常，优选地，还可以基于风机FM1和FM2实现上下半母线电压无压差控制；若否，选择压缩机COMP1和COMP2作为目标半母线负载对，进行中点电位平衡调节。
步骤1102，判断是否上下半母线压差Upo-Uon>0，若否，则执行步骤1103；若是，则执行步骤1104。
步骤1103，驱动IPM1，减小风机FM1运行功率。
此处，上半母线电压Upo小于下半母线电压Uon，驱动智能功率模块IPM1，减小风机FM1运行功率，从而可以相对地降低下半母线电压。
步骤1104，驱动IPM3，减小风机FM2运行功率。
此处，上半母线电压Upo大于下半母线电压Uon，驱动智能功率模块IPM3，减小风机FM2运行功率，从而可以相对地降低上半母线电压。
步骤1105，判断是否上下半母线压差|Upo-Uon|≤V2，若否，则返回步骤1102；若是，则执行步骤1106。
这里，若上下半母线压差|Upo-Uon|≤V2，则表明中点电位达到平衡控制要求，执行步骤1106，否则，返回步骤1102，以继续进行中点电位平衡控制。
步骤1106，同时驱动IPM1&IPM3相同功率运行FM1&FM2。
这里，在中点电位达到平衡控制要求后，可以同时驱动智能功率模块IPM1和IPM3，控制风机FM1和FM2以相同功率运行。
步骤1107，判断是否上下半母线压差Upo-Uon>0，若否，则执行步骤1108；若是，则执行步骤1109。
步骤1108，驱动IPM2，减小COMP1运行功率。
此处，上半母线电压Upo小于下半母线电压Uon，驱动智能功率模块IPM2，减小压缩机COMP1运行功率，从而可以相对地降低下半母线电压。
步骤1109，驱动IPM4，减小COMP2运行功率。
此处，上半母线电压Upo大于下半母线电压Uon，驱动智能功率模块IPM4，减小压缩机COMP2运行功率，从而可以相对地降低上半母线电压。
步骤1110，判断是否上下半母线压差|Upo-Uon|≤V2，若否，则返回步骤1107；若是，则执行步骤1111。
这里，若上下半母线压差|Upo-Uon|≤V2，则表明中点电位达到平衡控制要求，执行步骤1111，否则，返回步骤1107，以继续进行中点电位平衡控制。
步骤1111，同时驱动IPM2&IPM4相同功率运行COMP1&COMP2。
这里，在中点电位达到平衡控制要求后，可以同时驱动智能功率模块IPM2和IPM4，控制压缩机COMP1和COMP2以相同功率运行。
为了实现本申请实施例的方法，本申请实施例还提供一种电子设备的控制装置，该电子设备的控制装置与上述电子设备的控制方法对应，上述电子设备的控制方法实施例中的各步骤也完全适用于本电子设备的控制装置实施例。
如图12所示，该电子设备的控制装置包括：获取模块1201和控制模块1202。获取模块1201配置为获取所述上半母线的第一电压值和所述下半母线的第二电压值；控制模块1202配置为在所述电子设备的开机阶段、关机阶段及运行阶段中的至少之一，基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，进而调节所述三电平PFC电路的中点电位。
在一些实施例中，若所述电子设备处于开机阶段，控制模块1202具体配置为：
若确定所述第一电压值与所述第二电压值的差值绝对值大于第一设定阈值，则基于所述第一电压值和所述第二电压值的大小关系，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行，直至所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值；
其中，所述第二设定阈值小于或等于所述第一设定阈值。
在一些实施例中，控制模块1202基于所述第一电压值和所述第二电压值的大小关系，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行，包括：
若确定所述第一电压值大于所述第二电压值，则驱动目标半母线负载对的所述第一负载运行；
若确定所述第一电压值小于所述第二电压值，则驱动目标半母线负载对的所述第二负载运行。
在一些实施例中，若所述电子设备处于开机阶段，控制模块1202还配置为：
若确定所述第一电压值与所述第二电压值的差值绝对值小于或等于所述第一设定阈值，或者，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行之后的所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值，则驱动目标半母线负载对的所述第一负载和所述第二负载同步运行，并在所述三电平PFC电路的输入电流值大于或等于第三设定阈值后，开启所述三电平PFC电路的PFC模块及驱动所述电子设备的余下负载运行。
在一些实施例中，若所述电子设备处于关机阶段，控制模块1202具体配置为：
关闭所述电子设备除所述目标半母线负载对之外的负载；
若确定所述三电平PFC电路的输入电流值小于第三设定阈值，则关闭所述三电平PFC电路的PFC模块，并在所述第一电压值和所述第二电压值的差值绝对值大于第一设定阈值时，基于所述第一电压值和所述第二电压值的大小关系，驱动所述目标半母线负载对的所述第一负载和所述第二负载中的一个运行，直至所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值；
其中，所述第二设定阈值小于或等于所述第一设定阈值。
在一些实施例中，控制模块1202基于所述第一电压值和所述第二电压值的大小关系，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行，包括：
若确定所述第一电压值大于所述第二电压值，则驱动目标半母线负载对的所述第一负载运行；
若确定所述第一电压值小于所述第二电压值，则驱动目标半母线负载对的所述第二负载运行。
在一些实施方案中，若所述电子设备处于关机阶段，控制模块1202还配置为：
若确定所述三电平PFC电路的输入电流值大于或等于第三设定阈值，则关闭所述三电平PFC电路的PFC模块以及同步关闭所述目标半母线负载对的所述第一负载和所述第二负载；或者，
若确定所述第一电压值与所述第二电压值的差值绝对值小于或等于所述第一设定阈值，或者，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行之后的所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值，则同步关闭所述目标半母线负载对的所述第一负载和所述第二负载。
在一些实施例中，若所述电子设备处于运行阶段，控制模块1202具体配置为：
若确定所述第一电压值与所述第二电压值的差值绝对值大于第一设定阈值，则基于所述第一电压值和所述第二电压值的大小关系，调节目标半母线负载对的所述第一负载和/或所述第二负载的运行功率，直至所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值；
其中，所述第二设定阈值小于或等于所述第一设定阈值。
在一些实施例中，控制模块1202基于所述第一电压值和所述第二电压值的大小关系，调节目标半母线负载对的所述第一负载和/或所述第二负载的运行功率，包括：
若确定所述第一电压值大于所述第二电压值，则调低目标半母线负载对的所述第二负载的运行功率和/或调高目标半母线负载对的所述第一负载的运行功率；
若确定所述第一电压值小于所述第二电压值，则调低目标半母线负载对的所述第一负载的运行功率和/或调高目标半母线负载对的所述第二负载的运行功率。
实际应用时，获取模块1201和控制模块1202，可以由电子设备的处理器来实现。当然，处理器需要运行存储器中的计算机程序来实现它的功能。
需要说明的是：上述实施例提供的电子设备的控制装置在进行电子设备控制时，仅以上述各程 序模块的划分进行举例说明，实际应用中，可以根据需要而将上述处理分配由不同的程序模块完成，即将装置的内部结构划分成不同的程序模块，以完成以上描述的全部或者部分处理。另外，上述实施例提供的电子设备的控制装置与电子设备的控制方法实施例属于同一构思，其具体实现过程详见方法实施例，这里不再赘述。
基于上述程序模块的硬件实现，且为了实现本申请实施例的方法，本申请实施例还提供一种电子设备。图13仅仅示出了该电子设备的示例性结构而非全部结构，根据需要可以实施图13示出的部分结构或全部结构。
如图13所示，本申请实施例提供的电子设备1300包括：至少一个处理器1301、存储器1302和用户接口1303。电子设备1300中的各个组件通过总线系统1304耦合在一起。可以理解，总线系统1304用于实现这些组件之间的连接通信。总线系统1304除包括数据总线之外，还包括电源总线、控制总线和状态信号总线。但是为了清楚说明起见，在图13中将各种总线都标为总线系统1304。
其中，用户接口1303可以包括显示器、键盘、鼠标、轨迹球、点击轮、按键、按钮、触感板或者触摸屏等。
本申请实施例中的存储器1302用于存储各种类型的数据以支持电子设备的操作。这些数据的示例包括：用于在电子设备上操作的任何计算机程序。
本申请实施例揭示的电子设备的控制方法可以应用于处理器1301中，或者由处理器1301实现。处理器1301可能是一种集成电路芯片，具有信号的处理能力。在实现过程中，电子设备的控制方法的各步骤可以通过处理器1301中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器1301可以是通用处理器、数字信号处理器(DSP，Digital Signal Processor)，或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。处理器1301可以实现或者执行本申请实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者任何常规的处理器等。结合本申请实施例所公开的方法的步骤，可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于存储介质中，该存储介质位于存储器1302，处理器1301读取存储器1302中的信息，结合其硬件完成本申请实施例提供的电子设备的控制方法的步骤。
在示例性实施例中，电子设备可以被一个或多个应用专用集成电路(ASIC，Application Specific Integrated Circuit)、DSP、可编程逻辑器件(PLD，Programmable Logic Device)、复杂可编程逻辑器件(CPLD，Complex Programmable Logic Device)、现场可编程逻辑门阵列(FPGA，Field Programmable Gate Array)、通用处理器、控制器、微控制器(MCU，Micro Controller Unit)、微处理器(Microprocessor)、或者其他电子元件实现，用于执行前述方法。
可以理解，存储器1302可以是易失性存储器或非易失性存储器，也可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(ROM，Read Only Memory)、可编程只读存储器(PROM，Programmable Read-Only Memory)、可擦除可编程只读存储器(EPROM，Erasable Programmable Read-Only Memory)、电可擦除可编程只读存储器(EEPROM，Electrically Erasable Programmable Read-Only Memory)、磁性随机存取存储器(FRAM，ferromagnetic random access memory)、快闪存储器(Flash Memory)、磁表面存储器、光盘、或只读光盘(CD-ROM，Compact Disc Read-Only Memory)；磁表面存储器可以是磁盘存储器或磁带存储器。易失性存储器可以是随机存取存储器(RAM，Random Access Memory)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(SRAM，Static Random Access Memory)、同步静态随机存取存储器(SSRAM，Synchronous Static Random Access Memory)、动态随机存取存储器(DRAM，Dynamic Random Access Memory)、同步动态随机存取存储器(SDRAM，Synchronous Dynamic Random Access Memory)、双倍数据速率同步动态随机存取存储器(DDRSDRAM，Double Data Rate Synchronous Dynamic Random Access Memory)、增强型同步动态随机存取存储器(ESDRAM，Enhanced Synchronous Dynamic Random Access Memory)、同步连接动态随机存取存储器(SLDRAM，SyncLink Dynamic Random Access Memory)、直接内存总线随机存取存储器(DRRAM，Direct Rambus Random Access Memory)。本申请实施例描述的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
本申请实施例的电子设备可以为空调器。需要说明的是，本申请实施例的电子设备还可以为应用三电平PFC电路拓扑的其他设备，例如，包括但不限于：光伏发电设备、不间断电源(Uninterruptible Power Supply，UPS)、车载逆变器等电子产品。
在示例性实施例中，本申请实施例还提供了一种存储介质，即计算机存储介质，具体可以是计算机可读存储介质，例如包括存储计算机程序的存储器1302，上述计算机程序可由电子设备的处理器1301执行，以完成本申请实施例方法所述的步骤。计算机可读存储介质可以是ROM、PROM、EPROM、EEPROM、Flash Memory、磁表面存储器、光盘、或CD-ROM等存储器。
需要说明的是：“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
另外，本申请实施例所记载的技术方案之间，在不冲突的情况下，可以任意组合。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请披露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (14)

  1. 一种电子设备的控制方法，所述电子设备包括：布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对，每组半母线负载对均包括由所述上半母线供电的第一负载和由所述下半母线供电的第二负载，所述方法包括：
    获取所述上半母线的第一电压值和所述下半母线的第二电压值；
    在所述电子设备的开机阶段、关机阶段及运行阶段中的至少之一，基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，进而调节所述三电平PFC电路的中点电位。
  2. 根据权利要求1所述的方法，其中，若所述电子设备处于开机阶段，所述基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，包括：
    若确定所述第一电压值与所述第二电压值的差值绝对值大于第一设定阈值，则基于所述第一电压值和所述第二电压值的大小关系，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行，直至所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值；
    其中，所述第二设定阈值小于或等于所述第一设定阈值。
  3. 根据权利要求2所述的方法，其中，所述基于所述第一电压值和所述第二电压值的大小关系，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行，包括：
    若确定所述第一电压值大于所述第二电压值，则驱动目标半母线负载对的所述第一负载运行；
    若确定所述第一电压值小于所述第二电压值，则驱动目标半母线负载对的所述第二负载运行。
  4. 根据权利要求2所述的方法，其中，若所述电子设备处于开机阶段，所述方法还包括：
    若确定所述第一电压值与所述第二电压值的差值绝对值小于或等于所述第一设定阈值，或者，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行之后的所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值，则驱动目标半母线负载对的所述第一负载和所述第二负载同步运行，并在所述三电平PFC电路的输入电流值大于或等于第三设定阈值后，开启所述三电平PFC电路的PFC模块及驱动所述电子设备的余下负载运行。
  5. 根据权利要求1所述的方法，其中，若所述电子设备处于关机阶段，所述基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，包括：
    关闭所述电子设备除所述目标半母线负载对之外的负载；
    若确定所述三电平PFC电路的输入电流值小于第三设定阈值，则关闭所述三电平PFC电路的PFC模块，并在所述第一电压值和所述第二电压值的差值绝对值大于第一设定阈值时，基于所述第一电压值和所述第二电压值的大小关系，驱动所述目标半母线负载对的所述第一负载和所述第二 负载中的一个运行，直至所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值；
    其中，所述第二设定阈值小于或等于所述第一设定阈值。
  6. 根据权利要求5所述的方法，其中，所述基于所述第一电压值和所述第二电压值的大小关系，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行，包括：
    若确定所述第一电压值大于所述第二电压值，则驱动目标半母线负载对的所述第一负载运行；
    若确定所述第一电压值小于所述第二电压值，则驱动目标半母线负载对的所述第二负载运行。
  7. 根据权利要求5所述的方法，其中，若所述电子设备处于关机阶段，所述方法还包括：
    若确定所述三电平PFC电路的输入电流值大于或等于第三设定阈值，则关闭所述三电平PFC电路的PFC模块以及同步关闭所述目标半母线负载对的所述第一负载和所述第二负载；或者，
    若确定所述第一电压值与所述第二电压值的差值绝对值小于或等于所述第一设定阈值，或者，驱动目标半母线负载对的所述第一负载和所述第二负载中的一个运行之后的所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值，则同步关闭所述目标半母线负载对的所述第一负载和所述第二负载。
  8. 根据权利要求1所述的方法，其中，若所述电子设备处于运行阶段，所述基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，包括：
    若确定所述第一电压值与所述第二电压值的差值绝对值大于第一设定阈值，则基于所述第一电压值和所述第二电压值的大小关系，调节目标半母线负载对的所述第一负载和/或所述第二负载的运行功率，直至所述第一电压值与所述第二电压值的差值绝对值小于或等于第二设定阈值；
    其中，所述第二设定阈值小于或等于所述第一设定阈值。
  9. 根据权利要求8所述的方法，其中，所述基于所述第一电压值和所述第二电压值的大小关系，调节目标半母线负载对的所述第一负载和/或所述第二负载的运行功率，包括：
    若确定所述第一电压值大于所述第二电压值，则调低目标半母线负载对的所述第二负载的运行功率和/或调高目标半母线负载对的所述第一负载的运行功率；
    若确定所述第一电压值小于所述第二电压值，则调低目标半母线负载对的所述第一负载的运行功率和/或调高目标半母线负载对的所述第二负载的运行功率。
  10. 一种电子设备的控制装置，所述电子设备包括：布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对，每组半母线负载对均包括由所述上半母线供电的第一负载和由所述下半母线供电的第二负载，所述控制装置包括：
    获取模块，配置为获取所述上半母线的第一电压值和所述下半母线的第二电压值；
    控制模块，配置为在所述电子设备的开机阶段、关机阶段及运行阶段中的至少之一，基于所述第一电压值和所述第二电压值，对目标半母线负载对的所述第一负载和所述第二负载进行控制，进 而调节所述三电平PFC电路的中点电位。
  11. 一种电子设备，所述电子设备包括：布置于三电平PFC电路的上半母线和下半母线上的至少一组半母线负载对，每组半母线负载对均包括由所述上半母线供电的第一负载和由所述下半母线供电的第二负载，所述电子设备还包括：处理器和用于存储能够在处理器上运行的计算机程序的存储器，其中，
    所述处理器，配置为运行计算机程序时，执行权利要求1至9任一项所述方法的步骤。
  12. 根据权利要求11所述的电子设备，其中，所述电子设备为空调器，所述空调器包括布置于所述三电平PFC电路的全母线上的压缩机，所述半母线负载对的所述第一负载和所述第二负载为风机。
  13. 根据权利要求11所述的电子设备，其中，所述电子设备为空调器，所述至少一组半母线负载对包括：成对的半母线压缩机和成对的半母线风机。
  14. 一种存储介质，所述存储介质上存储有计算机程序，所述计算机程序被处理器执行时，实现权利要求1至9任一项所述方法的步骤。
PCT/CN2023/097871 2022-10-31 2023-06-01 电子设备及其控制方法、装置和存储介质 WO2024093227A1 (zh)

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