WO2024087737A1 - 掉电检测和供电保持功能电路及电子设备 - Google Patents

掉电检测和供电保持功能电路及电子设备 Download PDF

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Publication number
WO2024087737A1
WO2024087737A1 PCT/CN2023/106993 CN2023106993W WO2024087737A1 WO 2024087737 A1 WO2024087737 A1 WO 2024087737A1 CN 2023106993 W CN2023106993 W CN 2023106993W WO 2024087737 A1 WO2024087737 A1 WO 2024087737A1
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Prior art keywords
power
circuit
power supply
output
resistor
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PCT/CN2023/106993
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English (en)
French (fr)
Inventor
陈晓君
曹杰
陈小文
符兴东
朱钦炜
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深圳市汇川技术股份有限公司
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Publication of WO2024087737A1 publication Critical patent/WO2024087737A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/30Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • G06F1/305Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations in the event of power-supply fluctuations

Definitions

  • the present application relates to the technical field of electronic equipment, and in particular to a power failure detection and power supply holding function circuit and electronic equipment.
  • the main purpose of this application is to propose a power failure detection and power supply retention function circuit, aiming to solve the problem of poor stability of existing power failure storage solutions.
  • the power failure detection and power supply holding function circuit proposed in this application includes:
  • a power output terminal, the power output terminal is used to connect to a power load
  • a power supply holding control circuit wherein the input end of the power supply holding control circuit is connected to the output end of the energy storage circuit, the output end of the power supply holding control circuit is connected to the power supply output end, and the power supply holding control circuit is used to control the energy storage circuit to be electrically connected to the power supply output end when it is turned on;
  • An energy storage voltage detection circuit wherein the detection end of the energy storage voltage detection circuit is connected to the output end of the energy storage circuit, and the output end of the energy storage voltage detection circuit is connected to the controlled end of the power supply maintenance control circuit.
  • the energy storage voltage detection circuit is used to detect the output voltage of the energy storage circuit, and when the output voltage of the energy storage circuit is less than a first preset voltage, control the power supply maintenance control circuit to disconnect the electrical connection between the energy storage circuit and the power supply output end, so that the energy storage circuit stops supplying power to the electrical load.
  • the power failure detection and power supply holding function circuit further includes:
  • a power input terminal is connected to the power output terminal and is used to receive an input power supply
  • a power detection circuit wherein the detection end of the power detection circuit is connected to the power input end, and the output end of the power detection circuit is connected to the controlled end of the power supply maintenance control circuit.
  • the power detection circuit is used to detect the output voltage of the power input end, and when the output voltage of the power input end is greater than a second preset voltage, control the power supply maintenance control circuit to disconnect the electrical connection between the energy storage circuit and the power output end, so that the energy storage circuit stops supplying power to the electrical load.
  • the power supply detection circuit is also used to output a power supply maintenance signal to the power supply maintenance control circuit when the output voltage of the power supply input terminal is less than a second preset voltage, so that the power supply maintenance control circuit controls the energy storage circuit to be electrically connected to the power supply output terminal, so that the energy storage circuit supplies power to the electrical load.
  • the power supply end of the power detection circuit is connected to the power output end, and the power detection circuit is also used to output a power-off signal to the power supply maintenance control circuit when the power supply end loses power, so that the power supply maintenance control circuit controls the energy storage circuit to disconnect the electrical connection with the power output end, so that the energy storage circuit stops supplying power to the electrical load.
  • the power failure detection and power supply holding function circuit further includes:
  • a power conversion circuit wherein the input end of the power conversion circuit is connected to the power input end, the output end of the power conversion circuit is respectively connected to the power output end and the input end of the energy storage circuit, and the power conversion circuit is used to convert the input power into a supply voltage and then output it;
  • the power detection circuit has a first detection end and a second detection end, the first detection end of the power detection circuit is connected to the power input end, and the second detection end of the power detection circuit is connected to the output end of the power conversion circuit;
  • the power detection circuit is used to detect the output voltage of the power input terminal and the output voltage of the power conversion circuit, and when the output voltage of the power input terminal is less than a second preset voltage, and/or the output voltage of the power conversion circuit is less than a third preset voltage, output a power supply holding signal to the power supply holding control circuit, so that the power supply holding control circuit controls the energy storage circuit to be electrically connected to the power output terminal, so that the energy storage circuit supplies power to the electrical load.
  • the power detection circuit is also used to output a power-off signal to the power supply maintenance control circuit when the output voltage of the power input terminal is greater than a second preset voltage and the output voltage of the power conversion circuit is greater than a third preset voltage, so that the power supply maintenance control circuit controls the energy storage circuit to disconnect electrically from the power output terminal, so that the energy storage circuit stops supplying power to the electrical load.
  • the second preset voltage is greater than an undervoltage threshold of the power conversion circuit
  • the undervoltage threshold of the power conversion circuit is the minimum input voltage when the power conversion circuit works normally.
  • the power detection circuit includes:
  • a signal output circuit wherein an output end of the signal output circuit is connected to a controlled end of the power supply holding control circuit
  • a detection end of the first detection circuit is connected to the power input end, an output end of the first detection circuit is connected to a first controlled end of the signal output circuit, the first detection circuit is used to detect an output voltage of the power input end, and output a first power-off signal to the signal output circuit when the output voltage of the power input end is less than a second preset voltage, and output a first power-on signal to the signal output circuit when the output voltage of the power input end is greater than the second preset voltage;
  • a second detection circuit wherein the detection end of the second detection circuit is connected to the output end of the power conversion circuit, the output end of the second detection circuit is connected to the second controlled end of the signal output circuit, the second detection circuit is used to detect the output voltage of the power conversion circuit, and when the output voltage of the power conversion circuit is less than a third preset voltage, output a second power-off signal to the signal output circuit, and when the output voltage of the power conversion circuit is greater than the third preset voltage, output a second power-on signal to the signal output circuit;
  • the signal output circuit is used to output a power supply holding signal to the power supply holding control circuit when receiving the first power-off signal and/or the second power-off signal, so that the power supply holding control circuit controls the energy storage circuit to be electrically connected to the power supply output terminal, so that the energy storage circuit supplies power to the electrical load;
  • the signal output circuit is also used to output a power-off signal to the power supply maintenance control circuit when receiving the first power-on signal and the second power-on signal, so that the power supply maintenance control circuit controls the energy storage circuit to disconnect the electrical connection with the power supply output terminal, so that the energy storage circuit stops supplying power to the electrical load.
  • the first detection circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor and a first comparator
  • the first end of the first resistor is connected to the power input end
  • the second end of the first resistor is connected to the first end of the second resistor
  • the second end of the second resistor is grounded
  • the second end of the first resistor is also connected to the positive input end of the first comparator
  • the first end of the third resistor is grounded
  • the second end of the third resistor is connected to the first end of the fourth resistor
  • the second end of the fourth resistor is connected to the power output end
  • the common end of the third resistor and the fourth resistor is connected to the reverse input end of the first comparator
  • the power supply end of the first comparator is connected to the second end of the fourth resistor
  • the output end of the first comparator is connected to the first controlled end of the signal output circuit
  • the fifth resistor is arranged in parallel between the output
  • the second detection circuit includes an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor and a second comparator, the first end of the eighth resistor is connected to the output end of the power conversion circuit, the second end of the eighth resistor is connected to the first end of the ninth resistor, the second end of the ninth resistor is grounded, the second end of the eighth resistor is also connected to the positive input end of the second comparator, the first end of the tenth resistor is grounded, the second end of the tenth resistor is connected to the first end of the eleventh resistor, the second end of the eleventh resistor is connected to the power output end, the common end of the tenth resistor and the eleventh resistor is connected to the reverse input end of the second comparator, the output end of the second comparator is connected to the second controlled end of the signal output circuit, the first end of the twelfth resistor is connected to the power output end, the second comparator
  • the energy storage voltage detection circuit includes a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a third comparator and a third switch tube, the first end of the fourteenth resistor is connected to the output end of the energy storage circuit, the second end of the fourteenth resistor is connected to the first end of the fifteenth resistor, the second end of the fifteenth resistor is grounded, the inverting input end of the third comparator is connected to the second end of the fourteenth resistor, the output end of the third comparator is connected to the controlled end of the third switch tube, the first end of the sixteenth resistor is connected to the output end of the energy storage circuit, the second end of the sixteenth resistor is connected to the output end of the third comparator, the first end of the third switch tube is connected to the controlled end of the power supply holding control circuit, and the second end of the third switch tube is grounded.
  • the present application also proposes an electronic device, comprising a processor and the above-mentioned power failure detection and power supply holding function circuit; wherein,
  • the power supply end of the processor is connected to the power supply output end of the power failure detection and power supply holding function circuit.
  • the signal receiving end of the processor is also connected to the output end of the power detection circuit, and the processor is used to store data when receiving a power supply holding signal output by the power detection circuit.
  • the technical solution of the present application sets up an energy storage voltage detection circuit so that the energy storage voltage detection circuit can detect the output voltage of the energy storage circuit, and when the output voltage of the energy storage circuit is less than a first preset voltage, that is, after the subsequent load processor completes the power-off data storage, the power supply holding control circuit is controlled to disconnect the connection between the energy storage circuit and the power supply output terminal, so that the power supply voltage value of the subsequent load processor before powering on again can be less than the required voltage value, avoiding abnormalities when the subsequent load processor is powered on again, improving the safety and stability of the power-off detection and power supply holding function circuits, and solving the problem of poor stability of the existing power-off storage scheme.
  • FIG1 is a schematic diagram of functional modules of an embodiment of a power failure detection and power supply holding function circuit of the present application
  • FIG2 is a schematic diagram of functional modules of another embodiment of the power failure detection and power supply holding function circuit of the present application.
  • FIG3 is a functional module diagram of another embodiment of the power failure detection and power supply holding function circuit of the present application.
  • FIG. 4 is a schematic diagram of the circuit structure of an embodiment of a power-off detection and power supply holding function circuit of the present application.
  • the present application proposes a power failure detection and power supply holding function circuit.
  • the power failure detection and power supply holding function circuit includes:
  • a power output terminal, the power output terminal is used to connect to a power load
  • a power supply holding control circuit 20 wherein the input end of the power supply holding control circuit 20 is connected to the output end of the energy storage circuit 10, and the output end of the power supply holding control circuit 20 is connected to the power supply output end, and the power supply holding control circuit 20 is used to control the energy storage circuit 10 to be electrically connected to the power supply output end when it is turned on;
  • An energy storage voltage detection circuit 30, wherein the detection end of the energy storage voltage detection circuit 30 is connected to the output end of the energy storage circuit 10, and the output end of the energy storage voltage detection circuit 30 is connected to the controlled end of the power supply maintenance control circuit 20.
  • the energy storage voltage detection circuit 30 is used to detect the output voltage of the energy storage circuit 10, and when the output voltage of the energy storage circuit 10 is less than a first preset voltage, control the power supply maintenance control circuit 20 to disconnect the electrical connection between the energy storage circuit 10 and the power supply output end, so that the energy storage circuit 10 stops supplying power to the electrical load.
  • the power output end is used to access power loads such as processors, and the power output end can also be connected to the power supply circuit to provide normal power supply for the connected subsequent loads.
  • the energy storage circuit 10 provides temporary power supply so that the subsequent load processor can store data in time to prevent data from being lost due to power failure.
  • the energy storage circuit 10 can be implemented by energy storage devices such as energy storage capacitors and rechargeable batteries.
  • the energy storage circuit 10 can also be electrically connected to the power supply circuit that normally supplies power to the subsequent loads, so that when the power supply circuit normally supplies power to the connected subsequent loads, a part of the electric energy output by the power supply circuit is stored and used as temporary power supply.
  • the electric energy in the energy storage circuit 10 can also come from other circuits.
  • the power supply holding control circuit 20 can be implemented by a switch tube, etc., to control the connection or disconnection of the path between the energy storage circuit 10 and the power output end.
  • the power supply holding control circuit 20 is used to control the energy storage circuit 10 to be electrically connected to the power output end when the subsequent load processor loses power, so that the energy storage circuit 10 provides temporary power supply for the subsequent load processor.
  • the energy storage voltage detection circuit 30 can be implemented by using a voltage divider resistor, a comparator and a switch tube, etc.
  • the positive input terminal of the comparator is connected to the output voltage of the energy storage circuit 10, and a reference voltage is connected to the reverse input terminal of the comparator. In this way, the low level and high level output by the comparator can be used to control the conduction or shutdown of the switch tube, thereby controlling the connection or disconnection of the path between the energy storage circuit 10 and the power supply output terminal.
  • the load processor gradually enters a standby or shutdown state. At this time, the subsequent load is very small, and the time for the electric energy stored in the energy storage circuit 10 to discharge to 0V will be very long, that is, the time for the power output end to drop to 0V is very long.
  • the subsequent load processor usually has a clear requirement, that is, the power supply voltage value must be less than a certain value before re-powering on, otherwise the subsequent load processor will be abnormal after powering on, such as the system cannot start and other problems. Therefore, in this embodiment, an energy storage voltage detection circuit 30 is provided.
  • the path between the energy storage circuit 10 and the power output end is quickly controlled to be disconnected, so that the energy storage circuit 10 stops supplying power to the subsequent load processor to ensure that the system can start normally when it is powered on next time.
  • the first preset voltage value can be set to be less than or equal to the output voltage of the energy storage circuit 10 of the subsequent load processor after the power-off data storage is completed.
  • the output voltage of the energy storage circuit 10 drops to the first preset voltage value, it indicates that the subsequent load processor has completed the work of power-off data storage.
  • the initial voltage of the energy storage circuit 10 when supplying power to the subsequent load processor is 5V.
  • the voltage value output by the energy storage circuit 10 drops to 4V.
  • the first preset voltage value can be set to 4V or less than 4V. In this way, the power supply can be disconnected after the subsequent load processor completes the data storage to ensure that the system can start normally when powered on next time.
  • FIG 4 is a circuit structure diagram of an embodiment of a power-off detection and power supply holding function circuit.
  • the energy storage circuit 10 in the figure is composed of an energy storage capacitor C2 and an eighteenth resistor R18.
  • the energy storage capacitor C2 stores the electric energy input from the power input terminal J1.
  • the power supply holding control circuit 20 is composed of an NMOS tube Q4, a PMOS tube Q5 and a pull-down resistor R17.
  • the NMOS tube Q4 receives a high-level power supply holding signal, it is turned on and the voltage at the gate terminal of the PMOS tube Q5 is pulled down, so that the PMOS tube Q5 is turned on, thereby electrically connecting the energy storage capacitor C2 to the power output terminal to temporarily power the subsequent load processor.
  • the energy storage voltage detection circuit 30 is composed of a comparator U3, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16 and an NMOS tube Q3.
  • the comparator U3 is a comparator with an internally integrated power reference source.
  • the voltage value of the internally integrated reference source is the first preset voltage value.
  • the comparator U3 outputs a low level to control the NMOS tube Q3 to turn off.
  • the gate end of the NMOS tube Q4 receives a high level power supply holding signal to turn on.
  • the comparator U3 When the output voltage of the energy storage circuit 10 is less than the first preset voltage value, the comparator U3 outputs a high level to control the NMOS tube Q3 to turn on, thereby lowering the voltage of the gate end of the NMOS tube Q4, that is, outputting a power-off signal to the NMOS tube Q4, so that the NMOS tube Q4 is turned off, thereby turning off the PMOS tube Q5, so that the energy storage circuit 10 is disconnected from the power output end, and stops supplying power to the subsequent load processor, so as to ensure that the system can start normally when powered on next time.
  • the present application sets up an energy storage voltage detection circuit 30 so that the energy storage voltage detection circuit 30 can detect the output voltage of the energy storage circuit 10, and when the output voltage of the energy storage circuit 10 is less than the first preset voltage, that is, after the subsequent load processor completes the power-off data storage, the power supply holding control circuit 20 is controlled to disconnect the energy storage circuit 10 from the power supply output terminal, so that the power supply voltage value of the subsequent load processor before powering on again can be less than the required voltage value, avoiding abnormalities when the subsequent load processor is powered on again, and improving the safety and stability of the power-off detection and power supply holding function circuits.
  • the power failure detection and power supply holding function circuit further includes:
  • Power input terminal J1 used to connect to input power
  • a power detection circuit 40 wherein the detection end of the power detection circuit 40 is connected to the power input terminal J1, and the output end of the power detection circuit 40 is connected to the controlled end of the power supply holding control circuit 20, and the power detection circuit 40 is used to detect the output voltage of the power input terminal J1, and when the output voltage of the power input terminal J1 is greater than a second preset voltage, control the power supply holding control circuit 20 to disconnect the electrical connection between the energy storage circuit 10 and the power output terminal, so that the energy storage circuit 10 stops supplying power to the electrical load.
  • the power input terminal J1 can be connected to the power output terminal so that the connected input power can normally supply power to the subsequent load.
  • the energy storage circuit 10 temporarily supplies power to the subsequent load.
  • the second preset voltage is the minimum voltage when the system can work normally. For example, when the voltage of the power input terminal J1 is greater than 5V, the subsequent load processor can work normally, and when the voltage of the power input terminal J1 is less than 5V, the subsequent load processor cannot work normally. Then 5V can be set as the second preset voltage.
  • the power detection circuit 40 can be implemented by using a voltage-dividing resistor, a comparator and a switch tube, so that when the output voltage of the power input terminal J1 is greater than the second preset voltage, that is, when the power input terminal J1 is powered on, a power-off signal is output to the power supply maintenance control circuit 20, so that the power supply maintenance control circuit 20 controls the energy storage circuit 10 to disconnect the electrical connection with the power output terminal, so that the connected input power can supply power to the subsequent load again, ensuring the normal operation of the subsequent load after power is restored.
  • the power detection circuit 40 is also used to output a power supply maintenance signal to the power supply maintenance control circuit 20 when the output voltage of the power input terminal J1 is less than a second preset voltage, so that the power supply maintenance control circuit 20 controls the energy storage circuit 10 to be electrically connected to the power output terminal, so that the energy storage circuit 10 supplies power to the electrical load.
  • the power detection circuit 40 can be implemented by using a voltage divider resistor, a comparator and a switch tube, so that when the output voltage of the power input terminal J1 is less than the second preset voltage, that is, when the power input terminal J1 is powered off, a power supply holding signal is output to the power supply holding control circuit 20, so that the power supply holding control circuit 20 controls the energy storage circuit 10 to be electrically connected to the power output terminal, so that the energy storage circuit 10 temporarily supplies power to the subsequent load, so that the subsequent load processor can complete the data storage work.
  • the power detection circuit 40 can use a comparator to realize the output of the power supply holding signal and the power-off signal, and connect the second preset voltage to the comparator as the reference voltage, so that the power detection circuit 40 can output the power supply holding signal when the output voltage of the power input terminal J1 is less than the second preset voltage, and output the power-off signal when the output voltage of the power input terminal J1 is greater than the second preset voltage, thereby realizing the control of the power supply holding control circuit 20.
  • the power supply end of the power detection circuit 40 is connected to the power output end, and the power detection circuit 40 is also used to output a power-off signal to the power supply maintenance control circuit 20 when the power supply end loses power, so that the power supply maintenance control circuit 20 controls the energy storage circuit 10 to disconnect the electrical connection with the power output end, so that the energy storage circuit 10 stops supplying power to the electrical load.
  • the power supply end of the power detection circuit 40 is connected to the power output end.
  • the power detection circuit 40 cannot work normally.
  • the power detection circuit 40 can be regarded as outputting a low-level power-off signal to the power supply holding control circuit 20, thereby controlling the energy storage circuit 10 to stop supplying power to the power load.
  • the power output end is connected to the power supply end of the power detection circuit 40, and the input power supply connected is used as the power supply, without the need to set up an additional power supply to power the power detection circuit 40.
  • the power detection circuit 40 cannot work normally at this time.
  • the power detection circuit 40 can be regarded as outputting a low-level power-off signal to the power supply holding control circuit 20, thereby controlling the energy storage circuit 10 to disconnect the electrical connection with the power output end, avoiding abnormalities when the system is powered on again, and improving the safety of the power failure detection and power supply holding function circuits.
  • the power failure detection and power supply holding function circuit further includes:
  • a power conversion circuit 50 wherein the input end of the power conversion circuit 50 is connected to the power input end J1, and the output end of the power conversion circuit 50 is respectively connected to the power output end and the input end of the energy storage circuit 10, and the power conversion circuit 50 is used to convert the input power into a supply voltage and then output it;
  • the power detection circuit 40 has a first detection terminal and a second detection terminal.
  • the first detection terminal of the power detection circuit 40 is connected to the power input terminal J1
  • the second detection terminal of the power detection circuit 40 is connected to the output terminal of the power conversion circuit 50.
  • the power detection circuit 40 is used to detect the output voltage of the power input terminal J1 and the output voltage of the power conversion circuit 50, and when the output voltage of the power input terminal J1 is less than the second preset voltage, and/or the output voltage of the power conversion circuit 50 is less than the third preset voltage, output a power supply holding signal to the power supply holding control circuit 20, so that the power supply holding control circuit 20 controls the energy storage circuit 10 to be electrically connected to the power output terminal, so that the energy storage circuit 10 supplies power to the electrical load.
  • the power conversion circuit 50 can be implemented by using a DC-DC voltage conversion circuit, an AC-DC voltage conversion circuit, and the like.
  • the power conversion circuit 50 selects the corresponding power conversion circuit 50 according to the actual use requirements. For example, when applied to industrial communications, the input power connected to the power input terminal J1 is usually 24V. When applied to communication equipment, the input power connected to the power input terminal J1 is usually 48V.
  • the processors that need to perform operations such as data preservation when power is off are basically less than 5V. Therefore, the power conversion circuit 50 can select the corresponding power conversion circuit 50 according to the actual use requirements to convert the input power into the power supply required by the processor.
  • the power detection circuit 40 can be composed of two voltage detection circuits, each of which can be implemented by using a voltage divider resistor, a comparator, and a switch tube.
  • the two detection terminals of the power detection circuit 40 respectively detect the output voltage of the power input terminal J1 and the output voltage of the power conversion circuit 50.
  • the power detection circuit 40 outputs a power supply holding signal to the power supply holding control circuit 20, so that the power supply holding control circuit 20 controls the energy storage circuit 10 to be electrically connected to the power output terminal, so that the energy storage circuit 10 temporarily supplies power to the subsequent load, so that the subsequent load processor can complete the data storage task when the power is abnormally lost.
  • the power detection circuit 40 is also used to output a power-off signal to the power supply maintenance control circuit 20 when the output voltage of the power input terminal J1 is greater than the second preset voltage and the output voltage of the power conversion circuit 50 is greater than the third preset voltage, so that the power supply maintenance control circuit 20 controls the energy storage circuit 10 to disconnect electrically from the power output terminal, so that the energy storage circuit 10 stops supplying power to the electrical load.
  • the power detection circuit 40 is also provided with a second detection terminal connected to the output terminal of the power conversion circuit 50.
  • the power detection circuit 40 detects that the output voltage of the power input terminal J1 is greater than the second preset voltage and the output voltage of the power conversion circuit 50 is greater than the third preset voltage, that is, when the power input terminal J1 and the power conversion circuit 50 are both working normally, it outputs a power-off signal to the power supply holding control circuit 20, so that the power supply holding control circuit 20 controls the energy storage circuit 10 to disconnect the electrical connection with the power output terminal and restore the power supply by the connected input power supply.
  • the energy storage circuit 10 stops supplying power to the subsequent load processor only after the power conversion circuit 50 establishes a stable power supply voltage, which can avoid the problem of data preservation failure caused by disconnecting the energy storage circuit 10 before the power supply is normally established, and improves the stability of the power failure detection and power supply holding function circuits.
  • the second preset voltage is greater than the undervoltage threshold of the power conversion circuit 50 ;
  • the undervoltage threshold of the power conversion circuit 50 is the minimum input voltage when the power conversion circuit 50 works normally.
  • the power conversion circuit 50 can still convert the output voltage of the power input terminal J1 into the power supply voltage required by the subsequent load processor to ensure the power supply before the energy storage circuit 10 supplies power to the subsequent load processor.
  • the power conversion circuit 50 cannot convert the output voltage of the power input terminal J1 into the power supply voltage required by the subsequent load processor, that is, the power conversion circuit 50 cannot work normally.
  • the power detection circuit 40 can output a power supply holding signal to the power supply holding control circuit 20 in advance before the power conversion circuit 50 fails to work normally, so as to control the energy storage circuit 10 and the power output end to be connected, so that the output end of the power conversion circuit 50 can be powered off only after the energy storage circuit 10 is powered on, thereby ensuring the power supply status of the subsequent load processor, so that the subsequent load processor can perform power-off storage in a timely and normal manner, and improving the stability of the power-off detection and power supply holding function circuits.
  • the power detection circuit 40 includes:
  • a signal output circuit wherein the output end of the signal output circuit is connected to the controlled end of the power supply holding control circuit 20;
  • a detection end of the first detection circuit is connected to the power input end J1, an output end of the first detection circuit is connected to a first controlled end of the signal output circuit, the first detection circuit is used to detect an output voltage of the power input end J1, and output a first power-off signal to the signal output circuit when the output voltage of the power input end J1 is less than a second preset voltage, and output a first power-on signal to the signal output circuit when the output voltage of the power input end J1 is greater than the second preset voltage;
  • a second detection circuit wherein the detection end of the second detection circuit is connected to the output end of the power conversion circuit 50, the output end of the second detection circuit is connected to the second controlled end of the signal output circuit, the second detection circuit is used to detect the output voltage of the power conversion circuit 50, and when the output voltage of the power conversion circuit 50 is less than a third preset voltage, output a second power-off signal to the signal output circuit, and when the output voltage of the power conversion circuit 50 is greater than the third preset voltage, output a second power-on signal to the signal output circuit;
  • the signal output circuit is used to output a power supply holding signal to the power supply holding control circuit 20 when receiving the first power-off signal and/or the second power-off signal, so that the power supply holding control circuit 20 controls the energy storage circuit 10 to be electrically connected to the power output terminal, so that the energy storage circuit 10 supplies power to the electrical load;
  • the signal output circuit is also used to output a power-off signal to the power supply maintenance control circuit 20 when receiving the first power-on signal and the second power-on signal, so that the power supply maintenance control circuit 20 controls the energy storage circuit 10 to disconnect electrically from the power supply output end, so that the energy storage circuit 10 stops supplying power to the electrical load.
  • FIG4 is a schematic diagram of the circuit structure of an embodiment of a power-off detection and power supply holding function circuit.
  • the power supply detection circuit 40 is composed of a signal output circuit, a first detection circuit and a second detection circuit, wherein the signal output circuit is composed of switch tubes Q1, Q2 and a seventh resistor R7, one end of the seventh resistor is connected to the power output end, and the other end is connected to the controlled end of the power supply holding control circuit 20.
  • the switch tubes Q1 and Q2 are both turned on, the controlled end of the power supply holding control circuit 20 is pulled down to a low level, that is, a power-off signal is output to the power supply holding control circuit 20.
  • the controlled end of the power supply holding control circuit 20 is a high level, that is, a power supply holding signal is output to the power supply holding control circuit 20.
  • the first detection circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a first comparator U1, wherein a first end of the first resistor R1 is connected to the power input terminal J1, a second end of the first resistor R1 is connected to a first end of the second resistor R2, a second end of the second resistor R2 is grounded, a second end of the first resistor R1 is also connected to a positive input terminal of the first comparator U1, a first end of the third resistor R3 is grounded, a second end of the third resistor R3 is connected to a first end of the fourth resistor R4, a second end of the fourth resistor R4 is connected to a power output terminal, a common end of the third resistor R3 and the fourth resistor R4 is connected to a negative input terminal of the first comparator U1, a power supply terminal of the first comparator U1 is connected to
  • the first detection circuit is composed of a first comparator U1 , resistors R1 - R6 and a capacitor C1 .
  • the first capacitor C1 and the first resistor R1 form an RC filter circuit to filter out stray abnormal waveforms on the input power supply VIN to avoid false triggering of a power-off undervoltage alarm.
  • the positive input terminal of the first comparator U1 is connected to the common terminal of the first resistor R1 and the second resistor R2, which is also the detection terminal of the power input.
  • the reverse input terminal of the comparator U1 is connected to the common terminal of the third resistor R3 and the fourth resistor R4, which is also the second preset voltage reference terminal.
  • the second preset voltage can be adjusted by adjusting the resistance value of the third resistor R3 and the fourth resistor R4.
  • the second detection circuit includes an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13 and a second comparator U2, the first end of the eighth resistor R8 is connected to the output end of the power conversion circuit 50, the second end of the eighth resistor R8 is connected to the first end of the ninth resistor R9, the second end of the ninth resistor R9 is grounded, the second end of the eighth resistor R8 is also connected to the positive input end of the second comparator U2, the first end of the tenth resistor R10 is grounded, and the second end of the tenth resistor R10 is grounded.
  • the second end is connected to the first end of the eleventh resistor R11, the second end of the eleventh resistor R11 is connected to the power supply output end, the common end of the tenth resistor R10 and the eleventh resistor R11 is connected to the inverting input end of the second comparator U2, the output end of the second comparator U2 is connected to the second controlled end of the signal output circuit, the first end of the twelfth resistor R12 is connected to the power supply output end, the second end of the twelfth resistor R12 is connected to the output end of the second comparator U2, and the thirteenth resistor R13 is arranged in parallel between the output end and the positive input end of the second comparator U2.
  • the second detection circuit is composed of a second comparator U2 and resistors R8 to R13.
  • the second comparator U2 and the first comparator U1 can be two independent comparator chips, or can be directly implemented by using a single chip integrating dual comparators.
  • the thirteenth resistor R13 is used to set the hysteresis threshold of the comparator to eliminate jitter and interference.
  • the positive input terminal of the second comparator U2 is connected to the common terminal of the eighth resistor R8 and the ninth resistor R9, which is also the output power detection terminal of the power conversion circuit 50.
  • the reverse input terminal of the second comparator U2 is connected to the common terminal of the tenth resistor R10 and the eleventh resistor R11, which is also the third preset voltage reference terminal.
  • the third preset voltage can be adjusted by adjusting the resistance values of the tenth resistor R10 and the eleventh resistor R11. Similar to the first detection circuit, when Vref3 is less than Vref4, the second comparator U2 outputs a low-level second power-off signal to turn off the second switch tube Q2.
  • the second comparator U2 When Vref3 is greater than Vref4, the second comparator U2 outputs a high-level second power-on signal to turn on the second switch tube Q2. In this way, when the output voltages of the power input terminal J1 and the power conversion circuit 50 are both normal, the signal output circuit outputs a power-off signal, so that the energy storage circuit 10 stops supplying power to the subsequent load processor only after the power conversion circuit 50 establishes a stable power supply voltage, which can avoid problems such as data preservation failure caused by disconnecting the energy storage circuit 10 when the power supply is not normally established.
  • the signal output circuit will output a power supply holding signal, so that the energy storage circuit 10 supplies power to the subsequent load processor, and can switch to the energy storage circuit 10 for power supply in a variety of abnormal situations, thereby improving the stability of the power-off detection and power supply holding function circuits.
  • two resistors are used to divide the voltage to control the switch of the MOS tube to trigger the power-off signal.
  • the Vgs(th)_min and Vgs(th)_max of the MOS usually have a 2V error range, after being converted to the circuit by two voltage-dividing resistor multiples, the error of the power-off undervoltage trigger point is large, which can easily lead to the problem of unstable circuit state. Therefore, in this embodiment, the first detection circuit and the second detection circuit are both composed of comparators and resistors, the device cost is low, and the power-off undervoltage trigger point can be set with higher accuracy according to the needs, which improves the stability of the circuit state.
  • the energy storage voltage detection circuit 30 includes a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a third comparator U3 and a third switch tube Q3, a first end of the fourteenth resistor R14 is connected to the output end of the energy storage circuit 10, a second end of the fourteenth resistor R14 is connected to the first end of the fifteenth resistor R15, a second end of the fifteenth resistor R15 is grounded, an inverting input end of the third comparator U3 is connected to the second end of the fourteenth resistor R14, an output end of the third comparator U3 is connected to the controlled end of the third switch tube Q3, a first end of the sixteenth resistor R16 is connected to the output end of the energy storage circuit 10, a second end of the sixteenth resistor R16 is connected to the output end of the third comparator U3, a first end of the third switch tube Q3 is connected to the controlled end of the power supply holding control circuit 20, and a second end of the
  • FIG 4 is a schematic diagram of the circuit structure of a power-off detection and power supply holding function circuit.
  • the energy storage circuit 10 in the figure is composed of an energy storage capacitor C2 and an eighteenth resistor R18.
  • the energy storage capacitor C2 stores the electric energy input from the power input terminal J1.
  • the power supply holding control circuit 20 is composed of an NMOS tube Q4, a PMOS tube Q5 and a pull-down resistor R17.
  • the energy storage voltage detection circuit 30 is composed of a third comparator U3, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16 and an NMOS tube Q3.
  • the third comparator U3 is a comparator with an internally integrated power reference source.
  • the voltage value of the internally integrated reference source is the first preset voltage value.
  • the third comparator U3 outputs a low level to control the NMOS tube Q3 to turn off.
  • the gate end of the NMOS tube Q4 receives a high level power supply holding signal to turn on.
  • the third comparator U3 When the output voltage of the energy storage circuit 10 is less than the first preset voltage value, the third comparator U3 outputs a high level to control the NMOS tube Q3 to turn on, thereby lowering the voltage of the gate end of the NMOS tube Q4, that is, outputting a power-off signal to the NMOS tube Q4, so that the NMOS tube Q4 is turned off, thereby turning off the PMOS tube Q5, so that the energy storage circuit 10 is disconnected from the power output end, and stops supplying power to the subsequent load processor, so as to ensure that the system can start normally when powered on next time.
  • the present application also proposes an electronic device, comprising a processor and the above-mentioned power failure detection and power supply holding function circuit; wherein,
  • the power supply end of the processor is connected to the power supply output end of the power failure detection and power supply holding function circuit.
  • the signal receiving end of the processor is also connected to the output end of the power detection circuit 40 , and the processor is used to store data when receiving a power supply holding signal output by the power detection circuit 40 .
  • the power output end of the power failure detection and power supply holding function circuit is used to access the processor, and the signal receiving end of the processor is connected to the output end of the power detection circuit 40 in the power failure detection and power supply holding function circuit.
  • the power detection circuit 40 outputs a power supply holding signal, and the energy storage circuit 10 is switched to supply power.
  • the processor starts to store data when it receives the power supply holding signal, so that the processor can know the system power failure in time and store data in time, avoiding data loss and improving the stability and safety of the electronic device.
  • the electronic device includes the above-mentioned power failure detection and power supply holding function circuit.
  • the specific structure of the power failure detection and power supply holding function circuit refers to the above-mentioned embodiment. Since the electronic device adopts all the technical solutions of all the above-mentioned embodiments, it has at least all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be repeated here.

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Abstract

一种掉电检测和供电保持功能电路及电子设备,掉电检测和供电保持功能电路包括:电源输出端用于接入用电负载;储能电路(10);供电保持控制电路(20)的输入端与储能电路(10)的输出端连接,供电保持控制电路(20)的输出端与电源输出端连接;储能电压检测电路(30),储能电压检测电路(30)的检测端与储能电路(10)的输出端连接,储能电压检测电路(30)的输出端与供电保持控制电路(20)的受控端连接,用于检测储能电路(10)的输出电压,并在储能电路(10)的输出电压小于第一预设电压时,控制供电保持控制电路(20)断开储能电路(10)与电源输出端之间的电连接,以使储能电路(10)停止为用电负载供电。

Description

掉电检测和供电保持功能电路及电子设备
本申请要求于2022年10月26号申请的、申请号为202211330884.8的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子设备技术领域,特别涉及一种掉电检测和供电保持功能电路及电子设备。
背景技术
工业产品的集成度越来越复杂,CPU、MCU、FPGA等处理器被大量的应用于产品中,这些复杂的集成电路产品需要在输入电源突然掉电时,仍然能维持一定的时间正常供电,以进行掉电状态数据的存储,同时以免掉电时因软件不当操作引起SD卡或EMMC存储器等器件的损坏。现有技术中,有的方案是掉电后由超级电容持续放电,不做控制,导致重新上电时由于之前电压没掉到0V引起系统启动异常,影响产品的易用性,和用户体验性差。
技术问题
本申请的主要目的是提出一种掉电检测和供电保持功能电路,旨在解决现有的掉电存储方案稳定性差的问题。
技术解决方案
为实现上述目的,本申请提出的掉电检测和供电保持功能电路,包括:
电源输出端,所述电源输出端用于接入用电负载;
储能电路;
供电保持控制电路,所述供电保持控制电路的输入端与所述储能电路的输出端连接,所述供电保持控制电路的输出端与所述电源输出端连接,所述供电保持控制电路用于在导通时,控制所述储能电路与所述电源输出端电连接;
储能电压检测电路,所述储能电压检测电路的检测端与所述储能电路的输出端连接,所述储能电压检测电路的输出端与所述供电保持控制电路的受控端连接,所述储能电压检测电路用于检测所述储能电路的输出电压,并在所述储能电路的输出电压小于第一预设电压时,控制所述供电保持控制电路断开所述储能电路与所述电源输出端之间的电连接,以使所述储能电路停止为用电负载供电。
在一实施方式中,所述掉电检测和供电保持功能电路还包括:
电源输入端,所述电源输入端与所述电源输出端连接,用于接入输入电源;
电源检测电路,所述电源检测电路的检测端与所述电源输入端连接,所述电源检测电路的输出端与所述供电保持控制电路的受控端连接,所述电源检测电路用于检测所述电源输入端的输出电压,并在所述电源输入端的输出电压大于第二预设电压时,控制所述供电保持控制电路断开所述储能电路与所述电源输出端之间的电连接,以使所述储能电路停止为用电负载供电。
在一实施方式中,所述电源检测电路还用于在所述电源输入端的输出电压小于第二预设电压时,输出供电保持信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端电连接,以使所述储能电路为用电负载供电。
在一实施方式中,所述电源检测电路的供电端与所述电源输出端连接,所述电源检测电路还用于在所述供电端掉电时,输出断电信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端断开电连接,以使所述储能电路停止为用电负载供电。
在一实施方式中,所述掉电检测和供电保持功能电路还包括:
电源转换电路,所述电源转换电路的输入端与电源输入端连接,所述电源转换电路的输出端分别与所述电源输出端及储能电路的输入端连接,所述电源转换电路用于将接入的输入电源转换为供电电压后输出;
所述电源检测电路具有第一检测端及第二检测端,所述电源检测电路的第一检测端与所述电源输入端连接,所述电源检测电路的第二检测端与所述电源转换电路的输出端连接;
所述电源检测电路用于检测所述电源输入端的输出电压与所述电源转换电路的输出电压,并在所述电源输入端的输出电压小于第二预设电压,和/或所述电源转换电路的输出电压小于第三预设电压时,输出供电保持信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端电连接,以使所述储能电路为用电负载供电。
在一实施方式中,所述电源检测电路还用于在所述电源输入端的输出电压大于第二预设电压且所述电源转换电路的输出电压大于第三预设电压时,输出断电信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端断开电连接,以使所述储能电路停止为用电负载供电。
在一实施方式中,所述第二预设电压大于所述电源转换电路的欠压阈值;
所述电源转换电路的欠压阈值为所述电源转换电路正常工作时的最小输入电压。
在一实施方式中,所述电源检测电路包括:
信号输出电路,所述信号输出电路的输出端与所述供电保持控制电路的受控端连接;
第一检测电路,所述第一检测电路的检测端与所述电源输入端连接,所述第一检测电路的输出端与所述信号输出电路的第一受控端连接,所述第一检测电路用于检测所述电源输入端的输出电压,并在所述电源输入端的输出电压小于第二预设电压时,输出第一掉电信号至所述信号输出电路,以及在所述电源输入端的输出电压大于第二预设电压时,输出第一上电信号至所述信号输出电路;
第二检测电路,所述第二检测电路的检测端与所述电源转换电路的输出端连接,所述第二检测电路的输出端与所述信号输出电路的第二受控端连接,所述第二检测电路用于检测所述电源转换电路的输出电压,并在所述电源转换电路的输出电压小于第三预设电压时,输出第二掉电信号至所述信号输出电路,以及在所述电源转换电路的输出电压大于第三预设电压时,输出第二上电信号至所述信号输出电路;
所述信号输出电路用于在接收到第一掉电信号和/或第二掉电信号时,输出供电保持信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端电连接,以使所述储能电路为用电负载供电;以及,
所述信号输出电路还用于在接收到第一上电信号和第二上电信号时,输出断电信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端断开电连接,以使所述储能电路停止为用电负载供电。
在一实施方式中,所述第一检测电路包括第一电阻、第二电阻、第三电阻、第四电阻、第五电阻、第六电阻及第一比较器,所述第一电阻的第一端与所述电源输入端连接,所述第一电阻的第二端与所述第二电阻的第一端连接,所述第二电阻的第二端接地,所述第一电阻的第二端还与所述第一比较器的正向输入端连接,所述第三电阻的第一端接地,所述第三电阻的第二端与所述第四电阻第一端连接,所述第四电阻第二端与电源输出端连接,所述第三电阻与所述第四电阻的公共端与所述第一比较器的反向输入端连接,所述第一比较器的供电端与所述第四电阻的第二端连接,所述第一比较器的输出端与所述信号输出电路的第一受控端连接,所述第五电阻并联设置于所述第一比较器的输出端与正向输入端之间,所述第六电阻并联设置于所述第一比较器的供电端与输出端之间。
在一实施方式中,所述第二检测电路包括第八电阻、第九电阻、第十电阻、第十一电阻、第十二电阻、第十三电阻及第二比较器,所述第八电阻的第一端与所述电源转换电路的输出端连接,所述第八电阻的第二端与所述第九电阻的第一端连接,所述第九电阻的第二端接地,所述第八电阻的第二端还与所述第二比较器的正向输入端连接,所述第十电阻的第一端接地,所述第十电阻的第二端与所述第十一电阻第一端连接,所述第十一电阻第二端与电源输出端连接,所述第十电阻与所述第十一电阻的公共端与所述第二比较器的反向输入端连接,所述第二比较器的输出端与所述信号输出电路的第二受控端连接,所述第十二电阻的第一端与所述电源输出端连接,所述第十二电阻的第二端与所述第二比较器的输出端连接,所述第十三电阻并联设置于所述第二比较器的输出端与正向输入端之间。
在一实施方式中,所述储能电压检测电路包括第十四电阻、第十五电阻、第十六电阻、第三比较器及第三开关管,所述第十四电阻的第一端与所述储能电路的输出端连接,所述第十四电阻的第二端与所述第十五电阻的第一端连接,所述第十五电阻的第二端接地,所述第三比较器的反向输入端与所述第十四电阻的第二端连接,所述第三比较器的输出端与所述第三开关管的受控端连接,所述第十六电阻的第一端与所述储能电路的输出端连接,所述第十六电阻的第二端与所述第三比较器的输出端连接,所述第三开关管的第一端与所述供电保持控制电路的受控端连接,所述第三开关管的第二端接地。
本申请还提出一种电子设备,包括处理器及如上述的掉电检测和供电保持功能电路;其中,
所述处理器的供电端与所述掉电检测和供电保持功能电路的电源输出端连接。
在一实施方式中,所述处理器的信号接收端还与所述电源检测电路的输出端连接,所述处理器用于在接收到所述电源检测电路输出的供电保持信号时进行数据存储。
有益效果
本申请技术方案通过设置储能电压检测电路,使得储能电压检测电路能够检测储能电路的输出电压,并在储能电路的输出电压小于第一预设电压时,也即在后级负载处理器完成掉电数据存储后,控制供电保持控制电路断开储能电路与电源输出端的连接,从而使得后级负载处理器在重新上电前的供电电压值能够小于要求的电压值,避免后级负载处理器重新上电时出现异常,提高了掉电检测和供电保持功能电路的安全性和稳定性,解决了现有的掉电存储方案稳定性差的问题。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图示出的结构获得其他的附图。
图1为本申请掉电检测和供电保持功能电路一实施例的功能模块示意图;
图2为本申请掉电检测和供电保持功能电路另一实施例的功能模块示意图;
图3为本申请掉电检测和供电保持功能电路又一实施例的功能模块示意图;
图4为本申请掉电检测和供电保持功能电路一实施例的电路结构示意图。
附图标号说明:
标号 名称 标号 名称
10 储能电路 U1~U3 第一比较器~第三比较器
20 供电保持控制电路 D1~D3 第一二极管~第三二极管
30 储能电压检测电路 C1~C3 第一电容~第三电容
40 电源检测电路 Q1~Q5 第一开关管~第五开关管
50 电源转换电路 R1~R18 第一电阻~第十八电阻
J1 电源输入端    
本申请目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。
本发明的实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请的一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
需要说明,若本申请实施例中有涉及方向性指示(诸如上、下、左、右、前、后……),则该方向性指示仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也相应地随之改变。
另外,若本申请实施例中有涉及“第一”、“第二”等的描述,则该“第一”、“第二”等的描述仅用于描述目的,而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外,各个实施例之间的技术方案可以相互结合,但是必须是以本领域普通技术人员能够实现为基础,当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在,也不在本申请要求的保护范围之内。
本申请提出一种掉电检测和供电保持功能电路。
目前,现有技术中,有的方案是掉电后由超级电容持续放电,不做控制,导致重新上电时由于之前电压没掉到0V引起系统启动异常,影响产品的易用性,和用户体验性差。
为解决上述问题,参照图1至图4,在一实施例中,所述掉电检测和供电保持功能电路包括:
电源输出端,所述电源输出端用于接入用电负载;
储能电路10;
供电保持控制电路20,所述供电保持控制电路20的输入端与所述储能电路10的输出端连接,所述供电保持控制电路20的输出端与所述电源输出端连接,所述供电保持控制电路20用于在导通时,控制所述储能电路10与所述电源输出端电连接;
储能电压检测电路30,所述储能电压检测电路30的检测端与所述储能电路10的输出端连接,所述储能电压检测电路30的输出端与所述供电保持控制电路20的受控端连接,所述储能电压检测电路30用于检测所述储能电路10的输出电压,并在所述储能电路10的输出电压小于第一预设电压时,控制所述供电保持控制电路20断开所述储能电路10与所述电源输出端之间的电连接,以使所述储能电路10停止为用电负载供电。
在本实施例中,电源输出端用于接入如处理器等用电负载,电源输出端还可以与供电电路连接,用于为接入的后级负载进行正常供电,当供电电路掉电时,则由储能电路10提供临时供电,以使后级负载处理器能够及时将数据进行储存,防止数据因掉电而丢失。储能电路10可以选用储能电容、可充电电池等储能器件来实现,储能电路10还可以是与为后级负载正常供电的供电电路电连接,以在供电电路为接入的后级负载进行正常供电时,将供电电路输出的一部分电能存储起来,用作临时供电的电能,储能电路10中的电能也可以是来自其他电路的。供电保持控制电路20可以选用开关管等来实现,以控制储能电路10与电源输出端之间通路的连通或断开,供电保持控制电路20用于在后级负载处理器掉电时,控制储能电路10与电源输出端电连接,以使储能电路10为后级负载处理器提供临时供电。储能电压检测电路30可以选用分压电阻、比较器及开关管等来实现,比较器的正向输入端接入储能电路10的输出电压,并在比较器的反向输入端接入一个基准电压,如此,可以利用比较器输出的低电平及高电平控制开关管的导通或关断,从而控制储能电路10与电源输出端之间通路的连通或断开。
需注意的是,如果没有储能电压检测电路30,后级负载处理器数据保存后,负载处理器逐渐处于待机或停机状态,此时后级负载非常小,储能电路10所储存的电能放电到0V的时间会非常长,也即电源输出端降到0V的时间非常长。但是,后级负载处理器通常有明确要求,即重新上电前供电电压值必须要小于一定值,否则后级负载处理器上电后会出现异常,如系统无法启动等等问题,因此,本实施例中设有储能电压检测电路30,在储能电路10的输出电压达到后级负载处理器所需要的欠压阈值,也即第一预设电压值后,迅速控制储能电路10与电源输出端之间通路断开,使得储能电路10停止为后级负载处理器供电,以保证下次上电时系统可以正常启动。第一预设电压值可以设置为小于或等于后级负载处理器在掉电数据存储完成后储能电路10的输出电压,当储能电路10的输出电压降到第一预设电压值时,则表征着后级负载处理器完成了掉电数据存储的工作。例如,储能电路10给后级负载处理器供电时的初始电压为5V,后级负载处理器将数据储存完毕后储能电路10输出的电压值降为4V,此时可以对应将第一预设电压值设置为4V或小于4V,如此,则可以在后级负载处理器完成数据存储后断开供电,以保证下次上电时系统可以正常启动。
参照图4,图4为掉电检测和供电保持功能电路一实施例的电路结构示意图,图中的储能电路10由储能电容C2及第十八电阻R18组成,储能电容C2储存自电源输入端J1输入的电能,供电保持控制电路20由NMOS管Q4、PMOS管Q5及下拉电阻R17组成,当NMOS管Q4接收到高电平的供电保持信号时导通,拉低PMOS管Q5栅极端的电压,使得PMOS管Q5导通,从而使得储能电容C2与电源输出端电连接,以为后级负载处理器临时供电。储能电压检测电路30则由比较器U3、第十四电阻R14、第十五电阻R15、第十六电阻R16及NMOS管Q3组成,比较器U3为内部集成有电源参考源的比较器,内部集成参考源的电压值即第一预设电压值,当储能电路10的输出电压大于第一预设电压值时,比较器U3则输出低电平控制NMOS管Q3关断,此时NMOS管Q4的栅极端则接收到高电平的供电保持信号导通。而当储能电路10的输出电压小于第一预设电压值时,比较器U3则输出高电平控制NMOS管Q3导通,从而拉低NMOS管Q4的栅极端的电压,也即输出断电信号至NMOS管Q4,使得NMOS管Q4关断,从而使得PMOS管Q5关断,使得储能电路10断开与电源输出端的连接,停止为后级负载处理器供电,以保证下次上电时系统可以正常启动。
本申请通过设置储能电压检测电路30,使得储能电压检测电路30能够检测储能电路10的输出电压,并在储能电路10的输出电压小于第一预设电压时,也即在后级负载处理器完成掉电数据存储后,控制供电保持控制电路20断开储能电路10与电源输出端的连接,从而使得后级负载处理器在重新上电前的供电电压值能够小于要求的电压值,避免后级负载处理器重新上电时出现异常,提高了掉电检测和供电保持功能电路的安全性和稳定性。
参照图1至图4,在一实施例中,所述掉电检测和供电保持功能电路还包括:
电源输入端J1,用于接入输入电源;
电源检测电路40,所述电源检测电路40的检测端与所述电源输入端J1连接,所述电源检测电路40的输出端与所述供电保持控制电路20的受控端连接,所述电源检测电路40用于检测所述电源输入端J1的输出电压,并在所述电源输入端J1的输出电压大于第二预设电压时,控制所述供电保持控制电路20断开所述储能电路10与所述电源输出端之间的电连接,以使所述储能电路10停止为用电负载供电。
在本实施例中,电源输入端J1可以与电源输出端连接,以使接入的输入电源为后级负载进行正常供电,当电源输入端J1掉电时,则由储能电路10为后级负载进行临时供电。第二预设电压为系统能够正常工作时的最小电压,例如,当电源输入端J1的电压大于5V时,后级负载处理器能够正常工作,而电源输入端J1的电压小于5V时,后级负载处理器无法正常工作,那么可以将5V设置为第二预设电压,如此,当电源输入端J1的输出电压大于第二预设电压时,表征为电源输入端J1上电,而当电源输入端J1的输出电压小于第二预设电压时,表征为电源输入端J1掉电。电源检测电路40可以选用分压电阻、比较器及开关管来实现,以在电源输入端J1的输出电压大于第二预设电压时,也即电源输入端J1上电时,输出断电信号至供电保持控制电路20,使得供电保持控制电路20控制储能电路10与电源输出端断开电连接,从而使得接入的输入电源重新为后级负载供电,保证了后级负载在重新上电后的正常工作。
在一实施方式中,所述电源检测电路40还用于在所述电源输入端J1的输出电压小于第二预设电压时,输出供电保持信号至所述供电保持控制电路20,以使所述供电保持控制电路20控制所述储能电路10与所述电源输出端电连接,以使所述储能电路10为用电负载供电。
在本实施例中,电源检测电路40可以选用分压电阻、比较器及开关管来实现,以在电源输入端J1的输出电压小于第二预设电压时,也即电源输入端J1掉电时,输出供电保持信号至供电保持控制电路20,使得供电保持控制电路20控制储能电路10与电源输出端电连接,从而使得储能电路10为后级负载临时供电,以使后级负载处理器能够完成数据储存的工作。电源检测电路40可以利用比较器来实现供电保持信号和断电信号的输出,将第二预设电压作为基准电压接入比较器,从而使得电源检测电路40能够在电源输入端J1的输出电压小于第二预设电压时输出供电保持信号,以及在电源输入端J1的输出电压大于第二预设电压时输出断电信号,从而实现对供电保持控制电路20的控制。
在一实施方式中,所述电源检测电路40的供电端与所述电源输出端连接,所述电源检测电路40还用于在所述供电端掉电时,输出断电信号至所述供电保持控制电路20,以使所述供电保持控制电路20控制所述储能电路10与所述电源输出端断开电连接,以使所述储能电路10停止为用电负载供电。
在本实施例中,电源检测电路40的供电端与电源输出端连接,当供电端掉电时,电源检测电路40无法正常工作,此时电源检测电路40可以视为输出了低电平的断电信号至供电保持控制电路20,从而控制储能电路10停止为用电负载供电。本实施例中将电源输出端与电源检测电路40的供电端连接,利用接入的输入电源作为供电电源,无需额外设置电源为电源检测电路40供电。同时,还能够在供电端掉电时,例如当供电保持控制电路20控制储能电路10与电源输出端电连接,而储能电路10电能为0时,此时电源检测电路40无法正常工作,电源检测电路40可以视为输出了低电平的断电信号至供电保持控制电路20,从而控制储能电路10断开与电源输出端的电连接,避免在系统重新上电时出现异常,提高了掉电检测和供电保持功能电路的安全性。
参照图1至图4,在一实施例中,所述掉电检测和供电保持功能电路还包括:
电源转换电路50,所述电源转换电路50的输入端与电源输入端J1连接,所述电源转换电路50的输出端分别与所述电源输出端及储能电路10的输入端连接,所述电源转换电路50用于将接入的输入电源转换为供电电压后输出;
所述电源检测电路40具有第一检测端及第二检测端,所述电源检测电路40的第一检测端与所述电源输入端J1连接,所述电源检测电路40的第二检测端与所述电源转换电路50的输出端连接;
所述电源检测电路40用于检测所述电源输入端J1的输出电压与所述电源转换电路50的输出电压,并在所述电源输入端J1的输出电压小于第二预设电压,和/或所述电源转换电路50的输出电压小于第三预设电压时,输出供电保持信号至所述供电保持控制电路20,以使所述供电保持控制电路20控制所述储能电路10与所述电源输出端电连接,以使所述储能电路10为用电负载供电。
在本实施例中,电源转换电路50可以选用DC-DC电压变换电路、AC-DC电压变换电路等电路来实现,电源转换电路50根据实际的使用需求选用对应的电源转换电路50,例如应用于工业通讯时,电源输入端J1接入的输入电源通常为24V,应用于通信类设备时,电源输入端J1接入的输入电源通常为48V,而掉电时需要进行数据保存等操作的处理器基本都小于5V,因此,电源转换电路50可以根据实际的使用需求,选用对应的电源转换电路50以将输入电源转化为处理器所需的供电电源。电源检测电路40可以由两个电压检测电路组成,每个电压检测电路可以选用分压电阻、比较器及开关管来实现,电源检测电路40的两个检测端分别检测电源输入端J1的输出电压和电源转换电路50的输出电压。如此,当电源输入端J1出现异常掉电,或电源转换电路50故障导致输出电压异常时,也即电源输入端J1的输出电压小于第二预设电压,或电源转换电路50的输出电压小于第三预设电压时,电源检测电路40则输出供电保持信号至供电保持控制电路20,使得供电保持控制电路20控制储能电路10与电源输出端电连接,从而使得储能电路10为后级负载临时供电,以使后级负载处理器能够在异常掉电时完成数据储存的工作。
在一实施方式中,所述电源检测电路40还用于在所述电源输入端J1的输出电压大于第二预设电压且所述电源转换电路50的输出电压大于第三预设电压时,输出断电信号至所述供电保持控制电路20,以使所述供电保持控制电路20控制所述储能电路10与所述电源输出端断开电连接,以使所述储能电路10停止为用电负载供电。
可以理解的是,当电源输入端J1掉电后重新上电时,由于重新上电经过电源转换电路50的转换输出需要一定的时间,为了避免在建立稳定的供电电压之前,就控制储能电路10停止给后级负载处理器供电而造成数据保存失败等等问题,在本实施例中电源检测电路40还设有第二检测端与电源转换电路50的输出端连接。电源检测电路40在检测到电源输入端J1的输出电压大于第二预设电压且电源转换电路50的输出电压大于第三预设电压时,也即电源输入端J1与电源转换电路50都正常工作时,才输出断电信号至供电保持控制电路20,使得供电保持控制电路20控制储能电路10与所述电源输出端断开电连接,恢复为由接入的输入电源进行供电。如此,使得储能电路10在电源转换电路50建立了稳定的供电电压后才停止为后级负载处理器供电,能够避免因未正常建立供电就将储能电路10断开而造成的数据保存失败等问题,提高了掉电检测和供电保持功能电路的稳定性。
参照图1至图4,在一实施例中,所述第二预设电压大于所述电源转换电路50的欠压阈值;
所述电源转换电路50的欠压阈值为所述电源转换电路50正常工作时的最小输入电压。
可以理解的是,为保证储能电路10给负载供电前,后级负载还可以维持在正常工作状态,需要设置电源输入端J1的输出电压掉到第二预设电压时,此时电源输入端J1的输出电压应大于电源转换电路50的欠压阈值,也即大于电源转换电路50正常工作时所需要的最低输入电压。如此设置,在电源输入端J1的输出电压掉到第二预设电压之前,电源转换电路50还依旧能够将电源输入端J1的输出电压转换为后级负载处理器所需要的供电电压,以保证储能电路10给后级负载处理器供电前的供电。而当电源输入端J1的输出电压小于第二预设电压后,电源转换电路50无法将电源输入端J1的输出电压转换为后级负载处理器所需要的供电电压,也即电源转换电路50无法正常工作。换而言之,电源检测电路40能够在电源转换电路50无法正常工作前,提前输出供电保持信号至供电保持控制电路20,以控制储能电路10和电源输出端连通,使得电源转换电路50的输出端能够在储能电路10供电后才掉电,保障了后级负载处理器的供电状态,使得后级负载处理器能够及时正常地进行掉电储存,提高了掉电检测和供电保持功能电路的稳定性。
参照图1至图4,在一实施例中,所述电源检测电路40包括:
信号输出电路,所述信号输出电路的输出端与所述供电保持控制电路20的受控端连接;
第一检测电路,所述第一检测电路的检测端与所述电源输入端J1连接,所述第一检测电路的输出端与所述信号输出电路的第一受控端连接,所述第一检测电路用于检测所述电源输入端J1的输出电压,并在所述电源输入端J1的输出电压小于第二预设电压时,输出第一掉电信号至所述信号输出电路,以及在所述电源输入端J1的输出电压大于第二预设电压时,输出第一上电信号至所述信号输出电路;
第二检测电路,所述第二检测电路的检测端与所述电源转换电路50的输出端连接,所述第二检测电路的输出端与所述信号输出电路的第二受控端连接,所述第二检测电路用于检测所述电源转换电路50的输出电压,并在所述电源转换电路50的输出电压小于第三预设电压时,输出第二掉电信号至所述信号输出电路,以及在所述电源转换电路50的输出电压大于第三预设电压时,输出第二上电信号至所述信号输出电路;
所述信号输出电路用于在接收到第一掉电信号和/或第二掉电信号时,输出供电保持信号至所述供电保持控制电路20,以使所述供电保持控制电路20控制所述储能电路10与所述电源输出端电连接,以使所述储能电路10为用电负载供电;以及,
所述信号输出电路还用于在接收到第一上电信号和第二上电信号时,输出断电信号至所述供电保持控制电路20,以使所述供电保持控制电路20控制所述储能电路10与所述电源输出端断开电连接,以使所述储能电路10停止为用电负载供电。
参照图4,图4为掉电检测和供电保持功能电路一实施例的电路结构示意图,在本实施例中,电源检测电路40由信号输出电路、第一检测电路及第二检测电路组成,其中,信号输出电路由开关管Q1、Q2及第七电阻R7组成,第七电阻的一端与电源输出端连接,另一端与供电保持控制电路20的受控端连接,当开关管Q1及Q2都导通时,供电保持控制电路20的受控端被拉低为低电平,也即输出断电信号至供电保持控制电路20。当开关管Q1或Q2中的一个关断时,供电保持控制电路20的受控端为高电平,也即输出供电保持信号至供电保持控制电路20。
在一实施方式中,所述第一检测电路包括第一电阻R1、第二电阻R2、第三电阻R3、第四电阻R4、第五电阻R5、第六电阻R6及第一比较器U1,所述第一电阻R1的第一端与所述电源输入端J1连接,所述第一电阻R1的第二端与所述第二电阻R2的第一端连接,所述第二电阻R2的第二端接地,所述第一电阻R1的第二端还与所述第一比较器U1的正向输入端连接,所述第三电阻R3的第一端接地,所述第三电阻R3的第二端与所述第四电阻R4第一端连接,所述第四电阻R4第二端与电源输出端连接,所述第三电阻R3与所述第四电阻R4的公共端与所述第一比较器U1的反向输入端连接,所述第一比较器U1的供电端与所述第四电阻R4的第二端连接,所述第一比较器U1的输出端与所述信号输出电路的第一受控端连接,所述第五电阻R5并联设置于所述第一比较器U1的输出端与正向输入端之间,所述第六电阻R6并联设置于所述第一比较器U1的供电端与输出端之间。
参照图4,第一检测电路由第一比较器U1、电阻R1~R6及电容C1组成,第一电容C1和第一电阻R1形成RC滤波电路,滤除输入电源VIN上的杂散异常波形,避免误触发掉电欠压报警。第一比较器U1的正向输入端与第一电阻R1和第二电阻R2的公共端连接,也即为电源输入的检测端,比较器U1的反向输入端与第三电阻R3和第四电阻R4的公共端连接,也即第二预设电压参考端,电源输入端J1的输出电压VIN经过R1和R2分压后的值为Vref1=VIN*R2/(R1+R2),电源输出端的电压经第三电阻R3及第四电阻R4分压后的电压即为第二预设电压Vref2=VCC2*R3/(R3+R4),可以通过调节第三电阻R3及第四电阻R4的阻值来调节第二预设电压,当Vref1小于Vref2时,第一比较器U1输出低电平的第一掉电信号,使第一开关管Q1关断。当Vref1大于Vref2时,第一比较器U1输出高电平的第一上电信号,使第一开关管Q1导通。
在一实施方式中,所述第二检测电路包括第八电阻R8、第九电阻R9、第十电阻R10、第十一电阻R11、第十二电阻R12、第十三电阻R13及第二比较器U2,所述第八电阻R8的第一端与所述电源转换电路50的输出端连接,所述第八电阻R8的第二端与所述第九电阻R9的第一端连接,所述第九电阻R9的第二端接地,所述第八电阻R8的第二端还与所述第二比较器U2的正向输入端连接,所述第十电阻R10的第一端接地,所述第十电阻R10的第二端与所述第十一电阻R11第一端连接,所述第十一电阻R11第二端与电源输出端连接,所述第十电阻R10与所述第十一电阻R11的公共端与所述第二比较器U2的反向输入端连接,所述第二比较器U2的输出端与所述信号输出电路的第二受控端连接,所述第十二电阻R12的第一端与所述电源输出端连接,所述第十二电阻R12的第二端与所述第二比较器U2的输出端连接,所述第十三电阻R13并联设置于所述第二比较器U2的输出端与正向输入端之间。
第二检测电路由第二比较器U2及电阻R8~R13组成,第二比较器U2和第一比较器U1可以是独立的两个比较器芯片,也可以是直接使用集成双比较器的单个芯片来实现。第十三电阻R13用于设置比较器的磁滞阈值以消除抖动和干扰,第二比较器U2的正向输入端与第八电阻R8和第九电阻R9的公共端连接,也即为电源转换电路50的输出电源检测端,电源转换电路50的输出电压VCC1经过第八电阻R8和第九电阻R9分压后的值为Vref3=VCC1*R9/(R8+R9),第二比较器U2的反向输入端与第十电阻R10和第十一电阻R11的公共端连接,也即第三预设电压参考端,电源输出端的电压经第十电阻R10及第十一电阻R11分压后的电压即为第三预设电压Vref4=VCC2*R10/(R10+R11),可以通过调节第十电阻R10及第十一电阻R11的阻值来调节第三预设电压。与第一检测电路同理,当Vref3小于Vref4时,第二比较器U2输出低电平的第二掉电信号,使第二开关管Q2关断。当Vref3大于Vref4时,第二比较器U2输出高电平的第二上电信号,使第二开关管Q2导通。如此设置,当电源输入端J1与电源转换电路50的输出电压均正常时,信号输出电路才输出断电信号,使得储能电路10在电源转换电路50建立了稳定的供电电压后才停止为后级负载处理器供电,能够避免因未正常建立供电就将储能电路10断开而造成的数据保存失败等问题。同时,当电源输入端J1与电源转换电路50任意一个的输出电压异常时,信号输出电路就会输出供电保持信号,使得储能电路10为后级负载处理器供电,能够在多种异常情况下切换至储能电路10供电,提高了掉电检测和供电保持功能电路的稳定性。此外,可以理解的是,现有的掉电存储方案中,有的采用两个电阻分压去控制Mos管的开关以触发掉电信号,但由于Mos的Vgs(th)_min和Vgs(th)_max通常有2V误差范围,再经两个分压电阻倍数折算到电路后,掉电欠压触发点误差较大,容易导致电路状态不稳定问题。因此,在本实施例中,第一检测电路及第二检测电路均选用了比较器及电阻组成,器件成本较低,且能够根据需求更高精度地设置掉电欠压触发点,提高了电路状态的稳定性。
参照图4,在一实施例中,所述储能电压检测电路30包括第十四电阻R14、第十五电阻R15、第十六电阻R16、第三比较器U3及第三开关管Q3,所述第十四电阻R14的第一端与所述储能电路10的输出端连接,所述第十四电阻R14的第二端与所述第十五电阻R15的第一端连接,所述第十五电阻R15的第二端接地,所述第三比较器U3的反向输入端与所述第十四电阻R14的第二端连接,所述第三比较器U3的输出端与所述第三开关管Q3的受控端连接,所述第十六电阻R16的第一端与所述储能电路10的输出端连接,所述第十六电阻R16的第二端与所述第三比较器U3的输出端连接,所述第三开关管Q3的第一端与所述供电保持控制电路20的受控端连接,所述第三开关管Q3的第二端接地。
参照图4,图4为掉电检测和供电保持功能电路一实施的电路结构示意图,图中的储能电路10由储能电容C2及第十八电阻R18组成,储能电容C2储存自电源输入端J1输入的电能,供电保持控制电路20由NMOS管Q4、PMOS管Q5及下拉电阻R17组成,当NMOS管Q4接收到高电平的供电保持信号时导通,拉低PMOS管Q5栅极端的电压,使得PMOS管Q5导通,从而使得储能电容C2与电源输出端电连接,以为后级负载处理器临时供电。储能电压检测电路30则由第三比较器U3、第十四电阻R14、第十五电阻R15、第十六电阻R16及NMOS管Q3组成,第三比较器U3为内部集成有电源参考源的比较器,内部集成参考源的电压值即第一预设电压值,当储能电路10的输出电压大于第一预设电压值时,第三比较器U3则输出低电平控制NMOS管Q3关断,此时NMOS管Q4的栅极端则接收到高电平的供电保持信号导通。而当储能电路10的输出电压小于第一预设电压值时,第三比较器U3则输出高电平控制NMOS管Q3导通,从而拉低NMOS管Q4的栅极端的电压,也即输出断电信号至NMOS管Q4,使得NMOS管Q4关断,从而使得PMOS管Q5关断,使得储能电路10断开与电源输出端的连接,停止为后级负载处理器供电,以保证下次上电时系统可以正常启动。
本申请还提出一种电子设备,包括处理器及如上述的掉电检测和供电保持功能电路;其中,
所述处理器的供电端与所述掉电检测和供电保持功能电路的电源输出端连接。
在一实施方式中,所述处理器的信号接收端还与所述电源检测电路40的输出端连接,所述处理器用于在接收到所述电源检测电路40输出的供电保持信号时进行数据存储。
在本实施例中,掉电检测和供电保持功能电路的电源输出端用于接入处理器,且处理器的信号接收端与掉电检测和供电保持功能电路中电源检测电路40的输出端连接,如此,当电源输入端J1掉电时,电源检测电路40输出供电保持信号,此时切换为储能电路10供电,同时处理器接收到供电保持信号时开始进行数据储存,使得处理器能够及时得知系统掉电并及时进行数据储存,避免了数据的丢失,提高了电子设备的稳定性和安全性。此外,该电子设备包括上述的掉电检测和供电保持功能电路,该掉电检测和供电保持功能电路的具体结构参照上述实施例,由于本电子设备采用了上述所有实施例的全部技术方案,因此至少具有上述实施例的技术方案所带来的所有有益效果,在此不再一一赘述。
以上所述仅为本申请的可选实施例,并非因此限制本申请的专利范围,凡是在本申请的发明构思下,利用本申请说明书及附图内容所作的等效结构变换,或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围内。

Claims (13)

  1. 一种掉电检测和供电保持功能电路,包括:
    电源输出端,所述电源输出端用于接入用电负载;
    储能电路;
    供电保持控制电路,所述供电保持控制电路的输入端与所述储能电路的输出端连接,所述供电保持控制电路的输出端与所述电源输出端连接,所述供电保持控制电路用于在导通时,控制所述储能电路与所述电源输出端电连接;
    储能电压检测电路,所述储能电压检测电路的检测端与所述储能电路的输出端连接,所述储能电压检测电路的输出端与所述供电保持控制电路的受控端连接,所述储能电压检测电路用于检测所述储能电路的输出电压,并在所述储能电路的输出电压小于第一预设电压时,控制所述供电保持控制电路断开所述储能电路与所述电源输出端之间的电连接,以使所述储能电路停止为用电负载供电。
  2. 如权利要求1所述的掉电检测和供电保持功能电路,其中,所述掉电检测和供电保持功能电路还包括:
    电源输入端,所述电源输入端与所述电源输出端连接,用于接入输入电源;
    电源检测电路,所述电源检测电路的检测端与所述电源输入端连接,所述电源检测电路的输出端与所述供电保持控制电路的受控端连接,所述电源检测电路用于检测所述电源输入端的输出电压,并在所述电源输入端的输出电压大于第二预设电压时,控制所述供电保持控制电路断开所述储能电路与所述电源输出端之间的电连接,以使所述储能电路停止为用电负载供电。
  3. 如权利要求2所述的掉电检测和供电保持功能电路,其中,所述电源检测电路还用于在所述电源输入端的输出电压小于第二预设电压时,输出供电保持信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端电连接,以使所述储能电路为用电负载供电。
  4. 如权利要求2所述的掉电检测和供电保持功能电路,其中,所述电源检测电路的供电端与所述电源输出端连接,所述电源检测电路还用于在所述供电端掉电时,输出断电信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端断开电连接,以使所述储能电路停止为用电负载供电。
  5. 如权利要求2所述的掉电检测和供电保持功能电路,其中,所述掉电检测和供电保持功能电路还包括:
    电源转换电路,所述电源转换电路的输入端与电源输入端连接,所述电源转换电路的输出端分别与所述电源输出端及储能电路的输入端连接,所述电源转换电路用于将接入的输入电源转换为供电电压后输出;
    所述电源检测电路具有第一检测端及第二检测端,所述电源检测电路的第一检测端与所述电源输入端连接,所述电源检测电路的第二检测端与所述电源转换电路的输出端连接;
    所述电源检测电路用于检测所述电源输入端的输出电压与所述电源转换电路的输出电压,并在所述电源输入端的输出电压小于第二预设电压,和/或所述电源转换电路的输出电压小于第三预设电压时,输出供电保持信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端电连接,以使所述储能电路为用电负载供电。
  6. 如权利要求5所述的掉电检测和供电保持功能电路,其中,所述电源检测电路还用于在所述电源输入端的输出电压大于第二预设电压且所述电源转换电路的输出电压大于第三预设电压时,输出断电信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端断开电连接,以使所述储能电路停止为用电负载供电。
  7. 如权利要求5所述的掉电检测和供电保持功能电路,其中,所述第二预设电压大于所述电源转换电路的欠压阈值;
    所述电源转换电路的欠压阈值为所述电源转换电路正常工作时的最小输入电压。
  8. 如权利要求5所述的掉电检测和供电保持功能电路,其中,所述电源检测电路包括:
    信号输出电路,所述信号输出电路的输出端与所述供电保持控制电路的受控端连接;
    第一检测电路,所述第一检测电路的检测端与所述电源输入端连接,所述第一检测电路的输出端与所述信号输出电路的第一受控端连接,所述第一检测电路用于检测所述电源输入端的输出电压,并在所述电源输入端的输出电压小于第二预设电压时,输出第一掉电信号至所述信号输出电路,以及在所述电源输入端的输出电压大于第二预设电压时,输出第一上电信号至所述信号输出电路;
    第二检测电路,所述第二检测电路的检测端与所述电源转换电路的输出端连接,所述第二检测电路的输出端与所述信号输出电路的第二受控端连接,所述第二检测电路用于检测所述电源转换电路的输出电压,并在所述电源转换电路的输出电压小于第三预设电压时,输出第二掉电信号至所述信号输出电路,以及在所述电源转换电路的输出电压大于第三预设电压时,输出第二上电信号至所述信号输出电路;
    所述信号输出电路用于在接收到第一掉电信号和/或第二掉电信号时,输出供电保持信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端电连接,以使所述储能电路为用电负载供电;以及,
    所述信号输出电路还用于在接收到第一上电信号和第二上电信号时,输出断电信号至所述供电保持控制电路,以使所述供电保持控制电路控制所述储能电路与所述电源输出端断开电连接,以使所述储能电路停止为用电负载供电。
  9. 如权利要求8所述的掉电检测和供电保持功能电路,其中,所述第一检测电路包括第一电阻、第二电阻、第三电阻、第四电阻、第五电阻、第六电阻及第一比较器,所述第一电阻的第一端与所述电源输入端连接,所述第一电阻的第二端与所述第二电阻的第一端连接,所述第二电阻的第二端接地,所述第一电阻的第二端还与所述第一比较器的正向输入端连接,所述第三电阻的第一端接地,所述第三电阻的第二端与所述第四电阻第一端连接,所述第四电阻第二端与电源输出端连接,所述第三电阻与所述第四电阻的公共端与所述第一比较器的反向输入端连接,所述第一比较器的供电端与所述第四电阻的第二端连接,所述第一比较器的输出端与所述信号输出电路的第一受控端连接,所述第五电阻并联设置于所述第一比较器的输出端与正向输入端之间,所述第六电阻并联设置于所述第一比较器的供电端与输出端之间。
  10. 如权利要求8所述的掉电检测和供电保持功能电路,其中,所述第二检测电路包括第八电阻、第九电阻、第十电阻、第十一电阻、第十二电阻、第十三电阻及第二比较器,所述第八电阻的第一端与所述电源转换电路的输出端连接,所述第八电阻的第二端与所述第九电阻的第一端连接,所述第九电阻的第二端接地,所述第八电阻的第二端还与所述第二比较器的正向输入端连接,所述第十电阻的第一端接地,所述第十电阻的第二端与所述第十一电阻第一端连接,所述第十一电阻第二端与电源输出端连接,所述第十电阻与所述第十一电阻的公共端与所述第二比较器的反向输入端连接,所述第二比较器的输出端与所述信号输出电路的第二受控端连接,所述第十二电阻的第一端与所述电源输出端连接,所述第十二电阻的第二端与所述第二比较器的输出端连接,所述第十三电阻并联设置于所述第二比较器的输出端与正向输入端之间。
  11. 如权利要求1所述的掉电检测和供电保持功能电路,其中,所述储能电压检测电路包括第十四电阻、第十五电阻、第十六电阻、第三比较器及第三开关管,所述第十四电阻的第一端与所述储能电路的输出端连接,所述第十四电阻的第二端与所述第十五电阻的第一端连接,所述第十五电阻的第二端接地,所述第三比较器的反向输入端与所述第十四电阻的第二端连接,所述第三比较器的输出端与所述第三开关管的受控端连接,所述第十六电阻的第一端与所述储能电路的输出端连接,所述第十六电阻的第二端与所述第三比较器的输出端连接,所述第三开关管的第一端与所述供电保持控制电路的受控端连接,所述第三开关管的第二端接地。
  12. 一种电子设备,包括:
    处理器;及
    如权利要求1-11任意一项所述的掉电检测和供电保持功能电路,
    其中,所述处理器的供电端与所述掉电检测和供电保持功能电路的电源输出端连接。
  13. 如权利要求12所述的电子设备,其中,所述处理器的信号接收端还与所述电源检测电路的输出端连接,所述处理器用于在接收到所述电源检测电路输出的供电保持信号时进行数据存储。
PCT/CN2023/106993 2022-10-26 2023-07-12 掉电检测和供电保持功能电路及电子设备 WO2024087737A1 (zh)

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