WO2024057586A1 - Method for producing printed wiring board - Google Patents

Method for producing printed wiring board Download PDF

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Publication number
WO2024057586A1
WO2024057586A1 PCT/JP2023/010778 JP2023010778W WO2024057586A1 WO 2024057586 A1 WO2024057586 A1 WO 2024057586A1 JP 2023010778 W JP2023010778 W JP 2023010778W WO 2024057586 A1 WO2024057586 A1 WO 2024057586A1
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WO
WIPO (PCT)
Prior art keywords
metal
wiring board
printed wiring
opening
plating
Prior art date
Application number
PCT/JP2023/010778
Other languages
French (fr)
Japanese (ja)
Inventor
良一 豊島
Original Assignee
日本メクトロン株式会社
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Filing date
Publication date
Application filed by 日本メクトロン株式会社 filed Critical 日本メクトロン株式会社
Publication of WO2024057586A1 publication Critical patent/WO2024057586A1/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections

Definitions

  • the present invention relates to a method for manufacturing a printed wiring board, and more particularly, to a method for manufacturing a printed wiring board for forming fine wiring patterns in manufacturing a printed wiring board having interlayer conductive paths.
  • Electronic devices including information and communication devices such as smartphones, are becoming smaller and lighter, and there is a need for smaller, higher-density circuit boards.
  • Increasing the density of a substrate means forming more wiring lines on a limited outer shape of the substrate. In order to form more wiring, it is necessary to miniaturize and multilayer wiring patterns.
  • Etching is used to form the wiring pattern.
  • the subtractive method is one of the methods of forming wiring patterns by etching, and is generally used particularly in forming wiring patterns of flexible printed wiring boards.
  • etching in the depth direction of the wiring and etching in the width direction of the wiring occur isotropically. Therefore, in order to form a fine wiring pattern, it is advantageous for the metal foil used for the wiring to be thinner.
  • Patent Documents 1 to 3 describe a method called a button plating method as one embodiment of a method for forming metal plating.
  • the button plating method is a method in which plating is applied only to specific parts of the substrate.
  • An example of a method for forming a wiring pattern and an interlayer conductive path in the button plating method will be described with reference to FIGS. 5A to 5D.
  • 5A to 5D are process cross-sectional views illustrating a method for manufacturing a printed wiring board according to a comparative example.
  • a double-sided metal-clad laminate including metal foils 100, 200 and an insulating base material 300 is prepared.
  • conduction holes H are formed in the double-sided metal-clad laminate.
  • plating resist 140 and plating resist 240 are formed on the upper and lower surfaces of the double-sided metal-clad laminate, respectively.
  • An opening 140a is provided in the plating resist 140 at a portion of the conduction hole H. That is, the plating resist 140 does not cover the conductive holes H.
  • metal plating 400 button plating
  • FIG. 5B(1) a plating process is performed to form metal plating 400 (button plating) inside the conduction hole H.
  • Metal plating 400 includes button lands 410.
  • FIG. 5B(2) the plating resists 140 and 240 are removed.
  • a resist film 150 and a resist film 250 are respectively formed to cover the upper and lower surfaces of the double-sided metal-clad laminate.
  • Metal plating 400 is embedded in resist film 150.
  • the resist films 150 and 250 are exposed and developed to form etching resists 150a and 250a.
  • etching is performed to remove the metal foil 100 not covered with the etching resist 150a and the metal foil 200 not covered with the etching resist 250a. Thereafter, as shown in FIG. 5D(2), the etching resists 150a and 250a are removed.
  • a wiring pattern WP10 having a plurality of wirings 110, a land 120b, a WP20 having a plurality of wirings 210, a land 220 on the opposite side of the land 120b, and an interlayer conductive path 500 are formed.
  • the button plating method has the following problems when miniaturizing wiring patterns. As shown in FIG. 5B(2), the upper part of the metal plating 400 protrudes from the metal foil 100. In order to prevent the metal plating 400 from being etched in subsequent steps, it is necessary to bury the metal plating 400 protruding from the metal foil 100 when forming the resist film 150, as shown in FIG. 5C(1). For this reason, the resist film 150 is formed thick. However, when the resist film 150 is made thicker, the etching resolution decreases, making it difficult to form fine wiring patterns.
  • the present invention has been made based on the above technical recognition, and its purpose is to provide a method for manufacturing a printed wiring board for forming a fine wiring pattern in manufacturing a printed wiring board having interlayer conductive paths. It is to be.
  • the method for manufacturing a printed wiring board according to the present invention includes: an insulating base material having a first main surface and a second main surface opposite to the first main surface; a first metal foil provided on the first main surface; a step of preparing a double-sided metal-clad laminate having a second metal foil provided on the surface; patterning the first metal foil of the double-sided metal-clad laminate to form a wiring pattern and a conformal mask; irradiating the conformal mask with laser light to remove the insulating base material exposed in the opening of the conformal mask to form a conductive hole; forming a plating resist that covers the wiring pattern but does not cover the conduction hole; forming metal plating inside the conduction hole; removing the plating resist; It is characterized by having the following.
  • the step of forming the wiring pattern includes: forming a resist film having a thickness of 1.5 times or less than the thickness of the first metal foil on the first metal foil; exposing and developing the resist film to form an etching resist corresponding to the wiring pattern; forming the wiring pattern by etching away the first metal foil that is not covered with the etching resist; The method may further include a step of removing the etching resist.
  • the wiring pattern and the conformal mask may be formed simultaneously.
  • the method for manufacturing the printed wiring board Before the step of forming the plating resist, performing a dry plating treatment on the wiring pattern, the insulating base material exposed between the wiring patterns, and the conduction hole; After the step of removing the plating resist, the method may further include a step of removing a portion of the metal thin film formed by the dry plating process that is not covered with the metal plating.
  • the dry plating process may be performed using a sputtering method.
  • the metal foil is a copper foil
  • the sputtering method is a sputtering method using copper
  • the metal thin film may be a copper thin film.
  • the step of forming the conduction hole may be performed such that the second metal foil is exposed at the bottom of the conduction hole.
  • step of forming the conduction hole may be performed such that the conduction hole becomes a through hole that communicates the opening and the other opening.
  • the conformal mask includes a first opening and a second opening as the opening, and the second metal foil of the double-sided metal-clad laminate is patterned to form a third opening. further comprising a step in which the third opening includes the second opening of the conformal mask in a plan view, In the step of forming the conduction hole, the insulating base material exposed in the first opening and the second opening of the conformal mask is removed to expose the second metal foil on the bottom surface.
  • a second conduction hole may be formed that connects the first conduction hole and the second opening and the third opening.
  • the printed wiring board may be a flexible printed wiring board.
  • the first and second metal foils may be rolled copper foils.
  • the metal plating may be electrolytic plating.
  • At least one of the above steps may be performed in a roll-to-roll manner.
  • the wiring pattern is formed before forming the conduction holes, there is no need to bury the interlayer conductive paths formed in the conduction holes with etching resist. Therefore, a thin resist film can be used, and fine wiring patterns can be formed in the manufacture of printed wiring boards having interlayer conductive paths.
  • FIG. 1 is a flowchart showing a method for manufacturing a printed wiring board according to an embodiment.
  • FIG. 3 is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to the first embodiment.
  • 2A is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG. 2A.
  • FIG. 2B is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG. 2B.
  • FIG. 2C is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG. 2C.
  • FIG. 2D is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG.
  • FIG. 2D is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG. 2E.
  • FIG. 7 is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a second embodiment.
  • FIG. 3A is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG. 3A.
  • FIG. 3B is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG. 3B.
  • FIG. 3C is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG. 3C.
  • FIG. 3A is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG. 3A.
  • FIG. 3B is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG
  • FIG. 3D is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG. 3D.
  • FIG. 7 is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a third embodiment.
  • FIG. 4A is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a third embodiment, following FIG. 4A.
  • FIG. 3 is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a comparative example.
  • 5A is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a comparative example, following FIG. 5A.
  • FIG. 5B is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a comparative example, following FIG. 5B.
  • FIG. 5C is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a comparative example, following FIG. 5C.
  • FIG. 1 is a flowchart showing a method for manufacturing a printed wiring board according to this embodiment.
  • 2A to 2F are process cross-sectional views illustrating the method for manufacturing a printed wiring board according to this embodiment.
  • the printed wiring board manufactured in this embodiment is a flexible printed wiring board. Note that the printed wiring board manufactured in this embodiment is not limited to a flexible printed wiring board, and may be a rigid printed wiring board.
  • a double-sided metal-clad laminate 2 is prepared (step S1).
  • the double-sided metal-clad laminate 2 includes metal foils 10 and 20 and an insulating base material 30. More specifically, the double-sided metal-clad laminate 2 includes an insulating base material 30 having an upper surface (first main surface) and a lower surface (second main surface opposite to the first main surface); It has a metal foil 10 provided on the upper surface and a metal foil 20 provided on the lower surface of the insulating base material 30.
  • the metal foils 10 and 20 are copper foils (electrolytic copper foils) with a thickness of 12 ⁇ m, and the insulating base material 30 is polyimide with a thickness of 25 ⁇ m.
  • the thickness and material of the metal foils 10 and 20 are not limited to those described above.
  • the thickness of the metal foils 10, 20 is, for example, 5 to 72 ⁇ m.
  • the thicknesses of the metal foil 10 and the metal foil 20 may be different from each other.
  • the material of the metal foils 10 and 20 is not limited to copper, and may be a metal other than copper (for example, silver, aluminum, etc.).
  • copper foil when using copper foil as the metal foils 10 and 20, it is not limited to electrolytic copper foil, but may be rolled copper foil. When manufacturing flexible printed wiring boards, rolled copper foil is preferred. By using rolled copper foil, a flexible printed wiring board with high flexibility can be provided.
  • the thickness and material of the insulating base material 30 are not limited to those described above.
  • the thickness of the insulating base material 30 is, for example, 6 to 100 ⁇ m.
  • the material of the insulating base material 30 is, for example, a fluorine-based material such as PFA (tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer), PTFE (polytetrafluoroethylene), or polyimide such as MPI (modified polyimide) or PI (polyimide).
  • the material may be a type material such as PEEK (polyetheretherketone), PET (polyethylene terephthalate), or PEN (polyethylene naphthalate).
  • the metal foil 10 of the double-sided metal-clad laminate 2 is patterned to form the wiring pattern WP1 and the conformal mask 12. Further, the metal foil 20 is patterned to form the wiring pattern WP2 and the land 22 on the opposite side of the conformal mask 12. Specifically, the following steps S2 to S5 are performed.
  • a resist film 15 is formed on the metal foil 10, and a resist film 25 is formed on the metal foil 20 (step S2).
  • the resist films 15, 25 are formed by laminating a 10 ⁇ m thick negative dry film onto the metal foils 10, 20.
  • the thickness and material of the resist films 15 and 25 are not limited to those described above, but in order to form a fine wiring pattern, it is preferable that the resist films 15 and 25 be thin. Specifically, the thickness is preferably 0.1 times or more and 1.5 times or less the thickness of the metal foils 10 and 20. In this embodiment, the thickness of the resist films 15 and 25 is 0.1 of the thickness of the metal foils 10 and 20. It is more than twice and less than 1 times. Note that the thicknesses of the resist film 15 and the resist film 25 may be different from each other.
  • the etching resist 15a includes a portion corresponding to a wiring pattern WP1 to be described later and a portion corresponding to the conformal mask 12.
  • the etching resist 25a includes a portion corresponding to a wiring pattern WP2 to be described later and a portion corresponding to a land 22 on the opposite side of the conformal mask 12.
  • a proximity exposure machine is used for exposure.
  • the exposure method is not limited to proximity exposure, and may be projection exposure, direct exposure, or the like.
  • etching is performed using the etching resists 15a and 25a as masks. More specifically, the metal foils 10 and 20 not covered with the etching resists 15a and 25a are removed by etching (step S4). In this step, wet etching using copper chloride, for example, is performed.
  • the etching resists 15a and 25a are removed (step S5).
  • the wiring patterns WP1 and WP2, the conformal mask 12, and the land 22 on the opposite side of the conformal mask 12 are formed.
  • the wiring pattern WP1 includes a plurality of wirings 11 arranged at intervals.
  • the wiring pattern WP2 includes a plurality of wirings 21 arranged at intervals.
  • Conformal mask 12 includes openings 12a and lands 12b.
  • the width of the wirings 11 and 21 is 20 ⁇ m. Further, the width (gap width) between the wirings 11 and 21 is 20 ⁇ m. Note that the width of the wirings 11 and 21 may be 10 to 30 ⁇ m. Further, the width between the wirings 11 and 21 may be 10 to 30 ⁇ m.
  • the diameter of the opening 12a is 50 ⁇ m
  • the diameter (outer diameter) of the land 12b is 90 ⁇ m.
  • the diameters of the openings 12a and the lands 12b are not limited to those described above, but in order to form a high-density wiring pattern, they are preferably as small as possible.
  • the wiring pattern WP1, the wiring pattern WP2, the conformal mask 12, and the land 22 may be formed in separate steps. Specifically, the same steps as described above may be repeated each time the wiring pattern WP1, the wiring pattern WP2, the conformal mask 12, and the land 22 are formed. In this case, the order in which the wiring pattern WP1, the wiring pattern WP2, the conformal mask 12, and the land 22 are formed is arbitrary.
  • the wiring pattern WP1 and the conformal mask 12 are formed at the same time. Thereby, alignment between the wiring pattern WP1 and the conformal mask 12 can be omitted. More specifically, alignment between the wiring pattern WP1 and the conduction hole H1 (described later) formed at the position of the opening 12a of the conformal mask 12 can be omitted.
  • the conventional button plating method first, a conductive hole H is formed, and an exposed pattern of a resist film (which becomes a wiring pattern after etching) is aligned with the formed conductive hole H. More specifically, in the step of FIG. 5C (2), the exposure pattern of the resist film 150 is aligned with the metal plating 400. Generally, a shift occurs during the alignment.
  • the wiring pattern WP10 is designed with a margin to avoid the conduction hole H. Further, in order to form the land 120b around the conduction hole H, the diameter of the land 120b is designed to be large. On the other hand, in this embodiment, since the alignment itself can be omitted, the wiring pattern WP1 can be designed to be placed closer to the conduction hole H1. Further, the diameter of the land 12b, which will be described later, can be designed to be small. Therefore, a finer wiring pattern can be formed. Further, since there is no need to provide a separate process for forming the conformal mask 12, the process can be simplified.
  • wiring pattern WP2 may not be formed on the lower surface of the double-sided metal-clad laminate 2 in steps S2 to S5, and the lower surface of the double-sided metal-clad laminate 2 may remain the metal foil 20.
  • the conformal mask 12 is irradiated with laser light to form the conductive hole H1 (step S6). More specifically, from the first main surface side of the insulating base material 30 (the side on which the metal foil 10 is provided), a land is formed with a width wider than the diameter of the opening 12a with respect to the opening 12a of the conformal mask 12. A laser beam whose width is narrower than the diameter of the beam 12b is irradiated. Thereby, using the land 12b as a mask, the insulating base material 30 exposed in the opening 12a is removed to form the conduction hole H1. At this time, a conduction hole H1 is formed at the position of the opening 12a of the conformal mask 12. Note that after removing the insulating base material 30, desmear treatment using plasma or the like may be performed.
  • the type of laser used in this step is a carbon dioxide laser.
  • the type of laser is not limited to a carbon dioxide laser, and may be, for example, a UV-YAG laser.
  • the metal foil 20 (land 22) is exposed on the bottom surface of the conduction hole H1 in the step of forming the conduction hole H1. Thereby, the conduction hole H1 becomes a hole with a bottom.
  • the conduction hole H1 may be formed so that the inner diameter becomes smaller as it gets deeper from the opening 12a, as shown in FIG. 2C (2). Thereby, the metal thin film 13 described later can be easily fixed on the side surface of the conduction hole H1.
  • step S7 dry plating is performed on the wiring pattern WP1, the conformal mask 12, and the conduction hole H1 to form the metal thin film 13 (step S7). More specifically, dry plating is performed on the first main surface side (the side on which the metal foil 10 is provided) of the insulating base material 30, and the insulating base exposed between the wiring pattern WP1 and the wiring pattern WP1 is removed. A metal thin film 13 is formed on the material 30, the conformal mask 12 (that is, the land 12b), and the inner wall (side surface and bottom surface) of the conduction hole H1.
  • the metal thin film 13 By forming the metal thin film 13, the insulating base material 30 exposed on the side surface of the conduction hole H1 becomes conductive, and the electrical connection of the interlayer conductive path 50 described later can be stabilized. Note that in this step, a copper thin film with a thickness of 0.3 ⁇ m is formed as the metal thin film 13 using, for example, copper sputtering.
  • the metal thin film 13 is also formed on the insulating base material 30 exposed in the wiring pattern WP1, the plurality of wirings 11 are temporarily electrically connected to each other. However, in the subsequent step S11, the metal thin film 13 between the wirings 11 is removed.
  • the thickness of the metal thin film 13 is arbitrary, but it must be at least as thick as necessary to make the metal plating 40 (described later) conductive in the conductive hole H1, and that the metal thin film 13 between the wirings 11 In order to minimize the influence on the wiring pattern WP1 when removing the wiring pattern WP1, it is preferable that the thickness is below a certain level (for example, 0.1 times the width of the wirings 11 and 21 or less).
  • wet plating treatment electrolytic plating treatment, chemical plating treatment, etc.
  • dry plating is used as the plating.
  • the metal thin film 13 can be made thinner than wet plating, and when the metal thin film 13 is removed in a subsequent process, it can be easily removed by a small amount of etching, etc. The influence on WP1 can be minimized.
  • the dry plating process can form the metal thin film 13 with few impurities, and the electrical resistance of the metal thin film 13 can be reduced.
  • the conductivity of the metal plating 40 and the land 12b which will be described later, will be reduced. , and the influence on the conductivity of the metal plating 40 and the land 22 can be minimized. That is, the influence on the conductivity of the interlayer conductive path 50, which will be described later, can be minimized.
  • a catalyst for example, palladium, etc.
  • the process can be simplified.
  • the dry plating method is not limited to the sputtering method, but may also be a vapor deposition method or the like. More preferably, the dry plating treatment is performed by a sputtering method. Thereby, the adhesive force of the metal thin film 13 can be increased, and the electrical conductivity of the conductive hole H1 can be stabilized.
  • the same metal as the metal foil 10 may be used.
  • the physical, electrical, and chemical properties are uniform, which simplifies subsequent processing.
  • the sputtering method may be a sputtering method using copper (copper sputtering).
  • the metal thin film 13 becomes a copper thin film.
  • the metal of the metal thin film 13 can be the same metal (copper) as the rolled copper foil, which is preferable in the case of a flexible printed wiring board.
  • plating resists 14 and 24 are formed as shown in FIG. 2D (2) (step S8).
  • the plating resist 14 is provided with an opening 14a through which the conduction hole H1 is exposed.
  • the opening 14a is provided above the land 12b. In this way, the plating resist 14 is formed to cover the wiring pattern WP1 but not to cover the conduction hole H1.
  • a plating resist is formed to cover the entire both sides of the wiring board obtained in FIG. 2D(1). That is, a resist film that covers the wiring pattern WP1 on which the metal thin film 13 is formed, the land 12b, and the conduction hole H1, and a resist film that covers the wiring pattern WP2 and the land 22 are formed.
  • the formed resist film is exposed and developed to form plating resists 14 and 24.
  • the diameter of the opening 14a provided in the plating resist 14 is 70 ⁇ m.
  • the diameter of the opening 14a is equal to the diameter of a button land 41, which will be described later.
  • a direct exposure machine is used for exposure.
  • the exposure method is not limited to this and may be proximity exposure, projection exposure, etc., but direct exposure is preferably used. Even if the wiring board expands or contracts in a process prior to the exposure process, the direct exposure machine can draw an exposure pattern according to the expansion or contraction. Therefore, there is no need to design the diameter of the opening 14a in the plating resist 14 to be large in anticipation of the expansion or contraction of the wiring board, and as a result, the diameter of the opening 14a in the plating resist 14 can be made smaller. This allows the diameter of the button land 41, which will be described later, to be made smaller, and the diameter of the land 12b to be made even smaller.
  • the wiring pattern WP1 is entirely covered with the plating resist 14, but the present invention is not limited to this.
  • only the wiring pattern WP1 existing around at least the conduction hole H1 may be covered with the plating resist 14.
  • plating treatment for example, immersion in a plating solution
  • plating treatment is performed only on the conduction hole H1 and the wiring pattern WP1 around the conduction hole H1.
  • a plating process is performed to form metal plating 40 inside the conduction hole H1 (step S9). More specifically, metal plating 40 is formed inside the opening 14a of the plating resist 14 in which the metal thin film 13 is formed. Metal plating 40 includes button lands 41. By forming the metal plating 40, a part of the metal thin film 13 is covered with the metal plating 40. Specifically, a portion of the metal thin film 13 formed on the inner wall (side surface and bottom surface) of the conduction hole H1 is covered with the metal plating 40.
  • the metal plating 40 may be formed not only inside the conduction hole H1 but also on the land 12b, as shown in FIG. 2E(1). At this time, a part of the land 12b is covered with the button land 41, as shown in FIG. 2E(1). More specifically, a portion of the metal thin film 13 formed on the land 12b is covered with metal plating 40 (button land 41).
  • step S10 the plating resists 14 and 24 are removed. Thereby, an interlayer conductive path 50 that electrically connects the land 12b and the land 22 is formed.
  • the interlayer conductive path 50 is a bottomed via. Note that in FIG. 2E(2), the upper surface of the metal plating 40 is flat, but the upper surface of the metal plating 40 may have a recess.
  • the metal plating 40 is electrolytic plating. More specifically, electroplating is performed to form metal plating 40. By using electrolytic plating, the time for plating treatment can be shortened and manufacturing efficiency can be improved compared to the case where electroless plating is used.
  • metal plating 40 may be made of the same metal as the metal foil 10. By using the same metal, they have the same physical, electrical, and chemical properties, making handling easier.
  • metal plating 40 may be copper plating. By forming the copper plating, the metal of the metal plating 40 can be the same metal (copper) as the rolled copper foil that is preferable in the case of a flexible printed wiring board.
  • step S11 the exposed portion of the metal thin film 13, that is, the portion of the metal thin film 13 that is not covered with the metal plating 40 is removed. More specifically, in the metal thin film 13, the metal thin film formed on the portion of the land 12b not covered by the button land 41, the wiring 11, and the insulating base material 30 exposed between the wiring 11 is removed. . However, the portion of the metal thin film 13 covered with the metal plating 40 is not removed. This insulates the wiring 11 of the wiring pattern WP1. Note that this does not apply when the wirings 11 are designed to be electrically connected to each other in a portion other than the cross section shown in FIG. 2F.
  • the metal thin film 13 is removed by flash etching.
  • the etching amount is, for example, 0.5 ⁇ m in terms of electrolytic copper foil. Since the amount of etching is extremely small, the effect on the wiring width can be minimized.
  • the wirings 11 and 21 become slightly thinner. Therefore, when forming the etching resists 15a, 25a in step S3, the widths of the etching resists 15a, 25a above the wirings 11, 21 may be made thicker, and the width between them (gap width) may be made narrower.
  • step S1 to S11 printed wiring board 1 shown in FIG. 2F can be manufactured.
  • the wiring patterns WP1 and WP2 are formed before forming the conduction hole H1 and the metal plating 40, there is no need to form a thick resist film to bury the metal plating 40. Therefore, thin resist films 15 and 25 can be used to form wiring patterns WP1 and WP2.
  • the resist films 15 and 25 are formed before forming the conduction hole H1, no resist film is formed on the conduction hole H1. Therefore, problems caused by so-called tenting can be avoided. For example, problems such as unnecessary etching due to tearing of the tenting can be avoided. Further, since it is not necessary to form a thick resist film to avoid problems caused by tenting, thinner resist films 15 and 25 can be used.
  • thin resist films 15 and 25 can be used, so the resolution of exposure and development is increased, and etching resists 15a and 25a having fine patterns can be formed. Since the etching resists 15a and 25a become thinner, the etching resolution increases and fine wiring patterns WP1 and WP2 can be formed. That is, fine wiring patterns can be formed in the manufacture of printed wiring boards having interlayer conductive paths.
  • the formation of the wiring pattern WP1 and the formation of the conformal mask 12 can be performed at the same time. Therefore, the process of aligning the exposed pattern of the resist film (which becomes the wiring pattern after etching) with the conduction hole can be omitted, and the wiring pattern can be designed to be placed closer to the conduction hole.
  • the diameter of the land 12b can be designed to be small. Therefore, finer wiring patterns can be formed in the manufacture of printed wiring boards having interlayer conductive paths.
  • plating can be performed only on specific parts of the substrate, so the parts where electrolytic plating is present can be limited to the metal plating 40.
  • the bending portion can be made of a high-density wiring pattern made of rolled copper foil with high flexibility. Flexible printed wiring boards can be manufactured.
  • steps S1 to S11 may be performed using a roll-to-roll method (continuous conveyance). Thereby, the manufacturing efficiency of flexible printed wiring boards can be improved. Alternatively, all steps may be performed in a roll-to-roll manner.
  • the number of conductive holes and the conformal mask for forming the conductive holes is one, but the number of conductive holes and the number of conformal masks for forming each conductive hole is one.
  • a formal mask may also be formed.
  • the main surface of the insulating base material 30 where the opening of each conductive hole exists is the first main surface and the second main surface. Either is fine.
  • the metal thin film 13 may be formed on the second main surface as well.
  • a double-sided metal-clad laminate having two layers of metal foil was used, but a multilayer printed wiring board having three or more layers of metal foil may be used as the starting material.
  • the method according to the present embodiment assumes that the outermost layer of the multilayer printed wiring board on which the wiring pattern and the interlayer conductive path are to be formed is the first main surface of the double-sided metal-clad laminate according to the present embodiment. apply.
  • a double-sided metal-clad laminate 2 is prepared (step S1).
  • the metal foils 10 and 20 are rolled copper foils with a thickness of 12 ⁇ m, and the insulating base material is polyimide with a thickness of 25 ⁇ m.
  • the metal foil 10 of the double-sided metal-clad laminate 2 is patterned to form the wiring pattern WP1 and the conformal mask 12. Further, the metal foil 20 is patterned to form a wiring pattern WP2 and a land 22b. Specifically, the following steps S2 to S5 are performed.
  • a resist film 15 is formed on the metal foil 10, and a resist film 25 is formed on the metal foil 20 (step S2).
  • negative dry films with a thickness of 15 ⁇ m are used as the resist films 15 and 25.
  • the etching resist 15a includes a portion corresponding to a wiring pattern WP1, which will be described later, and a portion corresponding to the conformal mask 12. Further, the etching resist 25a includes a portion corresponding to a wiring pattern WP2, which will be described later, and a portion corresponding to the land 22b.
  • a double-sided simultaneous exposure machine is used for exposure.
  • the opening 12a of the conformal mask 12 and the opening 22a which will be described later, can be overlapped with high precision.
  • the deviation between the center positions of the opening 12a and the opening 22a is within ⁇ 20 ⁇ m.
  • the exposure method may be projection exposure, proximity exposure, direct exposure, or the like.
  • etching is performed using the etching resists 15a, 25a as masks to remove the metal foils 10, 20 that are not covered with the etching resists 15a, 25a (step S4).
  • the etching resists 15a and 25a are removed (step S5).
  • wiring patterns WP1 and WP2, conformal mask 12, and land 22b are formed.
  • An opening 22a exists inside the land 22b.
  • the diameter of the opening 12a is 50 ⁇ m
  • the diameter of the opening 22a is 90 ⁇ m.
  • the diameters of the openings 12a and 22a are arbitrary, but preferably they are formed so that the opening 22a includes the opening 12a in a plan view. That is, the diameter of the opening 22a is larger than the diameter of the opening 12a. Thereby, it is possible to easily form the conduction hole H2, which will be described later, as a through hole. Specifically, even if the center positions of the apertures 12a and 22a are misaligned, it is possible to prevent the metal foil 20 (particularly the land 22b) from overlapping the laser beam emission surface and hinder laser processing. can. In other words, the opening 22a is an escape hole for the laser beam.
  • Step S6 by irradiating the conformal mask 12 with a laser beam, the insulating base material 30 exposed in the opening 12a of the conformal mask 12 is removed to form a conductive hole H2.
  • the type of laser is a UV-YAG laser.
  • the type of laser is not limited to the UV-YAG laser, and may be, for example, a carbon dioxide laser.
  • the conduction hole H2 becomes a through hole that communicates the opening 12a and the opening 22a.
  • the conductive hole H2 may be formed so that the inner diameter becomes smaller as it gets deeper from the opening 12a. Thereby, the metal thin film 13 described later can be easily fixed on the side surface of the conduction hole H2.
  • step S7 dry plating is performed on the wiring pattern WP1, the conformal mask 12, and the conduction hole H2 to form the metal thin film 13 (step S7). More specifically, a dry plating process is performed on the first main surface side (the side on which the metal foil 10 is provided) of the insulating base material 30, and the wiring pattern WP1 and the conformal mask 12 (namely, the land 12b) are formed. , and the metal thin film 13 is formed on the side surface of the conduction hole H2. Further, the wiring pattern WP2 and the land 22b are also subjected to dry plating treatment to form the metal thin film 13.
  • dry plating is also performed on the second main surface side of the insulating base material 30 (the side on which the metal foil 20 is provided), and the metal thin film 13 is formed on the wiring pattern WP2 and the land 22b. do. Note that the formation of the metal thin film 13 on the first main surface side and the formation of the metal thin film 13 on the second main surface side may be performed either first or at the same time.
  • copper sputtering is performed to form a copper thin film with a thickness of 0.3 ⁇ m as the metal thin film 13.
  • plating resists 14 and 24 are formed that cover the wiring patterns WP1 and WP2 but do not cover the conduction holes H2 (step S8).
  • An opening 14a is provided in the plating resist 14 at a portion of the conduction hole H2 so as not to cover the conduction hole H2.
  • the plating resist 24 is provided with an opening 24a at the conduction hole H2.
  • the diameter of the opening 14a is 100 ⁇ m
  • the diameter of the opening 24a is 140 ⁇ m.
  • the opening 14a is located above the land 12b. Further, the opening 24a is located above the land 22b.
  • the present invention is not limited to this, and at least only the wiring pattern WP1 around the conduction hole H2 may be covered.
  • the wiring pattern WP2 is entirely covered with the plating resist 24, the present invention is not limited to this, and at least only the wiring pattern WP2 around the conduction hole H2 may be covered. In this case, the plating process may be performed only on the conduction hole H2 and the wiring patterns WP1 and WP2 around the conduction hole H2.
  • metal plating 40 is formed inside the conduction hole H2 by performing a plating process (step S9). More specifically, metal plating 40 is formed inside the opening 14a of the plating resist 14 in which the metal thin film 13 is formed and inside the opening 24a of the plating resist 24. Metal plating 40 includes button lands 41 and 42. Thereafter, as shown in FIG. 3D (2), the plating resists 14 and 24 are removed (step S10). This forms an interlayer conductive path 50 that electrically connects land 12b and land 22b.
  • the metal plating 40 is electrolytic copper plating.
  • the interlayer conductive path 50 is a plated through hole.
  • a plated through hole is formed as the interlayer conductive path 50, but the present invention is not limited to this, and a via may be formed to fill the through hole.
  • Step S11 the exposed portion of the metal thin film 13, that is, the portion of the metal thin film 13 that is not covered with the metal plating 40 (or button lands 41, 42) is removed.
  • the printed wiring board 1A according to the present embodiment can be manufactured.
  • a printed wiring board having plated through holes can be manufactured.
  • the number of conductive holes and the conformal mask for forming the conductive holes is one, but the number of conductive holes and the number of conformal masks for forming each conductive hole is one.
  • a formal mask may also be formed.
  • the conformal mask for forming each conduction hole may be present on either the first main surface or the second main surface.
  • FIGS. 1, 2A, and 4A to 4B A third embodiment will be described with reference to FIGS. 1, 2A, and 4A to 4B.
  • both the bottomed hole of the first embodiment and the through hole of the second embodiment are formed. That is, the printed wiring board 1B manufactured in this embodiment has both bottomed vias and plated through holes.
  • this embodiment will be described with a focus on the differences from the first and second embodiments, and descriptions of similar parts will be omitted.
  • a double-sided metal-clad laminate 2 is prepared (step S1).
  • the metal foil 10 of the double-sided metal-clad laminate 2 is patterned to form a wiring pattern WP1, a conformal mask 12, and a conformal mask 12A. Further, the metal foil 20 is patterned to form the wiring pattern WP2, the land 22 facing the conformal mask 12 with the insulating base material 30 in between, and the land 22b (steps S2 to S5).
  • Conformal mask 12 includes openings 12a and lands 12b. Conformal mask 12A includes opening 12Aa and land 12Ab. An opening 22a exists inside the land 22b. Although the diameters of the openings 12a, 12Aa, and 22a are arbitrary, they are preferably formed so that the opening 22a includes the opening 12Aa in a plan view.
  • the conduction hole H2 which is a through hole
  • the insulating base material 30 exposed in the opening 12a of the conformal mask 12 is removed, and the conductor, which is a bottomed hole, is removed.
  • a common hole H1 is formed.
  • the insulating base material 30 exposed in the opening 12Aa of the conformal mask 12A is removed to form a conduction hole H2 which is a through hole (step S6).
  • the types of lasers include, for example, UV-YAG lasers and carbon dioxide lasers.
  • the conduction hole H2 is a through hole that allows the opening 12Aa and the opening 22a to communicate with each other. Note that either the conduction hole H1 or the conduction hole H2 may be formed first, or they may be formed at the same time.
  • step S7 dry plating is performed on the wiring patterns WP1 and WP2, the conformal masks 12 and 12A, and the conductive holes H1 and H2 to form a metal thin film 13 (step S7).
  • the conduction hole H2 is a through hole
  • the metal thin film 13 is formed on both the first main surface and the second main surface of the insulating base material 30.
  • an interlayer conductive path (bottomed via) 50 electrically connects land 12b and land 22, and an interlayer conductive path (bottomed via) electrically connects land 12Ab and land 22b.
  • Form a plated through hole) 50A More specifically, first, a plating resist is formed that covers the wiring patterns WP1 and WP2 but does not cover the conductive holes H1 and H2 (step S8). Next, metal plating 40 is formed inside the conduction hole H1, and metal plating 40A is formed inside the conduction hole H2 (step S9). Metal plating 40 includes button lands 41. The metal plating 40A includes button lands 41A and 42. After that, the plating resist is removed (step S10).
  • the metal thin film is removed (step S11).
  • the printed wiring board 1B according to the present embodiment can be manufactured.
  • a printed wiring board having both bottomed vias and plated through holes can be manufactured.
  • the conformal mask 12 and the conformal mask 12A are formed on the same main surface (first main surface) of the double-sided metal-clad laminate 2, but the conformal mask 12 and the conformal mask 12A are not limited to this.
  • the conformal masks 12A may be formed on different main surfaces of the double-sided metal-clad laminate 2, respectively.
  • a plurality of conduction holes H1 and/or a plurality of conduction holes H2 may be formed.
  • a conformal mask for forming each conduction hole may be formed on either side of the first main surface or the second main surface of the double-sided metal-clad laminate 2.
  • a via filled via may be formed to fill the through hole.
  • Double-sided metal-clad laminate 10 Double-sided metal-clad laminate 10, 20, 100, 200 Metal foil 11, 21, 110, 210 Wiring 12, 12A Conformal mask 12a, 12Aa, 22a Opening 12b, 12Ab, 22b, 120b Land 13 Metal thin film 14, 24, 140, 240 Plating resist 14a, 24a, 140a Opening 15, 25, 150, 250 Resist film 15a, 25a, 150a, 250a Etching resist 22, 220 Land 30, 300 Insulating base material 40, 40A , 400 Metal plating 41, 41A, 42, 410 Button land 50, 50A, 500 Interlayer conductive path H1, H2, H Conductive hole WP1, WP2, WP10, WP20 Wiring pattern

Abstract

The present invention provides a method for forming a fine wiring pattern in the production of a printed wiring board having an inter-layer electrically-conductive path. A method for producing a printed wiring board 1 according to an embodiment of the present invention comprises: a step for preparing a double-sided metal-clad laminated board 2 that includes an insulating substrate 30 having a first main surface and a second main surface opposite to the first main surface, a metal foil 10 provided on the first main surface, and a metal foil 20 provided on the second main surface; a step for forming a wiring pattern WP1 and a conformal mask 12 by patterning the metal foil 10 of the double-sided metal-clad laminated board 2; a step for forming a conduction hole by irradiating the conformal mask 12 with a laser beam and removing the insulating substrate 30 exposed at an opening 12a of the conformal mask 12; a step for forming a plating resist 14 that covers the wiring pattern WP1 and that does not cover the conduction hole; a step for forming a metal plating 40 inside the conduction hole; and a step for removing the plating resist 14.

Description

プリント配線板の製造方法Manufacturing method of printed wiring board
 本発明は、プリント配線板の製造方法に関し、より詳しくは、層間導電路を有するプリント配線板の製造において微細な配線パターンを形成するためのプリント配線板の製造方法に関する。 The present invention relates to a method for manufacturing a printed wiring board, and more particularly, to a method for manufacturing a printed wiring board for forming fine wiring patterns in manufacturing a printed wiring board having interlayer conductive paths.
 スマートホンなどの情報通信機器を始めとして、電子機器は小型化、軽量化に向かう傾向にあり、基板の小型化、高密度化が求められている。基板の高密度化とは、限られた基板外形に対し、より多くの配線を形成することである。より多くの配線を形成するためには、配線パターンの微細化および多層化が必要である。 Electronic devices, including information and communication devices such as smartphones, are becoming smaller and lighter, and there is a need for smaller, higher-density circuit boards. Increasing the density of a substrate means forming more wiring lines on a limited outer shape of the substrate. In order to form more wiring, it is necessary to miniaturize and multilayer wiring patterns.
 配線パターンの形成にはエッチングを用いる。サブトラクティブ法は、エッチングにより配線パターンを形成する方法の一つであり、特にフレキシブルプリント配線板の配線パターンの形成において一般に用いられる。サブトラクティブ法においては、配線の深さ方向へのエッチングと、配線の幅方向へのエッチングが等方的に起こる。よって、微細な配線パターンを形成するためには、配線に用いられる金属箔は、薄い方が有利である。 Etching is used to form the wiring pattern. The subtractive method is one of the methods of forming wiring patterns by etching, and is generally used particularly in forming wiring patterns of flexible printed wiring boards. In the subtractive method, etching in the depth direction of the wiring and etching in the width direction of the wiring occur isotropically. Therefore, in order to form a fine wiring pattern, it is advantageous for the metal foil used for the wiring to be thinner.
 一方、多層化のため、両面に金属箔を有する基板や多層の基板には、ビア、スルーホールなどの層間導電路が形成され、各層の配線は、層間導電路によって電気的に接続される。層間導電路を形成する際には、導通用孔に金属めっきを形成する必要がある。特許文献1~3には、金属めっきを形成する方法の一態様として、ボタンめっき法と呼ばれる方法が記載されている。 On the other hand, due to multilayering, interlayer conductive paths such as vias and through holes are formed in substrates with metal foil on both sides and multilayer substrates, and wiring in each layer is electrically connected by the interlayer conductive paths. When forming an interlayer conductive path, it is necessary to form metal plating on the conductive hole. Patent Documents 1 to 3 describe a method called a button plating method as one embodiment of a method for forming metal plating.
特開2006-108270号公報Japanese Patent Application Publication No. 2006-108270 特開平11-195849号公報Japanese Unexamined Patent Publication No. 11-195849 特許第6884333号Patent No. 6884333
 ボタンめっき法は、基板の特定部分にのみめっき処理を施す方法である。ボタンめっき法における、配線パターンおよび層間導電路の形成方法の一例について、図5A~図5Dを参照して説明する。図5A~図5Dは、比較例に係るプリント配線板の製造方法を説明する工程断面図である。 The button plating method is a method in which plating is applied only to specific parts of the substrate. An example of a method for forming a wiring pattern and an interlayer conductive path in the button plating method will be described with reference to FIGS. 5A to 5D. 5A to 5D are process cross-sectional views illustrating a method for manufacturing a printed wiring board according to a comparative example.
 図5A(1)に示すように、金属箔100,200および絶縁基材300を備える両面金属張積層板を準備する。次に、図5A(1)に示すように、当該両面金属張積層板に対して、導通用孔Hを形成する。次に、図5A(2)に示すように、両面金属張積層板の上面および下面にめっきレジスト140およびめっきレジスト240をそれぞれ形成する。めっきレジスト140には、導通用孔Hの部分に開口140aが設けられている。すなわち、めっきレジスト140は、導通用孔Hを被覆しない。 As shown in FIG. 5A(1), a double-sided metal-clad laminate including metal foils 100, 200 and an insulating base material 300 is prepared. Next, as shown in FIG. 5A(1), conduction holes H are formed in the double-sided metal-clad laminate. Next, as shown in FIG. 5A(2), plating resist 140 and plating resist 240 are formed on the upper and lower surfaces of the double-sided metal-clad laminate, respectively. An opening 140a is provided in the plating resist 140 at a portion of the conduction hole H. That is, the plating resist 140 does not cover the conductive holes H.
 次に、図5B(1)に示すように、めっき処理を行い、導通用孔Hの内部に金属めっき400(ボタンめっき)を形成する。金属めっき400には、ボタンランド410が含まれる。その後、図5B(2)に示すように、めっきレジスト140,240を除去する。 Next, as shown in FIG. 5B(1), a plating process is performed to form metal plating 400 (button plating) inside the conduction hole H. Metal plating 400 includes button lands 410. Thereafter, as shown in FIG. 5B(2), the plating resists 140 and 240 are removed.
 次に、図5C(1)に示すように、両面金属張積層板の上面および下面を覆うようにレジスト膜150およびレジスト膜250をそれぞれ形成する。金属めっき400はレジスト膜150に埋め込まれる。次に、図5C(2)に示すように、レジスト膜150,250を露光および現像して、エッチングレジスト150a,250aを形成する。 Next, as shown in FIG. 5C (1), a resist film 150 and a resist film 250 are respectively formed to cover the upper and lower surfaces of the double-sided metal-clad laminate. Metal plating 400 is embedded in resist film 150. Next, as shown in FIG. 5C (2), the resist films 150 and 250 are exposed and developed to form etching resists 150a and 250a.
 次に、図5D(1)に示すように、エッチングレジスト150aに被覆されていない金属箔100およびエッチングレジスト250aに被覆されていない金属箔200を除去するエッチングを行う。その後、図5D(2)に示すように、エッチングレジスト150a,250aを除去する。以上の工程により、複数の配線110を有する配線パターンWP10と、ランド120bと、複数の配線210を有するWP20と、ランド120bの反対側のランド220と、層間導電路500とを形成する。 Next, as shown in FIG. 5D(1), etching is performed to remove the metal foil 100 not covered with the etching resist 150a and the metal foil 200 not covered with the etching resist 250a. Thereafter, as shown in FIG. 5D(2), the etching resists 150a and 250a are removed. Through the above steps, a wiring pattern WP10 having a plurality of wirings 110, a land 120b, a WP20 having a plurality of wirings 210, a land 220 on the opposite side of the land 120b, and an interlayer conductive path 500 are formed.
 ボタンめっき法は、配線パターンの微細化に際し、次のような課題を有する。図5B(2)に示すように、金属めっき400の上部は、金属箔100から突出する。金属めっき400が、その後の工程でエッチングされないようにするため、図5C(1)に示すように、レジスト膜150を形成する際に、金属箔100から突出した金属めっき400を埋め込む必要がある。このため、レジスト膜150を厚く形成する。しかしながら、レジスト膜150を厚くすると、エッチングの解像度が低下して、微細な配線パターンを形成することが難しくなる。 The button plating method has the following problems when miniaturizing wiring patterns. As shown in FIG. 5B(2), the upper part of the metal plating 400 protrudes from the metal foil 100. In order to prevent the metal plating 400 from being etched in subsequent steps, it is necessary to bury the metal plating 400 protruding from the metal foil 100 when forming the resist film 150, as shown in FIG. 5C(1). For this reason, the resist film 150 is formed thick. However, when the resist film 150 is made thicker, the etching resolution decreases, making it difficult to form fine wiring patterns.
 本発明は、上記技術的認識に基づいてなされたものであり、その目的は、層間導電路を有するプリント配線板の製造において微細な配線パターンを形成するためのプリント配線板を製造する方法を提供することである。 The present invention has been made based on the above technical recognition, and its purpose is to provide a method for manufacturing a printed wiring board for forming a fine wiring pattern in manufacturing a printed wiring board having interlayer conductive paths. It is to be.
 本発明に係るプリント配線板の製造方法は、
 第1の主面および前記第1の主面の反対側の第2の主面を有する絶縁基材と、前記第1の主面に設けられた第1の金属箔と、前記第2の主面に設けられた第2の金属箔と、を有する両面金属張積層板を用意する工程と、
 前記両面金属張積層板の前記第1の金属箔をパターニングして、配線パターンおよびコンフォーマルマスクを形成する工程と、
 前記コンフォーマルマスクにレーザ光を照射することにより、前記コンフォーマルマスクの開口に露出した前記絶縁基材を除去して導通用孔を形成する工程と、
 前記配線パターンを被覆し、前記導通用孔を被覆しないめっきレジストを形成する工程と、
 前記導通用孔の内部に金属めっきを形成する工程と、
 前記めっきレジストを除去する工程と、
を備えることを特徴とする。
The method for manufacturing a printed wiring board according to the present invention includes:
an insulating base material having a first main surface and a second main surface opposite to the first main surface; a first metal foil provided on the first main surface; a step of preparing a double-sided metal-clad laminate having a second metal foil provided on the surface;
patterning the first metal foil of the double-sided metal-clad laminate to form a wiring pattern and a conformal mask;
irradiating the conformal mask with laser light to remove the insulating base material exposed in the opening of the conformal mask to form a conductive hole;
forming a plating resist that covers the wiring pattern but does not cover the conduction hole;
forming metal plating inside the conduction hole;
removing the plating resist;
It is characterized by having the following.
 また、前記プリント配線板の製造方法において、
 前記配線パターンを形成する工程は、
 前記第1の金属箔の上に、前記第1の金属箔の厚さの1.5倍以下の厚さを有するレジスト膜を形成する工程と、
 前記レジスト膜を露光および現像して、前記配線パターンに対応するエッチングレジストを形成する工程と、
 前記エッチングレジストで被覆されていない前記第1の金属箔をエッチングで除去することにより、前記配線パターンを形成する工程と、
 前記エッチングレジストを除去する工程とを備えるようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
The step of forming the wiring pattern includes:
forming a resist film having a thickness of 1.5 times or less than the thickness of the first metal foil on the first metal foil;
exposing and developing the resist film to form an etching resist corresponding to the wiring pattern;
forming the wiring pattern by etching away the first metal foil that is not covered with the etching resist;
The method may further include a step of removing the etching resist.
 また、前記プリント配線板の製造方法において、
 前記配線パターンおよびコンフォーマルマスクを形成する工程において、前記配線パターンの形成と、前記コンフォーマルマスクとを、同時に形成するようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
In the step of forming the wiring pattern and the conformal mask, the wiring pattern and the conformal mask may be formed simultaneously.
 また、前記プリント配線板の製造方法において、
 前記めっきレジストを形成する工程の前に、前記配線パターン、前記配線パターン間に露出した絶縁基材および前記導通用孔に対して乾式めっき処理を施す工程と、
 前記めっきレジストを除去する工程の後に、前記乾式めっき処理により形成された金属薄膜のうち、前記金属めっきで覆われていない部分を除去する工程をさらに備えるようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
Before the step of forming the plating resist, performing a dry plating treatment on the wiring pattern, the insulating base material exposed between the wiring patterns, and the conduction hole;
After the step of removing the plating resist, the method may further include a step of removing a portion of the metal thin film formed by the dry plating process that is not covered with the metal plating.
 また、前記プリント配線板の製造方法において、
 前記乾式めっき処理は、スパッタリング法により行うようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
The dry plating process may be performed using a sputtering method.
 また、前記プリント配線板の製造方法において、
 前記金属箔は、銅箔であり、
 前記スパッタリング法は、銅を用いたスパッタリング法であり、
 前記金属薄膜は銅薄膜であるようにしてもよい。
In addition, in the method for producing a printed wiring board,
The metal foil is a copper foil,
The sputtering method is a sputtering method using copper,
The metal thin film may be a copper thin film.
 また、前記プリント配線板の製造方法において、
 前記導通用孔を形成する工程は、前記導通用孔の底面に前記第2の金属箔が露出するように行うようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
The step of forming the conduction hole may be performed such that the second metal foil is exposed at the bottom of the conduction hole.
 また、前記プリント配線板の製造方法において、
 前記両面金属張積層板の前記第2の金属箔をパターニングして、配線パターンと、平面視で前記開口を包含する別の開口と、ランドとを形成し、
 前記導通用孔を形成する工程は、前記導通用孔が前記開口および前記別の開口を連通させる貫通孔となるように行うようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
patterning the second metal foil of the double-sided metal-clad laminate to form a wiring pattern, another opening that includes the opening in plan view, and a land;
The step of forming the conduction hole may be performed such that the conduction hole becomes a through hole that communicates the opening and the other opening.
 また、前記プリント配線板の製造方法において、
 前記コンフォーマルマスクは、前記開口として、第1の開口および第2の開口を含み、 前記両面金属張積層板の前記第2の金属箔をパターニングして、第3の開口を形成する工程であって、前記第3の開口が平面視で前記コンフォーマルマスクの前記第2の開口を包含する工程をさらに備え、
 前記導通用孔を形成する工程において、前記コンフォーマルマスクの前記第1の開口および前記第2の開口に露出した前記絶縁基材を除去して、底面に前記第2の金属箔が露出する第1の導通用孔ならびに前記第2の開口および前記第3の開口を連通させる第2の導通用孔を形成するようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
The conformal mask includes a first opening and a second opening as the opening, and the second metal foil of the double-sided metal-clad laminate is patterned to form a third opening. further comprising a step in which the third opening includes the second opening of the conformal mask in a plan view,
In the step of forming the conduction hole, the insulating base material exposed in the first opening and the second opening of the conformal mask is removed to expose the second metal foil on the bottom surface. A second conduction hole may be formed that connects the first conduction hole and the second opening and the third opening.
 また、前記プリント配線板の製造方法において、
 前記プリント配線板は、フレキシブルプリント配線板であるようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
The printed wiring board may be a flexible printed wiring board.
 また、前記プリント配線板の製造方法において、
 前記第1および第2の金属箔は、圧延銅箔であるようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
The first and second metal foils may be rolled copper foils.
 また、前記プリント配線板の製造方法において、
 前記金属めっきは、電解めっきであるようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
The metal plating may be electrolytic plating.
 また、前記プリント配線板の製造方法において、
 前記各工程のうち少なくとも一つの工程をロールツーロール方式にて行うようにしてもよい。
Further, in the method for manufacturing the printed wiring board,
At least one of the above steps may be performed in a roll-to-roll manner.
 本発明に係るプリント配線板の製造方法によれば、導通用孔を形成する前に配線パターンを形成することから、導通用孔に形成された層間導電路をエッチングレジストで埋め込む必要がない。したがって、薄いレジスト膜を用いることができ、層間導電路を有するプリント配線板の製造において微細な配線パターンを形成することができる。 According to the method for manufacturing a printed wiring board according to the present invention, since the wiring pattern is formed before forming the conduction holes, there is no need to bury the interlayer conductive paths formed in the conduction holes with etching resist. Therefore, a thin resist film can be used, and fine wiring patterns can be formed in the manufacture of printed wiring boards having interlayer conductive paths.
実施形態に係るプリント配線板の製造方法を示すフローチャートである。1 is a flowchart showing a method for manufacturing a printed wiring board according to an embodiment. 第1の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 3 is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to the first embodiment. 図2Aに続く、第1の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。2A is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG. 2A. FIG. 図2Bに続く、第1の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 2B is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG. 2B. 図2Cに続く、第1の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 2C is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG. 2C. 図2Dに続く、第1の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 2D is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG. 2D. 図2Eに続く、第1の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 2E is a process cross-sectional view illustrating the method for manufacturing the printed wiring board according to the first embodiment, following FIG. 2E. 第2の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 7 is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a second embodiment. 図3Aに続く、第2の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 3A is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG. 3A. 図3Bに続く、第2の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 3B is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG. 3B. 図3Cに続く、第2の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 3C is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG. 3C. 図3Dに続く、第2の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 3D is a process cross-sectional view illustrating the method for manufacturing a printed wiring board according to the second embodiment, following FIG. 3D. 第3の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 7 is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a third embodiment. 図4Aに続く、第3の実施形態に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 4A is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a third embodiment, following FIG. 4A. 比較例に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 3 is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a comparative example. 図5Aに続く、比較例に係るプリント配線板の製造方法を説明する工程断面図である。5A is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a comparative example, following FIG. 5A. FIG. 図5Bに続く、比較例に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 5B is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a comparative example, following FIG. 5B. 図5Cに続く、比較例に係るプリント配線板の製造方法を説明する工程断面図である。FIG. 5C is a process cross-sectional view illustrating a method for manufacturing a printed wiring board according to a comparative example, following FIG. 5C.
 以下、本発明に係る実施形態について図面を参照しながら説明する。なお、各図においては、同等の機能を有する構成要素に同一の符号を付している。また、図面は模式的なものであり、各実施形態に係る特徴部分を中心に示すものであり、厚みと平面寸法との関係、各層の厚みの比率等は現実のものとは異なる。 Hereinafter, embodiments according to the present invention will be described with reference to the drawings. Note that in each figure, the same reference numerals are given to components having the same function. Further, the drawings are schematic and mainly show the characteristic parts of each embodiment, and the relationship between the thickness and the planar dimension, the ratio of the thickness of each layer, etc. are different from the actual drawings.
(第1の実施形態)
 図1および図2A~図2Fを参照しつつ、第1の実施形態に係るプリント配線板の製造方法の一例を説明する。図1は、本実施形態に係るプリント配線板の製造方法を示すフローチャートである。図2A~図2Fは、本実施形態に係るプリント配線板の製造方法を説明する工程断面図である。
(First embodiment)
An example of the method for manufacturing a printed wiring board according to the first embodiment will be described with reference to FIG. 1 and FIGS. 2A to 2F. FIG. 1 is a flowchart showing a method for manufacturing a printed wiring board according to this embodiment. 2A to 2F are process cross-sectional views illustrating the method for manufacturing a printed wiring board according to this embodiment.
 本実施形態において製造するプリント配線板は、フレキシブルプリント配線板である。なお、本実施形態において製造するプリント配線板は、フレキシブルプリント配線板に限定されず、リジッドプリント配線板であってもよい。 The printed wiring board manufactured in this embodiment is a flexible printed wiring board. Note that the printed wiring board manufactured in this embodiment is not limited to a flexible printed wiring board, and may be a rigid printed wiring board.
 図2A(1)に示すように、両面金属張積層板2を用意する(ステップS1)。両面金属張積層板2は、金属箔10,20と、絶縁基材30とを有する。より詳しくは、両面金属張積層板2は、上面(第1の主面)および下面(第1の主面の反対側の第2の主面)を有する絶縁基材30と、絶縁基材30の上面に設けられた金属箔10と、絶縁基材30の下面に設けられた金属箔20とを有する。 As shown in FIG. 2A(1), a double-sided metal-clad laminate 2 is prepared (step S1). The double-sided metal-clad laminate 2 includes metal foils 10 and 20 and an insulating base material 30. More specifically, the double-sided metal-clad laminate 2 includes an insulating base material 30 having an upper surface (first main surface) and a lower surface (second main surface opposite to the first main surface); It has a metal foil 10 provided on the upper surface and a metal foil 20 provided on the lower surface of the insulating base material 30.
 たとえば、金属箔10,20は厚さ12μmの銅箔(電解銅箔)であり、絶縁基材30は厚さ25μmのポリイミドである。 For example, the metal foils 10 and 20 are copper foils (electrolytic copper foils) with a thickness of 12 μm, and the insulating base material 30 is polyimide with a thickness of 25 μm.
 なお、金属箔10,20の厚さおよび材料は、上記のものに限られない。金属箔10,20の厚さは、たとえば5~72μmである。また、金属箔10と金属箔20の厚さは、互いに異なっていてもよい。さらに、金属箔10,20の材料は、銅に限定されず、銅以外の金属(たとえば銀、アルミニウムなど)であってもよい。 Note that the thickness and material of the metal foils 10 and 20 are not limited to those described above. The thickness of the metal foils 10, 20 is, for example, 5 to 72 μm. Furthermore, the thicknesses of the metal foil 10 and the metal foil 20 may be different from each other. Furthermore, the material of the metal foils 10 and 20 is not limited to copper, and may be a metal other than copper (for example, silver, aluminum, etc.).
 また、金属箔10,20として銅箔を用いる場合、電解銅箔に限定されず、圧延銅箔であってもよい。フレキシブルプリント配線板を製造する場合、圧延銅箔が好ましい。圧延銅箔を用いることで、屈曲性の高いフレキシブルプリント配線板を提供することができる。 Moreover, when using copper foil as the metal foils 10 and 20, it is not limited to electrolytic copper foil, but may be rolled copper foil. When manufacturing flexible printed wiring boards, rolled copper foil is preferred. By using rolled copper foil, a flexible printed wiring board with high flexibility can be provided.
 なお、絶縁基材30の厚さおよび材料は、上記のものに限られない。絶縁基材30の厚さは、たとえば6~100μmである。絶縁基材30の材料は、たとえばPFA(テトラフルオロエチレン-パーフルオロアルキルビニルエーテル共重合体)、PTFE(ポリテトラフルオロエチレン)などのフッ素系材料、MPI(変性ポリイミド)、PI(ポリイミド)などのポリイミド系材料、PEEK(ポリエーテルエーテルケトン)、PET(ポリエチレンテレフタレート)、またはPEN(ポリエチレンナフタレート)などであってもよい。 Note that the thickness and material of the insulating base material 30 are not limited to those described above. The thickness of the insulating base material 30 is, for example, 6 to 100 μm. The material of the insulating base material 30 is, for example, a fluorine-based material such as PFA (tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer), PTFE (polytetrafluoroethylene), or polyimide such as MPI (modified polyimide) or PI (polyimide). The material may be a type material such as PEEK (polyetheretherketone), PET (polyethylene terephthalate), or PEN (polyethylene naphthalate).
 次に、両面金属張積層板2の金属箔10をパターニングして、配線パターンWP1およびコンフォーマルマスク12を形成する。また、金属箔20をパターニングして、配線パターンWP2およびコンフォーマルマスク12の反対側のランド22を形成する。具体的には、以下のステップS2~S5を行う。 Next, the metal foil 10 of the double-sided metal-clad laminate 2 is patterned to form the wiring pattern WP1 and the conformal mask 12. Further, the metal foil 20 is patterned to form the wiring pattern WP2 and the land 22 on the opposite side of the conformal mask 12. Specifically, the following steps S2 to S5 are performed.
 まず、図2A(2)に示すように、金属箔10の上にレジスト膜15を形成し、金属箔20の上にレジスト膜25を形成する(ステップS2)。たとえば、レジスト膜15,25として、厚さ10μmのネガ型ドライフィルムを金属箔10,20にラミネートすることによりレジスト膜15,25を形成する。 First, as shown in FIG. 2A(2), a resist film 15 is formed on the metal foil 10, and a resist film 25 is formed on the metal foil 20 (step S2). For example, the resist films 15, 25 are formed by laminating a 10 μm thick negative dry film onto the metal foils 10, 20.
 なお、レジスト膜15,25の厚さ、および材料は、上記のものに限られないが、微細な配線パターンを形成するためには、レジスト膜15,25は薄いものが好ましい。具体的には、金属箔10,20の厚さの0.1倍以上かつ1.5倍以下の厚さが好ましい。本実施形態においては、レジスト膜15,25の厚さは、金属箔10,20の厚さの0.1
倍以上かつ1倍以下である。なお、レジスト膜15とレジスト膜25の厚さは、互いに異なっていてもよい。
Note that the thickness and material of the resist films 15 and 25 are not limited to those described above, but in order to form a fine wiring pattern, it is preferable that the resist films 15 and 25 be thin. Specifically, the thickness is preferably 0.1 times or more and 1.5 times or less the thickness of the metal foils 10 and 20. In this embodiment, the thickness of the resist films 15 and 25 is 0.1 of the thickness of the metal foils 10 and 20.
It is more than twice and less than 1 times. Note that the thicknesses of the resist film 15 and the resist film 25 may be different from each other.
 次に、図2B(1)に示すように、レジスト膜15,25を露光および現像して、エッチングレジスト15a,25aを形成する(ステップS3)。エッチングレジスト15aには、後述する配線パターンWP1に対応する部分と、コンフォーマルマスク12に対応する部分とが含まれる。また、エッチングレジスト25aには、後述する配線パターンWP2に対応する部分と、コンフォーマルマスク12の反対側のランド22に対応する部分とが含まれる。 Next, as shown in FIG. 2B(1), the resist films 15 and 25 are exposed and developed to form etching resists 15a and 25a (step S3). The etching resist 15a includes a portion corresponding to a wiring pattern WP1 to be described later and a portion corresponding to the conformal mask 12. Further, the etching resist 25a includes a portion corresponding to a wiring pattern WP2 to be described later and a portion corresponding to a land 22 on the opposite side of the conformal mask 12.
 本実施形態において、露光には、プロキシミティ露光機を用いる。なお、露光方法は、プロキシミティ露光に限定されず、プロジェクション露光、直描露光(ダイレクト露光)等であってもよい。 In this embodiment, a proximity exposure machine is used for exposure. Note that the exposure method is not limited to proximity exposure, and may be projection exposure, direct exposure, or the like.
 次に、図2B(2)に示すように、エッチングレジスト15a,25aをマスクとしたエッチングを行う。より詳しくは、エッチングレジスト15a,25aで被覆されていない金属箔10,20を、エッチングで除去する(ステップS4)。本ステップでは、たとえば、塩化銅を用いた湿式エッチングを行う。 Next, as shown in FIG. 2B (2), etching is performed using the etching resists 15a and 25a as masks. More specifically, the metal foils 10 and 20 not covered with the etching resists 15a and 25a are removed by etching (step S4). In this step, wet etching using copper chloride, for example, is performed.
 その後、図2C(1)に示すように、エッチングレジスト15a,25aを除去する(ステップS5)。これにより、配線パターンWP1,WP2、コンフォーマルマスク12、およびコンフォーマルマスク12の反対側のランド22を形成する。配線パターンWP1は、間隔をあけて配置された複数の配線11を含む。同様に、配線パターンWP2は、間隔をあけて配置された複数の配線21を含む。コンフォーマルマスク12は、開口12aおよびランド12bを含む。 Thereafter, as shown in FIG. 2C (1), the etching resists 15a and 25a are removed (step S5). Thereby, the wiring patterns WP1 and WP2, the conformal mask 12, and the land 22 on the opposite side of the conformal mask 12 are formed. The wiring pattern WP1 includes a plurality of wirings 11 arranged at intervals. Similarly, the wiring pattern WP2 includes a plurality of wirings 21 arranged at intervals. Conformal mask 12 includes openings 12a and lands 12b.
 本実施形態において、配線11,21の幅は20μmである。また、配線11,21の間の幅(ギャップ幅)は、20μmである。なお、配線11,21の幅は10~30μmであってもよい。また、配線11,21の間の幅は、10~30μmであってもよい。 In this embodiment, the width of the wirings 11 and 21 is 20 μm. Further, the width (gap width) between the wirings 11 and 21 is 20 μm. Note that the width of the wirings 11 and 21 may be 10 to 30 μm. Further, the width between the wirings 11 and 21 may be 10 to 30 μm.
 また、本実施形態において、開口12aの直径は50μmであり、ランド12bの直径(外径)は90μmである。なお、開口12aおよびランド12bの直径は、上記のものに限られないが、高密度の配線パターンを形成するためには、可能な限り小さいほうが好ましい。 Furthermore, in this embodiment, the diameter of the opening 12a is 50 μm, and the diameter (outer diameter) of the land 12b is 90 μm. Note that the diameters of the openings 12a and the lands 12b are not limited to those described above, but in order to form a high-density wiring pattern, they are preferably as small as possible.
 なお、配線パターンWP1、配線パターンWP2、コンフォーマルマスク12、およびランド22は、それぞれ別の工程で形成してもよい。具体的には、配線パターンWP1、配線パターンWP2、コンフォーマルマスク12、およびランド22をそれぞれ形成するごとに、上記と同様の工程を繰り返してもよい。この場合、配線パターンWP1、配線パターンWP2、コンフォーマルマスク12、およびランド22の形成順は任意である。 Note that the wiring pattern WP1, the wiring pattern WP2, the conformal mask 12, and the land 22 may be formed in separate steps. Specifically, the same steps as described above may be repeated each time the wiring pattern WP1, the wiring pattern WP2, the conformal mask 12, and the land 22 are formed. In this case, the order in which the wiring pattern WP1, the wiring pattern WP2, the conformal mask 12, and the land 22 are formed is arbitrary.
 好ましくは、少なくとも配線パターンWP1およびコンフォーマルマスク12を同時に形成する。これにより、配線パターンWP1とコンフォーマルマスク12との位置合わせを省略できる。より詳しくは、配線パターンWP1とコンフォーマルマスク12の開口12aの位置に形成される導通用孔H1(後述)との位置合わせを省略できる。従来のボタンめっき法においては、まず導通用孔Hを形成し、形成された導通用孔Hに対して、レジスト膜の露光パターン(エッチングの後、配線パターンとなる。)を位置合わせする。より詳しくは、図5C(2)の工程において、金属めっき400に対して、レジスト膜150の露光パターンを位置合わせする。一般に、当該位置合わせの際にはズレが生じる。このとき、配線パターンWP10が導通用孔Hの上に重ならないようにするため、導通用孔Hを回避するように余裕を持たせて配線パターンWP10を設計する。また、ランド120bが導通用孔Hの周囲に形成されるようにするために、ランド120bの直径を大きく設計する。一方、本実施形態では、当該位置合わせ自体を省略できるため、導通用孔H1のより近くに配線パターンWP1を配置するように設計することができる。また、後述するランド12bの直径を小さく設計することができる。このため、より微細な配線パターンを形成することができる。また、コンフォーマルマスク12を形成する工程を別途設ける必要が無いため、工程を簡略化できる。 Preferably, at least the wiring pattern WP1 and the conformal mask 12 are formed at the same time. Thereby, alignment between the wiring pattern WP1 and the conformal mask 12 can be omitted. More specifically, alignment between the wiring pattern WP1 and the conduction hole H1 (described later) formed at the position of the opening 12a of the conformal mask 12 can be omitted. In the conventional button plating method, first, a conductive hole H is formed, and an exposed pattern of a resist film (which becomes a wiring pattern after etching) is aligned with the formed conductive hole H. More specifically, in the step of FIG. 5C (2), the exposure pattern of the resist film 150 is aligned with the metal plating 400. Generally, a shift occurs during the alignment. At this time, in order to prevent the wiring pattern WP10 from overlapping the conduction hole H, the wiring pattern WP10 is designed with a margin to avoid the conduction hole H. Further, in order to form the land 120b around the conduction hole H, the diameter of the land 120b is designed to be large. On the other hand, in this embodiment, since the alignment itself can be omitted, the wiring pattern WP1 can be designed to be placed closer to the conduction hole H1. Further, the diameter of the land 12b, which will be described later, can be designed to be small. Therefore, a finer wiring pattern can be formed. Further, since there is no need to provide a separate process for forming the conformal mask 12, the process can be simplified.
 以上のステップS2~S5によって、配線パターンWP1,WP2、コンフォーマルマスク12、およびコンフォーマルマスク12の反対側のランド22が形成される。 Through the above steps S2 to S5, the wiring patterns WP1 and WP2, the conformal mask 12, and the land 22 on the opposite side of the conformal mask 12 are formed.
 なお、ステップS2~S5において両面金属張積層板2の下面に配線パターンWP2を形成せず、両面金属張積層板2の下面は、金属箔20のままであってもよい。 Note that the wiring pattern WP2 may not be formed on the lower surface of the double-sided metal-clad laminate 2 in steps S2 to S5, and the lower surface of the double-sided metal-clad laminate 2 may remain the metal foil 20.
 次に、図2C(2)に示すように、コンフォーマルマスク12にレーザ光を照射することにより、導通用孔H1を形成する(ステップS6)。より詳しくは、絶縁基材30の第1の主面側(金属箔10が設けられている側)から、コンフォーマルマスク12の開口12aに対して、開口12aの直径よりも幅が広く、ランド12bの直径よりも幅が狭いレーザ光を照射する。これにより、ランド12bをマスクとして、開口12aに露出した絶縁基材30を除去して導通用孔H1を形成する。このとき、コンフォーマルマスク12の開口12aの位置に導通用孔H1が形成される。なお、絶縁基材30を除去した後に、プラズマ等によるデスミア処理を行ってもよい。 Next, as shown in FIG. 2C (2), the conformal mask 12 is irradiated with laser light to form the conductive hole H1 (step S6). More specifically, from the first main surface side of the insulating base material 30 (the side on which the metal foil 10 is provided), a land is formed with a width wider than the diameter of the opening 12a with respect to the opening 12a of the conformal mask 12. A laser beam whose width is narrower than the diameter of the beam 12b is irradiated. Thereby, using the land 12b as a mask, the insulating base material 30 exposed in the opening 12a is removed to form the conduction hole H1. At this time, a conduction hole H1 is formed at the position of the opening 12a of the conformal mask 12. Note that after removing the insulating base material 30, desmear treatment using plasma or the like may be performed.
 本ステップにおいて用いるレーザの種類は、炭酸ガスレーザである。なお、レーザの種類は、炭酸ガスレーザに限定されず、たとえば、UV-YAGレーザ等であってもよい。 The type of laser used in this step is a carbon dioxide laser. Note that the type of laser is not limited to a carbon dioxide laser, and may be, for example, a UV-YAG laser.
 本実施形態においては、ランド22に開口が存在しないため、導通用孔H1を形成する工程において、導通用孔H1の底面に金属箔20(ランド22)が露出する。これにより、導通用孔H1は、有底孔となる。 In this embodiment, since there is no opening in the land 22, the metal foil 20 (land 22) is exposed on the bottom surface of the conduction hole H1 in the step of forming the conduction hole H1. Thereby, the conduction hole H1 becomes a hole with a bottom.
 なお、レーザ光の照射条件を調整することにより、図2C(2)に示すように、導通用孔H1を開口12aから深くなるに従って内径が小さくなるように形成してもよい。これにより、後述する金属薄膜13を導通用孔H1の側面に定着しやすくすることができる。 Note that by adjusting the laser beam irradiation conditions, the conduction hole H1 may be formed so that the inner diameter becomes smaller as it gets deeper from the opening 12a, as shown in FIG. 2C (2). Thereby, the metal thin film 13 described later can be easily fixed on the side surface of the conduction hole H1.
 次に、図2D(1)に示すように、配線パターンWP1、コンフォーマルマスク12および導通用孔H1に対して、乾式めっき処理を施し、金属薄膜13を形成する(ステップS7)。より詳しくは、絶縁基材30の第1の主面側(金属箔10が設けられている側)に対して、乾式めっき処理を施し、配線パターンWP1と、配線パターンWP1間に露出した絶縁基材30と、コンフォーマルマスク12(すなわち、ランド12b)と、導通用孔H1の内壁(側面および底面)とに金属薄膜13を形成する。金属薄膜13を形成することで、導通用孔H1の側面に露出した絶縁基材30が導電化され、後述する層間導電路50の電気的接続を安定させることができる。なお、本ステップでは、たとえば、銅スパッタリングを用いて、金属薄膜13として厚さ0.3μmの銅薄膜を形成する。 Next, as shown in FIG. 2D (1), dry plating is performed on the wiring pattern WP1, the conformal mask 12, and the conduction hole H1 to form the metal thin film 13 (step S7). More specifically, dry plating is performed on the first main surface side (the side on which the metal foil 10 is provided) of the insulating base material 30, and the insulating base exposed between the wiring pattern WP1 and the wiring pattern WP1 is removed. A metal thin film 13 is formed on the material 30, the conformal mask 12 (that is, the land 12b), and the inner wall (side surface and bottom surface) of the conduction hole H1. By forming the metal thin film 13, the insulating base material 30 exposed on the side surface of the conduction hole H1 becomes conductive, and the electrical connection of the interlayer conductive path 50 described later can be stabilized. Note that in this step, a copper thin film with a thickness of 0.3 μm is formed as the metal thin film 13 using, for example, copper sputtering.
 また、配線パターンWP1に露出した絶縁基材30にも金属薄膜13が形成されるため、複数の配線11同士が一時的に電気的に接続される。しかし、後のステップS11において、配線11間の金属薄膜13を除去する。 Furthermore, since the metal thin film 13 is also formed on the insulating base material 30 exposed in the wiring pattern WP1, the plurality of wirings 11 are temporarily electrically connected to each other. However, in the subsequent step S11, the metal thin film 13 between the wirings 11 is removed.
 なお、金属薄膜13の厚さは任意であるが、導通用孔H1に後述する金属めっき40を析出するために必要な導電化がされる厚さ以上であり、かつ配線11間の金属薄膜13を除去する際に配線パターンWP1への影響を最小限にするよう、一定の厚さ以下(たとえば、配線11,21の幅の0.1倍以下)であることが好ましい。 Note that the thickness of the metal thin film 13 is arbitrary, but it must be at least as thick as necessary to make the metal plating 40 (described later) conductive in the conductive hole H1, and that the metal thin film 13 between the wirings 11 In order to minimize the influence on the wiring pattern WP1 when removing the wiring pattern WP1, it is preferable that the thickness is below a certain level (for example, 0.1 times the width of the wirings 11 and 21 or less).
 なお、乾式めっき処理に代えて、湿式めっき処理(電解めっき処理および化学めっき処理等)を用いてもよい。好ましくは、ステップS7では、めっき処理として、乾式めっき処理を用いる。乾式めっき処理を用いることで、湿式めっき処理と比べて金属薄膜13を薄くすることができ、後段の工程で金属薄膜13を除去する際に、少量のエッチング等で容易に除去できることから、配線パターンWP1に与える影響を最小限に抑えることができる。また、乾式めっき処理によって、不純物の少ない金属薄膜13を形成することができ、金属薄膜13の電気抵抗を小さくすることができる。よって、金属箔10(特に、ランド12b)および導通用孔H1の底面に露出したランド22の上に金属薄膜13が形成された場合であっても、後述する金属めっき40とランド12bの導電性、および金属めっき40とランド22の導電性への影響を最小限に抑えることができる。すなわち、後述する層間導電路50の導電性への影響を最小限に抑えることができる。さらに、湿式めっき処理の場合、金属薄膜13を除去する際に、触媒(たとえば、パラジウム等)が配線パターンWP1に残留することがあり、当該触媒を除去する工程が別途必要となる場合がある。一方、乾式めっき処理においては、触媒を用いないため、工程を簡略化できる。 Note that wet plating treatment (electrolytic plating treatment, chemical plating treatment, etc.) may be used instead of dry plating treatment. Preferably, in step S7, dry plating is used as the plating. By using dry plating, the metal thin film 13 can be made thinner than wet plating, and when the metal thin film 13 is removed in a subsequent process, it can be easily removed by a small amount of etching, etc. The influence on WP1 can be minimized. In addition, the dry plating process can form the metal thin film 13 with few impurities, and the electrical resistance of the metal thin film 13 can be reduced. Therefore, even if the metal thin film 13 is formed on the metal foil 10 (particularly the land 12b) and the land 22 exposed on the bottom surface of the conduction hole H1, the conductivity of the metal plating 40 and the land 12b, which will be described later, will be reduced. , and the influence on the conductivity of the metal plating 40 and the land 22 can be minimized. That is, the influence on the conductivity of the interlayer conductive path 50, which will be described later, can be minimized. Further, in the case of wet plating, a catalyst (for example, palladium, etc.) may remain in the wiring pattern WP1 when removing the metal thin film 13, and a separate process for removing the catalyst may be required. On the other hand, in the dry plating process, since no catalyst is used, the process can be simplified.
 また、乾式めっき処理の方法は、スパッタリング法に限られず、蒸着法等でもよい。より好ましくは、乾式めっき処理は、スパッタリング法により行う。これにより、金属薄膜13の付着力を高めることができ、導通用孔H1の導電化を安定させることができる。 Furthermore, the dry plating method is not limited to the sputtering method, but may also be a vapor deposition method or the like. More preferably, the dry plating treatment is performed by a sputtering method. Thereby, the adhesive force of the metal thin film 13 can be increased, and the electrical conductivity of the conductive hole H1 can be stabilized.
 なお、スパッタリング法を用いる場合、金属箔10と同じ金属を用いてもよい。同一の金属を用いることで、物理的、電気的、化学的性質が揃うため、その後の処理が簡易になる。特に、金属箔10が銅箔である場合、スパッタリング法は、銅を用いたスパッタリング法(銅スパッタリング)であってもよい。このとき、金属薄膜13は銅薄膜となる。銅薄膜を形成することで、金属薄膜13の金属を、フレキシブルプリント配線板の場合に好ましい圧延銅箔と同じ金属(銅)とすることができる。 Note that when using the sputtering method, the same metal as the metal foil 10 may be used. By using the same metal, the physical, electrical, and chemical properties are uniform, which simplifies subsequent processing. In particular, when the metal foil 10 is a copper foil, the sputtering method may be a sputtering method using copper (copper sputtering). At this time, the metal thin film 13 becomes a copper thin film. By forming the copper thin film, the metal of the metal thin film 13 can be the same metal (copper) as the rolled copper foil, which is preferable in the case of a flexible printed wiring board.
 上記のようにして金属薄膜13を形成した後、図2D(2)に示すように、めっきレジスト14,24を形成する(ステップS8)。めっきレジスト14には、導通用孔H1が露出した開口14aが設けられている。図2D(2)に示すように、開口14aは、ランド12bの上に設けられる。このように、めっきレジスト14は、配線パターンWP1を被覆し、導通用孔H1を被覆しないものとして形成される。 After forming the metal thin film 13 as described above, plating resists 14 and 24 are formed as shown in FIG. 2D (2) (step S8). The plating resist 14 is provided with an opening 14a through which the conduction hole H1 is exposed. As shown in FIG. 2D(2), the opening 14a is provided above the land 12b. In this way, the plating resist 14 is formed to cover the wiring pattern WP1 but not to cover the conduction hole H1.
 以下、ステップS8で行う工程の一例を説明する。まず、図2D(1)で得られた配線板の両面全体を覆うめっきレジストを形成する。すなわち、金属薄膜13が形成された配線パターンWP1、ランド12bおよび導通用孔H1を覆うレジスト膜と、配線パターンWP2およびランド22を覆うレジスト膜とを形成する。 Hereinafter, an example of the process performed in step S8 will be described. First, a plating resist is formed to cover the entire both sides of the wiring board obtained in FIG. 2D(1). That is, a resist film that covers the wiring pattern WP1 on which the metal thin film 13 is formed, the land 12b, and the conduction hole H1, and a resist film that covers the wiring pattern WP2 and the land 22 are formed.
 次に、形成したレジスト膜を露光および現像して、めっきレジスト14,24を形成する。本実施形態においては、めっきレジスト14に設けられた開口14aの直径は70μmである。開口14aの直径は、後述するボタンランド41の直径と等しくなる。 Next, the formed resist film is exposed and developed to form plating resists 14 and 24. In this embodiment, the diameter of the opening 14a provided in the plating resist 14 is 70 μm. The diameter of the opening 14a is equal to the diameter of a button land 41, which will be described later.
 本実施形態において、露光には直描型露光機(ダイレクト露光機)を用いる。なお、露光方法は、これに限定されず、プロキシミティ露光、プロジェクション露光等であってもよいが、好ましくは、直描型露光を用いる。露光工程以前の工程において、配線板が伸縮した場合であっても、直描型露光機は、その伸縮に応じた露光パターンを描画できる。そのため、配線板の伸縮を想定して、めっきレジスト14の開口14aの直径を大きく設計する必要が無く、その結果、めっきレジスト14の開口14aの直径を小さくすることができる。よって、後述するボタンランド41の直径を小さくすることができ、ランド12bの直径をより小さくすることができる。 In this embodiment, a direct exposure machine is used for exposure. The exposure method is not limited to this and may be proximity exposure, projection exposure, etc., but direct exposure is preferably used. Even if the wiring board expands or contracts in a process prior to the exposure process, the direct exposure machine can draw an exposure pattern according to the expansion or contraction. Therefore, there is no need to design the diameter of the opening 14a in the plating resist 14 to be large in anticipation of the expansion or contraction of the wiring board, and as a result, the diameter of the opening 14a in the plating resist 14 can be made smaller. This allows the diameter of the button land 41, which will be described later, to be made smaller, and the diameter of the land 12b to be made even smaller.
 なお、図2D(2)では、配線パターンWP1をめっきレジスト14で全て被覆したが、これに限られない。たとえば、少なくとも導通用孔H1の周囲に存在する配線パターンWP1のみをめっきレジスト14で被覆してもよい。この場合、導通用孔H1および導通用孔H1の周囲の配線パターンWP1のみに、めっき処理(たとえば、めっき液に浸漬)を行う。 Note that in FIG. 2D(2), the wiring pattern WP1 is entirely covered with the plating resist 14, but the present invention is not limited to this. For example, only the wiring pattern WP1 existing around at least the conduction hole H1 may be covered with the plating resist 14. In this case, plating treatment (for example, immersion in a plating solution) is performed only on the conduction hole H1 and the wiring pattern WP1 around the conduction hole H1.
 上記のようにしてめっきレジスト14,24を形成した後、図2E(1)に示すように、めっき処理を行うことにより、導通用孔H1の内部に金属めっき40を形成する(ステップS9)。より詳しくは、金属薄膜13が形成されためっきレジスト14の開口14aの内部に金属めっき40を形成する。金属めっき40には、ボタンランド41が含まれる。金属めっき40が形成されることにより、金属薄膜13の一部が金属めっき40に覆われる。具体的には、金属薄膜13のうち、導通用孔H1の内壁(側面および底面)に形成された部分が金属めっき40に覆われる。 After forming the plating resists 14 and 24 as described above, as shown in FIG. 2E(1), a plating process is performed to form metal plating 40 inside the conduction hole H1 (step S9). More specifically, metal plating 40 is formed inside the opening 14a of the plating resist 14 in which the metal thin film 13 is formed. Metal plating 40 includes button lands 41. By forming the metal plating 40, a part of the metal thin film 13 is covered with the metal plating 40. Specifically, a portion of the metal thin film 13 formed on the inner wall (side surface and bottom surface) of the conduction hole H1 is covered with the metal plating 40.
 なお、金属めっき40は、図2E(1)に示すように、導通用孔H1の内部だけでなく、ランド12bの上に形成されるようにしてもよい。このとき、図2E(1)に示すように、ランド12bの一部はボタンランド41に覆われる。より詳しくは、金属薄膜13のうち、ランド12bの上に形成された部分が金属めっき40(ボタンランド41)に覆われる。 Note that the metal plating 40 may be formed not only inside the conduction hole H1 but also on the land 12b, as shown in FIG. 2E(1). At this time, a part of the land 12b is covered with the button land 41, as shown in FIG. 2E(1). More specifically, a portion of the metal thin film 13 formed on the land 12b is covered with metal plating 40 (button land 41).
 その後、図2E(2)に示すように、めっきレジスト14,24を除去する(ステップS10)。これにより、ランド12bとランド22を電気的に接続する層間導電路50を形成する。 Thereafter, as shown in FIG. 2E(2), the plating resists 14 and 24 are removed (step S10). Thereby, an interlayer conductive path 50 that electrically connects the land 12b and the land 22 is formed.
 本実施形態では、導通用孔H1が有底孔であったため、層間導電路50は、有底ビアとなる。なお、図2E(2)では、金属めっき40の上面は平らであるが、金属めっき40の上面に凹みがあってもよい。 In this embodiment, since the conduction hole H1 is a bottomed hole, the interlayer conductive path 50 is a bottomed via. Note that in FIG. 2E(2), the upper surface of the metal plating 40 is flat, but the upper surface of the metal plating 40 may have a recess.
 本実施形態において、金属めっき40は、電解めっきである。より詳しくは、電解めっき処理を行い、金属めっき40を形成する。電解めっきを用いることで、無電解めっきを用いる場合に比べて、めっき処理の時間を短くすることができ、製造効率を向上させることができる。 In this embodiment, the metal plating 40 is electrolytic plating. More specifically, electroplating is performed to form metal plating 40. By using electrolytic plating, the time for plating treatment can be shortened and manufacturing efficiency can be improved compared to the case where electroless plating is used.
 なお、金属めっき40は、金属箔10と同じ金属を用いてもよい。同一の金属を用いることで、物理的、電気的、化学的性質が揃うため、取り扱いが簡易になる。特に、金属箔10が銅箔である場合、金属めっき40は、銅めっきであってもよい。銅めっきを形成することで、金属めっき40の金属を、フレキシブルプリント配線板の場合に好ましい圧延銅箔と同じ金属(銅)とすることができる。 Note that the metal plating 40 may be made of the same metal as the metal foil 10. By using the same metal, they have the same physical, electrical, and chemical properties, making handling easier. In particular, when metal foil 10 is copper foil, metal plating 40 may be copper plating. By forming the copper plating, the metal of the metal plating 40 can be the same metal (copper) as the rolled copper foil that is preferable in the case of a flexible printed wiring board.
 次に、図2Fに示すように、金属薄膜13の露出した部分、すなわち、金属薄膜13のうち、金属めっき40によって覆われていない部分の金属薄膜を除去する(ステップS11)。より詳しくは、金属薄膜13のうち、ランド12bのうちボタンランド41に覆われていない部分、配線11、および配線11の間に露出した絶縁基材30の上に形成された金属薄膜を除去する。ただし、金属薄膜13のうち、金属めっき40で覆われた部分の金属薄膜は除去されない。これにより、配線パターンWP1の配線11の間を絶縁する。なお、図2Fに示された断面以外の部分において配線11同士が設計上電気的に接続される場合は、この限りでない。 Next, as shown in FIG. 2F, the exposed portion of the metal thin film 13, that is, the portion of the metal thin film 13 that is not covered with the metal plating 40 is removed (step S11). More specifically, in the metal thin film 13, the metal thin film formed on the portion of the land 12b not covered by the button land 41, the wiring 11, and the insulating base material 30 exposed between the wiring 11 is removed. . However, the portion of the metal thin film 13 covered with the metal plating 40 is not removed. This insulates the wiring 11 of the wiring pattern WP1. Note that this does not apply when the wirings 11 are designed to be electrically connected to each other in a portion other than the cross section shown in FIG. 2F.
 具体的に、本実施形態において、金属薄膜13の除去は、フラッシュエッチングを行う。エッチング量は、たとえば電解銅箔換算で0.5μmである。エッチング量がごく微量なので配線幅への影響を最小限に抑えることができる。 Specifically, in this embodiment, the metal thin film 13 is removed by flash etching. The etching amount is, for example, 0.5 μm in terms of electrolytic copper foil. Since the amount of etching is extremely small, the effect on the wiring width can be minimized.
 なお、金属薄膜13を除去する際、配線11,21がわずかに細くなる。そのため、ステップS3においてエッチングレジスト15a,25aを形成する際、配線11,21の上のエッチングレジスト15a,25aの幅を太くし、間の幅(ギャップ幅)を狭くなるようにしてもよい。 Note that when removing the metal thin film 13, the wirings 11 and 21 become slightly thinner. Therefore, when forming the etching resists 15a, 25a in step S3, the widths of the etching resists 15a, 25a above the wirings 11, 21 may be made thicker, and the width between them (gap width) may be made narrower.
 以上の工程(ステップS1~S11)によって、図2Fに示すプリント配線板1を製造することができる。 Through the above steps (steps S1 to S11), printed wiring board 1 shown in FIG. 2F can be manufactured.
 本実施形態によれば、導通用孔H1や金属めっき40を形成する前に配線パターンWP1,WP2を形成するため、金属めっき40を埋め込む厚いレジスト膜を形成する必要がない。したがって、配線パターンWP1,WP2の形成に薄いレジスト膜15,25を用いることができる。 According to this embodiment, since the wiring patterns WP1 and WP2 are formed before forming the conduction hole H1 and the metal plating 40, there is no need to form a thick resist film to bury the metal plating 40. Therefore, thin resist films 15 and 25 can be used to form wiring patterns WP1 and WP2.
 また、導通用孔H1を形成する前にレジスト膜15,25を形成するため、導通用孔H1の上にレジスト膜が形成されることはない。したがって、いわゆるテンティングに起因する問題を回避することができる。たとえば、テンティングの破れによる、不必要な箇所のエッチングなどの問題を回避することができる。また、テンティングに起因する問題を回避するために厚いレジスト膜を形成する必要が無いため、より薄いレジスト膜15,25を用いることができる。 Furthermore, since the resist films 15 and 25 are formed before forming the conduction hole H1, no resist film is formed on the conduction hole H1. Therefore, problems caused by so-called tenting can be avoided. For example, problems such as unnecessary etching due to tearing of the tenting can be avoided. Further, since it is not necessary to form a thick resist film to avoid problems caused by tenting, thinner resist films 15 and 25 can be used.
 以上のように、本実施形態によれば、薄いレジスト膜15,25を用いることができるため、露光および現像の解像度が上昇し、微細なパターンを有するエッチングレジスト15a,25aを形成できる。そして、エッチングレジスト15a,25aが薄くなるため、エッチングの解像度が増加し、微細な配線パターンWP1,WP2を形成できる。すなわち、層間導電路を有するプリント配線板の製造において微細な配線パターンを形成することができる。 As described above, according to the present embodiment, thin resist films 15 and 25 can be used, so the resolution of exposure and development is increased, and etching resists 15a and 25a having fine patterns can be formed. Since the etching resists 15a and 25a become thinner, the etching resolution increases and fine wiring patterns WP1 and WP2 can be formed. That is, fine wiring patterns can be formed in the manufacture of printed wiring boards having interlayer conductive paths.
 また、本実施形態によれば、導通用孔H1を形成する前に配線パターンWP1を形成することとしたため、配線パターンWP1の形成とコンフォーマルマスク12の形成とを同時に行うことができる。そのため、導通用孔に対して、レジスト膜の露光パターン(エッチングの後、配線パターンとなる。)を位置合わせする工程を省略でき、導通用孔のより近くに配線パターンを配置するように設計することができ、かつランド12bの直径を小さく設計することができる。したがって、層間導電路を有するプリント配線板の製造においてより微細な配線パターンを形成することができる。 Furthermore, according to the present embodiment, since the wiring pattern WP1 is formed before forming the conduction hole H1, the formation of the wiring pattern WP1 and the formation of the conformal mask 12 can be performed at the same time. Therefore, the process of aligning the exposed pattern of the resist film (which becomes the wiring pattern after etching) with the conduction hole can be omitted, and the wiring pattern can be designed to be placed closer to the conduction hole. In addition, the diameter of the land 12b can be designed to be small. Therefore, finer wiring patterns can be formed in the manufacture of printed wiring boards having interlayer conductive paths.
 また、ボタンめっき法と同様に、基板の特定部分にのみめっき処理を施すことができるため、電解めっきの存在する部分を金属めっき40に限定できる。これにより、金属箔として圧延銅箔を用いたフレキシブルプリント配線板の製造に本実施形態を適用することで、屈曲部は、屈曲性の高い圧延銅箔からなる高密度な配線パターンで構成されたフレキシブルプリント配線板を製造することができる。 Furthermore, like the button plating method, plating can be performed only on specific parts of the substrate, so the parts where electrolytic plating is present can be limited to the metal plating 40. As a result, by applying this embodiment to the manufacture of a flexible printed wiring board using rolled copper foil as the metal foil, the bending portion can be made of a high-density wiring pattern made of rolled copper foil with high flexibility. Flexible printed wiring boards can be manufactured.
 なお、フレキシブルプリント配線板を製造する場合、上記各工程(ステップS1~S11)のうち、少なくとも一つの工程をロールツーロール方式(連続搬送)にて行ってもよい。これにより、フレキシブルプリント配線板の製造効率を向上させることができる。また、全ての工程をロールツーロール方式にて行ってもよい。 Note that when manufacturing a flexible printed wiring board, at least one of the above steps (steps S1 to S11) may be performed using a roll-to-roll method (continuous conveyance). Thereby, the manufacturing efficiency of flexible printed wiring boards can be improved. Alternatively, all steps may be performed in a roll-to-roll manner.
 なお、以上の説明においては、導通用孔および当該導通用孔を形成するためのコンフォーマルマスクの数は1つとしたが、複数の導通用孔および各導通用孔を形成するための複数のコンフォーマルマスクを形成してもよい。このとき、各導通用孔の開口が存在する絶縁基材30の主面(すなわち、コンフォーマルマスクの設けられる絶縁基材30の主面)は、第1の主面および第2の主面のいずれでもよい。また、導通用孔の開口が第2の主面にも存在する場合、金属薄膜13を第2の主面にも形成してもよい。 In the above explanation, the number of conductive holes and the conformal mask for forming the conductive holes is one, but the number of conductive holes and the number of conformal masks for forming each conductive hole is one. A formal mask may also be formed. At this time, the main surface of the insulating base material 30 where the opening of each conductive hole exists (that is, the main surface of the insulating base material 30 where the conformal mask is provided) is the first main surface and the second main surface. Either is fine. Further, when the opening of the conduction hole is also present on the second main surface, the metal thin film 13 may be formed on the second main surface as well.
 なお、本実施形態においては、2層の金属箔を有する両面金属張積層板を用いたが、3層以上の金属箔を有する多層プリント配線板を出発材料として用いてもよい。この場合、配線パターンおよび層間導電路を形成する対象である当該多層プリント配線板の最外層を、本実施形態における両面金属張積層板の第1の主面とみなして、本実施形態に係る方法を適用する。 Note that in this embodiment, a double-sided metal-clad laminate having two layers of metal foil was used, but a multilayer printed wiring board having three or more layers of metal foil may be used as the starting material. In this case, the method according to the present embodiment assumes that the outermost layer of the multilayer printed wiring board on which the wiring pattern and the interlayer conductive path are to be formed is the first main surface of the double-sided metal-clad laminate according to the present embodiment. apply.
(第2の実施形態)
 次に、図1、図2Aおよび図3A~図3Eを参照しつつ、第2の実施形態に係るプリント配線板の製造方法について説明する。本実施形態と第1の実施形態との間の相違点の一つは、導通用孔の形態である。以降、本実施形態について、第1の実施形態との相違点を中心に説明し、同様の部分の説明は省略する。
(Second embodiment)
Next, a method for manufacturing a printed wiring board according to a second embodiment will be described with reference to FIGS. 1, 2A, and 3A to 3E. One of the differences between this embodiment and the first embodiment is the form of the conduction holes. Hereinafter, this embodiment will be described with a focus on differences from the first embodiment, and description of similar parts will be omitted.
 図2A(1)に示すように、両面金属張積層板2を用意する(ステップS1)。本実施形態においては、両面金属張積層板2として、金属箔10,20が厚さ12μmの圧延銅箔であり、絶縁基材が厚さ25μmのポリイミドである。 As shown in FIG. 2A(1), a double-sided metal-clad laminate 2 is prepared (step S1). In this embodiment, in the double-sided metal-clad laminate 2, the metal foils 10 and 20 are rolled copper foils with a thickness of 12 μm, and the insulating base material is polyimide with a thickness of 25 μm.
 次に、両面金属張積層板2の金属箔10をパターニングして、配線パターンWP1およびコンフォーマルマスク12を形成する。また、金属箔20をパターニングして、配線パターンWP2およびランド22bを形成する。具体的には、以下のステップS2~S5を行う。 Next, the metal foil 10 of the double-sided metal-clad laminate 2 is patterned to form the wiring pattern WP1 and the conformal mask 12. Further, the metal foil 20 is patterned to form a wiring pattern WP2 and a land 22b. Specifically, the following steps S2 to S5 are performed.
 まず、図2A(2)に示すように、金属箔10の上にレジスト膜15を形成し、金属箔20の上にレジスト膜25を形成する(ステップS2)。本実施形態において、レジスト膜15,25として、厚さが15μmのネガ型ドライフィルムを用いる。 First, as shown in FIG. 2A(2), a resist film 15 is formed on the metal foil 10, and a resist film 25 is formed on the metal foil 20 (step S2). In this embodiment, negative dry films with a thickness of 15 μm are used as the resist films 15 and 25.
 次に、図3A(1)に示すように、レジスト膜15,25を露光および現像して、エッチングレジスト15a,25aを形成する(ステップS3)。エッチングレジスト15aには、後述する配線パターンWP1に対応する部分、およびコンフォーマルマスク12に対応する部分が含まれる。また、エッチングレジスト25aには、後述する配線パターンWP2に対応する部分、およびランド22bに対応する部分が含まれる。 Next, as shown in FIG. 3A (1), the resist films 15 and 25 are exposed and developed to form etching resists 15a and 25a (step S3). The etching resist 15a includes a portion corresponding to a wiring pattern WP1, which will be described later, and a portion corresponding to the conformal mask 12. Further, the etching resist 25a includes a portion corresponding to a wiring pattern WP2, which will be described later, and a portion corresponding to the land 22b.
 本実施形態において、露光には両面同時露光機を用いる。両面同時露光機を用いることで、コンフォーマルマスク12の開口12aと、後述する開口22aを高精度で重ね合わせできる。たとえば、開口12aおよび開口22aの中心の位置のズレが±20μm以内となる。なお、露光方法は、プロジェクション露光、プロキシミティ露光、および直描露光(ダイレクト露光)等であってもよい。 In this embodiment, a double-sided simultaneous exposure machine is used for exposure. By using a double-sided simultaneous exposure machine, the opening 12a of the conformal mask 12 and the opening 22a, which will be described later, can be overlapped with high precision. For example, the deviation between the center positions of the opening 12a and the opening 22a is within ±20 μm. Note that the exposure method may be projection exposure, proximity exposure, direct exposure, or the like.
 次に、図3A(2)に示すように、エッチングレジスト15a,25aをマスクとしてエッチングを行うことにより、エッチングレジスト15a,25aで被覆されていない金属箔10,20を除去する(ステップS4)。その後、図3B(1)に示すように、エッチングレジスト15a,25aを除去する(ステップS5)。これにより、配線パターンWP1,WP2、コンフォーマルマスク12、およびランド22bを形成する。ランド22bの内側には、開口22aが存在する。本実施形態において、開口12aの直径は50μmであり、開口22aの直径は90μmである。 Next, as shown in FIG. 3A (2), etching is performed using the etching resists 15a, 25a as masks to remove the metal foils 10, 20 that are not covered with the etching resists 15a, 25a (step S4). Thereafter, as shown in FIG. 3B(1), the etching resists 15a and 25a are removed (step S5). Thereby, wiring patterns WP1 and WP2, conformal mask 12, and land 22b are formed. An opening 22a exists inside the land 22b. In this embodiment, the diameter of the opening 12a is 50 μm, and the diameter of the opening 22a is 90 μm.
 なお、開口12a,22aの直径は任意であるが、好ましくは、開口22aが平面視で開口12aを包含するように形成する。すなわち、開口22aの直径は、開口12aの直径より大きい。これにより、後述する導通用孔H2を貫通孔として形成しやすくすることができる。具体的には、開口12aと開口22aの中心位置がずれた場合においても、レーザ光の出射面に金属箔20(特にランド22b)が重なることでレーザ加工が阻害されることを抑制することができる。いわば、開口22aは、レーザ光の逃げ穴である。 Note that the diameters of the openings 12a and 22a are arbitrary, but preferably they are formed so that the opening 22a includes the opening 12a in a plan view. That is, the diameter of the opening 22a is larger than the diameter of the opening 12a. Thereby, it is possible to easily form the conduction hole H2, which will be described later, as a through hole. Specifically, even if the center positions of the apertures 12a and 22a are misaligned, it is possible to prevent the metal foil 20 (particularly the land 22b) from overlapping the laser beam emission surface and hinder laser processing. can. In other words, the opening 22a is an escape hole for the laser beam.
 以上のステップS2~S5によって、配線パターンWP1,WP2、コンフォーマルマスク12、およびランド22bが形成される。 Through the above steps S2 to S5, the wiring patterns WP1 and WP2, the conformal mask 12, and the land 22b are formed.
 次に図3B(2)に示すように、コンフォーマルマスク12にレーザ光を照射することにより、コンフォーマルマスク12の開口12aに露出した絶縁基材30を除去して導通用孔H2を形成する(ステップS6)。 Next, as shown in FIG. 3B (2), by irradiating the conformal mask 12 with a laser beam, the insulating base material 30 exposed in the opening 12a of the conformal mask 12 is removed to form a conductive hole H2. (Step S6).
 本実施形態においては、レーザの種類は、UV-YAGレーザである。なお、レーザの種類は、UV-YAGレーザに限定されず、たとえば炭酸ガスレーザ等であってもよい。 In this embodiment, the type of laser is a UV-YAG laser. Note that the type of laser is not limited to the UV-YAG laser, and may be, for example, a carbon dioxide laser.
 本実施形態においては、導通用孔H2は開口12aおよび開口22aを連通させる貫通孔となる。 In this embodiment, the conduction hole H2 becomes a through hole that communicates the opening 12a and the opening 22a.
 なお、本実施形態のように、レーザ光の照射条件を調整することにより、導通用孔H2を開口12aから深くなるに従って内径が小さくなるよう形成してもよい。これにより、後述する金属薄膜13を導通用孔H2の側面に定着しやすくすることができる。 Note that, as in this embodiment, by adjusting the laser beam irradiation conditions, the conductive hole H2 may be formed so that the inner diameter becomes smaller as it gets deeper from the opening 12a. Thereby, the metal thin film 13 described later can be easily fixed on the side surface of the conduction hole H2.
 次に、図3C(1)に示すように、配線パターンWP1、コンフォーマルマスク12および導通用孔H2に対して、乾式めっき処理を施し、金属薄膜13を形成する(ステップS7)。より詳しくは、絶縁基材30の第1の主面側(金属箔10が設けられている側)に対して、乾式めっき処理を施し、配線パターンWP1、コンフォーマルマスク12(すなわち、ランド12b)、および導通用孔H2の側面に金属薄膜13を形成する。また、配線パターンWP2、ランド22bに対しても、乾式めっき処理を施し、金属薄膜13を形成する。より詳しくは、絶縁基材30の第2の主面側(金属箔20が設けられている側)に対しても、乾式めっき処理を施し、配線パターンWP2、およびランド22bに金属薄膜13を形成する。なお、第1の主面側に対する金属薄膜13の形成と、第2の主面側に対する金属薄膜13の形成とは、いずれを先に行ってもよいし、同時に行ってもよい。 Next, as shown in FIG. 3C (1), dry plating is performed on the wiring pattern WP1, the conformal mask 12, and the conduction hole H2 to form the metal thin film 13 (step S7). More specifically, a dry plating process is performed on the first main surface side (the side on which the metal foil 10 is provided) of the insulating base material 30, and the wiring pattern WP1 and the conformal mask 12 (namely, the land 12b) are formed. , and the metal thin film 13 is formed on the side surface of the conduction hole H2. Further, the wiring pattern WP2 and the land 22b are also subjected to dry plating treatment to form the metal thin film 13. More specifically, dry plating is also performed on the second main surface side of the insulating base material 30 (the side on which the metal foil 20 is provided), and the metal thin film 13 is formed on the wiring pattern WP2 and the land 22b. do. Note that the formation of the metal thin film 13 on the first main surface side and the formation of the metal thin film 13 on the second main surface side may be performed either first or at the same time.
 本実施形態では、銅スパッタリングを行い、金属薄膜13として、厚さ0.3μmの銅薄膜を形成する。 In this embodiment, copper sputtering is performed to form a copper thin film with a thickness of 0.3 μm as the metal thin film 13.
 次に、図3C(2)に示すように、配線パターンWP1,WP2を被覆し、導通用孔H2を被覆しないめっきレジスト14,24を形成する(ステップS8)。めっきレジスト14には、導通用孔H2を被覆しないように導通用孔H2の部分に開口14aが設けられている。同様に、めっきレジスト24には、導通用孔H2の部分に開口24aが設けられている。本実施形態において、開口14aの直径は100μmであり、開口24aの直径は140μmである。 Next, as shown in FIG. 3C (2), plating resists 14 and 24 are formed that cover the wiring patterns WP1 and WP2 but do not cover the conduction holes H2 (step S8). An opening 14a is provided in the plating resist 14 at a portion of the conduction hole H2 so as not to cover the conduction hole H2. Similarly, the plating resist 24 is provided with an opening 24a at the conduction hole H2. In this embodiment, the diameter of the opening 14a is 100 μm, and the diameter of the opening 24a is 140 μm.
 なお、図3C(2)に示すように、開口14aは、ランド12bの上に位置する。また、開口24aは、ランド22bの上に位置する。 Note that, as shown in FIG. 3C(2), the opening 14a is located above the land 12b. Further, the opening 24a is located above the land 22b.
 なお、図3C(2)では、配線パターンWP1をめっきレジスト14で全て被覆したが、これに限られず、少なくとも導通用孔H2の周囲の配線パターンWP1のみを被覆してもよい。また、配線パターンWP2をめっきレジスト24で全て被覆したが、これに限られず、少なくとも導通用孔H2の周囲の配線パターンWP2のみを被覆してもよい。この場合、導通用孔H2および導通用孔H2の周囲の配線パターンWP1,WP2のみに、めっき処理を行ってもよい。 Although the wiring pattern WP1 is entirely covered with the plating resist 14 in FIG. 3C(2), the present invention is not limited to this, and at least only the wiring pattern WP1 around the conduction hole H2 may be covered. Moreover, although the wiring pattern WP2 is entirely covered with the plating resist 24, the present invention is not limited to this, and at least only the wiring pattern WP2 around the conduction hole H2 may be covered. In this case, the plating process may be performed only on the conduction hole H2 and the wiring patterns WP1 and WP2 around the conduction hole H2.
 次に、図3D(1)に示すように、めっき処理を行うことにより、導通用孔H2の内部に金属めっき40を形成する(ステップS9)。より詳しくは、金属薄膜13が形成されためっきレジスト14の開口14aの内部、およびめっきレジスト24の開口24aの内部に金属めっき40を形成する。金属めっき40には、ボタンランド41,42が含まれる。その後、図3D(2)に示すように、めっきレジスト14,24を除去する(ステップS10)。これにより、ランド12bとランド22bを電気的に接続する層間導電路50を形成する。 Next, as shown in FIG. 3D(1), metal plating 40 is formed inside the conduction hole H2 by performing a plating process (step S9). More specifically, metal plating 40 is formed inside the opening 14a of the plating resist 14 in which the metal thin film 13 is formed and inside the opening 24a of the plating resist 24. Metal plating 40 includes button lands 41 and 42. Thereafter, as shown in FIG. 3D (2), the plating resists 14 and 24 are removed (step S10). This forms an interlayer conductive path 50 that electrically connects land 12b and land 22b.
 本実施形態において、金属めっき40は、電解銅めっきである。 In this embodiment, the metal plating 40 is electrolytic copper plating.
 本実施形態では、導通用孔H2が貫通孔であるため、層間導電路50は、めっきスルーホールとなる。なお、本実施形態では、層間導電路50として、めっきスルーホールを形成するが、これに限定されず、貫通孔を充填するビアを形成してもよい。 In this embodiment, since the conduction hole H2 is a through hole, the interlayer conductive path 50 is a plated through hole. In this embodiment, a plated through hole is formed as the interlayer conductive path 50, but the present invention is not limited to this, and a via may be formed to fill the through hole.
 次に、図3Eに示すように、金属薄膜13の露出した部分、すなわち、金属薄膜13のうち、金属めっき40(またはボタンランド41,42)によって覆われていない部分の金属薄膜を除去する(ステップS11)。 Next, as shown in FIG. 3E, the exposed portion of the metal thin film 13, that is, the portion of the metal thin film 13 that is not covered with the metal plating 40 (or button lands 41, 42) is removed ( Step S11).
 以上の工程(ステップS1~S11)によって、本実施形態に係るプリント配線板1Aを製造することができる。 Through the above steps (steps S1 to S11), the printed wiring board 1A according to the present embodiment can be manufactured.
 本実施形態によれば、第1の実施形態の効果に加えて、めっきスルーホールを有するプリント配線板を製造することができる。 According to this embodiment, in addition to the effects of the first embodiment, a printed wiring board having plated through holes can be manufactured.
 なお、以上の説明においては、導通用孔および当該導通用孔を形成するためのコンフォーマルマスクの数は1つとしたが、複数の導通用孔および各導通用孔を形成するための複数のコンフォーマルマスクを形成してもよい。このとき、各導通用孔を形成するためのコンフォーマルマスクは、第1の主面および第2の主面のいずれに存在してもよい。 In the above explanation, the number of conductive holes and the conformal mask for forming the conductive holes is one, but the number of conductive holes and the number of conformal masks for forming each conductive hole is one. A formal mask may also be formed. At this time, the conformal mask for forming each conduction hole may be present on either the first main surface or the second main surface.
(第3の実施形態)
 図1、図2Aおよび図4A~図4Bを参照しつつ、第3の実施形態について説明する。本実施形態では、第1の実施形態の有底孔および第2の実施形態の貫通孔の両方を形成する。すなわち、本実施形態で製造するプリント配線板1Bは、有底ビアおよびめっきスルーホールの両方を有する。以降、本実施形態について、第1および第2の実施形態との相違点を中心に説明し、同様の部分の説明は省略する。
(Third embodiment)
A third embodiment will be described with reference to FIGS. 1, 2A, and 4A to 4B. In this embodiment, both the bottomed hole of the first embodiment and the through hole of the second embodiment are formed. That is, the printed wiring board 1B manufactured in this embodiment has both bottomed vias and plated through holes. Hereinafter, this embodiment will be described with a focus on the differences from the first and second embodiments, and descriptions of similar parts will be omitted.
 まず、図2A(1)に示すように、両面金属張積層板2を用意する(ステップS1)。 First, as shown in FIG. 2A(1), a double-sided metal-clad laminate 2 is prepared (step S1).
 次に、図4A(1)に示すように、両面金属張積層板2の金属箔10をパターニングして、配線パターンWP1、コンフォーマルマスク12、およびコンフォーマルマスク12Aを形成する。また、金属箔20をパターニングして、配線パターンWP2、絶縁基材30を挟んでコンフォーマルマスク12と対向するランド22、およびランド22bを形成する(ステップS2~S5)。コンフォーマルマスク12は、開口12aおよびランド12bを含む。コンフォーマルマスク12Aは、開口12Aaおよびランド12Abを含む。ランド22bの内側には、開口22aが存在する。開口12a,12Aa,22aの直径は任意であるが、好ましくは、開口22aが平面視で開口12Aaを包含するように形成する。 Next, as shown in FIG. 4A(1), the metal foil 10 of the double-sided metal-clad laminate 2 is patterned to form a wiring pattern WP1, a conformal mask 12, and a conformal mask 12A. Further, the metal foil 20 is patterned to form the wiring pattern WP2, the land 22 facing the conformal mask 12 with the insulating base material 30 in between, and the land 22b (steps S2 to S5). Conformal mask 12 includes openings 12a and lands 12b. Conformal mask 12A includes opening 12Aa and land 12Ab. An opening 22a exists inside the land 22b. Although the diameters of the openings 12a, 12Aa, and 22a are arbitrary, they are preferably formed so that the opening 22a includes the opening 12Aa in a plan view.
 なお、本実施形態では、貫通孔である導通用孔H2を形成するため、ステップS3における露光には両面同時露光機を用いることが好ましい。 Note that in this embodiment, in order to form the conduction hole H2, which is a through hole, it is preferable to use a double-sided simultaneous exposure machine for the exposure in step S3.
 次に図4A(2)に示すように、コンフォーマルマスク12にレーザ光を照射することにより、コンフォーマルマスク12の開口12aに露出した絶縁基材30を除去して、有底孔である導通用孔H1を形成する。また、コンフォーマルマスク12Aにレーザ光を照射することにより、コンフォーマルマスク12Aの開口12Aaに露出した絶縁基材30を除去して、貫通孔である導通用孔H2を形成する(ステップS6)。レーザの種類は、たとえばUV-YAGレーザ、炭酸ガスレーザ等である。また、本実施形態においては、導通用孔H2は開口12Aaおよび開口22aを連通させる貫通孔となる。なお、導通用孔H1および導通用孔H2は、いずれを先に形成してもよいし、同時に形成してもよい。 Next, as shown in FIG. 4A (2), by irradiating the conformal mask 12 with laser light, the insulating base material 30 exposed in the opening 12a of the conformal mask 12 is removed, and the conductor, which is a bottomed hole, is removed. A common hole H1 is formed. Further, by irradiating the conformal mask 12A with a laser beam, the insulating base material 30 exposed in the opening 12Aa of the conformal mask 12A is removed to form a conduction hole H2 which is a through hole (step S6). The types of lasers include, for example, UV-YAG lasers and carbon dioxide lasers. Further, in this embodiment, the conduction hole H2 is a through hole that allows the opening 12Aa and the opening 22a to communicate with each other. Note that either the conduction hole H1 or the conduction hole H2 may be formed first, or they may be formed at the same time.
 次に、図4B(1)に示すように、配線パターンWP1,WP2、コンフォーマルマスク12,12Aおよび導通用孔H1,H2に対して、乾式めっき処理を施し、金属薄膜13を形成する(ステップS7)。本実施形態では、導通用孔H2が貫通孔であるため、金属薄膜13は、絶縁基材30の第1の主面および第2の主面の両方に形成する。 Next, as shown in FIG. 4B (1), dry plating is performed on the wiring patterns WP1 and WP2, the conformal masks 12 and 12A, and the conductive holes H1 and H2 to form a metal thin film 13 (step S7). In this embodiment, since the conduction hole H2 is a through hole, the metal thin film 13 is formed on both the first main surface and the second main surface of the insulating base material 30.
 次に、図4B(2)に示すように、ランド12bとランド22を電気的に接続する層間導電路(有底ビア)50、およびランド12Abとランド22bを電気的に接続する層間導電路(めっきスルーホール)50Aを形成する。より詳しくは、まず、配線パターンWP1,WP2を被覆し、導通用孔H1,H2を被覆しないめっきレジストを形成する(ステップS8)。次に、導通用孔H1の内部に金属めっき40を形成し、導通用孔H2の内部に金属めっき40Aを形成する(ステップS9)。金属めっき40には、ボタンランド41が含まれる。金属めっき40Aには、ボタンランド41A,42が含まれる。その後、めっきレジストを除去する(ステップS10)。次に、図4B(2)に示すように、金属薄膜13の露出した部分、すなわち、金属薄膜13のうち、金属めっき40,40A(またはボタンランド41,41A,42)によって覆われていない部分の金属薄膜を除去する(ステップS11)。 Next, as shown in FIG. 4B(2), an interlayer conductive path (bottomed via) 50 electrically connects land 12b and land 22, and an interlayer conductive path (bottomed via) electrically connects land 12Ab and land 22b. Form a plated through hole) 50A. More specifically, first, a plating resist is formed that covers the wiring patterns WP1 and WP2 but does not cover the conductive holes H1 and H2 (step S8). Next, metal plating 40 is formed inside the conduction hole H1, and metal plating 40A is formed inside the conduction hole H2 (step S9). Metal plating 40 includes button lands 41. The metal plating 40A includes button lands 41A and 42. After that, the plating resist is removed (step S10). Next, as shown in FIG. 4B(2), the exposed portion of the metal thin film 13, that is, the portion of the metal thin film 13 that is not covered with the metal plating 40, 40A (or button lands 41, 41A, 42). The metal thin film is removed (step S11).
 以上のステップS8~S11によって、ランド12bとランド22を電気的に接続する層間導電路(有底ビア)50、およびランド12Abとランド22bを電気的に接続する層間導電路(めっきスルーホール)50Aを形成する。 Through the above steps S8 to S11, an interlayer conductive path (bottomed via) 50 that electrically connects land 12b and land 22, and an interlayer conductive path (plated through hole) 50A that electrically connects land 12Ab and land 22b. form.
 以上の工程(ステップS1~S11)によって、本実施形態に係るプリント配線板1Bを製造することができる。 Through the above steps (steps S1 to S11), the printed wiring board 1B according to the present embodiment can be manufactured.
 本実施形態によれば、有底ビアおよびめっきスルーホールの両方を有するプリント配線板を製造することができる。 According to this embodiment, a printed wiring board having both bottomed vias and plated through holes can be manufactured.
 なお、本実施形態では、コンフォーマルマスク12およびコンフォーマルマスク12Aを両面金属張積層板2の同一の主面(第1の主面)に形成したが、これに限られず、コンフォーマルマスク12およびコンフォーマルマスク12Aをそれぞれ両面金属張積層板2の異なる主面に形成してもよい。 In this embodiment, the conformal mask 12 and the conformal mask 12A are formed on the same main surface (first main surface) of the double-sided metal-clad laminate 2, but the conformal mask 12 and the conformal mask 12A are not limited to this. The conformal masks 12A may be formed on different main surfaces of the double-sided metal-clad laminate 2, respectively.
 なお、導通用孔H1および/または導通用孔H2を複数形成してもよい。この場合において、各導通用孔を形成するためのコンフォーマルマスクを両面金属張積層板2の第1の主面および第2の主面のいずれの側に形成してもよい。また、めっきスルーホールに代えて、貫通孔を充填するビア(フィルドビア)を形成してもよい。 Note that a plurality of conduction holes H1 and/or a plurality of conduction holes H2 may be formed. In this case, a conformal mask for forming each conduction hole may be formed on either side of the first main surface or the second main surface of the double-sided metal-clad laminate 2. Further, instead of the plated through hole, a via (filled via) may be formed to fill the through hole.
 上記の記載に基づいて、当業者であれば、本発明の追加の効果や種々の変形を想到できるかもしれないが、本発明の態様は、上述した個々の実施形態に限定されるものではない。特許請求の範囲に規定された内容およびその均等物から導き出される本発明の概念的な思想と趣旨を逸脱しない範囲で種々の追加、変更および部分的削除が可能である。 Based on the above description, those skilled in the art may be able to imagine additional effects and various modifications of the present invention, but aspects of the present invention are not limited to the individual embodiments described above. . Various additions, changes, and partial deletions are possible without departing from the conceptual idea and gist of the present invention derived from the content defined in the claims and equivalents thereof.
1,1A,1B プリント配線板
2 両面金属張積層板
10,20,100,200 金属箔
11,21,110,210 配線
12,12A コンフォーマルマスク
12a,12Aa,22a 開口
12b,12Ab,22b,120b ランド
13 金属薄膜
14,24,140,240 めっきレジスト
14a,24a,140a 開口
15,25,150,250 レジスト膜
15a,25a,150a,250a エッチングレジスト
22,220 ランド
30,300 絶縁基材
40,40A,400 金属めっき
41,41A,42,410 ボタンランド
50,50A,500 層間導電路
H1,H2,H 導通用孔
WP1,WP2,WP10,WP20 配線パターン

 
1, 1A, 1B Printed wiring board 2 Double-sided metal-clad laminate 10, 20, 100, 200 Metal foil 11, 21, 110, 210 Wiring 12, 12A Conformal mask 12a, 12Aa, 22a Opening 12b, 12Ab, 22b, 120b Land 13 Metal thin film 14, 24, 140, 240 Plating resist 14a, 24a, 140a Opening 15, 25, 150, 250 Resist film 15a, 25a, 150a, 250a Etching resist 22, 220 Land 30, 300 Insulating base material 40, 40A , 400 Metal plating 41, 41A, 42, 410 Button land 50, 50A, 500 Interlayer conductive path H1, H2, H Conductive hole WP1, WP2, WP10, WP20 Wiring pattern

Claims (13)

  1.  第1の主面および前記第1の主面の反対側の第2の主面を有する絶縁基材と、前記第1の主面に設けられた第1の金属箔と、前記第2の主面に設けられた第2の金属箔と、を有する両面金属張積層板を用意する工程と、
     前記両面金属張積層板の前記第1の金属箔をパターニングして、配線パターンおよびコンフォーマルマスクを形成する工程と、
     前記コンフォーマルマスクにレーザ光を照射することにより、前記コンフォーマルマスクの開口に露出した前記絶縁基材を除去して導通用孔を形成する工程と、
     前記配線パターンを被覆し、前記導通用孔を被覆しないめっきレジストを形成する工程と、
     前記導通用孔の内部に金属めっきを形成する工程と、
     前記めっきレジストを除去する工程と、
    を備える、プリント配線板の製造方法。
    an insulating base material having a first main surface and a second main surface opposite to the first main surface; a first metal foil provided on the first main surface; a step of preparing a double-sided metal-clad laminate having a second metal foil provided on the surface;
    patterning the first metal foil of the double-sided metal-clad laminate to form a wiring pattern and a conformal mask;
    irradiating the conformal mask with laser light to remove the insulating base material exposed in the opening of the conformal mask to form a conductive hole;
    forming a plating resist that covers the wiring pattern but does not cover the conduction hole;
    forming metal plating inside the conduction hole;
    removing the plating resist;
    A method for manufacturing a printed wiring board, comprising:
  2.  前記配線パターンを形成する工程は、
     前記第1の金属箔の上に、前記第1の金属箔の厚さの1.5倍以下の厚さを有するレジスト膜を形成する工程と、
     前記レジスト膜を露光および現像して、前記配線パターンに対応するエッチングレジストを形成する工程と、
     前記エッチングレジストで被覆されていない前記第1の金属箔をエッチングで除去することにより、前記配線パターンを形成する工程と、
     前記エッチングレジストを除去する工程とを備える、請求項1に記載のプリント配線板の製造方法。
    The step of forming the wiring pattern includes:
    forming a resist film having a thickness of 1.5 times or less than the thickness of the first metal foil on the first metal foil;
    exposing and developing the resist film to form an etching resist corresponding to the wiring pattern;
    forming the wiring pattern by etching away the first metal foil that is not covered with the etching resist;
    The method for manufacturing a printed wiring board according to claim 1, further comprising the step of removing the etching resist.
  3.  前記配線パターンおよびコンフォーマルマスクを形成する工程において、前記配線パターンの形成と、前記コンフォーマルマスクとを、同時に形成する、請求項1に記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to claim 1, wherein in the step of forming the wiring pattern and the conformal mask, the formation of the wiring pattern and the conformal mask are formed simultaneously.
  4.  前記めっきレジストを形成する工程の前に、前記配線パターン、前記配線パターン間に露出した絶縁基材および前記導通用孔に対して乾式めっき処理を施す工程と、
     前記めっきレジストを除去する工程の後に、前記乾式めっき処理により形成された金属薄膜のうち、前記金属めっきで覆われていない部分を除去する工程をさらに備える、請求項1に記載のプリント配線板の製造方法。
    a step of performing a dry plating process on the wiring patterns, the insulating base material exposed between the wiring patterns, and the holes for conductivity before the step of forming the plating resist;
    2. The method for producing a printed wiring board according to claim 1, further comprising the step of removing a portion of the thin metal film formed by the dry plating process that is not covered with the metal plating, after the step of removing the plating resist.
  5.  前記乾式めっき処理は、スパッタリング法により行う、請求項4に記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to claim 4, wherein the dry plating treatment is performed by a sputtering method.
  6.  前記金属箔は、銅箔であり、
     前記スパッタリング法は、銅を用いたスパッタリング法であり、
     前記金属薄膜は銅薄膜である、請求項5に記載のプリント配線板の製造方法。
    The metal foil is copper foil,
    The sputtering method is a sputtering method using copper,
    6. The method for manufacturing a printed wiring board according to claim 5, wherein the metal thin film is a copper thin film.
  7.  前記導通用孔を形成する工程は、前記導通用孔の底面に前記第2の金属箔が露出するように行う、請求項1に記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to claim 1, wherein the step of forming the conduction hole is performed so that the second metal foil is exposed at the bottom of the conduction hole.
  8.  前記両面金属張積層板の前記第2の金属箔をパターニングして、配線パターンと、平面視で前記開口を包含する別の開口と、ランドとを形成し、
     前記導通用孔を形成する工程は、前記導通用孔が前記開口および前記別の開口を連通させる貫通孔となるように行う、請求項1に記載のプリント配線板の製造方法。
    patterning the second metal foil of the double-sided metal-clad laminate to form a wiring pattern, another opening that includes the opening in plan view, and a land;
    2. The method of manufacturing a printed wiring board according to claim 1, wherein the step of forming the conduction hole is performed so that the conduction hole becomes a through hole that communicates the opening and the other opening.
  9.  前記コンフォーマルマスクは、前記開口として、第1の開口および第2の開口を含み、
     前記両面金属張積層板の前記第2の金属箔をパターニングして、第3の開口を形成する工程であって、前記第3の開口が平面視で前記コンフォーマルマスクの前記第2の開口を包含する工程をさらに備え、
     前記導通用孔を形成する工程において、前記コンフォーマルマスクの前記第1の開口および前記第2の開口に露出した前記絶縁基材を除去して、底面に前記第2の金属箔が露出する第1の導通用孔ならびに前記第2の開口および前記第3の開口を連通させる第2の導通用孔を形成する、請求項1に記載のプリント配線板の製造方法。
    The conformal mask includes a first opening and a second opening as the opening,
    forming a third opening by patterning the second metal foil of the double-sided metal-clad laminate, the third opening forming a second opening of the conformal mask in a plan view; further comprising the step of including;
    In the step of forming the conduction hole, the insulating base material exposed in the first opening and the second opening of the conformal mask is removed to expose the second metal foil on the bottom surface. 2. The method of manufacturing a printed wiring board according to claim 1, further comprising forming one conduction hole and a second conduction hole that communicates the second opening and the third opening.
  10.  前記プリント配線板は、フレキシブルプリント配線板である、請求項1~9のいずれかに記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to any one of claims 1 to 9, wherein the printed wiring board is a flexible printed wiring board.
  11.  前記第1および第2の金属箔は、圧延銅箔である、請求項10に記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to claim 10, wherein the first and second metal foils are rolled copper foils.
  12.  前記金属めっきは、電解めっきである、請求項1~9のいずれかに記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to any one of claims 1 to 9, wherein the metal plating is electrolytic plating.
  13.  請求項10に記載の製造方法において、少なくとも一つの工程をロールツーロール方式にて行う、プリント配線板の製造方法。

     
    11. The method of manufacturing a printed wiring board according to claim 10, wherein at least one step is performed in a roll-to-roll manner.

PCT/JP2023/010778 2022-09-13 2023-03-20 Method for producing printed wiring board WO2024057586A1 (en)

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JP2017034215A (en) * 2015-08-06 2017-02-09 日本メクトロン株式会社 Multilayer flexible printed wiring board and method for manufacturing the same
JP2019210521A (en) * 2018-06-05 2019-12-12 Jx金属株式会社 Surface-treated copper foil, copper-clad laminate and printed wiring board
JP2021048180A (en) * 2019-09-17 2021-03-25 日本メクトロン株式会社 Method for manufacturing fluorine-containing core base material, method for manufacturing substrate for flexible printed wiring board, fluorine-containing core base material and substrate for flexible printed wiring board

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JP2014222733A (en) * 2013-05-14 2014-11-27 イビデン株式会社 Printed wiring board and method for manufacturing the same
JP2017034215A (en) * 2015-08-06 2017-02-09 日本メクトロン株式会社 Multilayer flexible printed wiring board and method for manufacturing the same
JP2019210521A (en) * 2018-06-05 2019-12-12 Jx金属株式会社 Surface-treated copper foil, copper-clad laminate and printed wiring board
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