WO2024055935A1 - 一种芯片、车用音源播放方法、车载设备及存储介质 - Google Patents

一种芯片、车用音源播放方法、车载设备及存储介质 Download PDF

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Publication number
WO2024055935A1
WO2024055935A1 PCT/CN2023/118052 CN2023118052W WO2024055935A1 WO 2024055935 A1 WO2024055935 A1 WO 2024055935A1 CN 2023118052 W CN2023118052 W CN 2023118052W WO 2024055935 A1 WO2024055935 A1 WO 2024055935A1
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sound source
core system
dmac
chip
buffer
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PCT/CN2023/118052
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English (en)
French (fr)
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苏仲杰
杨威
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合肥杰发科技有限公司
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Publication of WO2024055935A1 publication Critical patent/WO2024055935A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04S—STEREOPHONIC SYSTEMS 
    • H04S7/00—Indicating arrangements; Control arrangements, e.g. balance control

Definitions

  • the disclosed embodiments of the present application relate to the field of vehicle technology, and more specifically, to a chip, a method for playing a vehicle sound source, a vehicle device, and a storage medium.
  • the main way to achieve fast playback of car beeps and mix playback of car beeps and multimedia system sound sources is to plug in an external DSP, and the MCU drives the DSP to emit the car beeps.
  • the multimedia system After the car system starts, the multimedia system The sound is input to the DSP through an I2S channel, and the DSP completes the mixing and output.
  • this approach adds external chips and hardware circuits, which increases the hardware cost.
  • the present application proposes a chip, a method for playing a vehicle sound source, a vehicle-mounted device, and a storage medium.
  • an exemplary chip equipped with a first core system and a second core system, wherein the first core system is started before the second core system, and the first core system The system is used for the first sound source, and the second core system is used for the second sound source; wherein the first sound source is a prompt sound source, and the second sound source is a multimedia sound source; the first core system is based on One core of the plurality of cores of the chip operates, and the second core system operates based on other cores of the plurality of cores of the chip; or the first core system is based on an auxiliary microprocessor in the chip, And the second core system operates based on a single core or multiple cores in the chip; the first core system is used to control the output of the first sound source in response to a notification instruction after startup, so that the first sound source performs Play; the second core system is used to perform a mixing operation after startup, so that the second sound source and the first sound source are mixed and output.
  • an exemplary vehicle-mounted device including the chip described in the first aspect.
  • an exemplary vehicle sound source playback method is disclosed, which is applied to vehicle-mounted equipment.
  • the vehicle-mounted equipment includes the chip as described in the first aspect, including: activating the first core system , so that the first core system responds to the notification instruction and controls the output of the first sound source so that the first sound source plays; and/or starts the second core system so that the second core system executes
  • the mixing operation is to mix the second sound source and the first sound source, so that the mixed first sound source and the second sound source are played.
  • an exemplary vehicle-mounted device includes a memory and a processor coupled to each other.
  • the processor is configured to execute program instructions stored in the memory to implement a third The car audio source playback method described in the aspect.
  • an exemplary non-volatile computer-readable storage medium on which program instructions are stored.
  • the program instructions are executed by a processor, the vehicle audio source described in the third aspect is implemented. playback method.
  • the first core system is started before the second core system. After starting, the first core system responds to the notification command and controls the output of the first sound source so that the first sound source is played.
  • the system is used to perform a mixing operation after startup, so that the second sound source and the first sound source are mixed, so that the mixed first sound source and the second sound source are mixed and output, and the third sound source is output quickly, safely and stably.
  • One audio source simultaneously achieves low-latency and stable delay mixing output without adding additional hardware, reducing external hardware circuits and reducing costs.
  • Figure 1 is a schematic structural diagram illustrating a chip according to an embodiment of the present application.
  • Figure 2 is a schematic structural diagram illustrating a chip according to another embodiment of the present application.
  • Figure 3 is a schematic structural diagram illustrating a chip according to another embodiment of the present application.
  • Figure 4 is a schematic structural diagram illustrating a chip according to yet another embodiment of the present application.
  • Figure 5 is a schematic structural diagram illustrating the buffer of a DMAC according to an embodiment of the present application.
  • Figure 6 is a schematic structural diagram illustrating a vehicle-mounted device according to an embodiment of the present application.
  • Figure 7 is a schematic flowchart illustrating a playback method of a vehicle audio source according to an embodiment of the present application
  • Figure 8 is a schematic structural diagram illustrating a vehicle-mounted device according to another embodiment of the present application.
  • FIG. 9 is a schematic structural diagram illustrating a non-volatile computer-readable storage medium according to an embodiment of the present application.
  • a and/or B can mean: A exists alone, A and B exist simultaneously, and they exist alone. B these three situations.
  • the character "/" in this article generally indicates that the related objects are an "or” relationship.
  • "many” in this article means two or more than two.
  • the term "at least one” herein means any one of a plurality or any combination of at least two of a plurality, for example, including at least one of A, B, and C, which can mean including from A, Any one or more elements selected from the set composed of B and C.
  • FIG. 1 is a schematic structural diagram of a chip according to an embodiment of the present application.
  • the core The chip 100 is installed with a first core system 110 and a second core system 120.
  • the first core system 110 is started before the second core system 120.
  • the first core system 110 is used for the first sound source, and the second core system 120 is used for the third sound source. Second sound source.
  • the first core system 110 and the second core system 120 may be installed in two independent areas in the chip 100, and the first core system 110 and the second core system 120 may operate independently.
  • the chip 100 may be a multi-core system-on-chip.
  • the first core system 110 may run based on one core of the multi-core, that is, one core of the multi-core is used for the first core system 110, and the second core system 120 may be based on The other cores in the multi-core operate, that is, the other cores in the multi-core are used in the second core system 120 .
  • the chip 100 can also be a single-core or multi-core system on a chip including an auxiliary microprocessor, for example, a single-core or multi-core system on a chip including R5F.
  • the first core system 110 can run based on the auxiliary microprocessor, that is, The auxiliary microprocessor is used for the first core system 110, and the second core system 120 can operate on a single-core or multi-core basis, that is, single core or multi-core is used for the second core system 120.
  • the first core system 110 is used for the first sound source, and the second core system 120 is used for the second sound source.
  • the first core system 110 can be a real-time operating system (FreeRTOS), which performs instrument body information functions, such as performing the first audio source output
  • the second core system 120 can be an Android system (Android), which performs in-vehicle infotainment system (IVI). ) function, for example, performs second audio source output.
  • FreeRTOS real-time operating system
  • Android Android
  • IVI in-vehicle infotainment system
  • the first sound source is the prompt sound source.
  • the prompt sound source refers to the sound that needs to be made quickly after the chip is powered on, such as: turn signal prompt sound, seat belt prompt sound, headlight prompt sound, reversing radar sound and fault prompt sound, etc., which can be based on In actual situations, the range and type of the first sound source are set in advance, and the first sound source can be stored in the first core system 110 in advance. For example, it can be stored in wav (pcm) format and a sampling rate of 48KHz.
  • the first core system 110 completes the output of the first sound source through the preset sound generation logic.
  • the first core system 110 through the audio policy (Audio Policy) and the audio driver (Audio Driver), transmits the first audio source, for example, to the storage structure of the chip 100 for output.
  • the first core system 110 can also be used to implement other functions, such as system-related interface display, real-time reversing image display, etc., which are not limited here.
  • the second sound source is a multimedia sound source, such as car music sound source, car video sound source, car radio sound source, etc. It should be noted that, depending on the actual situation, the second sound source may also be a sound source outside the preset range of the first sound source.
  • the first core system 110 is used to control the output of the first sound source in response to the notification instruction after startup, so that the first sound source can be played;
  • the second core system 120 is used to perform a mixing operation after startup, so that the second sound source Mixing is performed with the first sound source, so that the mixed first sound source and the second sound source are played.
  • the notification instruction may be an instruction that can be received after the first core system 110 is started, such as an instruction issued through a CAN bus or an external MCU for playing the first sound source.
  • the first core system 110 After the chip 100 is powered on, the first core system 110 is started first, receives notification instructions sent through the CAN bus or an external MCU, and outputs and plays the first audio source. Specifically, in the example of FIG. 2, in the first core system 110, the first audio source is transmitted through the audio policy (Audio Policy) and the audio driver (Audio Driver), for example, to the storage structure of the chip 100. for output.
  • the audio policy Audio Policy
  • Audio Driver Audio Driver
  • the second core system 120 is also started, and after the startup, the first sound source is obtained, and mixed output with the second sound source, that is, the first sound source and the second sound source of the same time length are mixed. and output, so that the mixed first sound source and second sound source can be played.
  • the first audio source and the second audio source are transmitted to the audio hardware abstraction layer (Audio HAL) through the audio policy (Audio Policy).
  • the mixer (Mixer) mixes the first audio source and the second audio source through the mixer (Mixer), and transmits them to the audio driver (Audio Driver) to transmit the mixed data, for example, to the memory structure of chip 100 for output.
  • the first core system 110 can still respond to the notification command and control The first audio source is output, so that the first audio source is played.
  • the second core system 120 if the second sound source needs to be output, and the first core system 110 also needs to output the first sound source, at this time, the second core system 120 obtains the first sound source output by the first core system 110, and The second audio source is mixed and output.
  • the first core system 110 is started before the second core system 120. After starting, the first core system 110 responds to the notification command and controls the output of the first sound source so that the first sound source is played.
  • the core system 120 is used to perform a mixing operation after startup, so that the second sound source and the first sound source are mixed, so that the mixed first sound source and the second sound source are played, and the third sound source is output quickly, safely and stably.
  • One audio source simultaneously achieves low-latency and stable delay mixing output without adding additional hardware, reducing external hardware circuits and reducing costs.
  • the chip 100 includes a first core system 110 and a second core system 120 .
  • FIG. 3 is a schematic structural diagram illustrating a chip according to another embodiment of the present application. Based on the above embodiment, the chip 100 further includes a direct memory access controller (DMAC) 130 .
  • DMAC direct memory access controller
  • the first core system 110 determines the first starting writing position, and writes the first audio source to the buffer of the DMAC 130 from the first starting writing position, so that the DMAC 130 starts reading from the buffer of the DMAC 130 from the reading position.
  • the first sound source is thereby controlled to output the first sound source, wherein the first starting writing position is a first preset distance from the reading position in the buffer of the DMAC 130.
  • the DMAC 130 includes a buffer.
  • the buffer of the DMAC 130 is used to cache the first sound source output by the first core system 110 and/or the mixed sound source output by the second system.
  • the mixed sound source is the mixed first sound source and the second sound source. sound source.
  • the first starting writing position refers to the position of the buffer area of the DMAC 130 , that is, the position where the first core system 110 writes the first audio source into the buffer area of the DMAC 130 .
  • the first core system 110 writes the data of the first sound source into the buffer of the DMAC 130 from the first starting writing position. That is, the first core system 110 writes the first sound source from the first starting writing position to the DMAC 130
  • the first starting write position of the buffer and its subsequent positions Specifically, in some examples, as shown in Figure 4, in the first core system 110, after audio The policy (Audio Policy) and the audio driver (Audio Driver), starting from the first starting writing position, transmit the first audio source to the buffer of the DMAC 130 for output.
  • the read position refers to the position of the buffer of the DMAC 130, that is, the position where the DMAC 130 starts reading its buffer.
  • the DMAC 130 reads the data of the first audio source starting from the reading position in the buffer of the DMAC 130, thereby controlling the output of the first audio source.
  • the first core system 110 can know the reading position of the DMAC 130 by reading the register of the DMAC 130.
  • the first preset distance is the distance between the first starting writing position and the reading position, which can be preset according to the actual situation. In other words, the first starting writing position is based on the first preset distance and the reading position. definite.
  • the first core system 110 can obtain the reading position of the DMAC 130 by reading the register of the DMAC 130, and then, according to the preset first preset distance, Determine a position that is a first preset distance away from the reading position as the first starting writing position, and then start writing the first sound source from the first starting writing position until the writing of the first sound source is completed.
  • the first preset distance may be a fixed distance or a distance that changes according to the buffer size of the DMAC 130.
  • the DMAC 130 reads the audio data from the buffer of the DMAC 130 for output.
  • reading the first audio source from the reading position to control the output of the first audio source usually requires an I2S module.
  • This application does not It is not described, but those skilled in the art can understand that the I2S module is required to control audio data output. Therefore, the general knowledge about the I2S module also belongs to part of this application.
  • Figure 5 is a schematic structural diagram illustrating the buffer of the DMAC 130 according to an embodiment of the present application.
  • the buffer of the DMAC 130 is approximately the data length corresponding to the audio of a preset duration, such as , the data length corresponding to 42ms audio.
  • the buffer of the DMAC 130 can be divided into n nodes, where n is a positive integer greater than 1.
  • the reading position of the DMAC 130 is node 1
  • the first preset distance is 6 nodes.
  • the first core system 110 After reading the register of the DMAC 130, the first core system 110 obtains the reading position as node 1, and then, according to the first preset distance The distance is 6 nodes, and the first starting writing position is determined to be node 7.
  • the first core system 110 writes the first sound source into the buffer of the DMAC 130 from the first starting writing position (node 7). For example, the first audio source needs to occupy 3 nodes, then the first core system 110 starts writing from the first starting writing position (node 7) until node 9. Therefore, the DMAC 130 reads from the buffer of the DMAC 130 Start reading the first sound source at the position (node 1), and sequentially read the first preset distance (6 nodes) and the size occupied by the first sound source, such as 3 nodes, that is, the first sound source is read, thereby achieving control The first audio source output. In addition, when there is no data output from the first sound source, the first core system 110 writes zero data to the buffer of the DMAC 130.
  • the first core system 110 writes After reaching node 9, there is no data of the first audio source to be written, then the first core system 110 starts writing zero data from node 10, but the currently written node of the first core system 110 does not exceed the reading position of DMAC 130 (Node 1).
  • DMAC 130 reads the data in its buffer while outputting the data in its buffer. In the above example where the first sound source needs to occupy 3 nodes, when node 2 is read, node 2 If there is no data, the DMAC 130 outputs zero data until node 7, which is the first initial writing position, is read and starts outputting the first audio source.
  • the buffer of DMAC 130 can be recycled, that is, the remaining data can be written again from node 1, but it will not exceed the current reading position of DMAC 130 (node 1) to prevent writing through.
  • the DMAC 130 reads the first audio source written by the first core system 110 from the buffer of the DMAC 130.
  • the DMAC 130 updates the read position once and generates an interrupt; the second core system 120 determines the second starting write position during the interrupt. , to perform the mixing operation starting from the second starting writing position, wherein the second starting writing position is a second preset distance from the reading position in the buffer of the DMAC 130, and the second preset distance is smaller than the first preset distance. Set distance.
  • the DMAC 130 Each time the DMAC 130 reads from the buffer of the DMAC 130, the DMAC 130 updates the read position once and generates an interrupt.
  • the DMAC 130 reads the first sound source starting from the reading position (node 1) of the buffer of the DMAC 130, and sequentially reads the first preset distance (6 nodes) and the first sound source.
  • the occupied size for example, 3 nodes, each time a read is performed, that is, each time a node is read, the read position is updated to the next node, for example, node 2, and an interrupt is generated.
  • the duration of each interrupt can be the time it takes for each read, for example, the time it takes to read one node, that is, the duration of the interrupt is the length of one node.
  • the second core system 120 can perform related operations on the DMAC 130 to achieve exclusive use of the interrupt. Specifically, the second core system 120 determines the second starting writing position during the interruption to perform the mixing operation starting from the second starting writing position.
  • the second starting writing position refers to the position of the buffer of the DMAC 130, that is, the position where the second core system 120 writes the mixing data obtained by the mixing operation into the buffer of the DMAC 130.
  • the mixing operation is to mix the data of the first audio source and the corresponding data of the second audio source.
  • the first audio source and the second audio source are transmitted to the audio hardware abstraction layer (Audio HAL) through the audio policy (Audio Policy).
  • the mixer (Mixer) mixes the first audio source and the second audio source through the mixer (Mixer), and transmits them to the audio driver (Audio Driver), so that the mixed audio source is mixed starting from the second starting writing position.
  • the data after the tone is transferred to the buffer of DMAC 130 for output.
  • the second preset distance is the distance between the second starting writing position and the reading position, which can be preset according to the actual situation.
  • the second starting writing position is based on the second preset distance and the reading position.
  • the location is determined. Before the second core system 120 starts to perform the mixing operation, it can obtain the reading position of the DMAC 130 by reading the register of the DMAC 130, and then determines the second distance from the reading position according to the preset second preset distance.
  • the position of the preset distance is the second starting writing position, where the preset first preset distance may be a fixed distance or a distance that changes according to the buffer size of the DMAC 130.
  • the second core system 120 obtains that the reading position of DMAC 130 is node 1 by reading the register of DMAC 130 , and then, based on the second preset distance being 1 node, the second starting writing position is determined to be node 2. Therefore, the second core system 120 starts to perform the mixing operation from the second starting writing position (node 2). At this time, the second core system 120 starts at the position (node 2) immediately adjacent to the reading position (node 1). Perform a mixing operation. That is to say, the duration of the mixing operation performed by the second core system 120 is the duration of one node, that is, the duration of one interruption.
  • the second core system 120 starts to perform the mixing operation from the second starting writing position.
  • the second core system 120 reads the data of the first audio source written at the second starting writing position from the buffer of the DMAC 130, and compares the data of the first audio source with the second audio source. The corresponding data is mixed, and the mixed data is written to the second starting writing position, thereby realizing the mixing operation.
  • the second core system 120 determines that the second starting writing position is node 2. At this time, the second core system 120 determines that the second starting writing position is node 2.
  • the system 120 first reads the data of the first sound source written at the second starting writing position (node 2), that is, reads the data of one node, and then reads the first data written at the second starting writing position.
  • the data of the sound source is mixed with the corresponding data of the second sound source, that is, the data of a node of the first sound source and the data of a node of the second sound source are additively mixed to obtain the mixed data. Then, the mixed data The data is written to the second starting writing position (node 2), that is, the mixed data overwrites the data of the first sound source written at the second starting writing position (node 2).
  • DMAC 130 performs another read from the buffer of DMAC 130.
  • the read position of DMAC 130 is updated to node 2, and at the same time, another interrupt is generated, which is the duration of one node.
  • the second core system 120 first reads the first sound source written at the next position (node 3) of the second initial writing position (node 2). The data of one node is read, and then the data of the first sound source written at the second starting writing position is compared with the corresponding data of the second sound source.
  • Mixing is to mix and overflow the data of a node of the first sound source with the data of a node of the second sound source to obtain the mixed data, and then write the mixed data to the second source
  • the next position (node 3) of the writing position (node 2) that is, the mixed data overwrites the first sound source written at the next position (node 3) of the second initial writing position (node 2)
  • the data, among which, the overflow processing is used to avoid mixing overflow after mixing, that is, the situation of popping sound, which will not be described in detail here.
  • the first core system 110 since the second preset distance is smaller than the first preset distance, the first core system 110 always writes the first audio source data to the buffer of the DMAC 130 before the second core system 120. , 6 nodes after the first core system 110 writes the data of the first audio source to the buffer of the DMAC 130, the second core system 120 writes the mixed data to the buffer of the DMAC 130.
  • the buffer of DMAC 130 can be recycled.
  • the buffer of DMAC 130 includes a ring buffer, and DMAC 130 divides the ring buffer into n nodes, where n is a positive integer greater than 1; DMAC 130 reads and/or reads from the buffer of DMAC 130 Or the data written is the data of one node, and the duration of the interruption is the duration of one node.
  • the buffer of the DMAC 130 includes a ring buffer, a ring buffer, also known as a circular queue, and a circular buffer. It is a structure used to represent a fixed-size, end-to-end connected buffer, that is, Node 1 in the ring buffer in Figure 5 is actually connected end-to-end with node n to form a ring structure.
  • DMAC 130 divides the ring buffer into n nodes, where n is a positive integer greater than 1.
  • n can be set according to the actual situation.
  • n can be 16, which is not limited here.
  • each node is about 2.66ms.
  • the data of a node of the first sound source and the data of a node of the second sound source are subjected to additive mixing and overflow processing to obtain mixed data.
  • the mixed data is a node. The data.
  • the mixed data is the data of one node, that is, every time the mixing operation is performed, the data of the length of one node in the first sound source and the second sound source is mixed. If at a certain node, the length of the last remaining data of the first sound source or the second sound source is less than one node, it will be filled with zero data. For example, when the buffer of DMAC 130 is about 42ms and n is 16, assuming that the first audio source or the second audio source is 2ms of data, that is, it is not an integer multiple of the node length, then after mixing, the remaining part is padded with zeros .
  • the mixed data is the data of a node.
  • the mixed data is also output to be used as a reference audio path.
  • the mixed data obtained after mixing can be written back to the next node of the DMAC 130 reading node to output as a reference tone.
  • the reference tone can be used for call ECNR, that is, as an echo cancellation in the call front-end voice processing module. or noise-reduction reference source.
  • the first starting writing position is determined by the reading position of the DMAC 130 and the first preset distance
  • the second starting writing position is determined by the reading position of the DMAC 130 and the second preset distance.
  • the second preset distance is one node
  • the first preset distance is at least n/2 nodes.
  • the distance between the second starting writing position and the reading position of DMAC 130 is one node, and the distance between the first starting writing position and the reading position of DMAC 130 is at least n/2 nodes.
  • n is an even number.
  • the first preset distance is at least 8 nodes.
  • FIG. 6 is a schematic structural diagram of a vehicle-mounted device illustrating an embodiment of the present application.
  • the vehicle-mounted device 600 includes a chip 610, where the chip 610 can be the chip 100 as shown in Figure 1 or Figure 2.
  • the chip 610 can be the chip 100 as shown in Figure 1 or Figure 2.
  • Figure 7 is a schematic flowchart illustrating a method for playing a vehicle audio source according to an embodiment of the present application. The method is applied to vehicle-mounted equipment.
  • the vehicle-mounted equipment includes Figure 1 or Figure 2.
  • the method may include the following steps:
  • S71 Start the first core system 110 so that the first core system 110 responds to the notification instruction and controls the output of the first sound source so that the first sound source is played.
  • the notification instruction may be an instruction that can be received after the first core system 110 is started, such as an instruction issued through a CAN bus or an external MCU for playing the first sound source.
  • the first core system 110 is used for the first sound source, which may be a real-time operating system (FreeRTOS), and performs instrument and body information functions, such as outputting the first sound source.
  • the first sound source may be a real-time operating system (FreeRTOS)
  • FreeRTOS real-time operating system
  • the first sound source refers to the sound that needs to be sounded quickly after the chip is powered on, such as: turn signal prompt sound, seat belt prompt sound, headlight prompt sound, reversing radar sound and fault prompt sound, etc., which can be pre-set according to the actual situation.
  • the range and type of the first sound source are set, and the first sound source can be stored in the first core system 110 in advance. For example, it can be stored in wav (pcm) format and a sampling rate of 48KHz.
  • the first core system 110 completes the output of the first sound source through the preset sound generation logic, that is, the audio strategy.
  • the first core system 110 can also be used to implement other functions. , such as: system-related interface display, real-time reversing image display, etc., which are not limited here.
  • the first core system 110 After the chip 100 is powered on, the first core system 110 is started, receives notification instructions sent through the CAN bus or an external MCU, and controls the output of the first sound source so that the first sound source is played.
  • S72 Start the second core system 120, so that the second core system 120 performs a mixing operation, so that the second sound source and the first sound source are mixed and output.
  • the second core system 120 is used for the second sound source, which may be an Android system (Android), to perform in-vehicle infotainment system (IVI) functions, for example, to perform the second sound source output.
  • the second sound source may be a multimedia system sound source and/or a preset sound source. sound sources outside the range of the specified first sound source.
  • the second core system 120 is also started, and after the startup, the first sound source is obtained, and mixed output with the second sound source, that is, the first sound source and the second sound source of the same time length are mixed. and output, so that the mixed first sound source and second sound source can be played.
  • FIG. 8 is a schematic structural diagram of a vehicle-mounted device illustrating another embodiment of the present application.
  • the vehicle-mounted device 80 includes a memory 81 and a processor 82 coupled to each other.
  • the processor 82 is used to execute the program instructions stored in the memory 81 to implement the steps of the above-mentioned vehicle audio source playing method embodiment.
  • the vehicle-mounted device 80 may include but is not limited to: a smart cockpit, an IVI (In-Vehicle Infotainment, in-vehicle infotainment system) device or a driving recorder device.
  • IVI In-Vehicle Infotainment, in-vehicle infotainment system
  • the processor 82 is used to control itself and the memory 81 to implement the steps of any of the above embodiments of the playback method of the vehicle sound source, or to implement the steps in the above embodiment of the playback method of the vehicle sound source.
  • the processor 82 may also be called a CPU (Central Processing Unit).
  • the processor 82 may be an integrated circuit chip with signal processing capabilities.
  • the processor 82 can also be a general-purpose processor, a digital signal processor (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field-Programmable Gate Array, FPGA) or other Programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
  • a general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc.
  • the processor 82 may be implemented by an integrated circuit chip.
  • FIG. 9 is a schematic structural diagram illustrating a non-volatile computer-readable storage medium according to an embodiment of the present application.
  • the computer-readable storage medium 90 stores program instructions 901 that can be run by the processor.
  • the program instructions 901 are used to implement the steps of any of the above embodiments of the vehicle sound source playback method.
  • the disclosed methods and devices can be implemented in other ways.
  • the device implementation described above is only illustrative.
  • the division of modules or units is only a logical function division.
  • there may be other divisions for example, units or components may be combined or integrated. to another system, or some features can be ignored, or not implemented.
  • the coupling or direct coupling or communication connection between the shown or discussed may be through Some interfaces, indirect couplings or communication connections of devices or units, may be in electrical, mechanical or other forms.
  • each functional unit in each embodiment of the present application can be integrated into one processing unit, each unit can exist physically alone, or two or more units can be integrated into one unit.
  • the above integrated units can be implemented in the form of hardware or software functional units.
  • Integrated units may be stored in a computer-readable storage medium if they are implemented in the form of software functional units and sold or used as independent products.
  • the technical solution of the present application is essentially or contributes to the existing technology, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , including a number of instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the various implementation methods of this application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program code. .

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Abstract

本申请提供一种芯片，安装有第一核系统和第二核系统，其中所述第一核系统先于所述第二核系统启动，所述第一核系统用于第一音源，所述第二核系统用于第二音源；其中，第一音源为提示音源，第二音源为多媒体音源；所述第一核系统用于在启动后，响应于通知指令，控制第一音源输出，以使所述第一音源进行播放；所述第二核系统用于在启动后执行混音操作，以使得所述第二音源与所述第一音源进行混音输出。本申请还提供了相应的车用音源播放方法、车载设备及存储介质。本申请的上述方案，可以实现快速而安全稳定地输出第一音源，同时实现低延迟，稳定时延的混音输出，而均无需增加额外硬件，减少外置硬件电路，降低成本。

Description

一种芯片、车用音源播放方法、车载设备及存储介质 技术领域
本申请的所公开实施例涉及车载技术领域，且更具体而言，涉及一种芯片、车用音源的播放方法、车载设备及存储介质。
背景技术
随着车机系统发展，对于车机系统中的功能要求也随之越来越高，其中，对各类汽车提示音与传统多媒体系统音源进行混音播放是汽车上的一种重要功能，区别于传统多媒体系统音源，汽车提示音需要在短时间内快速进行播放，而传统多媒体系统音源则需要长时间持续播放，因此，如何高效实现短时间内快速播放汽车提示音的同时对两种音源进行混音播放是当前车机系统中需要解决的问题。
目前，实现汽车提示音的快速播放的同时对汽车提示音与多媒体系统音源进行混音播放的主要做法是通过外挂一颗DSP，由MCU驱动DSP发出汽车提示音，等待车机系统启动后，多媒体声音通过一路I2S输入给DSP，由DSP完成混音输出，但是，这种做法增加了外置芯片和硬件电路，增大了硬件成本。
发明内容
根据本申请的实施例，本申请提出一种芯片、车用音源的播放方法、车载设备及存储介质。
根据本申请的第一方面，公开一种实例性的芯片，安装有第一核系统和第二核系统，其中所述第一核系统先于所述第二核系统启动，所述第一核系统用于第一音源，所述第二核系统用于第二音源；其中，第一音源为提示音源，第二音源为多媒体音源；所述第一核系统基于 所述芯片的多个核中一个核运行，且所述第二核系统基于所述芯片的多个核中其他核运行；或者所述第一核系统基于所述芯片中的辅助微处理器，且所述第二核系统基于所述芯片中的单核或多核运行；所述第一核系统用于在启动后，响应于通知指令，控制第一音源输出，以使所述第一音源进行播放；所述第二核系统用于在启动后执行混音操作，以使得所述第二音源与所述第一音源进行混音输出。
根据本申请的第二方面，公开一种实例性的车载设备，包括如上述第一方面所述的芯片。
根据本申请的第三方面，公开一种实例性的车用音源的播放方法，应用于车载设备，所述车载设备包括如上述第一方面所述的芯片，包括：启动所述第一核系统，以使所述第一核系统响应于通知指令，控制第一音源输出，以使所述第一音源进行播放；和/或启动所述第二核系统，以使所述第二核系统执行混音操作，以使得所述第二音源与所述第一音源进行混音，从而使得混音后的所述第一音源与所述第二音源进行播放。
根据本申请的第四方面，公开一种实例性的车载设备，所述车载设备包括相互耦接的存储器和处理器，所述处理器用于执行所述存储器中存储的程序指令，以实现第三方面所述的车用音源的播放方法。
根据本申请的第五方面，公开一种实例性的非易失性计算机可读存储介质，其上存储有程序指令，所述程序指令被处理器执行时实现第三方面所述的车用音源的播放方法。
本申请的有益效果有：通过第一核系统先于第二核系统启动，第一核系统在启动后，响应于通知指令，控制第一音源输出，以使第一音源进行播放，第二核系统用于在启动后执行混音操作，以使得第二音源与第一音源进行混音，从而使得混音后的第一音源与第二音源进行混音输出，实现快速而安全稳定地输出第一音源，同时实现低延迟，稳定时延的混音输出，而均无需增加额外硬件，减少外置硬件电路，降低成本。
在阅读以下对各图及图式中所例示的优选实施例的详细说明之后，本申请的这些及其它目标无疑将对所属领域的技术人员显而易见。
附图说明
图1是例示本申请一实施例的芯片的结构示意图；
图2是例示本申请另一实施例的芯片的结构示意图；
图3是例示本申请又一实施例的芯片的结构示意图；
图4是例示本申请再一实施例的芯片的结构示意图；
图5是例示本申请一实施例的DMAC的缓冲区的结构示意图；
图6是例示本申请一实施例的车载设备的结构示意图；
图7是例示本申请一实施例的车用音源的播放方法的流程示意图；
图8是例示本申请另一实施例的车载设备的结构示意图；
图9是例示本申请一实施例的非易失性计算机可读存储介质的结构示意图。
具体实施方式
下面结合说明书附图，对本申请实施例的方案进行详细说明。
以下描述中，为了说明而不是为了限定，提出了诸如特定系统结构、接口、技术之类的具体细节，以便透彻理解本申请。
本文中术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。此外，本文中的“多”表示两个或者多于两个。另外，本文中术语“至少一种”表示多种中的任意一种或多种中的至少两种的任意组合，例如，包括A、B、C中的至少一种，可以表示包括从A、B和C构成的集合中选择的任意一个或多个元素。
请参阅图1，图1是本申请一实施例的芯片的结构示意图。该芯 片100安装有第一核系统110和第二核系统120，其中第一核系统110先于第二核系统120启动，第一核系统110用于第一音源，第二核系统120用于第二音源。
第一核系统110与第二核系统120可以安装于芯片100中的两个独立区域，并且，第一核系统110与第二核系统120可以单独运行。
例如，芯片100可以为基于多核的片上系统，相应的，第一核系统110可以基于多核中的一个核运行，即多核中的一个核用于第一核系统110，第二核系统120可以基于多核中的其它核运行，即多核中的其他核用于第二核系统120。
又例如，芯片100也可以为包括辅助微处理器的单核或多核片上系统，例如，包括R5F的单核或多核片上系统，相应的，第一核系统110可以基于辅助微处理器运行，即辅助微处理器用于第一核系统110，第二核系统120可以基于单核或多核运行，即单核或多核用于第二核系统120。
第一核系统110用于第一音源，第二核系统120用于第二音源。其中，第一核系统110可以为实时操作系统(FreeRTOS)，执行仪表车身信息类功能，例如执行第一音源输出，第二核系统120可以为安卓系统(Android)，执行车载信息娱乐系统(IVI)功能，例如，执行第二音源输出。
第一音源为提示音源，提示音源是指芯片上电后需要快速出声的声音，例如：转向灯提示音、安全带提示音、大灯提示音、倒车雷达音及故障提示音等，可以根据实际情况，预先对第一音源的范围及种类进行设定，并且，可以预先将第一音源存储至第一核系统110中，例如，可以以wav(pcm)格式和48KHz的采样率进行存储。第一核系统110通过预设的发声逻辑完成第一音源的输出，具体地，在一些示例中，如图2所示，在第一核系统110中，经过音频策略(Audio Policy)和音频驱动器(Audio Driver)，将第一音源进行传输，例如，传输到芯片100的存储结构以进行输出。另外，除控制第一音源输出而使第一 音源进行播放，第一核系统110还可以用于实现其它功能，例如：系统相关界面显示、实时倒车图像显示等，在此不作限定。
第二音源为多媒体音源，例如：车载音乐音源、车载视频音源、车载广播音源等。需要说明的是，根据实际情况，第二音源也可以为预先设定的第一音源的范围之外的音源。
第一核系统110用于在启动后，响应于通知指令，控制第一音源输出，以使第一音源进行播放；第二核系统120用于在启动后执行混音操作，以使得第二音源与第一音源进行混音，从而使得混音后的第一音源与第二音源进行播放。
通知指令可以是第一核系统110启动后即可接收到的指令，例如通过CAN总线或外部MCU发出的用于播放第一音源的指令。
芯片100上电后，第一核系统110先启动，接收通过CAN总线或外部MCU发出的通知指令，将第一音源输出并播放。具体地，在图2的示例中，在第一核系统110中，经过音频策略(Audio Policy)和音频驱动器(Audio Driver)，将第一音源进行传输，例如，传输到芯片100的存储结构以进行输出。
在第一核系统110启动后，第二核系统120随之启动，且在启动后，获取第一音源，与第二音源进行混音输出，即将时间长度相同的第一音源与第二音源混合并输出，以使得混音后的第一音源与第二音源进行播放。具体地，在一些示例中，如图2所示，在第二核系统120中，经过音频策略(Audio Policy)，将第一音源和第二音源传输到音频硬件抽象层(Audio HAL)中的混音器(Mixer)，经过混音器(Mixer)，将第一音源和第二音源进行混音，并传输到音频驱动器(Audio Driver)，以将混音后的数据进行传输，例如，传输到芯片100的存储结构以进行输出。
需要说明的是，第二核系统120启动完成后，若无任何第二音源输出，而第一核系统110需要输出第一音源，此时，第一核系统110仍可以响应于通知指令，控制第一音源输出，以使第一音源进行播放。 第二核系统120启动完成后，若需要输出第二音源，而第一核系统110也需要输出第一音源，此时，第二核系统120获取第一核系统110输出的第一音源，与第二音源进行混音输出。
本实施例中，通过第一核系统110先于第二核系统120启动，第一核系统110在启动后，响应于通知指令，控制第一音源输出，以使第一音源进行播放，第二核系统120用于在启动后执行混音操作，以使得第二音源与第一音源进行混音，从而使得混音后的第一音源与第二音源进行播放，实现快速而安全稳定地输出第一音源，同时实现低延迟，稳定时延的混音输出，而均无需增加额外硬件，减少外置硬件电路，降低成本。
如上述，芯片100包括第一核系统110、第二核系统120。在一些实施例中，请参阅图3，图3是例示本申请另一实施例的芯片的结构示意图，基于上述实施例，芯片100还包括直接内存访问控制器(DMAC)130。
第一核系统110确定第一起始写入位置，并自第一起始写入位置将第一音源写入到DMAC 130的缓冲区，以使得DMAC 130自DMAC130的缓冲区从读取位置开始读取第一音源，从而实现控制第一音源输出，其中，第一起始写入位置在DMAC 130的缓冲区中距离读取位置第一预设距离。
其中，DMAC 130包括缓冲区，DMAC 130的缓冲区用于缓存第一核系统110输出的第一音源和/或第二系统输出的混合音源，混合音源即混音后的第一音源与第二音源。
第一起始写入位置是指DMAC 130的缓冲区的位置，即第一核系统110将第一音源写入到DMAC 130的缓冲区的位置。第一核系统110自第一起始写入位置将第一音源的数据写入到DMAC 130的缓冲区，即第一核系统110将第一音源自第一起始写入位置开始，写入DMAC 130的缓冲区的第一起始写入位置以及其后续位置的过程。具体地，在一些示例中，如图4所示，在第一核系统110中，经过音频 策略(Audio Policy)和音频驱动器(Audio Driver)，从第一起始写入位置开始，将第一音源进行传输到DMAC 130的缓冲区，以进行输出。
读取位置是指DMAC 130的缓冲区的位置，即DMAC 130开始读取其缓冲区的位置。DMAC 130自DMAC 130的缓冲区自读取位置开始读取第一音源的数据，从而实现控制第一音源输出。第一核系统110通过读取DMAC 130的寄存器即可知道DMAC 130的读取位置。
第一预设距离为第一起始写入位置与读取位置之间的距离，可以根据实际情况预先设定，换句话说，第一起始写入位置是根据第一预设距离与读取位置确定的。第一核系统110在将第一音源写入到DMAC 130的缓冲区前，可以通过读取DMAC 130的寄存器，获取DMAC 130的读取位置，随后，根据预先设定的第一预设距离，确定与读取位置相距第一预设距离的位置为第一起始写入位置，随后，自第一起始写入位置开始写入第一音源，直到写第一音源完成。其中，预先设定的第一预设距离，可以是固定距离，也可以是根据DMAC 130的缓冲区大小而变化的距离。
需要说明的是，DMAC 130自DMAC 130的缓冲区读取音频数据以输出，例如自读取位置开始读取第一音源，实现控制第一音源输出，通常还需要I2S模块，本申请对此并没有进行描述，而本领域技术人员可以理解的是，控制音频数据输出需要I2S模块，因此，关于I2S模块的通常知识，也属于本申请的一部分。
下面以图5为例进行描述，其中，图5是例示本申请一实施例的DMAC 130的缓冲区的结构示意图，该DMAC 130的缓冲区约为预设时长的音频所对应的数据长度，例如，42ms的音频所对应的数据长度。该DMAC 130的缓冲区可以被切分成n个节点，n为大于1的正整数。
假设DMAC 130的读取位置为节点1，第一预设距离为6个节点，第一核系统110通过读取DMAC 130的寄存器后，获取读取位置为节点1，随后，根据第一预设距离为6个节点，确定第一起始写入位置为节点7。
第一核系统110自第一起始写入位置(节点7)将第一音源写入到DMAC 130的缓冲区。例如，第一音源需占用3个节点，则第一核系统110自第一起始写入位置(节点7)开始写入，一直到节点9，从而，DMAC 130自DMAC 130的缓冲区自读取位置(节点1)开始读取第一音源，顺序读取第一预设距离(6个节点)以及第一音源所占用的大小，例如3个节点，即读取完第一音源，从而实现控制第一音源输出。另外，当无第一音源的数据输出时，第一核系统110将零数据写入到DMAC 130的缓冲区，如上述第一音源需占用3个节点的示例中，在第一核系统110写到节点9之后，无第一音源的数据需要写入，则第一核系统110自节点10开始写入零数据，但第一核系统110的当前写入的节点不超过DMAC 130的读取位置(节点1)。
需要说明的是，DMAC 130边读取其缓冲区内的数据，边输出其缓冲区内的数据，在上述第一音源需占用3个节点的示例中，当读取到节点2时，节点2内无数据，则DMAC 130输出零数据，直到读取到节点7，即第一起始写入位置，开始输出第一音源。
需要注意的是，若第一音源较大，需要占用的节点数量大于(n-7)个，即写到节点n时，写第一音源并没有完成，此时，可以循环使用DMAC 130的缓冲区，即重新自节点1开始写入剩余的数据，但不会超过DMAC 130的当前读取位置(节点1)，以防写穿。
如上述，DMAC 130自DMAC 130的缓冲区读取第一核系统110所写入的第一音源。在一些实施例中，DMAC 130自DMAC 130的缓冲区每进行一次读取，则DMAC 130更新读取位置一次，并产生一个中断；第二核系统120在中断期间确定第二起始写入位置，以自第二起始写入位置开始执行混音操作，其中第二起始写入位置在DMAC 130的缓冲区中距离读取位置第二预设距离，第二预设距离小于第一预设距离。
DMAC 130自DMAC 130的缓冲区每进行一次读取，则DMAC 130更新读取位置一次，并产生一个中断。
继续以上述图5为例进行说明，DMAC 130自DMAC 130的缓冲区自读取位置(节点1)开始读取第一音源，顺序读取第一预设距离(6个节点)以及第一音源所占用的大小，例如3个节点，每进行一次读取，即每读取一个节点，读取位置更新为下一个节点，例如，节点2，产生一个中断。
每个中断的时长可以为每次读取所用的时间，例如，读取一个节点的时间，即中断的时长为一个节点的长度。在中断期间，第二核系统120可以对DMAC 130进行相关操作，从而实现独占该中断。具体地，第二核系统120在中断期间确定第二起始写入位置，以自第二起始写入位置开始执行混音操作。
第二起始写入位置是指DMAC 130的缓冲区的位置，即第二核系统120将混音操作得到的混音数据写入到DMAC 130的缓冲区的位置。混音操作是将第一音源的数据与第二音源的相应数据进行混音。具体地，在一些示例中，如图4所示，在第二核系统120中，经过音频策略(Audio Policy)，将第一音源和第二音源传输到音频硬件抽象层(Audio HAL)中的混音器(Mixer)，经过混音器(Mixer)，将第一音源和第二音源进行混音，并传输到音频驱动器(Audio Driver)，以从第二起始写入位置开始，将混音后的数据进行传输到DMAC 130的缓冲区，以进行输出。
第二预设距离为第二起始写入位置与读取位置之间的距离，可以根据实际情况预先设定，换句话说，第二起始写入位置是根据第二预设距离与读取位置确定的。第二核系统120开始执行混音操作之前，可以通过读取DMAC 130的寄存器，获取DMAC 130的读取位置，随后，根据预先设定的第二预设距离，确定与读取位置相距第二预设距离的位置为第二起始写入位置，其中，预先设定的第一预设距离，可以是固定距离，也可以是根据DMAC 130的缓冲区大小而变化的距离。
继续以上述图5为例进行说明，假设第二预设距离为1个节点， 小于第一预设距离(6个节点)，在DMAC 130的读取位置为节点1的中断期间，第二核系统120通过读取DMAC 130的寄存器后，获取DMAC 130的读取位置为节点1，随后，根据第二预设距离为1个节点，确定第二起始写入位置为节点2。从而，第二核系统120自第二起始写入位置(节点2)开始执行混音操作，此时，第二核系统120在紧邻读取位置(节点1)的位置(节点2)，开始执行混音操作。也就是说，第二核系统120执行混音操作的时长为一个节点的时长，也即一个中断的时长。
如上述，在中断期间，第二核系统120自第二起始写入位置开始执行混音操作。在一些实施例中，在中断期间，第二核系统120自DMAC 130的缓冲区读取第二起始写入位置处所写入的第一音源的数据，将第一音源的数据与第二音源的相应数据进行混音，并将混音后的数据写入到第二起始写入位置，从而实现混音操作。
继续以上述图5为例进行说明，如上述，在DMAC 130的读取位置为节点1的中断期间，第二核系统120确定第二起始写入位置为节点2，此时，第二核系统120先读取第二起始写入位置(节点2)处所写入的第一音源的数据，即读取一个节点的数据，随后，将第二起始写入位置处所写入的第一音源的数据与第二音源的相应数据进行混音，即将第一音源的一个节点的数据与第二音源的一个节点的数据进行加法混音，得到混音后的数据，随后，将混音后的数据写入到第二起始写入位置(节点2)，即混音后的数据覆盖掉第二起始写入位置(节点2)处所写入的第一音源的数据。
接着，DMAC 130自DMAC 130的缓冲区还进行一次读取，此时，DMAC 130的读取位置更新为节点2，同时产生另一中断，即一个节点的时长。进而，在DMAC 130的读取位置为节点2的中断期间，第二核系统120先读取第二起始写入位置(节点2)的下一位置(节点3)处所写入的第一音源的数据，即读取一个节点的数据，随后，将第二起始写入位置处所写入的第一音源的数据与第二音源的相应数据进行 混音，即将第一音源的一个节点的数据与第二音源的一个节点的数据进行混音和溢出处理，得到混音后的数据，随后，将混音后的数据写入到第二起始写入位置(节点2)的下一位置(节点3)，即混音后的数据覆盖掉第二起始写入位置(节点2)的下一位置(节点3)处所写入的第一音源的数据，其中，溢出处理用于避免混音后出现混音溢出，即爆音的情况，在此不进行赘述。
依次类推，直到第一音源与第二音源的混音操作完成，从而实现混音操作。
需要说明的是，在图5示例中，由于第二预设距离小于第一预设距离，第一核系统110总是比第二核系统120先向DMAC 130的缓冲区写入第一音源数据，在第一核系统110向DMAC 130的缓冲区写入第一音源的数据后6个节点，第二核系统120才向DMAC 130的缓冲区写入混音后的数据。
如上述，可以循环使用DMAC 130的缓冲区。在上述实施例的基础上，DMAC 130的缓冲区包括环形缓存器，DMAC 130将环形缓存器均分成n个节点，其中n为大于1的正整数；DMAC 130自DMAC130的缓冲区读取和/或写入的数据为一个节点的数据，中断的时长为一个节点的时长。
DMAC 130的缓冲区包括环形缓存器，环形缓存器(ring buffer)，也称作圆形队列，圆形缓冲区，是一种用于表示一个固定尺寸、头尾相连的缓冲区的结构，即图5中的环形缓存器中的节点1实际与节点n首尾相连，以构成环形结构。
其中，DMAC 130将环形缓存器均分成n个节点，其中n为大于1的正整数，n的数值大小可以根据实际情况进行设定，例如，n可以为16，在此不做限定。
在DMAC 130的缓冲区约为42ms的音频所对应的数据长度的情况下，即环形缓存器约为42ms的音频所对应的数据长度，n为16时，每个节点约为2.66ms。
如上述，将第一音源的一个节点的数据与第二音源的一个节点的数据进行加法混音和溢出处理，得到混音后的数据，在一些实施例中，混音后的数据为一个节点的数据。
混音后的数据为一个节点的数据，即每次进行混音操作都是对第一音源和第二音源中一个节点的长度的数据进行混音。若某个节点处，第一音源或第二音源的最后剩余数据长度不足一个节点，则用零数据补齐。例如，当DMAC 130的缓冲区约为42ms，n为16时，假设第一音源或第二音源为2ms的数据，即不是节点长度的整数倍，则混音后，剩余的部分用零补齐。
如上述，混音后的数据为一个节点的数据，在一些实施例中，混音后的数据还被输出，以用作参考音通路。
例如，可以将混音后得到的混音数据写回DMAC 130读取节点的下一节点，以作为参考音输出，其中，参考音可以用于通话ECNR，即通话前端语音处理模块中作为回声消除或降噪的参考音源。
如上述，通过DMAC 130的读取位置与第一预设距离确定第一起始写入位置，以及通过DMAC 130的读取位置与第二预设距离确定第二起始写入位置。在一些实施例中，第二预设距离为一个节点，第一预设距离至少为n/2个节点。
也就是说，第二起始写入位置距离DMAC 130的读取位置为一个节点的距离，第一起始写入位置距离DMAC 130的读取位置至少为n/2个节点的距离。
可以理解的是，n为偶数。例如，当n为16时，第一预设距离至少为8个节点。
请参阅图6，图6是例示本申请一实施例的车载设备的结构示意图。该车载设备600包括芯片610，其中芯片610可以为如图1或图2所示的芯片100，详见上述实施例的说明，在此不再赘述。
请参阅图7，图7是例示本申请一实施例的车用音源的播放方法的流程示意图，该方法应用于车载设备，车载设备包括如图1或图2 所示的芯片100，具体而言，如图7所示，该方法可包括如下步骤：
S71：启动第一核系统110，以使第一核系统110响应于通知指令，控制第一音源输出，以使第一音源进行播放。
通知指令可以是第一核系统110启动后即可接收到的指令，例如通过CAN总线或外部MCU发出的用于播放第一音源的指令。
第一核系统110用于第一音源，可以为实时操作系统(FreeRTOS)，执行仪表车身信息类功能，例如执行第一音源输出。
其中，第一音源是指芯片上电后需要快速出声的声音，例如：转向灯提示音、安全带提示音、大灯提示音、倒车雷达音及故障提示音等，可以根据实际情况，预先对第一音源的范围及种类进行设定，并且，可以预先将第一音源存储至第一核系统110中，例如，可以以wav(pcm)格式和48KHz的采样率进行存储。第一核系统110通过预设的发声逻辑，即音频策略完成第一音源的输出，另外，除控制第一音源输出而使第一音源进行播放，第一核系统110还可以用于实现其它功能，例如：系统相关界面显示、实时倒车图像显示等，在此不作限定。
芯片100上电后，第一核系统110启动，接收通过CAN总线或外部MCU发出的通知指令，控制第一音源输出，以使第一音源进行播放。
S72：启动第二核系统120，以使第二核系统120执行混音操作，以使得第二音源与第一音源进行混音输出。
第二核系统120用于第二音源，可以为安卓系统(Android)，执行车载信息娱乐系统(IVI)功能，例如，执行第二音源输出，第二音源可以为多媒体系统音源和/或预先设定的第一音源的范围之外的音源。
在第一核系统110启动后，第二核系统120随之启动，且在启动后，获取第一音源，与第二音源进行混音输出，即将时间长度相同的第一音源与第二音源混合并输出，以使得混音后的第一音源与第二音源进行播放。
请参阅图8，图8是例示本申请另一实施例的车载设备的结构示意图。车载设备80包括相互耦接的存储器81和处理器82，处理器82用于执行存储器81中存储的程序指令，以实现上述车用音源的播放方法实施例的步骤。在一个具体的实施场景中，车载设备80可以包括但不限于：智能座舱、IVI(In-Vehicle Infotainment，车载信息娱乐系统)设备或行车记录仪设备。
具体而言，处理器82用于控制其自身以及存储器81以实现上述任一车用音源的播放方法实施例的步骤，或实现上述车用音源的播放方法实施例中的步骤。处理器82还可以称为CPU(Central Processing Unit，中央处理单元)。处理器82可能是一种集成电路芯片，具有信号的处理能力。处理器82还可以是通用处理器、数字信号处理器(Digital Signal Processor,DSP)、专用集成电路(Application Specific Integrated Circuit,ASIC)、现场可编程门阵列(Field-Programmable Gate Array,FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。另外，处理器82可以由集成电路芯片共同实现。
请参阅图9，图9是例示本申请一实施例的非易失性计算机可读存储介质的结构示意图。计算机可读存储介质90存储有能够被处理器运行的程序指令901，程序指令901用于实现上述任一车用音源的播放方法实施例的步骤。
上文对各个实施例的描述倾向于强调各个实施例之间的不同之处，其相同或相似之处可以互相参考，为了简洁，本文不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的方法和装置，可以通过其它的方式实现。例如，以上所描述的装置实施方式仅仅是示意性的，例如，模块或单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过 一些接口，装置或单元的间接耦合或通信连接，可以是电性、机械或其它的形式。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)或处理器(processor)执行本申请各个实施方式方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
所属领域的技术人员易知，可在保持本申请的教示内容的同时对装置及方法作出诸多修改及变动。因此，以上公开内容应被视为仅受随附权利要求书的范围的限制。

Claims (11)

  1. 一种芯片，其特征在于，安装有第一核系统和第二核系统，其中所述第一核系统先于所述第二核系统启动，所述第一核系统用于第一音源，所述第二核系统用于第二音源；
    其中，第一音源为提示音源，第二音源为多媒体音源；
    所述第一核系统基于所述芯片的多个核中一个核运行，且所述第二核系统基于所述芯片的多个核中其他核运行；或者所述第一核系统基于所述芯片中的辅助微处理器，且所述第二核系统基于所述芯片中的单核或多核运行；
    所述第一核系统用于在启动后，响应于通知指令，控制第一音源输出，以使所述第一音源进行播放；
    所述第二核系统用于在启动后执行混音操作，以使得所述第二音源与所述第一音源进行混音输出。
  2. 如权利要求1所述的芯片，其特征在于，所述片上系统包括直接内存访问控制器(DMAC)；
    其中，所述第一核系统确定第一起始写入位置，并自所述第一起始写入位置将所述第一音源写入到所述DMAC的缓冲区，以使得所述DMAC自所述DMAC的缓冲区从读取位置开始读取所述第一音源，从而实现控制所述第一音源输出，其中，所述第一起始写入位置在所述DMAC的缓冲区中距离所述读取位置第一预设距离。
  3. 如权利要求2所述的芯片，其特征在于，所述DMAC自所述DMAC的缓冲区每进行一次读取，则所述DMAC更新所述读取位置一次，并产生一个中断；
    所述第二核系统在所述中断期间确定第二起始写入位置，以自所述第二起始写入位置开始执行所述混音操作，其中所述第二起始写入 位置在所述DMAC的缓冲区中距离所述读取位置第二预设距离，所述第二预设距离小于所述第一预设距离。
  4. 如权利要求3所述的芯片，其特征在于，在所述中断期间，所述第二核系统自所述DMAC的缓冲区读取所述第二起始写入位置处所写入的所述第一音源的数据，将所述第一音源的数据与所述第二音源的相应数据进行混音，并将混音后的数据写入到所述第二起始写入位置，从而实现所述混音操作。
  5. 如权利要求3或4所述的芯片，其特征在于，所述DMAC的缓冲区包括环形缓存器，所述DMAC将所述环形缓存器均分成n个节点，其中所述n为大于1的正整数；
    所述DMAC自所述DMAC的缓冲区读取和/或写入的数据为一个所述节点的数据，所述中断的时长为所述一个所述节点的时长。
  6. 如权利要求5所述的芯片，其特征在于，所述混音后的数据还被输出，以用作参考音通路。
  7. 如权利要求5所述的芯片，其特征在于，所述第二预设距离为一个所述节点，所述第一预设距离至少为n/2个所述节点。
  8. 一种车载设备，其特征在于，包括如权利要求1-7中任一项所述的芯片。
  9. 一种车用音源的播放方法，其特征在于，应用于车载设备，所述车载设备包括如权利要求1-7中任一项所述的芯片，包括：
    启动所述第一核系统，以使所述第一核系统响应于通知指令，控制第一音源输出，以使所述第一音源进行播放；和/或
    启动所述第二核系统，以使所述第二核系统执行混音操作，以使 得所述第二音源与所述第一音源进行混音输出。
  10. 一种车载设备，其特征在于，所述车载设备包括相互耦接的存储器和处理器，所述处理器用于执行所述存储器中存储的程序指令，以实现权利要求9所述的车用音源的播放方法。
  11. 一种非易失性计算机可读存储介质，其上存储有程序指令，其特征在于，所述程序指令被处理器执行时实现权利要求9所述的车用音源的播放方法。
PCT/CN2023/118052 2022-09-14 2023-09-11 一种芯片、车用音源播放方法、车载设备及存储介质 WO2024055935A1 (zh)

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