WO2024045945A1

WO2024045945A1 - Solar cell and manufacturing method therefor

Info

Publication number: WO2024045945A1
Application number: PCT/CN2023/108563
Authority: WO
Inventors: 程浩; 杨秀清
Original assignee: 通威太阳能(金堂)有限公司
Priority date: 2022-08-29
Filing date: 2023-07-21
Publication date: 2024-03-07
Also published as: CN115274936A

Abstract

The present application relates to the technical field of manufacturing of solar cells, and in particular to a solar cell and a manufacturing method therefor. The manufacturing method for the solar cell comprises: texturing two surfaces of a silicon wafer; then sequentially depositing a first intrinsic amorphous silicon layer and a phosphorus-doped amorphous silicon layer on the front surface of the silicon wafer; then oxidizing the back surface of the silicon wafer to form a silicon oxide layer on the back surface of the silicon wafer; then removing the silicon oxide layer on the back surface of the silicon wafer by using an acid solution; and finally, sequentially depositing a second intrinsic amorphous silicon layer and a boron-doped amorphous silicon layer on the back surface of the silicon wafer. According to the manufacturing method, the impact on a suede surface on the back surface of the silicon wafer can be reduced while the winding plating is removed, so that the problem of cell electric leakage is solved to a certain extent, and cells having good electrical performance and excellent yield are obtained.

Description

Solar cells and manufacturing methods

This application claims priority to the Chinese patent application filed with the China Patent Office on August 29, 2022, with the application number 202211042264.4 and the application name "Solar Cells and Manufacturing Methods", the entire content of which is incorporated into this application by reference.

Technical field

The present application relates to the technical field of solar cell manufacturing, and in particular to a solar cell and a manufacturing method thereof.

Background technique

In the actual production process of solar cells, the plate PECVD method is usually used to deposit an amorphous silicon film. Specifically, the first intrinsic amorphous silicon layer and the phosphorus-doped amorphous silicon layer are deposited sequentially on the front side of the N-type silicon wafer. , and then sequentially deposit a second intrinsic amorphous silicon layer and a boron-doped amorphous silicon layer on the back of the N-type silicon wafer.

During the production process, when the first intrinsic amorphous silicon layer and the phosphorus-doped amorphous silicon layer are sequentially deposited on the front side of the N-type silicon wafer, the phosphorus-doped amorphous silicon will be plated around the back side of the N-type silicon wafer. When the second intrinsic amorphous silicon layer and the boron-doped amorphous silicon layer are successively deposited on the back of the N-type silicon wafer, the boron-doped amorphous silicon will be incompatible with the phosphorus doping in the surrounding plating area on the back of the silicon wafer. The crystalline silicon contacts to form a PN junction, and the current will conduct forward through the PN junction in the surrounding plating area, and contact with the ITO on the front of the silicon wafer to cause leakage, seriously affecting the battery's electrical performance and yield.

Contents of the invention

In view of the shortcomings of the existing technology, the purpose of the embodiments of the present application includes providing a solar cell and a manufacturing method thereof to improve the problem of battery leakage.

In a first aspect, embodiments of the present application provide a method for manufacturing a solar cell, including the following steps:

S1 textures both surfaces of the silicon wafer;

S2 sequentially deposits the first intrinsic amorphous silicon layer and the phosphorus-doped amorphous silicon layer on the front side of the silicon wafer;

S3 performs an oxidation treatment on the back of the silicon wafer to form a silicon oxide layer on the back of the silicon wafer;

S4 uses acid solution to remove the silicon oxide layer on the back of the silicon wafer;

S5 sequentially deposits a second intrinsic amorphous silicon layer and a boron-doped amorphous silicon layer on the back side of the silicon wafer.

In the actual production process of solar cells, the plate PECVD method is usually used to deposit the amorphous silicon film, that is, the first intrinsic amorphous silicon layer and the phosphorus-doped amorphous silicon layer are deposited sequentially on the front side of the N-type silicon wafer, and then the A second intrinsic amorphous silicon layer and a boron-doped amorphous silicon layer are sequentially deposited on the back of the N-type silicon wafer.

During the production process, when the first intrinsic amorphous silicon layer and the phosphorus-doped amorphous silicon layer are sequentially deposited on the front side of the N-type silicon wafer, the phosphorus-doped amorphous silicon will be plated around the back side of the N-type silicon wafer. When the second intrinsic amorphous silicon layer and the boron-doped amorphous silicon layer are successively deposited on the back of the N-type silicon wafer, the boron-doped amorphous silicon will be incompatible with the phosphorus doping in the surrounding plating area on the back of the silicon wafer. The crystalline silicon contacts to form a PN junction, and the current will conduct forward through the PN junction in the surrounding plating area, and contact with the ITO on the front of the silicon wafer to cause leakage, seriously affecting the battery's electrical performance and yield. Therefore, it is necessary to remove the surrounding plating on the back of the silicon wafer to prevent the boron-doped amorphous silicon from contacting the phosphorus-doped amorphous silicon in the surrounding plating area on the back of the silicon wafer to form a PN junction to avoid leakage.

Currently, for TOPCon batteries, alkaline solutions or acid solutions (a mixture of hydrofluoric acid and nitric acid) are usually used to remove the circumferentially plated polysilicon. The inventor found that if an alkali solution or an acid solution is directly used to remove the polysilicon plated around the back of the silicon wafer in the solar cell, the light conversion efficiency of the final cell will be low. The inventor continued to study the cause of this problem and found that if an alkaline solution or an acid solution (a mixture of hydrofluoric acid and nitric acid) is used to etch and remove the amorphous silicon layer plated around the back of the solar cell, the alkaline solution , or acid solution (a mixture of hydrofluoric acid and nitric acid) will destroy the prepared suede on the back, thereby affecting the electrical performance of the battery.

Therefore, in this application, the method for removing the bypass plating is to first oxidize the back side of the silicon wafer to form a silicon oxide layer on the back side of the silicon wafer, and then use an acid solution to remove the silicon oxide layer on the back side of the silicon wafer. The manufacturing method in this application can not only remove the winding plating, but also reduce the impact on the texture on the back of the silicon wafer, solve the problem of battery leakage to a certain extent, and obtain battery sheets with good electrical performance and excellent yield.

In some embodiments of the present application, the oxidation treatment includes using ozone water or nitric acid solution to react with the back side of the silicon wafer and the amorphous silicon plated on the back side to generate a silicon oxide layer.

In some embodiments of the present application, the thickness of the silicon oxide layer is 15-60 nm.

In some embodiments of this application, when the ozone water reaction is used for the oxidation treatment, the concentration of ozone is 20-30 ppb, and the contact reaction takes 40-120 seconds under normal temperature conditions; and the ozone water also includes hydrofluoric acid, and the mixture of hydrofluoric acid and water The volume ratio is 1:150-1:800.

In some embodiments of the present application, when the nitric acid solution is used for the oxidation treatment, the volume of nitric acid and water in the nitric acid solution The ratio is 1:20-1:45, and the contact reaction takes 40-120s under normal temperature conditions.

In some embodiments of the present application, before oxidizing the back side of the silicon wafer, a water film is formed on the front side. Covered by the water film, the first intrinsic amorphous silicon layer and the phosphorus-doped amorphous silicon layer deposited on the front side are protected from damage.

In some embodiments of the present application, the acid solution is a hydrofluoric acid solution.

In some embodiments of the present application, the volume ratio of hydrofluoric acid to water in the hydrofluoric acid solution is 1:15-1:30, and the contact time between the acid solution and the silicon oxide layer is 20-120s.

In some embodiments of the present application, between the two steps of forming a silicon oxide layer during the oxidation treatment and removing the silicon oxide layer, the silicon wafer is transported through a chain cleaning equipment.

In a second aspect, the present application provides a solar cell prepared by any of the above manufacturing methods.

Description of drawings

In order to explain the technical solution of the present application more clearly, the drawings used in the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on the drawings without exerting creative efforts.

Figure 1 is a schematic structural diagram of the solar cell provided by this application;

Figure 2 is a schematic diagram of the back side plating produced when the front side is deposited in the prior art;

Figure 3 is a flow chart of the preparation process of the solar cell provided by this application.

Description of the drawings: 110-silicon wafer; 120-first intrinsic amorphous silicon layer; 130-phosphorus doped amorphous silicon layer; 140-first TCO layer; 150-first electrode; 160-second intrinsic amorphous silicon layer Crystalline silicon layer; 170 - boron doped amorphous silicon layer; 180 - second TCO layer; 190 - second electrode; 120' - first intrinsic amorphous silicon layer; 130' - phosphorus doped amorphous silicon layer.

Detailed ways

In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are shown in the accompanying drawings. However, the application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that a thorough understanding of the disclosure of the present application will be provided.

Unless otherwise defined, all technical and scientific terms used herein are not interchangeable with those of ordinary skill in the technical field of this application. Members generally understand the same meaning. The terminology used herein in the description of the application is for the purpose of describing specific embodiments only and is not intended to limit the application. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

Figure 1 is a schematic structural diagram of a solar cell provided by this application. Please refer to Figure 1. The solar cell includes an N-type silicon wafer 110, a first intrinsic amorphous silicon layer 120 located on the front side of the N-type silicon wafer 110, phosphorus-doped amorphous silicon The silicon layer 130, the first TCO layer 140 and the first electrode 150, as well as the second intrinsic amorphous silicon layer 160, the boron doped amorphous silicon layer 170, the second TCO layer 180 and the second Electrode 190.

Figure 2 is a schematic diagram of the back side plating produced when the front side is deposited in the prior art. Referring to Figures 1 and 2, the method of preparing a solar cell is usually as follows: first texturing the two surfaces of the silicon wafer, and then depositing a first intrinsic amorphous silicon layer 120 and phosphorus doping on the front side of the silicon wafer 110. At the same time, during the deposition process of the front side, the amorphous silicon layer 130 will be plated around the back side of the silicon wafer 110 to form a first intrinsic amorphous silicon layer 120' and a phosphorus-doped amorphous silicon layer 130'; continue to coat the silicon wafer 110 The second intrinsic amorphous silicon layer 160 and the boron-doped amorphous silicon layer 170 are sequentially deposited on the back side. At the same time, during the deposition of the back side, the second intrinsic amorphous silicon layer 160 and the boron-doped amorphous silicon layer 170 It will come into contact with the first intrinsic amorphous silicon layer 120' and the phosphorus-doped amorphous silicon layer 130' that are plated on the back side, forming a PN junction forward conduction, causing leakage and affecting the battery's electrical performance and yield. Therefore, it is necessary to remove the surrounding plating on the back of the silicon wafer to prevent the boron-doped amorphous silicon from contacting the phosphorus-doped amorphous silicon in the surrounding plating area on the back of the silicon wafer to form a PN junction to avoid leakage.

Currently, the method for removing circumferential plating from TOPCon batteries is to use an alkali solution or an acid solution (a mixture of hydrofluoric acid and nitric acid) to remove the circumferentially plated polysilicon. The inventor found that if an alkali solution or an acid solution is directly used to remove the polysilicon plated around the back of the silicon wafer in the solar cell, the light conversion efficiency of the final cell will be low. The inventor continued to study the cause of this problem and found that if an alkaline solution or an acid solution (a mixture of hydrofluoric acid and nitric acid) is used to etch and remove the amorphous silicon layer plated around the back of the solar cell, the alkaline solution , or acid solution (a mixture of hydrofluoric acid and nitric acid) will destroy the prepared suede on the back, thereby affecting the electrical performance of the battery.

In this application, the preparation process of the battery sheet is improved to improve the battery performance of the battery sheet. The manufacturing method includes: texturing both surfaces of the silicon wafer 110, sequentially depositing the first intrinsic amorphous silicon layer 120 and the phosphorus-doped amorphous silicon layer 130 on the front side of the silicon wafer 110, and oxidizing the back side of the silicon wafer. Process to form a silicon oxide layer on the back of the silicon wafer, and use an acid solution to remove the silicon wafer The second intrinsic amorphous silicon layer 160 and the boron doped amorphous silicon layer 170 are sequentially deposited on the back side of the silicon wafer 110.

In this method, the first intrinsic amorphous silicon layer 120' and the phosphorus-doped amorphous silicon layer 130' plated around the back are oxidized to form a silicon oxide layer. When using an acid solution to remove the silicon oxide layer, It can protect the suede formed on the back. While removing the plating, it can also reduce the impact on the suede on the back of the silicon wafer. It can also solve the problem of battery leakage to a certain extent and obtain a battery with good electrical performance and excellent yield. Cell.

Figure 3 is a flow chart of the manufacturing process of the solar cell provided by this application. Please refer to Figure 3. The manufacturing method of the solar cell provided by this application is introduced in detail below:

S110: Clean and texture the two surfaces of the silicon wafer 110. After texturing, a pyramid texture with a height of 2-5 μm is formed. Among them, the silicon wafer can be an N-type silicon wafer or a P-type silicon wafer. Optionally, the embodiment of the present application provides that the silicon wafer is a single crystal silicon wafer, and an alkali solution (for example: strong alkali, NaOH or KOH) is used for texturing. In other embodiments, the silicon wafer is a polycrystalline silicon wafer, and acid liquid (for example: strong acid, nitric acid or/and hydrofluoric acid) is used for texturing.

S120, first form the first intrinsic amorphous silicon layer 120 and the phosphorus-doped amorphous silicon layer 130 on the front surface of the silicon wafer 110 in sequence. The thickness of the first intrinsic amorphous silicon layer 120 is 5-10 nm, and the thickness of the phosphorus-doped amorphous silicon layer 130 is 5-10 nm. Optionally, both the first intrinsic amorphous silicon layer 120 and the phosphorus-doped amorphous silicon layer 130 are formed by a plasma enhanced chemical vapor deposition method.

S130, place the silicon wafer 110 with the front side facing up, and cover the front side with a water film. Optionally, the method of covering the water film may be: dropping clean water (for example, pure water) on the front side of the silicon wafer 110 , and due to the tension of the water, a water film is covered on the front side of the silicon wafer 110 .

Among them, the coverage of the water film can prevent the oxidation treatment from causing damage to the first intrinsic amorphous silicon layer 120 and the phosphorus-doped amorphous silicon layer 130 on the front side of the silicon wafer when the back side of the silicon wafer is subsequently oxidized.

S140, use ozone water or nitric acid solution to oxidize the back of the silicon wafer to form a 15-60nm silicon oxide layer on the back of the silicon wafer. Among them, ozone water or nitric acid solution can be used to react with the backside of the silicon wafer 110 and the first intrinsic amorphous silicon layer 120' and the phosphorus-doped amorphous silicon layer 130' plated around the backside to generate SiO ₂ . As an example, the thickness of the silicon oxide layer may be 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 55nm or 60nm. The thickness of the silicon oxide layer is related to the thickness of the first intrinsic amorphous silicon layer 120 and the phosphorus-doped amorphous silicon layer 130 formed on the front surface. The thicker the thickness of the first intrinsic amorphous silicon layer 120 and the phosphorus-doped amorphous silicon layer 130, the thicker the thickness of the silicon oxide layer; if the thickness of the first intrinsic amorphous silicon layer 120 and the phosphorus-doped amorphous silicon layer 130 is Thin, the thickness of the silicon oxide layer is also thinner.

In one embodiment, ozone water is used to contact and react with the back side of the silicon wafer and the amorphous silicon plated on the back side at room temperature for 40-120 seconds to generate SiO ₂ , and the concentration of the ozone water is 20-30 ppb. Among them, normal temperature refers to the temperature of the workshop where solar cells are produced. The ozone water is neither heated nor refrigerated, and the temperature is not controlled.

As an example, the contact time of ozone water with the back side of the silicon wafer is 40s, 50s, 60s, 70s, 80s, 90s, 100s, 110s or 120s; the concentration of ozone water is 20ppb, 22ppb, 24ppb, 26ppb, 28ppb or 30ppb . If the concentration of ozone water is higher and the contact time is longer, the thickness of the silicon oxide layer formed is thicker; if the concentration of ozone water is lower and the contact time is shorter, the thickness of the silicon oxide layer formed is thinner.

Because ozone water is easily volatile, hydrofluoric acid can be added to the ozone water to maintain the stability of the ozone water. Optionally, the volume ratio of hydrofluoric acid to water is 1:150-1:800. As an example, the volume ratio of hydrofluoric acid to water is 1:150, 1:200, 1:250, 1:300, 1:350, 1:400, 1:450, 1:500, 1:550, 1:600, 1:650, 1:700, 1:750 or 1:800.

In another embodiment, a nitric acid solution is used to contact and react with the back side of the silicon wafer and the amorphous silicon plated on the back side under normal temperature conditions for 40-120 seconds to generate SiO ₂ , and the volume ratio of nitric acid to water is 1:20- 1:45.

As an example, the contact time between ozone water and the back side of the silicon wafer is 40s, 50s, 60s, 70s, 80s, 90s, 100s, 110s or 120s; in the nitric acid solution, the volume ratio of nitric acid to water is 1:20, 1 :25, 1:30, 1:35, 1:40 or 1:45. If the concentration of the nitric acid solution is higher and the contact time is longer, the thickness of the silicon oxide layer formed is thicker; if the concentration of the nitric acid solution is lower and the contact time is shorter, the thickness of the silicon oxide layer formed is thinner.

S150, use hydrofluoric acid solution to remove the silicon oxide layer formed on the back. Optionally, use a hydrofluoric acid solution to remove the silicon oxide layer produced by the oxidation treatment. The volume ratio of hydrofluoric acid to water is 1:15-1:30, and the contact reaction is carried out under normal temperature conditions for 20-120 seconds.

As an example, the volume ratio of hydrofluoric acid to water is 1:15, 1:20, 1:25 or 1:30; the contact time between the silicon oxide layer and the hydrofluoric acid solution is 20s, 30s, 40s, 50s, 60s , 70s, 80s, 90s, 100s, 110s or 120s. If the concentration of the hydrofluoric acid solution is higher and the contact is relatively short, the silicon oxide layer can be removed; if the concentration of the hydrofluoric acid solution is lower and the contact is relatively long, the silicon oxide layer can be removed.

Optionally, between the two steps of oxidation treatment to form a silicon oxide layer and removal of the silicon oxide layer, a chain Cleaning equipment is used to transport silicon wafers. Optionally, the chain cleaning equipment includes a chain conveying mechanism, a first tank and a second tank. The first tank is filled with ozone water or nitric acid solution, and the second tank is filled with hydrofluoric acid solution. .

Optionally, the chain conveying mechanism includes a support member and a conveyor chain. The support member has a hole. The silicon wafer is arranged on the support member. The liquid can contact the silicon wafer through the hole on the support member. The conveyor chain transmits and the silicon wafer can be placed on the support member. The silicon wafer is transferred to the target location.

For example, in order to oxidize and acid treat a silicon wafer, the silicon wafer can be placed on a support with the back side of the silicon wafer facing down. The silicon wafer on the support is located in the first tank body and is in contact with the first tank body. The ozone water or nitric acid solution is exposed to the target time, and then the conveyor chain is started, so that the silicon wafer on the support is located in the second tank and contacted with the hydrofluoric acid solution in the second tank for the target time, and then the conveyor chain is started to transport it out. The transmission speed of the conveyor chain can also be controlled so that the silicon wafer is gradually transported, and during the transmission process, it is in contact with the ozone water or nitric acid solution in the first tank for a target time, and with the hydrofluoric acid solution in the second tank for a target time. .

S160: Finally, the second intrinsic amorphous silicon layer 160 and the boron-doped amorphous silicon layer 170 are sequentially deposited on the back side of the silicon wafer 110. The thickness of the second intrinsic amorphous silicon layer 160 is 8-12 nm, and the thickness of the boron-doped amorphous silicon layer 170 is 10-15 nm. Optionally, the second intrinsic amorphous silicon layer 160 and the boron-doped amorphous silicon layer 170 are both formed by a plasma enhanced chemical vapor deposition method.

S170, deposit the first TCO layer 140 and the second TCO layer 180 on the front and back sides of the silicon wafer respectively. The first electrode 150 and the second electrode 190 are then formed on the front and back sides of the silicon wafer.

Example 1

This embodiment provides a method for manufacturing a solar cell, including the following steps:

(1) Using the SHJ cleaning process, the conventional M6 size N-type silicon wafer (area 27415mm ² ) is double-sided cleaned and textured to obtain a pyramid texture with a texture height of 3 μm.

(2) Place the front side of the N-type silicon wafer face up in the plate PECVD equipment, and deposit a first intrinsic amorphous silicon layer with a thickness of 7 nm and a phosphorus-doped amorphous silicon layer with a thickness of 8 nm on the front side.

(3) Place the front-side deposited silicon wafer in the chain cleaning equipment with the front side facing up. Use a water film to cover the amorphous silicon mask to prevent etching to the front side, and then enter the oxidation tank through chain transmission.

(4) The oxidation tank is filled with ozone water. The concentration of ozone and water is maintained at 25 ppb. The volume ratio of HF and water is 1:150. The temperature is maintained at 25°C. The contact time between the back side of the silicon wafer and the ozone water is set to 40 seconds. , oxidize the silicon wafer around the coating surface to form 30nm SiO ₂ .

(5) Enter the pickling tank through chain transmission. The pickling tank is filled with hydrofluoric acid solution. The volume ratio of nitric acid to water is 1:30. The temperature is maintained at 25°C; the back side of the silicon wafer is in contact with the hydrofluoric acid solution. The contact time is set to 20s, and the oxidized SiO ₂ is removed by etching.

(6) After drying, place the silicon wafer in a plate-type PECVD equipment, and deposit a second intrinsic amorphous silicon layer with a thickness of 10nm and a boron-doped amorphous silicon layer with a thickness of 12nm on the back of the silicon wafer. .

(7) Then deposit a layer of TCO layer on both the front and back, and then perform screen printing.

Example 2

(4) A nitric acid solution is placed in the oxidation tank. The concentration of nitric acid and water is maintained at 1:30 and the temperature is maintained at 25°C. The contact time between the back side of the silicon wafer and the nitric acid solution is set to 40 seconds to oxidize the plating surface of the silicon wafer. , forming 30nm SiO ₂ .

Example 3

(3) Place the front-side deposited silicon wafer into the chain cleaning equipment with the front side facing up, and enter the oxidation tank through chain transmission.

Example 4

(4) The oxidation tank is filled with ozone water. The concentration of ozone and water is kept at 25 ppb, and the temperature is kept at 25°C. The contact time between the back side of the silicon wafer and the ozone water is set to 40 seconds, and the silicon wafer is oxidized around the plating surface to form 30nm SiO ₂ .

Comparative example 1

(3) Place the front-side deposited silicon wafer in the chain cleaning equipment with the front side facing up. Use a water film to cover the amorphous silicon mask to prevent etching to the front side, and then enter the etching tank through chain transmission.

(4) The etching tank is filled with sodium hydroxide solution. The concentration of sodium hydroxide and water is maintained at 1:20, and the temperature is maintained at 60°C. The contact time between the back side of the silicon wafer and the sodium hydroxide solution is set to 20s. Etch 30nm around the plating surface of the silicon wafer.

(5) After drying, place the silicon wafer in a plate-type PECVD equipment, and deposit a second intrinsic amorphous silicon layer with a thickness of 10nm and a boron-doped amorphous silicon layer with a thickness of 12nm on the back of the silicon wafer. .

(6) Then deposit a layer of TCO layer on both the front and back, and then perform screen printing.

Comparative example 2

(1) Using the SHJ cleaning process, the conventional M6 size N-type silicon wafer (area 27415mm ² ) is cleaned and textured on both sides to obtain a pyramid texture with a texture height of 3 μm.

(4) The etching tank is filled with a mixture of hydrofluoric acid and nitric acid. The ratio of the mixture of hydrofluoric acid and nitric acid to water is maintained at 1:30, and the temperature is maintained at 10°C; the back side of the silicon wafer is in contact with the hydrofluoric acid The contact time with the nitric acid mixture is set to 20s, and the silicon wafer is etched to a thickness of 30nm around the coating surface.

Comparative example 3

(3) Then, a second intrinsic amorphous silicon layer with a thickness of 10 nm and a boron-doped amorphous silicon layer with a thickness of 12 nm are deposited in sequence on the back side of the silicon wafer.

(4) Then deposit a layer of TCO layer on both the front and back sides, and then perform screen printing.

Experimental example 1

The performance of the solar cells obtained in Examples 1 to 4 and the solar cells obtained in Comparative Examples 1 to 3 are respectively tested as shown in Table 1; among them, the detection method is: using the BERGER online I-V test system at 25°C, AM 1.5 , test the solar cell's conversion efficiency, open circuit voltage, short circuit current, filling factor, reverse current and other electrical performance parameters under the conditions of 1 standard sun.

Table 1 Solar cell performance

It can be seen from Table 1 that the solar cell obtained by using the solar cell manufacturing method provided in the embodiment of the present application not only has a high conversion efficiency, but also can significantly improve the reverse current situation.

From the comparison between Example 1 and Example 2, it can be seen that whether a nitric acid solution is used to oxidize the back-coated amorphous silicon layer, or ozone water is used to oxidize the back-coated amorphous silicon layer, the battery finally obtained The performance is good, especially using ozone water to oxidize the amorphous silicon layer on the back side (Example 1), and then using hydrofluoric acid to remove the side plating, which can not only improve the occurrence of leakage, but also improve the performance of the battery. The conversion efficiency, open circuit voltage and short circuit current are all improved to a certain extent.

From the comparison between Example 1 and Example 3, it can be seen that there is no water film when using ozone water to oxidize the amorphous silicon layer on the back of the surrounding plating. Although the surrounding plating can also be removed to improve the occurrence of leakage, the battery The performance will be affected to a certain extent.

Comparing Example 1 and Example 4, it can be seen that if hydrofluoric acid is not added to the ozone water, the stability of the ozone water is poor, which will eventually affect the filling factor of the battery and reduce it.

The technical features of the above embodiments can be combined in any way. To simplify the description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, All should be considered to be within the scope of this manual.

The above-described embodiments only express several implementation modes of the present application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the patent application. It should be noted that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all fall within the protection scope of the present application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

A method of manufacturing a solar cell, characterized in that it includes the following steps:

S1 textures both surfaces of the silicon wafer;

S2 sequentially deposits a first intrinsic amorphous silicon layer and a phosphorus-doped amorphous silicon layer on the front side of the silicon wafer;

S3 performs an oxidation treatment on the back of the silicon wafer to form a silicon oxide layer on the back of the silicon wafer;

S4 uses acid solution to remove the silicon oxide layer on the back of the silicon wafer;

S5 sequentially deposits a second intrinsic amorphous silicon layer and a boron-doped amorphous silicon layer on the back side of the silicon wafer.
The manufacturing method according to claim 1, wherein the oxidation treatment includes using ozone water or nitric acid solution to react with the back side of the silicon wafer and the amorphous silicon wrapped around the back side to generate the silicon oxide layer.
The manufacturing method according to claim 1 or 2, characterized in that: the thickness of the silicon oxide layer is 15-60 nm.
The manufacturing method according to claim 2, characterized in that: the concentration of ozone in the ozone water is 20-30 ppb; the conditions of the reaction include: contact reaction under normal temperature conditions for 40-120 seconds.
The manufacturing method according to claim 2, characterized in that: the volume ratio of nitric acid to water in the nitric acid solution is 1:20-1:45; the conditions of the reaction include: contact reaction under normal temperature conditions for 40-120s .
The manufacturing method according to any one of claims 2 to 5, characterized in that: the ozone water also includes hydrofluoric acid, and the volume ratio of hydrofluoric acid to water is 1:150-1:800.
The manufacturing method according to any one of claims 2 to 6, characterized in that before the oxidation treatment is performed on the back side of the silicon wafer, a water film is formed on the front side.
The manufacturing method according to any one of claims 2 to 7, characterized in that the acid solution is a hydrofluoric acid solution.
The manufacturing method according to claim 8, characterized in that: the volume ratio of hydrofluoric acid to water in the hydrofluoric acid solution is 1:15-1:30.
The manufacturing method according to claim 8 or 9, characterized in that the contact time between the acid solution and the silicon oxide layer is 20-120 s.
The manufacturing method according to any one of claims 1 to 10, characterized in that between the two steps of forming a silicon oxide layer in the oxidation treatment and removing the silicon oxide layer, silicon is transported through a chain cleaning equipment. piece.
A solar cell, characterized in that it is prepared by the manufacturing method according to any one of claims 1 to 11.