WO2024037327A1

WO2024037327A1 - Foldable display panel, manufacturing method therefor, and electronic device

Info

Publication number: WO2024037327A1
Application number: PCT/CN2023/110453
Authority: WO
Inventors: 龙浩晖; 孙艺哲; 方建平; 李小龙; 王垚; 李健辉
Original assignee: 华为技术有限公司
Priority date: 2022-08-19
Filing date: 2023-08-01
Publication date: 2024-02-22
Also published as: CN117596917A

Abstract

Embodiments of the present application relate to the technical field of display, and provide a foldable display panel, a manufacturing method therefor, and an electronic device, capable of improving the reliability of a screen under the impact of external force while improving the bending performance of the screen. The foldable display panel comprises a substrate layer, a driving back plate layer, a light-emitting layer and a thin film packaging layer which are sequentially stacked. In the direction away from the light-emitting layer, the thin film packaging layer comprises a first chemical vapor deposition layer and a first atomic layer deposition layer which are sequentially stacked and arranged adjacent to each other, wherein the thickness range of the first chemical vapor deposition layer is [100, 300] nm, the thickness range of the first atomic layer deposition layer is [20, 50] nm, and the first chemical vapor deposition layer and the first atomic layer deposition layer are inorganic layers.

Description

Folding display panel and preparation method thereof, electronic equipment

This application requests the priority of the Chinese patent application submitted on August 19, 2022, with the application number 202210999001.6, and the invention name is "Folding display panel and preparation method thereof, and electronic equipment". This application requests priority on November 24, 2022 The priority of the Chinese patent application filed with the State Intellectual Property Office of China with application number 202211481760. in this application.

Technical field

The present application relates to the field of display technology, and in particular to a folding display panel, a preparation method thereof, and electronic equipment.

Background technique

Folding screens need to have bendable properties. Based on this feature, the surface of the folding screen is changed from the traditional glass cover to a foldable flexible cover material. However, this change has a negative impact on the reliability of the screen, such as , the screen is prone to display defects such as black spots and broken bright spots when subjected to pressure or bumps. Therefore, how to improve the screen's reliability under external impact while improving the screen's bending performance has become a problem to be solved.

Contents of the invention

A folding display panel, its preparation method, and electronic equipment can improve the bending performance of the screen while improving the reliability of the screen under external impact.

In a first aspect, a folding display panel is provided, including: a substrate layer, a driving backplane layer, a light-emitting layer and a film encapsulation layer that are stacked in sequence; in a direction away from the light-emitting layer, the film encapsulation layer includes layers that are stacked in sequence and arranged adjacently. The first chemical vapor deposition layer and the first atomic layer deposition layer, the thickness range of the first chemical vapor deposition layer is [100,300]nm, the thickness range of the first atomic layer deposition layer is [20,50]nm, the first chemical vapor deposition layer The vapor deposition layer and the first atomic layer deposition layer are inorganic layers.

The chemical vapor deposition layer and the atomic layer deposition layer are stacked in sequence and within a specific thickness range as the inorganic encapsulation layer. On the one hand, the characteristics of the atomic layer deposition layer film being dense and having good coverage are used to modify and improve the chemical vapor deposition layer. Micro-cracks and micro-defects on the surface, and improve the reliability of the packaging layer under external impact. On the other hand, on this basis, the first chemical vapor deposition layer is designed to have a thickness range of [100, 300] nm, in conjunction with [20, The first atomic layer deposition layer within the thickness range of 50]nm can not only improve the bending performance of the screen, but also improve the reliability of the screen under external impact and extrusion.

In a possible implementation, in a direction away from the light-emitting layer, the thin film encapsulation layer further includes an organic buffer layer, a second chemical vapor deposition layer and a second atomic layer deposition layer that are stacked in sequence and arranged adjacently. The thickness range of the vapor deposition layer is [100,300] nm, the thickness range of the second atomic layer deposition layer is [20,50] nm, the second chemical vapor deposition layer and the second atomic layer deposition layer are inorganic layers; the organic buffer layer is located between the first atomic layer deposition layer and the second chemical vapor deposition layer.

In a possible implementation, in a direction close to the light-emitting layer, the driving backplane layer includes a barrier layer, a buffer layer, a semiconductor layer, a first gate insulating layer, a gate metal layer, a second gate layer, and a buffer layer. An extremely insulating layer, a capacitor layer, an interlayer insulating layer, a source-drain metal layer and a passivation layer; in the direction close to the light-emitting layer, the interlayer insulating layer includes a third chemical vapor deposition layer and a third layer that are stacked and adjacently arranged in sequence. For the atomic layer deposition layer, the thickness range of the third chemical vapor deposition layer is [100, 200] nm, and the thickness range of the third atomic layer deposition layer is [20, 50] nm.

The interlayer insulating layer in the prior art is instead produced by sequentially stacking adjacent third chemical vapor deposition layers and third atomic layer deposition layers, and the thickness ranges of the two layers are set to [100, 200] nm and [20, 50] nm, on the one hand, the third chemical vapor deposition layer can be used to repair the TFT performance. On the other hand, the atomic layer deposition layer can be used to modify and improve the chemical properties of the dense film and good coverage. Micro-cracks and micro-defects on the surface of the vapor deposition layer, and improve the reliability of the driving backplane layer under external impact and extrusion. On this basis, the thickness of the third chemical vapor deposition layer can be designed to be thinner, in [ In the thickness range of 100,200]nm, combined with the third atomic layer deposition layer in the thickness range of [20,50]nm, the bending performance of the driving backplane layer can be further improved.

In a possible implementation, both the barrier layer and the passivation layer are atomic layer deposition layers, and the flooding is improved through the atomic layer deposition layer structure. The reliability of the moving back plate layer under external impact and extrusion.

In one possible implementation, the substrate layer is a polyimide layer, and the elastic modulus of the polyimide layer is greater than 20 Gpa, which can improve the screen's bending performance while improving the screen's reliability under external impact.

In one possible implementation, the substrate layer is ultra-thin flexible glass, and the thickness of the ultra-thin flexible glass ranges from 20 to 50 μm, which can improve the screen's bending performance while improving the screen's reliability under external impact.

In a possible implementation, the substrate layer is an ultra-high molecular weight polyethylene layer, and the elastic modulus of the ultra-high molecular weight polyethylene layer is ≥30 Gpa, which can improve the screen's bending performance while improving the screen's reliability under external impact. . In another embodiment, the bottom layer is a polyparaphenylene benzobisoxazole layer. Optionally, the elastic modulus of the polyparaphenylenebenzobioxazole layer is ≥20 Gpa.

In a possible implementation, the material of the first chemical vapor deposition layer is silicon oxide, silicon nitride or silicon oxynitride; the material of the first atomic layer deposition layer is aluminum oxide or hafnium oxide.

In a possible implementation, the material of the third chemical vapor deposition layer is silicon nitride; the material of the third atomic layer deposition layer is aluminum oxide, titanium oxide, silicon oxide and hafnium oxide.

In a second aspect, a method for manufacturing a folding display panel is provided, which includes: providing a substrate layer, a driving backplane layer and a light-emitting layer that are stacked in sequence; forming a first layer on the side of the light-emitting layer away from the driving backplane layer through a chemical vapor deposition process. Chemical vapor deposition layer, the thickness range of the first chemical vapor deposition layer is [100, 300] nm, the first chemical vapor deposition layer is an inorganic layer; the surface of the first chemical vapor deposition layer away from the light-emitting layer is formed by an atomic layer deposition process The first atomic layer deposition layer has a thickness in the range of [20, 50] nm, and the first atomic layer deposition layer is an inorganic layer.

In a possible implementation, providing a substrate layer, a driving backplane layer, and a light-emitting layer that are stacked in sequence includes: forming a substrate layer; and sequentially forming a barrier layer, a buffer layer, a semiconductor layer, and a first gate insulating layer on the surface of the substrate layer. layer, a gate metal layer, a second gate insulating layer and a capacitor layer; a third chemical vapor deposition layer is formed on the side of the capacitor layer away from the semiconductor layer through a chemical vapor deposition process, and the thickness range of the third chemical vapor deposition layer is [ 100, 200] nm; a third atomic layer deposition layer is formed on the surface of the third chemical vapor deposition layer away from the semiconductor layer through an atomic layer deposition process, and the thickness range of the third atomic layer deposition layer is [20, 50] nm; A source-drain metal layer and a passivation layer are sequentially formed on the side of the third atomic layer deposition layer away from the semiconductor layer; a light-emitting layer is formed on the side of the passivation layer away from the semiconductor layer.

In a possible implementation, in the process of providing the substrate layer, the driving backplane layer and the light-emitting layer that are stacked in sequence, the barrier layer and the passivation layer are formed through an atomic layer deposition process.

In a third aspect, an electronic device is provided, including the above-mentioned folding display panel.

Description of drawings

Figure 1 is a schematic structural diagram of a folding screen in the related art;

Figure 2 is a schematic structural diagram of a folding display panel in an embodiment of the present application;

Figure 3 is a flow chart of a method for preparing a folding display panel in an embodiment of the present application;

Figure 4 is a schematic structural diagram corresponding to the method in Figure 3;

Figure 5 is a schematic structural diagram of another folding display panel in the implementation of the present application.

Detailed ways

The terms used in the embodiments of the present application are only used to explain specific embodiments of the present application and are not intended to limit the present application.

Before describing the embodiments of the present application, related technologies and technical issues are first introduced. As shown in Figure 1, the folding screen in the related art may include a cover layer 117, a panel layer 118 and a substrate layer 101. The cover layer 117 plays a protective role. Unlike traditional screens, the cover layer 117 of the folding screen mainly uses Polyethylene glycol terephthalate (PET) film or thermoplastic polyurethanes (TPU) film is used for protection. When the screen is impacted, it cannot absorb energy or dissipate energy, and the protective performance is relatively poor. Otherwise, the stress caused by the impact is transmitted to the panel layer 118 through the cover layer 117 . The panel layer 118 may include a barrier layer 102, a buffer layer 103, a semiconductor layer 104, a first gate insulating layer 105, a gate metal layer 106, a second gate insulating layer 107, a capacitive layer 108, an interlayer insulating layer 109, a source The drain metal layer 110, the planarization layer 111, the anode layer 113, the light-emitting layer 114, the pixel definition layer 115 and the thin film encapsulation layer 116. The relevant film layers of the thin film transistor (TFT) in the panel layer 118 include multiple inorganic The thin film encapsulate (TFE) layer also includes an inorganic layer. Compared with the organic layer, the inorganic layer has poorer bending resistance. If the stress in the panel layer 118 cannot be released, when the stress exceeds the cracking threshold of the inorganic layer When this happens, it will cause the inorganic layer to crack, which may cause display defects such as black spots, broken bright spots, bright lines, etc. In order to solve the above problems, this application is provided Please refer to the technical solutions of the embodiments. The technical solutions of the embodiments of the present application will be described below.

As shown in Figure 2, the embodiment of the present application provides a folding display panel, including: a substrate layer 1, a driving backplane layer 2, a light-emitting layer 3 and a film encapsulation layer 4 that are stacked in sequence; in the direction away from the light-emitting layer 3 , the thin film encapsulation layer 4 includes a first chemical vapor deposition layer 411 and a first atomic layer deposition layer 421 that are stacked sequentially and arranged adjacently. The thickness range of the first chemical vapor deposition layer 411 is [100, 300] nm. The first atomic layer deposition layer The thickness of layer 421 ranges from [20, 50] nm, and the first chemical vapor deposition layer 411 and the first atomic layer deposition layer 421 are inorganic layers.

As shown in Figures 3 and 4, this application provides a method for preparing a folding display panel, including:

Step 201: Provide the substrate layer 1, the driving backplane layer 2 and the light-emitting layer 3 which are stacked in sequence;

Step 202: Form a first chemical vapor deposition layer 411 on the side of the light-emitting layer 3 away from the driving backplane layer 2 through a chemical vapor deposition (Chemical Vapor Deposition, CVD) process. The thickness of the first chemical vapor deposition layer 411 ranges from [100,300 ]nm, the first chemical vapor deposition layer 411 is an inorganic layer;

Step 203: Form a first atomic layer deposition layer 421 on the surface of the first chemical vapor deposition layer 411 away from the light-emitting layer 3 through an atomic layer deposition (ALD) process. The thickness range of the first atomic layer deposition layer 421 is [20,50] nm, and the first atomic layer deposition layer 421 is an inorganic layer.

Specifically, the folding display panel shown in Figure 2 can be prepared through the above folding display panel preparation method, wherein the substrate layer 1 can be a flexible polymer material layer, and the substrate layer 1 serves as the substrate of the display panel, and the subsequent display panel film The layers are all made on the substrate layer 1. The driving backplane layer 2 mainly includes a driving circuit composed of a thin film transistor (TFT), which is used to drive the light-emitting layer 3 to emit light to achieve the display function. The _first chemical vapor _deposition _layer 411 can be _an inorganic material layer _such as silicon oxide _SiO and other inorganic material layers. The first chemical vapor deposition layer 411 and the first atomic layer deposition layer 421 belong to a thin film encapsulate (TFE) layer and are used to encapsulate the display panel to isolate external water and oxygen from intruding into the light-emitting layer 3 or driving the backplane layer 2 In the circuit, since the first atomic layer deposition layer 421 is located on the surface of the first chemical vapor deposition layer 411, the characteristics of the atomic layer deposition layer film being dense and having good coverage can be used to modify and improve the microcracks on the surface of the chemical vapor deposition layer. and micro-defects, and improve the reliability of the packaging layer under external impact and extrusion. On this basis, due to the improvement of the water and oxygen barrier properties of the inorganic layer, in order to improve the mechanical properties of the inorganic layer, the first chemical vapor deposition can be The thickness of layer 411 is designed to be thin, within the thickness range of [100,300] nm, and combined with the first atomic layer deposition layer 421 within the thickness range of [20,50] nm, the bending performance of the packaging layer can be further improved.

The folding display panel and its preparation method in the embodiments of the present application use chemical vapor deposition layers and atomic layer deposition layers that are sequentially stacked and within a specific thickness range to serve as the inorganic encapsulation layer. On the one hand, the atomic layer deposition layer film is used to make the film dense , with the characteristics of good coverage, to modify and improve the micro-cracks and micro-defects on the surface of the chemical vapor deposition layer, and improve the reliability of the packaging layer under external impact. On the other hand, on this basis, the first chemical vapor deposition layer Designed to be in the thickness range of [100,300]nm, combined with the first atomic layer deposition layer in the thickness range of [20,50]nm, it is possible to improve the screen's bending performance while improving the reliability of the screen under external impact and extrusion. sex.

In a possible implementation, in the direction away from the light-emitting layer 3 , the thin film encapsulation layer 4 also includes an organic buffer layer 40 , a second chemical vapor deposition layer 412 and a second atomic layer deposition layer that are stacked and adjacently arranged in sequence. 422, the thickness range of the second chemical vapor deposition layer 412 is [100,300] nm, the thickness range of the second atomic layer deposition layer 422 is [20,50] nm, the second chemical vapor deposition layer 412 and the second atomic layer deposition layer 422 is an inorganic layer; the organic buffer layer 40 is located between the first atomic layer deposition layer 421 and the second chemical vapor deposition layer 412 .

Specifically, the above-mentioned folding display panel preparation method also includes:

Step 204: Form an organic buffer layer 40 on the side of the first atomic layer deposition layer 421 away from the light-emitting layer 3. The manufacturing process of the organic buffer layer 40 can adopt inkjet printing, evaporation, plasma chemical vapor deposition, spin coating, and hanging. Coating, etc., the material of the organic buffer layer 40 can be hexamethyl disilyl ether, polyacrylate materials, polycarbonate materials, or polystyrene, etc. The main function of the organic buffer layer 40 is to protect the particles below. The pollutants are wrapped and covered, and at the same time, the stress on the display panel is buffered under conditions of extrusion, impact, bending, etc.;

Step 205: Form a second chemical vapor deposition layer 412 and a second atomic layer deposition layer 422 on the side of the organic buffer layer 40 away from the light-emitting layer 3 through a chemical vapor deposition process and an atomic layer deposition process, respectively.

The second chemical vapor deposition layer 412 may use the same process, material, and structure as the first chemical vapor deposition layer 411 , and the second atomic layer deposition layer 422 may use the same process, material, and structure as the first atomic layer deposition layer 421 . same. In addition, it should be noted that FIG. 2 only illustrates that a layer of first chemical vapor deposition layer 411 and a layer of first atomic layer deposition layer 421 are superimposed as an organic buffer layer. For the inorganic encapsulation layer below the punching layer 40, in other possible implementations, a greater number of chemical vapor deposition layers and atomic layer deposition layers that are alternately stacked in sequence can be provided. Similarly, a greater number of chemical vapor deposition layers that are stacked in sequence can also be provided. The deposition layer and the atomic layer deposition layer serve as an inorganic encapsulation layer above the organic buffer layer 40 .

In a possible implementation, as shown in FIG. 5 , in the direction close to the light-emitting layer 3 , the driving backplane layer 2 includes a barrier layer 21 , a buffer layer 22 , a semiconductor layer 23 , and a first layer 23 that are stacked in sequence. Gate insulation (Gate Insulation, GI) layer 241, gate metal layer 25, second gate insulation layer 242, capacitor layer 26, interlayer insulation layer (Inter Layer Dielectric, ILD) 27, first source and drain metal layer 281 and passivation layer 29; in the direction close to the light-emitting layer 3, the interlayer insulating layer 27 includes a third chemical vapor deposition layer 271 and a third atomic layer deposition layer 272 that are sequentially stacked and arranged adjacently. The third chemical vapor deposition layer The thickness range of 271 is [100, 200] nm, and the thickness range of the third atomic layer deposition layer 272 is [20, 50] nm.

Specifically, the above step 201 may include: forming a substrate layer 1; sequentially forming a barrier layer 21, a buffer layer 22 and a semiconductor layer 23 on the surface of the substrate layer 1. The barrier layer 21 and the buffer layer 22 are used to isolate Na+ ions and K+ ions and act as The buffer layer between the substrate layer 1 and the transistor; and then an Excimer Laser Annealing (ELA) crystallization process and a patterning process are performed to form the semiconductor layer 23 into the required pattern, such as the formation of the semiconductor layer 23 The pattern of the transistor channel. The transistor channel can be made through a low temperature polysilicon (LTPS) process; then the first gate insulating layer 241 and the gate metal layer 25 are deposited, and the gate metal is made through a patterning process. Layer 25 forms the required pattern, for example, the gate metal layer 25 can form the pattern of the transistor gate 251 and the pattern of the lower electrode plate 252 of the capacitor; then continue to deposit the second gate insulating layer 242 and the capacitor layer 26, and through the pattern The chemical process causes the capacitor layer 26 to form the pattern of the upper electrode plate of the capacitor. The upper electrode plate and the lower electrode plate 252 of the capacitor layer 26 constitute the capacitor in the drive circuit; then, the side of the capacitor layer 26 away from the semiconductor layer 23 is chemically The third chemical vapor deposition layer 271 is formed by a vapor deposition process. The thickness of the third chemical vapor deposition layer 271 ranges from [100, 200] nm. The surface of the third chemical vapor deposition layer 271 away from the semiconductor layer 23 is deposited by atomic layer deposition. The process forms a third atomic layer deposition layer 272, the thickness range of the third atomic layer deposition layer 272 is [20, 50] nm; the third chemical vapor deposition layer 271 and the third atomic layer deposition layer 272 constitute the interlayer insulating layer 27 , the interlayer insulating layer 27 plays the role of isolating the gate 251 from the source and drain metal layers, and can provide H atoms for the polysilicon channel of the transistor to fill defects; after the interlayer insulating layer 27 is completed, a hole opening process is performed. Including forming source through holes and drain through holes on the first gate insulating layer 241, the second gate insulating layer 242, the third chemical vapor deposition layer 271 and the third atomic layer deposition layer 272, and performing annealing and activation process; then, a first source-drain metal layer 281 and a passivation layer 29 are sequentially formed on the side of the third atomic layer deposition layer 272 away from the semiconductor layer 23 , where the first source-drain metal layer 281 includes a source pattern and a drain pattern. , the source pattern is connected to one end of the channel pattern in the semiconductor layer 23 through the source through hole, and the drain pattern is connected to the other end of the channel pattern in the semiconductor layer 23 through the drain through hole, so that the channel in the semiconductor layer 23 Both ends of the channel are electrically connected to the source and drain electrodes in the first source-drain metal layer 281 respectively; then a first planarization layer (Planarization Layer, PLN) 291 is coated, and a hole opening process is performed, and then the second source is deposited The drain metal layer 282 is subjected to a patterning process to form a metal pattern, wherein, for example, part of the metal pattern of the second source and drain metal layer 282 is connected to the first source and drain metal layer through the openings on the first planarization layer 291 The metal pattern in 281, another part of the metal pattern of the second source and drain metal layer 282 is connected to the upper electrode plate of the capacitor layer 26 through the openings on the first planarization layer 291, the passivation layer 29 and the interlayer insulating layer 27; Then the second planarization layer 292 is coated and holes are opened. The first planarization layer 291 and the second planarization layer 292 are used to provide a planarized surface for the anode to facilitate light extraction; then the anode layer is deposited and patterned. , to form the anode 31 of an organic light-emitting diode (OLED). The material of the anode 31 can be, for example, an indium tin oxide (Indium Tin Oxide, ITO)/silver Ag/ITO stack; and then prepare the pixel definition layer 32 (Pixel Definition Layer, PDL) and support layer 33. The pixel definition layer 32 has an opening for defining the light-emitting area of the pixel; then the luminescent material layer 3 and the cathode 34 are evaporated, and the stacked anode 31, luminescent layer 3 and cathode are 34, an OLED device is formed, and the anode 31 of the OLED device is connected to the second source-drain metal layer 282 through the opening on the second planarization layer 292, and then connected to the first source-drain metal layer 281, thereby realizing the OLED device and driving The electrical connection between circuits. Among them, the interlayer insulation layer in the prior art is changed to be produced by sequentially stacking and adjacent third chemical vapor deposition layer 271 and third atomic layer deposition layer 272, and the thickness range of the two is set to [100, 200]nm and [20, 50]nm. On the one hand, the third chemical vapor deposition layer 271 can be used to repair the TFT performance. On the other hand, the atomic layer deposition layer can use the characteristics of dense film and good coverage. , to modify and improve the micro-cracks and micro-defects on the surface of the chemical vapor deposition layer, and to improve the reliability of the driving backplane layer 2 under external impact and extrusion. On this basis, the thickness of the third chemical vapor deposition layer 271 can be Designed to be thin, within the thickness range of [100, 200] nm, and combined with the third atomic layer deposition layer 272 within the thickness range of [20, 50] nm, the bending performance of the driving backplane layer 2 can be further improved.

In a possible implementation, both the barrier layer 21 and the passivation layer 29 are atomic layer deposition layers formed by an ALD process. That is, in the above folding display panel preparation method, in the process of providing the substrate layer 1, the driving backplane layer 2 and the light-emitting layer 3 which are stacked in sequence, by The barrier layer 21 and the passivation layer 29 are formed by an atomic layer deposition process. The atomic layer deposition layer can be made of silicon oxide or aluminum oxide material, for example, and the reliability of the driving backplane layer 2 under external impact and extrusion is improved through the atomic layer deposition layer structure.

In a possible implementation, the substrate layer 1 is a polyimide (PI) layer, and the elastic modulus of the polyimide layer is greater than 20 Gpa.

Specifically, the specific manufacturing process of the substrate layer 1 can be as follows: coating a PI solution with an elastic modulus greater than 20 Gpa on the glass, and then solidifying and shaping it through a curing process (generally 450 degrees Celsius, 2 hours), and then depositing the barrier layer 21, The preparation process of the buffer layer 22 and the rest of the driving backplane layer 2, and finally attaching the TPF film for laser lift-off (LLO), and then transferring it to the lower support film after peeling off. By using a higher modulus PI material as the substrate layer 1, compared with the existing technology, the reliability under external impact or extrusion can be improved. For example, according to the simulation results, a PI layer with an elastic modulus greater than 20Gpa is used as the lining. Compared with the existing technology, the folding display panel on the bottom layer 1 has a 10% improvement in resistance to external force tip impact and a 33% improvement in resistance to external force extrusion. Moreover, after using the substrate layer 1, the bending stress of the display panel is less than the failure threshold, that is, the risk of bending failure is low.

In a possible implementation, the substrate layer 1 is ultra-thin flexible glass (Ultra-Thin Glass, UTG), and the thickness of the ultra-thin flexible glass ranges from [20, 50] μm.

Specifically, the specific manufacturing process of the substrate layer 1 can be as follows: first depositing a SiN _x film layer rich in H atoms with a thickness of 200-300 nm on the back of the UTG. The UTG thickness is about [20,50] μm, and then attaching the UTG to On a normal 0.5mm thick carrier glass, after completing the normal drive backplane layer 2 process, due to the many high-temperature processes in the drive backplane layer 2 process, hydrogen explosion of the SiN _x film layer on the backside will occur, reducing the attachment of UTG to the carrier glass. Therefore, after completing the drive backplane layer 2 process, the TPF film is attached and mechanically peeled off, and then the bottom film is attached. By using UTG with a thickness of [20,50]μm as the substrate layer 1, the reliability under external impact or extrusion can be improved compared to the existing technology. For example, according to the simulation results, using a UTG with a thickness of [20,50]μm As a folding display panel with substrate layer 1, UTG has a 97% improvement in resistance to external force tip impact and a 65% improvement in resistance to external extrusion compared to the existing technology. Moreover, after using the substrate layer 1, the bending stress of the display panel is less than the failure threshold, that is, the risk of bending failure is low.

In a possible implementation, the substrate layer 1 is an ultra-high molecular weight polyethylene (UHMWPE) layer, and the elastic modulus of the ultra-high molecular weight polyethylene layer is ≥30 Gpa. In another embodiment, a HUMWPE layer with other elastic modulus (for example, elastic modulus ≥ 20 Gpa) can also be selected as the substrate layer 1 .

Specifically, the formula of the UHMWPE layer mainly includes: ultra-high molecular weight (molecular weight Mw>1 million) polyethylene, and a small amount of specific small molecular weight polyethylene. By using UHMWPE with elastic modulus ≥30Gpa as the substrate layer 1, the reliability under external impact or extrusion can be improved compared to the existing technology. For example, according to the simulation results, UHMWPE with elastic modulus ≥30Gpa is used as the substrate layer. 1's folding display panel has a 71% improvement in resistance to external force tip impact and a 46% improvement in resistance to external force extrusion compared to the existing technology. Moreover, after using the substrate layer 1, the bending stress of the display panel is less than the failure threshold, that is, the risk of bending failure is low.

In another possible implementation, the ultra-high molecular weight polyethylene layer as the bottom layer 1 can be replaced by a poly-p-phenylene benzobisoxazole layer. The elastic modulus of the polyparaphenylene benzobioxazole layer is ≥20Gpa. Since polyparaphenylene benzobioxazole has high temperature resistance, the manufacturing difficulty of the display panel can be reduced and the manufacturing yield of the display panel can be improved.

In a possible implementation, the material of the first chemical vapor deposition layer 411 is silicon oxide, silicon nitride or silicon oxynitride; the material of the first atomic layer deposition layer 421 is aluminum oxide or hafnium oxide.

In a possible implementation, the material of the third chemical vapor deposition layer 271 is silicon nitride to achieve the repair function of the TFT performance; the material of the third atomic layer deposition layer 272 is aluminum oxide, titanium oxide, silicon oxide and hafnium oxide.

An embodiment of the present application also provides an electronic device, including the folding display panel of any of the above embodiments. The specific structure and principle of the folding display panel are the same as the above-mentioned embodiments, and will not be described again here. The electronic device may be, for example, a mobile phone, a tablet computer, or any other electronic device with a folding function or a folding display structure.

In the embodiments of this application, "at least one" refers to one or more, and "multiple" refers to two or more. "And/or" describes the relationship between associated objects, indicating that there can be three relationships. For example, A and/or B can represent the existence of A alone, the existence of A and B at the same time, or the existence of B alone. Where A and B can be singular or plural. The character "/" generally indicates that the related objects are in an "or" relationship. "At least one of the following" and similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c can represent: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple.

The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of this application shall be included in the protection scope of this application.

Claims

A folding display panel, characterized by including:

The substrate layer, driving backplane layer, light-emitting layer and thin film encapsulation layer are stacked in sequence;

In a direction away from the light-emitting layer, the thin film encapsulation layer includes a first chemical vapor deposition layer and a first atomic layer deposition layer that are stacked and adjacently arranged in sequence, and the thickness range of the first chemical vapor deposition layer is [ 100, 300] nm, the thickness range of the first atomic layer deposition layer is [20, 50] nm, the first chemical vapor deposition layer and the first atomic layer deposition layer are inorganic layers.
The folding display panel according to claim 1, characterized in that:

In a direction away from the light-emitting layer, the thin film encapsulation layer also includes an organic buffer layer, a second chemical vapor deposition layer and a second atomic layer deposition layer that are stacked and adjacently arranged in sequence. The second chemical vapor deposition layer The thickness range is [100, 300] nm, the thickness range of the second atomic layer deposition layer is [20, 50] nm, the second chemical vapor deposition layer and the second atomic layer deposition layer are inorganic layers;

The organic buffer layer is located between the first atomic layer deposition layer and the second chemical vapor deposition layer.
The folding display panel according to claim 1 or 2, characterized in that:

In a direction close to the light-emitting layer, the driving backplane layer includes a barrier layer, a buffer layer, a semiconductor layer, a first gate insulating layer, a gate metal layer, a second gate insulating layer, and a capacitor that are stacked in sequence. layer, interlayer insulating layer, source-drain metal layer and passivation layer;

In a direction close to the light-emitting layer, the interlayer insulating layer includes a third chemical vapor deposition layer and a third atomic layer deposition layer that are sequentially stacked and arranged adjacently. The thickness of the third chemical vapor deposition layer ranges from [100, 200] nm, and the thickness range of the third atomic layer deposition layer is [20, 50] nm.
The folding display panel according to claim 3, characterized in that:

The barrier layer and the passivation layer are both atomic layer deposition layers.
The folding display panel according to any one of claims 1 to 4, characterized in that:

The substrate layer is a polyimide layer, and the elastic modulus of the polyimide layer is greater than 20 Gpa.
The folding display panel according to any one of claims 1 to 4, characterized in that:

The substrate layer is ultra-thin flexible glass, and the thickness range of the ultra-thin flexible glass is [20, 50] μm.
The folding display panel according to any one of claims 1 to 4, characterized in that:

The substrate layer is an ultra-high molecular weight polyethylene layer, and the elastic modulus of the ultra-high molecular weight polyethylene layer is ≥30 Gpa.
The folding display panel according to any one of claims 1 to 4, characterized in that:

The substrate layer is a polyparaphenylene benzobisoxazole layer.
The folding display panel according to any one of claims 1 to 8, characterized in that:

The material of the first chemical vapor deposition layer is silicon oxide, silicon nitride or silicon oxynitride;

The material of the first atomic layer deposition layer is aluminum oxide or hafnium oxide.
The folding display panel according to any one of claims 3 to 9, characterized in that:

The material of the third chemical vapor deposition layer is silicon nitride;

The third atomic layer deposition layer is made of aluminum oxide, titanium oxide, silicon oxide and hafnium oxide.
A method for preparing a folding display panel, which is characterized by including:

Provide a substrate layer, a driving backplane layer and a light-emitting layer that are stacked in sequence;

A first chemical vapor deposition layer is formed on the side of the light-emitting layer away from the driving backplane layer through a chemical vapor deposition process. The thickness of the first chemical vapor deposition layer is in the range of [100, 300] nm. The vapor deposition layer is an inorganic layer;

A first atomic layer deposition layer is formed on the surface of the first chemical vapor deposition layer away from the light-emitting layer through an atomic layer deposition process. The thickness of the first atomic layer deposition layer ranges from [20, 50] nm, The first atomic layer deposition layer is an inorganic layer.
The method according to claim 11, characterized in that:

The method of providing a substrate layer, a driving backplane layer and a light-emitting layer that are stacked in sequence includes:

form a substrate layer;

A barrier layer, a buffer layer, a semiconductor layer, a first gate insulating layer, a gate metal layer, a second gate insulating layer and a capacitor layer are sequentially formed on the surface of the substrate layer;

A third chemical vapor deposition layer is formed on the side of the capacitor layer away from the semiconductor layer through a chemical vapor deposition process, and the thickness of the third chemical vapor deposition layer ranges from [100, 200] nm;

A third atomic layer deposition layer is formed on the side surface of the third chemical vapor deposition layer away from the semiconductor layer through an atomic layer deposition process, and the thickness range of the third atomic layer deposition layer is [20, 50] nm;

Form a source-drain metal layer and a passivation layer in sequence on the side of the third atomic layer deposition layer away from the semiconductor layer;

A light-emitting layer is formed on a side of the passivation layer away from the semiconductor layer.
The method according to claim 11 or 12, characterized in that,

In the process of providing a substrate layer, a driving backplane layer and a light-emitting layer that are stacked in sequence, the barrier layer and the passivation layer are formed through an atomic layer deposition process.
An electronic device, characterized by comprising the folding display panel according to any one of claims 1 to 10.