WO2024037017A1 - 分布式驱动电路及具有该分布式驱动电路的显示设备 - Google Patents

分布式驱动电路及具有该分布式驱动电路的显示设备 Download PDF

Info

Publication number
WO2024037017A1
WO2024037017A1 PCT/CN2023/089714 CN2023089714W WO2024037017A1 WO 2024037017 A1 WO2024037017 A1 WO 2024037017A1 CN 2023089714 W CN2023089714 W CN 2023089714W WO 2024037017 A1 WO2024037017 A1 WO 2024037017A1
Authority
WO
WIPO (PCT)
Prior art keywords
driving circuit
delay
circuit
compensation unit
driving
Prior art date
Application number
PCT/CN2023/089714
Other languages
English (en)
French (fr)
Inventor
孙俊岳
王玉军
王元磊
方玉婷
夏翔
Original Assignee
华源智信半导体(深圳)有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华源智信半导体(深圳)有限公司 filed Critical 华源智信半导体(深圳)有限公司
Publication of WO2024037017A1 publication Critical patent/WO2024037017A1/zh

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202Addressing of scan or signal lines
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits

Definitions

  • the present invention relates to the technical field of display devices, and in particular, to a distributed driving circuit and a display device having the distributed driving circuit.
  • LEDs are used in many electronic display devices, such as computers, televisions, mobile devices, smartphones, projection systems, billboards, etc.
  • the display device may contain a large number of LED units, and these LED units may be arranged in an array in the display area.
  • the data control of the LED drive circuits in each row of the array is parallel, that is, the LED drive circuits in each row share the same data control line and ground. Both the data control line and the ground are buses. Please refer to Figure 1. Both They all need to be connected to each drive circuit. Therefore, in a single-layer PCB, one of the two buses needs the help of a jumper (circled in Figure 1) to connect to the drive circuit. To sum up, the display device in the prior art cannot support single-layer PCB well without the help of jumpers.
  • jumpers has the following disadvantages: over time, the jumpers will become loose and aged, so the use of jumpers reduces the reliability of the circuit; in addition, the use of jumpers also increases the cost of the circuit.
  • the present invention provides a distributed driving circuit and a display device having the distributed driving circuit to solve the problem in the prior art that single-layer PCB cannot be well supported without the help of jumpers.
  • the present invention provides a distributed drive circuit, which includes: a control circuit, a drive circuit array, a control command interface, and a readback line; wherein,
  • the drive circuit array includes: a plurality of drive circuit groups, each of the drive circuit groups includes: a plurality of drive circuits;
  • the control circuit is used to send control signals and command signals to the driving circuit
  • the control command interface is provided in the control circuit, and the control command interface is used to output the control signal and command signal sent by the control circuit for transmission to the drive circuit;
  • the driving circuit is used to drive the light-emitting diode in response to the control signal, and is also used to generate readback data to the control circuit in response to the command signal;
  • the readback line is used to transmit the readback data generated by the drive circuit back to the control circuit.
  • the serial communication line corresponds to the driving circuit group one-to-one;
  • the control circuit, the serial communication line, and the readback line form a loop, and the drive circuits of each group are connected in series to the serial communication line to pass the readback data of the drive circuit through
  • the serial communication line is transmitted to the readback line, and then transmitted to the control circuit through the readback line.
  • the method further includes: a buffer portion, the buffer portion is connected to the control command line, and the buffer portion is used to enhance the driving capability of the control circuit.
  • the buffer part includes: a plurality of buffers, the buffers being in one-to-one correspondence with the driving circuit group;
  • the buffer is disposed between the control circuit and the first driving circuit of each driving circuit group.
  • the buffer part includes: a plurality of buffers, the buffers corresponding to the driving circuit one-to-one;
  • the buffer is provided in the driving circuit.
  • the driving delay of the driving circuit is less than a preset value.
  • it also includes: a first delay compensation unit, the first delay compensation unit being disposed in the control circuit;
  • the first delay compensation unit is used to compensate the driving delay of the driving circuit.
  • it also includes: a second delay compensation unit, the second delay compensation unit being disposed in the control circuit;
  • the second delay compensation unit is used to compensate the driving delay of the driving circuit.
  • the first delay detection unit corresponds to the driving circuit one-to-one;
  • the first delay detection unit is used to detect the delay of the corresponding control signal and command signal of the drive circuit, and feed back the detection value to the second delay compensation unit, so that the second delay compensation unit
  • the delay compensation unit compensates the driving delay of the driving circuit according to the detection value.
  • it also includes: a third delay compensation unit, the third delay compensation unit corresponds to the driving circuit one-to-one;
  • the third delay compensation unit is used to compensate the corresponding driving delay of the driving circuit.
  • it also includes: a second delay detection unit, the second delay detection unit corresponds to the driving circuit one-to-one;
  • the output end of the second delay detection unit is connected to the input end of the third delay compensation unit, and the input end of the second delay detection unit is connected to the input end and the output end of the buffer respectively;
  • the second delay detection unit is used to detect the delay of the corresponding control signal and command signal of the driving circuit, and feed back the detection value to the third delay compensation unit, so that the third delay compensation unit
  • the delay compensation unit compensates the driving delay of the driving circuit according to the detection value.
  • the serial communication line corresponds to the driving circuit group one-to-one;
  • control circuit, the serial communication line, and the readback line form a loop, and the driving circuits of each group are connected in series to the serial communication line;
  • the first delay detection unit or the second delay detection unit is connected in series to the serial communication line,
  • it also includes: a fourth delay compensation unit and a fifth delay compensation unit; wherein,
  • the fourth delay compensation unit is provided in the control circuit
  • the fifth delay compensation unit corresponds to the driving circuit one-to-one, and the fifth delay compensation unit is provided in the driving circuit;
  • the fourth delay compensation unit and the fifth delay compensation unit are configured to jointly compensate for the driving delay of the driving circuit.
  • the present invention provides a display device with distributed drive circuits, which includes: a distributed drive circuit and a light-emitting diode area array;
  • the light-emitting diode area array includes: multiple groups of light-emitting diode areas, and each group of the light-emitting diode area includes: a plurality of light-emitting diode areas;
  • the light-emitting diode area corresponds to the driving circuit one-to-one
  • the distributed driving circuit is the distributed driving circuit described in any one of the above.
  • the distributed drive circuit and the display device with the distributed drive circuit provided by the present invention are serially connected to the multiple drive circuits of each drive circuit group through the control command interface, that is, the data control line is no longer a bus. It no longer conflicts with the ground wire, and can well support a single-layer PCB without the help of jumpers; in addition, the use of jumpers is omitted, which can not only avoid problems of poor reliability due to loose jumpers and aging, but also It can save costs.
  • the control circuit needs to control a large number of drive circuits, there will be a problem of insufficient driving capability, which affects the quality of the dimming data signal.
  • the performance of the control circuit can be enhanced.
  • the driving capability can ensure the quality of dimming data signals when driving a large number of driving circuits.
  • the buffer by building the buffer into each drive circuit, the driving capability requirements of the control circuit are reduced when a large number of drive circuits are driven; in addition, the buffer is built into the drive circuit to avoid the need for separate Additional buffers were installed, further reducing costs.
  • the delay compensation unit is used to compensate the driving delay of the driving circuit, so that the driving delay between the driving circuits of each driving circuit group can be shortened and driven almost simultaneously, further improving the improve the dimming data signal quality.
  • the delay of the driving circuit is detected by the delay detection unit, and the detection value is fed back to the delay compensation unit, so that the delay compensation is more accurate and the quality of the dimming data signal is higher.
  • Figure 1 is a schematic diagram of a driving circuit in the prior art
  • Figure 2 is a schematic diagram of a distributed driving circuit according to an embodiment of the present invention.
  • Figure 3 is a schematic diagram of a driving circuit according to an embodiment of the present invention.
  • Figure 4 is a schematic diagram of a distributed driving circuit according to a preferred embodiment of the present invention.
  • Figure 5 is a schematic diagram of a distributed drive circuit according to another preferred embodiment of the present invention.
  • Figure 6 is a schematic diagram of a distributed drive circuit according to another preferred embodiment of the present invention.
  • Figure 7 is a schematic diagram of a distributed drive circuit according to another preferred embodiment of the present invention.
  • FIG. 8 is a schematic diagram of the control circuit performing delay compensation processing according to an embodiment of the present invention.
  • Figure 9 is a schematic diagram of a distributed drive circuit according to another preferred embodiment of the present invention.
  • Figure 10 is a schematic diagram of a driving circuit according to another preferred embodiment of the present invention.
  • Figure 11 is a schematic diagram of a driving circuit according to another preferred embodiment of the present invention.
  • Figure 12 is a circuit diagram of a display device with a distributed driving circuit according to an embodiment of the present invention.
  • first and second are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, features defined as “first” and “second” may explicitly or implicitly include one or more of these features.
  • plural means a plurality, such as two, three, four, etc., unless otherwise clearly and specifically limited.
  • connection and other terms should be understood in a broad sense.
  • it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection. , it can also be electrically connected or can communicate with each other; it can be directly connected, or it can be indirectly connected through an intermediary, it can be the internal connection between two components or the interactive relationship between two components.
  • connection can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection. , it can also be electrically connected or can communicate with each other; it can be directly connected, or it can be indirectly connected through an intermediary, it can be the internal connection between two components or the interactive relationship between two components.
  • a distributed driving circuit which includes: a control circuit 1, a driving circuit array, a control command interface 101, and a readback line 3.
  • the driving circuit array includes: multiple driving circuit groups, and each driving circuit group includes: multiple driving circuits 2 (Drivers).
  • the driver circuits may be arranged as a two-dimensional array (eg, arranged in rows and columns).
  • the control circuit 1 is used to send control signals and command signals to the driving circuit 2.
  • the control command interface 101 is provided in the control circuit 1 .
  • the control command interface 101 is used to output the control signals and command signals sent by the control circuit for transmission to the drive circuit 2 .
  • the driving circuit 2 is used to drive the light emitting diode in response to the control signal, and is also used to generate readback data to the control circuit 1 in response to the command signal.
  • the readback line 3 is used to transmit the readback data generated by the driving circuit 2 back to the control circuit 1 .
  • control command interface 101 is serially connected to the multiple drive circuits 2 of each drive circuit group, such as Dim1...DimM in Figure 2, passing through each drive circuit 2.
  • the connection line between the control command interface 101 and each drive circuit 2 is no longer a bus, but only The ground bus no longer needs the help of jumpers and can be arranged on a single-layer PCB, which not only saves costs but also improves the reliability of the circuit.
  • the distributed driving circuit also includes: serial communication lines 4 (Comm1...CommM), please refer to Figure 2.
  • the serial communication line 4 corresponds to the drive circuit group one-to-one.
  • the control circuit 1, serial communication line 4, and readback line 3 form a loop.
  • the serial communication line 4 connects the drive circuits of each drive circuit group in series to transmit the readback data of each drive circuit 2 to the backend circuit. Readback line 3 then transmits the readback data back to control circuit 1 via readback line 3.
  • a buffer part may also be included.
  • the buffer part is connected to the control command line and is used to enhance the driving capability of the control circuit.
  • the buffer portion may be provided on a connection line between the control circuit and the driving circuit.
  • the buffer part includes: a plurality of buffers 5 (Buffers), and the buffers 5 correspond to the drive circuit groups one-to-one; the buffers 5 can be disposed between the control circuit and the first drive circuit 2 of each drive circuit group. , please refer to Figure 4.
  • the buffer part may be built into the driving circuit.
  • the buffer part includes: a plurality of buffers 5 (Buffers), and the buffers 5 correspond to the driving circuit 2 one-to-one; the buffers 5 are arranged in the driving circuit 2, please refer to FIG. 5 .
  • the driving delay of the driving circuit can be controlled to be smaller than a preset value. The smaller the driving delay, the more synchronized the light-emitting diodes, and the better the dimming quality.
  • the delay compensation of the distributed driving circuit provided with the buffer part is described below.
  • the delay of a distributed drive circuit without a buffer is relatively small, delay compensation can also be performed, and the delay compensation can also be set up with reference to the example with a buffer.
  • the delay in order to reduce the delay after setting the buffer, can be controlled through the selection of the buffer.
  • the delay can be shortened by compensating the delay, and the effect is better.
  • Delay compensation can be implemented in a variety of ways, which will be described in detail below with reference to specific examples.
  • the delay compensation can be set in the control circuit, and the control circuit compensates for the delay of each driving circuit.
  • delay compensation can also be set in the driving circuit, and each driver The dynamic circuit compensates for its own delay.
  • delay compensation can also be set in the control circuit and the drive circuit at the same time, and the two are combined to complete the delay compensation.
  • the compensation ratio of the control circuit and the drive circuit can be set differently as needed.
  • the delay compensation unit may be disposed in the control circuit.
  • the distributed driving circuit also includes: a first delay compensation unit 6.
  • the first delay compensation unit 6 is provided in the control circuit 1; the first delay compensation unit 6 is used to compensate for the driving delay of the driving circuit. , please refer to Figure 6.
  • the delay compensation unit can also be provided in the control circuit.
  • the distributed driving circuit also includes: a second delay compensation unit 7, which is provided in the control circuit 1; the second delay compensation unit 7 is used to compensate for the driving delay of the driving circuit. , please refer to Figure 7.
  • the delay compensation unit when the delay compensation unit is set in the control circuit, it can be implemented in the following manner: the control circuit 1 can preset a Tdelay_max_unit for each drive circuit 2 in advance. Please refer to Figure 8. Each drive circuit The actual delay (delay) must be less than this value. Each drive circuit calculates the time that needs to be compensated based on its own device number (device ID N).
  • a first delay detection unit 8 may also be included, and the first delay detection unit 8 corresponds to the driving circuit one-to-one.
  • the first delay detection unit 8 is used to detect the delays of the control signals and command signals of the corresponding drive circuits, and feed back the detection values to the second delay compensation unit 7 so that the second delay compensation unit 7 can
  • the detection value compensates the driving delay of the driving circuit, please refer to Figure 9.
  • the first delay detection unit 8 can be connected in series to the serial communication line. Please refer to Figure 9. In this way, its detection value can be transmitted to the readback line through the serial communication line, and then through the readback line. Feedback the detected value to the control circuit.
  • the delay detection unit can detect the delay in real time, and the delay compensation is more accurate, resulting in better dimming quality.
  • the delay detection unit may not be provided, and the delay compensation of the delay compensation unit may be set based on experience and may be a preset value.
  • the delay compensation unit can also be provided in the driving circuit.
  • the distributed driving circuit also includes: a third delay compensation unit 9.
  • the third delay compensation unit 9 corresponds to the driving circuit 2 one-to-one. Please refer to Figure 10.
  • the third delay compensation order Yuan 9 is used to compensate for the driving delay of the corresponding driving circuit.
  • the third delay compensation unit may also include: a second delay detection unit 10 , the second delay detection unit 10 corresponds to the driving circuit 2 one-to-one; the second delay detection unit 10 The output terminal is connected to the input terminal of the third delay compensation unit, and the input terminal of the second delay detection unit is connected to the input terminal and the output terminal of the buffer respectively.
  • the second delay detection unit is used to detect the delay of the control signal and command signal of the corresponding drive circuit, and feed back the detection value to the third delay compensation unit, so that the third delay compensation unit can detect the delay according to the detection value.
  • the driving delay of the driving circuit is compensated.
  • the second delay detection unit 10 is also connected in series to the serial communication line 4. Please refer to Figure 10. In this way, its detection value can be transmitted to the readback line through the serial communication line, and then through the readback line. Feedback the detected value to the control circuit.
  • the serial communication line can also be used to transmit addressing signals to facilitate the control circuit to assign addresses to the driving circuit during the addressing mode.
  • delay compensation can be set in both the control circuit and the driving circuit.
  • the distributed driving circuit also includes: a fourth delay compensation unit 11 and a fifth delay compensation unit 12. Please refer to Figure 11. Among them, the fourth delay compensation unit 11 is provided in the control circuit 1; the fifth delay compensation unit 12 corresponds to the driving circuit 2 one-to-one, and the fifth delay compensation unit 12 is provided in the driving circuit 2.
  • the fourth delay compensation unit 11 and the fifth delay compensation unit 12 are configured to jointly compensate for the driving delay of the driving circuit 2 .
  • a display device with a distributed driving circuit which includes: a distributed driving circuit and a light-emitting diode area array.
  • the light-emitting diode area array includes: multiple groups of light-emitting diode areas, each group of light-emitting diode areas includes: multiple light-emitting diode zones 13 (LED Zone); light-emitting diode zone 13 and drive circuit 2
  • LED Zone multiple light-emitting diode zones 13
  • the distributed driving circuit is the distributed driving circuit described in any of the above embodiments.
  • the display device may further include: VLED lines (for example: VLED_1...VLED_M), power communication lines Pwr (for example: Pwr1...PwrM), and ground lines Gnd.
  • VLED lines for example: VLED_1...VLED_M
  • power communication lines Pwr for example: Pwr1...PwrM
  • ground lines Gnd ground lines.
  • the VLED line is used to provide power to the light-emitting diode area
  • the ionization communication line Pwr is used to provide power to the drive circuit
  • the Gnd line provides a grounding path for the light-emitting diode area and the drive circuit 2.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种分布式驱动电路及具有该分布式驱动电路的显示装置,分布式驱动电路包括:控制电路、驱动电路阵列、控制命令接口、回读线;驱动电路阵列包括:多组驱动电路组,每组驱动电路组包括:多个驱动电路;控制电路用于向驱动电路发送控制信号和命令信号;控制命令接口设置于控制电路,控制命令接口用于将控制电路发送的控制信号和命令信号输出,以传输到驱动电路;控制命令接口与每组驱动电路组的多个驱动电路之间为串行连接;驱动电路用于响应于控制信号对发光二极管进行驱动,还用于响应于命令信号向控制电路产生回读数据;回读线用于将驱动电路产生的回读数据传输回控制电路。

Description

分布式驱动电路及具有该分布式驱动电路的显示设备 技术领域
本发明涉及显示设备技术领域,尤其涉及一种分布式驱动电路及具有该分布式驱动电路的显示设备。
背景技术
LED被用于许多电子显示设备中,例如:电脑、电视、移动设备、智能电话、投影系统、广告牌等。
显示设备中可以包含大量的LED单元,这些LED单元可以以阵列的形式布置在显示区域中。现有技术中阵列中每一行的LED驱动电路的数据控制是并行的,即每一行的LED驱动电路共用同一数据控制线和地,数据控制线和地都为总线,请参考图1,两者都需要与每一驱动电路相连,因此,在单层PCB中,两总线中有一总线需要借助跳线(如图1的圆圈圈出)的帮助才能与驱动电路相连。综上所述,现有技术的显示设备中,没有跳线的帮助,不能很好地支持单层PCB。
跳线的使用存在以下缺点:随着时间的推移,跳线会出现松动、老化,因此跳线的使用使得电路的可靠性降低;另外,跳线的使用还增加了电路的成本。
发明内容
本发明提供一种分布式驱动电路及具有该分布式驱动电路的显示设备,以解决现有技术中没有跳线的帮助,不能很好地支持单层PCB的问题。
为解决上述技术问题,本发明是通过如下技术方案实现的:
根据本发明的第一方面,本发明提供一种分布式驱动电路,其包括:控制电路、驱动电路阵列、控制命令接口、回读线;其中,
所述驱动电路阵列包括:多组驱动电路组,每组所述驱动电路组包括:多个驱动电路;
所述控制电路用于向所述驱动电路发送控制信号和命令信号;
所述控制命令接口设置于所述控制电路,所述控制命令接口用于将所述控制电路发送的控制信号和命令信号输出,以传输到所述驱动电路;
所述控制命令接口与每组所述驱动电路组的多个所述驱动电路之间为串行连接;
所述驱动电路用于响应于所述控制信号对发光二级管进行驱动,还用于响应于所述命令信号向所述控制电路产生回读数据;
所述回读线用于将所述驱动电路产生的回读数据传输回所述控制电路。
较佳地,还包括:串行通讯线,所述串行通讯线与所述驱动电路组一一对应;
所述控制电路、所述串行通讯线、所述回读线组成一个回路,每组的所述驱动电路串接在所述串行通信线中,以将所述驱动电路的回读数据通过所述串行通讯线传输到回读线,再通过回读线传输到控制电路。
较佳地,还包括:缓冲部,所述缓冲部连接在所述控制命令线中,所述缓冲部用于增强所述控制电路的驱动能力。
较佳地,所述缓冲部包括:多个缓冲器,所述缓冲器与所述驱动电路组一一对应;
所述缓冲器设置于所述控制电路与每组所述驱动电路组的第一个所述驱动电路之间。
较佳地,所述缓冲部包括:多个缓冲器,所述缓冲器与所述驱动电路一一对应;
所述缓冲器设置于所述驱动电路中。
较佳地,所述驱动电路的驱动延时小于预设值。
较佳地,还包括:第一延时补偿单元,所述第一延时补偿单元设置于所述控制电路中;
所述第一延时补偿单元用于对所述驱动电路的驱动延时进行补偿。
较佳地,还包括:第二延时补偿单元,所述第二延时补偿单元设置于所述控制电路中;
所述第二延时补偿单元用于对所述驱动电路的驱动延时进行补偿。
较佳地,还包括:第一延时检测单元,所述第一延时检测单元与所述驱动电路一一对应;
所述第一延时检测单元用于对对应的所述驱动电路的控制信号和命令信号的延时进行检测,并将检测值反馈给所述第二延时补偿单元,以使所述第二延时补偿单元根据所述检测值对所述驱动电路的驱动延时进行补偿。
较佳地,还包括:第三延时补偿单元,所述第三延时补偿单元与所述驱动电路一一对应;
所述第三延时补偿单元用于对对应的所述驱动电路的驱动延时进行补偿。
较佳地,还包括:第二延时检测单元,所述第二延时检测单元与所述驱动电路一一对应;
所述第二延时检测单元的输出端与所述第三延时补偿单元的输入端相连,所述第二延时检测单元的输入端分别连接所述缓冲器的输入端、输出端;
所述第二延时检测单元用于对对应的所述驱动电路的控制信号和命令信号的延时进行检测,并将检测值反馈给所述第三延时补偿单元,以使所述第三延时补偿单元根据所述检测值对所述驱动电路的驱动延时进行补偿。
较佳地,还包括:串行通讯线,所述串行通讯线与所述驱动电路组一一对应;
所述控制电路、所述串行通讯线、所述回读线组成一个回路,每组的所述驱动电路串接在所述串行通信线中;
所述第一延时检测单元或所述第二延时检测单元串接于所述串行通讯线中,
较佳地,还包括:第四延时补偿单元、第五延时补偿单元;其中,
所述第四延时补偿单元设置于所述控制电路中;
所述第五延时补偿单元与所述驱动电路一一对应,所述第五延时补偿单元设置于所述驱动电路中;
所述第四延时补偿单元、所述第五延时补偿单元被配置为能够共同对所述驱动电路的驱动延时进行补偿。
根据本发明的第二方面,本发明提供一种具有分布式驱动线路的显示设备,其包括:分布式驱动电路、发光二级管区域阵列;
所述发光二级管区域阵列包括:多组发光二级管区域,每组所述发光二级管区域包括:多个发光二级管专区;
所述发光二级管专区与所述驱动电路一一对应;
所述分布式驱动电路为上述任一项所述的分布式驱动电路。
本发明提供的分布式驱动电路及具有该分布式驱动电路的显示设备,通过控制命令接口与每组驱动电路组的多个驱动电路之间为串行连接,即数据控制线不再为总线,与地线不再冲突,不需要跳线的帮助,就能很好地支撑单层PCB;另外,省略了跳线的使用,既能避免由于跳线松动、老化出现的可靠性差的问题,又能节省成本呢。
由于控制电路需要控制大量的驱动电路,因此会存在驱动能力不足的问题,影响调光数据信号质量;本发明的一可选方案中,通过在控制命令线中设置缓冲部,可以增强控制电路的驱动能力,能够确保在驱动大量驱动电路的情况下调光数据信号质量。
本发明的一可选方案中,通过将缓冲器内置在各个驱动电路中,在驱动大量驱动电路的情况下,降低了控制电路的驱动能力要求;另外,内置在驱动电路中,避免了需要单独安装额外的缓冲器,进一步降低了成本。
本发明的一可选方案中,通过延时补偿单元,对驱动电路的驱动延时进行补偿,可以将每组驱动电路组的各个驱动电路之间的驱动延时缩短,几乎同时驱动,进一步提高了调光数据信号质量。
本发明的一可选方案中,通过延时检测单元对驱动电路的延时进行检测,将检测值反馈给延时补偿单元,这样延时补偿更精准,调光数据信号质量更高。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。
图1为现有技术的驱动电路的示意图;
图2为本发明的一实施例的分布式驱动电路的示意图;
图3为本发明的一实施例的驱动电路的示意图;
图4为本发明的一较佳实施例的分布式驱动电路的示意图;
图5为本发明的另一较佳实施例的分布式驱动电路的示意图;
图6为本发明的另一较佳实施例的分布式驱动电路的示意图;
图7为本发明的另一较佳实施例的分布式驱动电路的示意图;
图8为本发明的一实施例的控制电路进行延时补偿处理的示意图;
图9为本发明的另一较佳实施例的分布式驱动电路的示意图;
图10为本发明的另一较佳实施例的驱动电路的示意图;
图11为本发明的另一较佳实施例的驱动电路的示意图;
图12为本发明的一实施例的具有分布式驱动电路的显示装置的电路图;
附图标记说明:
1-控制电路,
101-控制命令接口;
2-驱动电路,
3-回读线,
4-串行通讯线,
5-缓冲器,
6-第一延时补偿单元,
7-第二延时补偿单元,
8-第一延时检测单元,
9-第三延时补偿单元,
10-第二延时检测单元,
11-第四延时补偿单元,
12-第五延时补偿单元,
13-发光二级管专区。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
在本发明说明书的描述中,需要理解的是,术语“上部”、“下部”、“上端”、“下端”、“下表面”、“上表面”等指示的方位或位置关系 为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
在本发明说明书的描述中,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。
在本发明的描述中,“多个”的含义是多个,例如两个,三个,四个等,除非另有明确具体的限定。
在本发明说明书的描述中,除非另有明确的规定和限定,术语“连接”等术语应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或成一体;可以是机械连接,也可以是电连接或可以互相通讯;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本发明中的具体含义。
下面以具体地实施例对本发明的技术方案进行详细说明。下面这几个具体的实施例可以相互结合,对于相同或相似的概念或过程可能在某些实施例不再赘述。
一实施例中,提供一种分布式驱动电路,其包括:控制电路1、驱动电路阵列、控制命令接口101、回读线3,请参考图2。其中,驱动电路阵列包括:多组驱动电路组,每组驱动电路组包括:多个驱动电路2(Driver)。驱动电路可以被布置为二维阵列(例如,以行和列布置)。控制电路1用于向驱动电路2发送控制信号和命令信号。控制命令接口101设置于控制电路1,控制命令接口101用于将控制电路发送的控制信号和命令信号输出,以传输到驱动电路2。驱动电路2用于响应于控制信号对发光二级管进行驱动,还用于响应于命令信号向控制电路1产生回读数据。回读线3用于将驱动电路2产生的回读数据传输回控制电路1。
其中,控制命令接口101与每组驱动电路组的多个驱动电路2之间为串行连接,如图2中的Dim1…DimM,从每个驱动电路2中穿过,请参考图3。这样,控制命令接口101与各个驱动电路2之间的连接线不再为总线,只有 地一根总线,不再需要跳线的帮助,也能布置在单层PCB上,既节省了成本,又提高了电路的可靠性。
一实施例中,为了方便回读数据的传输,分布式驱动电路还包括:串行通讯线4(Comm1…CommM),请参考图2。串行通讯线4与驱动电路组一一对应。控制电路1、串行通讯线4、回读线3组成一个回路,串行通讯线4将每组驱动电路组的驱动电路彼此串联起来,以将每个驱动电路2的回读数据传输到回读线3,然后通过回读线3将回读数据传输回控制电路1。
一实施例中,为了增强控制电路1的驱动能量,还可以包括:缓冲部,缓冲部连接在控制命令线中,用于增强控制电路的驱动能力。
一实施例中,缓冲部可以设置在控制电路与驱动电路之间的连接线上。具体地,缓冲部包括:多个缓冲器5(Buffer),缓冲器5与驱动电路组一一对应;缓冲器5可以设置于控制电路与每组驱动电路组的第一个驱动电路2之间,请参考图4。
一实施例中,缓冲部可以内置在驱动电路中。具体地,缓冲部包括:多个缓冲器5(Buffer),缓冲器5与驱动电路2一一对应;缓冲器5设置于驱动电路2中,请参考图5。
一实施例中,由于控制命令接口与驱动电路之间为串行连接,那么距离控制电路远的驱动电路接收到信号的时间肯定比距离控制电路近的驱动电路接收到信号的时间长,因此,为了提高调光质量,可以控制驱动电路的驱动延时小于预设值。驱动延时越小,发光二级管越同步,调光质量越好。
由于设置了缓冲部的分布式驱动电路延时更长,下面对设置有缓冲部的分布式驱动电路的延时补偿进行描述。虽然不设置缓冲部的分布式驱动电路延时相对较小,但是也可以进行延时补偿,延时补偿也可以参照有缓冲部的示例进行设置。
一实施例中,在设置了缓冲器的基础上,为了减小延时,可以通过缓冲器的选择来对延时进行控制。优选地,可以通过对延时进行补偿来缩短延时,效果更好,延时补偿可以通过多种方式来实现,下面结合具体实例进行详细描述。
其中,延时补偿可以设置在控制电路中,由控制电路对每个驱动电路的延时进行补偿。不同实施例中,延时补偿也可以设置在驱动电路中,每个驱 动电路对自身的延时进行补偿。不同实施例中,延时补偿还可以同时设置在控制电路和驱动电路中,由两者共同结合完成延时的补偿,具体地控制电路和驱动电路的补偿比例可以根据需要进行不同的设置。
一实施例中,在缓冲部设置于控制电路与驱动电路之间的连接线的基础上,延时补偿单元可以设置于控制电路中。具体地,分布式驱动电路还包括:第一延时补偿单元6,第一延时补偿单元6设置于控制电路1中;第一延时补偿单元6用于对驱动电路的驱动延时进行补偿,请参考图6。
一实施例中,在缓冲部内置于驱动电路的基础上,延时补偿单元也可以设置于控制电路中。具体地,分布式驱动电路还包括:第二延时补偿单元7,第二延时补偿单元7设置于控制电路1中;第二延时补偿单元7用于对驱动电路的驱动延时进行补偿,请参考图7。
一实施例中,对于延时补偿单元设置于控制电路中的情况,具体可以通过如下方式实现:控制电路1可以提前为每一个驱动电路2预设一个Tdelay_max_unit,请参考图8,每个驱动电路的实际延时(delay)都要小于该值,每个驱动电路根据自身的设备编号(device ID N)来计算需要补偿的时间。
一实施例中,在第二延时补偿单元的基础上,还可以包括:第一延时检测单元8,第一延时检测单元8与驱动电路一一对应。第一延时检测单元8用于对对应的驱动电路的控制信号和命令信号的延时进行检测,并将检测值反馈给第二延时补偿单元7,以使第二延时补偿单元7根据检测值对驱动电路的驱动延时进行补偿,请参考图9。
一实施例中,第一延时检测单元8可以串接于串行通讯线中,请参考图9,这样可以将其检测值通过串行通讯线传输到回读线,然后通过回读线线将检测值反馈给控制电路。
延时检测单元可以对延时进行实时检测,延时补偿更精准,进而调光质量更好。当然,也可以不设置延时检测单元,延时补偿单元的延时补偿可以根据经验进行设置,可以为预设的值。
一实施例中,在缓冲部内置于驱动电路的基础上,延时补偿单元也可以设置于驱动电路中。具体地,分布式驱动电路还包括:第三延时补偿单元9,第三延时补偿单元9与驱动电路2一一对应,请参考图10。第三延时补偿单 元9用于对对应的驱动电路的驱动延时进行补偿。
一实施例中,在第三延时补偿单元的基础上,还可以包括:第二延时检测单元10,第二延时检测单元10与驱动电路2一一对应;第二延时检测单元10的输出端与第三延时补偿单元的输入端相连,所述第二延时检测单元的输入端分别连接缓冲器的输入端、输出端,请参考图10。第二延时检测单元用于对对应的驱动电路的控制信号和命令信号的延时进行检测,并将检测值反馈给第三延时补偿单元,以使第三延时补偿单元根据检测值对驱动电路的驱动延时进行补偿。
一实施例中,第二延时检测单元10还串接于串行通讯线4中,请参考图10,这样可以将其检测值通过串行通讯线传输到回读线,然后通过回读线将检测值反馈给控制电路。
其中,串行通讯线还可以用于传输寻址信号,方便控制电路在寻址模式期间将地址分配给驱动电路。
一实施例中,延时补偿可以同时设置在控制电路和驱动电路中。具体地,分布式驱动电路还包括:第四延时补偿单元11、第五延时补偿单元12,请参考图11。其中,第四延时补偿单元11设置于控制电路1中;第五延时补偿单元12与驱动电路2一一对应,第五延时补偿单元12设置于驱动电路2中。第四延时补偿单元11、第五延时补偿单元12被配置为能够共同对驱动电路2的驱动延时进行补偿。
一实施例中,提供一种具有分布式驱动电路的显示装置,其包括:分布式驱动电路、发光二级管区域阵列。其中,发光二级管区域阵列包括:多组发光二级管区域,每组发光二级管区域包括:多个发光二级管专区13(LED Zone);发光二级管专区13与驱动电路2一一对应,请参考图12。分布式驱动电路为上述任一实施例所述的分布式驱动电路。
显示装置还可以包括:VLED线(例如:VLED_1…VLED_M)、电力通信线Pwr(例如:Pwr1…PwrM)和地线Gnd。VLED线用于向发光二级管专区提供电力,电离通信线Pwr用于向驱动电路提供电力,Gnd线为发光二级管专区和驱动电路2提供接地的路径。
在本说明书的描述中,参考术语“一种实施方式”、“一种实施例”、“具体实施过程”、“一种举例”等的描述意指结合该实施例或示例描述 的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中,对上述术语的示意性表述不一定指的是相同的实施例或示例。而且,描述的具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (13)

  1. 一种分布式驱动电路,其特征在于,包括:控制电路、驱动电路阵列、控制命令接口、回读线;其中,
    所述驱动电路阵列包括:多组驱动电路组,每组所述驱动电路组包括:多个驱动电路;
    所述控制电路用于向所述驱动电路发送控制信号和命令信号;
    所述控制命令接口设置于所述控制电路,所述控制命令接口用于将所述控制电路发送的控制信号和命令信号输出,以传输到所述驱动电路;
    所述控制命令接口与每组所述驱动电路组的多个所述驱动电路之间为串行连接;
    所述驱动电路用于响应于所述控制信号对发光二级管进行驱动,还用于响应于所述命令信号向所述控制电路产生回读数据;
    所述回读线用于将所述驱动电路产生的回读数据传输回所述控制电路。
  2. 根据权利要求1所述的分布式驱动电路,其特征在于,还包括:串行通讯线,所述串行通讯线与所述驱动电路组一一对应;
    所述控制电路、所述串行通讯线、所述回读线组成一个回路,每组的所述驱动电路串接在所述串行通信线中。
  3. 根据权利要求1所述的分布式驱动电路,其特征在于,还包括:缓冲部,所述缓冲部连接在所述控制命令线中,所述缓冲部用于增强所述控制电路的驱动能力。
  4. 根据权利要求3所述的分布式驱动电路,其特征在于,所述缓冲部包括:多个缓冲器,所述缓冲器与所述驱动电路组一一对应;
    所述缓冲器设置于所述控制电路与每组所述驱动电路组的第一个所述驱动电路之间。
  5. 根据权利要求3所述的分布式驱动电路,其特征在于,所述缓冲部包括:多个缓冲器,所述缓冲器与所述驱动电路一一对应;
    所述缓冲器设置于所述驱动电路中。
  6. 根据权利要求3所述的分布式驱动电路,其特征在于,所述驱动电路的驱动延时小于预设值。
  7. 根据权利要求4所述的分布式驱动电路,其特征在于,还包括:第一 延时补偿单元,所述第一延时补偿单元设置于所述控制电路中;
    所述第一延时补偿单元用于对所述驱动电路的驱动延时进行补偿。
  8. 根据权利要求5所述的分布式驱动电路,其特征在于,还包括:第二延时补偿单元,所述第二延时补偿单元设置于所述控制电路中;
    所述第二延时补偿单元用于对所述驱动电路的驱动延时进行补偿。
  9. 根据权利要求8所述的分布式驱动电路,其特征在于,还包括:第一延时检测单元,所述第一延时检测单元与所述驱动电路一一对应;
    所述第一延时检测单元用于对对应的所述驱动电路的控制信号和命令信号的延时进行检测,并将检测值反馈给所述第二延时补偿单元,以使所述第二延时补偿单元根据所述检测值对所述驱动电路的驱动延时进行补偿。
  10. 根据权利要求5所述的分布式驱动电路,其特征在于,还包括:第三延时补偿单元,所述第三延时补偿单元与所述驱动电路一一对应;
    所述第三延时补偿单元用于对对应的所述驱动电路的驱动延时进行补偿。
  11. 根据权利要求10所述的分布式驱动电路,其特征在于,还包括:第二延时检测单元,所述第二延时检测单元与所述驱动电路一一对应;
    所述第二延时检测单元的输出端与所述第三延时补偿单元的输入端相连,所述第二延时检测单元的输入端分别连接所述缓冲器的输入端、输出端;
    所述第二延时检测单元用于对对应的所述驱动电路的控制信号和命令信号的延时进行检测,并将检测值反馈给所述第三延时补偿单元,以使所述第三延时补偿单元根据所述检测值对所述驱动电路的驱动延时进行补偿。
  12. 根据权利要求5所述的分布式驱动电路,其特征在于,还包括:第四延时补偿单元、第五延时补偿单元;其中,
    所述第四延时补偿单元设置于所述控制电路中;
    所述第五延时补偿单元与所述驱动电路一一对应,所述第五延时补偿单元设置于所述驱动电路中;
    所述第四延时补偿单元、所述第五延时补偿单元被配置为能够共同对所述驱动电路的驱动延时进行补偿。
  13. 一种具有分布式驱动电路的显示装置,其特征在于,包括:分布式驱动电路、发光二级管区域阵列;
    所述发光二级管区域阵列包括:多组发光二级管区域,每组所述发光二 级管区域包括:多个发光二级管专区;
    所述发光二级管专区与所述驱动电路一一对应;
    所述分布式驱动电路为权利要求1至12任一项所述的分布式驱动电路。
PCT/CN2023/089714 2022-08-16 2023-04-21 分布式驱动电路及具有该分布式驱动电路的显示设备 WO2024037017A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202210986107.2A CN115410522A (zh) 2022-08-16 2022-08-16 分布式驱动电路及具有该分布式驱动电路的显示设备
CN202210986107.2 2022-08-16

Publications (1)

Publication Number Publication Date
WO2024037017A1 true WO2024037017A1 (zh) 2024-02-22

Family

ID=84160487

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2023/089714 WO2024037017A1 (zh) 2022-08-16 2023-04-21 分布式驱动电路及具有该分布式驱动电路的显示设备

Country Status (2)

Country Link
CN (1) CN115410522A (zh)
WO (1) WO2024037017A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115410522A (zh) * 2022-08-16 2022-11-29 华源智信半导体(深圳)有限公司 分布式驱动电路及具有该分布式驱动电路的显示设备

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1892894A (zh) * 2005-06-15 2007-01-10 秦蒙达股份公司 用于半导体存储器芯片和存储系统的高速接口电路
CN102800279A (zh) * 2011-05-25 2012-11-28 深圳市明微电子股份有限公司 显示驱动电路及其系统
CN107146571A (zh) * 2017-06-28 2017-09-08 苏州大学 基于k64‑mcu的多功能led幕墙控制系统
CN109887462A (zh) * 2019-04-08 2019-06-14 大连集思特科技有限公司 一种单线制led显示屏控制系统
CN114283740A (zh) * 2020-09-18 2022-04-05 华源智信半导体(深圳)有限公司 显示装置和用于显示装置的驱动器电路
CN115410522A (zh) * 2022-08-16 2022-11-29 华源智信半导体(深圳)有限公司 分布式驱动电路及具有该分布式驱动电路的显示设备

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1892894A (zh) * 2005-06-15 2007-01-10 秦蒙达股份公司 用于半导体存储器芯片和存储系统的高速接口电路
CN102800279A (zh) * 2011-05-25 2012-11-28 深圳市明微电子股份有限公司 显示驱动电路及其系统
CN107146571A (zh) * 2017-06-28 2017-09-08 苏州大学 基于k64‑mcu的多功能led幕墙控制系统
CN109887462A (zh) * 2019-04-08 2019-06-14 大连集思特科技有限公司 一种单线制led显示屏控制系统
CN114283740A (zh) * 2020-09-18 2022-04-05 华源智信半导体(深圳)有限公司 显示装置和用于显示装置的驱动器电路
CN115410522A (zh) * 2022-08-16 2022-11-29 华源智信半导体(深圳)有限公司 分布式驱动电路及具有该分布式驱动电路的显示设备

Also Published As

Publication number Publication date
CN115410522A (zh) 2022-11-29

Similar Documents

Publication Publication Date Title
WO2024037017A1 (zh) 分布式驱动电路及具有该分布式驱动电路的显示设备
JP7250375B2 (ja) 駆動制御電気回路、駆動制御チップ、集積封止デバイス、表示システム及びスパース駆動の方法
WO2019000634A1 (zh) 显示面板的驱动电路、驱动电路的驱动方法和显示装置
US20180210261A1 (en) Liquid crystal panel drive circuit and liquid crystal display device
WO2021103138A1 (zh) 一种驱动电路及液晶显示装置
WO2018113296A1 (zh) 驱动电路架构及显示装置
CN105788521B (zh) Led显示屏系统以及状态检测方法
JPWO2017038083A1 (ja) 画像表示装置
CN115273762B (zh) 驱动系统、显示系统及显示装置
WO2022223030A1 (zh) 背光驱动装置、图像显示设备和背光驱动方法
WO2021068844A1 (zh) 显示面板的驱动电路、显示面板及显示装置
WO2022007157A1 (zh) 驱动电路、lcd显示屏以及电子设备
CN107632477B (zh) 阵列基板及其应用的显示面板
CN213781445U (zh) 柔性扁平电缆、显示模组和显示装置
WO2024037016A1 (zh) 分布式驱动电路及控制方法、显示设备
CN112908232A (zh) Led多分区背光故障检测系统及故障判断方法
US20230386420A1 (en) Light source driving circuit and communication device for display system
WO2023093138A1 (zh) 背光模组以及显示设备
KR20110033574A (ko) Rgb 감마 전압 생성 장치 및 이를 이용한 디스플레이 구동장치
WO2019085489A1 (zh) 一种显示屏、像素驱动方法和显示装置
KR20230103685A (ko) 타일링 표시장치
CN112927655B (zh) 背光装置及驱动方法
CN115394267B (zh) 显示系统
US20240231152A1 (en) Backlight module and display device
CN111583844A (zh) 一种显示面板及其驱动方法、显示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 23853926

Country of ref document: EP

Kind code of ref document: A1