WO2024022300A1 - 电阻结构及其制作方法 - Google Patents

电阻结构及其制作方法 Download PDF

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Publication number
WO2024022300A1
WO2024022300A1 PCT/CN2023/108960 CN2023108960W WO2024022300A1 WO 2024022300 A1 WO2024022300 A1 WO 2024022300A1 CN 2023108960 W CN2023108960 W CN 2023108960W WO 2024022300 A1 WO2024022300 A1 WO 2024022300A1
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Prior art keywords
layer
metal
electrode
metal layer
area
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Application number
PCT/CN2023/108960
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English (en)
French (fr)
Inventor
江显伟
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钧崴电子科技股份有限公司
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Priority to US18/503,365 priority Critical patent/US20240071654A1/en
Publication of WO2024022300A1 publication Critical patent/WO2024022300A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C1/00—Details
    • H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C3/00—Non-adjustable metal resistors made of wire or ribbon, e.g. coiled, woven or formed as grids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C1/00—Details
    • H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
    • H01C1/142—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being coated on the resistive element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C13/00—Resistors not provided for elsewhere
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/02—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistors with envelope or housing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/006—Thin film resistors

Definitions

  • the present application relates to the technical field of electronic components, and in particular to a resistor structure and a manufacturing method thereof.
  • adjusting the resistance value of the resistive component can be achieved by changing the resistor area, length, material, etc., or by changing the overall volume of the resistive component.
  • the resistor element corresponding to the resistance value may not be used normally due to size factors such as the area and thickness of the resistor, resulting in inaccurate voltage or current.
  • the main purpose of this application is to provide a resistor structure and a manufacturing method thereof, aiming to solve the technical problem in the prior art of how to reduce the thickness of the resistor element when the resistance value remains unchanged.
  • this application proposes a resistance structure, which includes: a substrate;
  • a metal layer provided on the substrate including a first metal region and a second metal region, the first metal region being located in a non-electrode region on the second metal region;
  • a first insulating layer and an electrode layer are provided on the metal layer, the first insulating layer covers the non-electrode area, and the electrode layer is arranged in the electrode area on the second metal area.
  • the electrode layer includes: a first rack metal layer and a second rack metal layer;
  • the electrode area includes a first electrode area and a second electrode area respectively provided at both ends of the upper surface of the second metal area;
  • the first rack plating metal layer is disposed in the first electrode area, and the second rack plating metal layer is disposed in the second electrode area.
  • the thickness of the electrode layer is greater than the thickness of the first metal region and the first insulating layer.
  • the first rack plating metal layer and the second rack plating metal layer both include: a copper layer with a first preset thickness
  • a nickel layer of a second predetermined thickness is provided on the copper layer
  • the resistive structure further includes a contact layer disposed on the substrate, and the metal layer is disposed on the contact layer.
  • a second insulating layer is further provided on the first insulating layer.
  • the first insulating layer and the second insulating layer are composed of organic materials, inorganic materials, or a combination of organic materials and inorganic materials.
  • the sum of the thicknesses of the first metal region, the first insulating layer and the second insulating layer is less than or equal to the thickness of the electrode layer.
  • the resistance structure manufacturing method includes:
  • a metal layer is provided on the substrate, and the metal layer is etched to obtain a convex metal layer;
  • a first insulating layer is provided on the non-electrode area of the convex metal layer
  • An electrode layer is rack-plated in the electrode area of the convex metal layer.
  • the step of arranging a rack plating electrode layer in the electrode area of the convex metal layer it further includes;
  • the metal layer is adjusted
  • a second insulation layer is provided on the adjusted metal layer.
  • the present application provides a resistance structure and a manufacturing method thereof.
  • the resistance structure includes: a substrate; and a metal layer provided on the substrate.
  • the metal layer includes a first metal area and a second metal area.
  • the first metal layer The area is located in the non-electrode area on the second metal area; the metal layer is provided with a first insulating layer and an electrode layer, the first insulating layer covers the non-electrode area, and the electrode layer is provided on the in the electrode area on the second metal area.
  • the metal layer by arranging the metal layer into a first metal region and a second metal region, the first metal region is located in the non-electrode region on the second metal region, thereby reducing the thickness of both ends of the metal layer, and then The electrode layers are arranged at both ends of the metal layer to reduce the overall thickness of the resistance structure of the resistance element without changing the resistance value of the resistance element.
  • Figure 1 is a schematic structural diagram of the first embodiment of the resistor structure proposed in this application.
  • Figure 2 is a schematic structural diagram of a second embodiment of the resistor structure proposed in this application.
  • Figure 3 is a top view of the second embodiment of the resistor structure proposed in this application.
  • Figure 4 is a schematic structural diagram of a third embodiment of the resistor structure proposed in this application.
  • Figure 5 is a top view of the third embodiment of the resistor structure proposed in this application.
  • Figure 6 is a schematic flow chart of the first embodiment of the resistor structure manufacturing method of the present application.
  • FIG. 7 is a schematic flowchart of a second embodiment of a resistance structure manufacturing method according to the present application.
  • Figure 1 is a schematic structural diagram of a first embodiment of the resistor structure proposed in this application. Based on Figure 1, a first embodiment of the resistor structure of the present application is proposed.
  • the resistive structure includes: substrate 1;
  • a first insulating layer 4 and an electrode layer 5 are provided on the metal layer, the first insulating layer 4 covers the non-electrode area, and the electrode layer 5 is arranged in the electrode area on the second metal area 32 .
  • the substrate 1 is the base for carrying the entire resistive structure.
  • the substrate 1 may be composed of organic materials, inorganic materials, or a mixture of organic materials and inorganic materials, such as ceramic substrates, glass fiber substrates, etc.
  • the resistive structure further includes a contact layer 2 provided on the substrate 1 , and the metal layer 3 is provided on the contact layer 2 .
  • the contact layer 2 can be used to fix the metal layer 3 on the substrate 1 . Without the contact layer 2 , the metal layer 3 cannot be directly arranged on the substrate 1 .
  • a certain amount of adhesive can be used, and the adhesive is the contact layer between the metal and the glass plate.
  • the contact layer 2 can be made of epoxy or acrylic materials, which can make the metal layer 3 and the substrate 1 better adhered.
  • the metal layer 3 is a conductive structure layer, and the specific resistance value of the resistance structure is directly related to the size and constituent materials of the metal layer 3 .
  • the material making up the metal layer 3 has a certain resistivity, so that the resistive structure exhibits resistivity.
  • the metal layer 3 may be composed of pure metal or metal alloy, such as copper, silver, gold and other pure metal materials or alloys including copper, silver, manganese, gold and other materials.
  • the metal layer 3 may be an integral structure composed of the first metal region 31 and the second metal region 32 .
  • the area of the first metal region 31 is smaller than the area of the second metal region 32 .
  • the second metal area 32 is provided with an electrode area, and the electrode area is an area used to connect electrode leads to connect the resistance structure to other components.
  • the electrode areas are located at both ends of the second metal area 32 .
  • An electrode layer 5, that is, an electrode lead, can be provided in the electrode area.
  • the electrode layer 5 is a structure for connecting the metal layer 3 and external components. In the specific setting process, the two ends of the entire metal layer 3 can be etched to remove part of the metal at both ends, and then the electrode layer 5 is placed on the corresponding second metal region 32 and a certain metal part is etched away.
  • the electrode layer 5 can be disposed in the electrode area by rack plating.
  • the electrode layer 5 may be composed of pure metal materials or alloy materials, and the composition material of the electrode layer 5 may be the same as the composition material of the metal layer 3 .
  • multiple electrode layers may also be provided in the electrode area of the metal layer 3, for example, two electrode layers may be provided at one end to form a four-electrode structure.
  • the second metal region 32 includes a non-electrode region in addition to the electrode region, and the first metal region 31 is located in the non-electrode region. There is a certain distance between the first metal region 31 in the non-electrode region and the electrode layer disposed in the electrode region, and there is no contact between them. Among them, the first metal area 31 and the second metal area 32 form a metal layer 3 with a convex structure.
  • the first insulating layer 4 is provided on the upper surface of the non-electrode area on the second metal area 32 .
  • the first insulating layer 4 can effectively isolate the metal layer 3 from the external environment, thereby preventing the metal layer 3 from being affected by the external environment and protecting the metal layer 3 .
  • the first insulating layer 4 can be composed of organic materials, inorganic materials, or a mixture of organic materials and inorganic materials.
  • the organic material can be solder mask ink
  • the inorganic material can be silicon dioxide, gallium nitride, nitrogen, etc.
  • the mixed material can be a stack of organic materials and inorganic materials, such as a layer of silicon dioxide on the solder mask ink, or a layer of solder mask ink on the silicon dioxide.
  • a resistance structure in this embodiment, includes: a substrate; and a metal layer provided on the substrate.
  • the metal layer includes a first metal region and a second metal region.
  • the first metal region Located in the non-electrode area on the second metal area; a first insulating layer and an electrode layer are provided on the metal layer, the first insulating layer covers the non-electrode area, and the electrode layer is provided on the within the electrode area on the second metal area.
  • the metal layer by arranging the metal layer into a first metal region and a second metal region, the first metal region is located in the non-electrode region on the second metal region, thereby reducing the thickness of both ends of the metal layer, and then The electrode layers are arranged at both ends of the metal layer to reduce the overall thickness of the resistance structure of the resistance element without changing the resistance value of the resistance element.
  • Figure 2 is a schematic structural diagram of a second embodiment of a resistance structure proposed in this application
  • Figure 3 is a top view of a second embodiment of a resistance structure proposed in this application. Based on the above first embodiment of the resistive structure, a second embodiment of the resistive structure of the present application is proposed.
  • the electrode layer 5 includes: a first rack metal layer and a second rack metal layer;
  • the electrode region 5 includes a first electrode region and a second electrode region respectively provided at both ends of the upper surface of the second metal region 32;
  • the first rack plating metal layer is disposed in the first electrode area, and the second rack plating metal layer is disposed in the second electrode area.
  • the electrode layer includes two rack plating metal layers.
  • the rack plating metal layer is a metal layer provided in the electrode area of the second metal area 32 by rack plating.
  • the rack-plated metal layer can be connected to other components through wires.
  • the second metal area 32 should also include two electrode areas, namely a first electrode area and a second electrode area, wherein a rack plating metal layer can be rack-plated in both the first electrode area and the second electrode area.
  • the first electrode area and the second electrode area should be disposed at both ends of the second metal area 32 respectively, and there is a certain interval between the first electrode area, the second electrode area and the first metal area 31, which can avoid electrode
  • the resistivity of the entire metal layer 3 can also be collected to avoid misdetection of the resistance value of the resistive structure.
  • the resistance value collected through the electrode layer 5 is the resistance value on the metal layer 3 between the two electrode layers.
  • the resistance value detected is not the entire metal layer 3. actual resistance value.
  • the thickness of the electrode layer 5 is greater than or equal to the thickness of the first metal region 31 and the first insulating layer 4 .
  • the electrode layer 5 needs to be drawn out to establish a connection between the resistive structure and other components. Therefore, the thickness of the electrode layer 5 disposed on the second metal region 32 should be greater than or equal to the sum of the thicknesses of the first metal region 31 and the first insulating layer 4 , so that the electrode layer 5 protrudes on the resistive structure.
  • the first rack plating metal layer and the second rack plating metal layer both include: a copper layer Cu with a first preset thickness;
  • a nickel layer Ni of a second predetermined thickness is provided on the copper layer Cu;
  • a tin layer Sn with a third predetermined thickness is provided on the nickel layer Ni.
  • the first preset thickness is a preset thickness of the copper layer Cu, and the thickness of the copper layer Cu may be the same as the thickness of the first metal region 31 .
  • the tin layer Sn is the material layer provided on the uppermost layer of the rack plating metal layer. Since the tin material has certain oxidation resistance, if the tin layer Sn is directly exposed to the external environment, the external environment will not affect the structure of the rack plating metal layer.
  • the third preset thickness is a preset thickness of the tin layer Sn. In the specific setting, the thickness of the tin layer Sn only needs to meet the wear requirements, so the third preset thickness of the tin layer Sn can be far It is much smaller than the first preset thickness of the copper layer Cu.
  • the tin layer Sn can also be directly disposed on the copper layer Cu. Due to the large material difference between tin and copper, the adhesion between the two is poor, which may cause resistance. The detection of the resistance value of the structure is not accurate, and may also cause problems with the resistance power coefficient. Therefore, in practical applications, a layer of nickel layer Ni can be set between the copper layer Cu and the tin layer Sn. The nickel layer Ni can better bond the copper layer Cu and the tin layer Sn together, and can also avoid metal hanging layers. The problem of resistor power coefficient generated within.
  • the second preset thickness is the preset thickness of the nickel layer Ni. Since the nickel layer Ni serves to provide better adhesion between the copper layer Cu and the tin layer Sn, there is no need to set For a thicker nickel layer Ni, the second predetermined thickness of the nickel layer Ni may be smaller than the third predetermined thickness of the tin layer Sn. For example, the thickness of the copper layer Cu and the first metal region 31 can be set to 80 microns, while the thickness of the nickel layer Ni is 5 microns, and the thickness of the tin layer Sn is 10 microns.
  • Figure 4 is a schematic structural diagram of a third embodiment of a resistance structure proposed in this application
  • Figure 5 is a top view of a second embodiment of a resistance structure proposed in this application. Based on the above second embodiment, a third embodiment of the resistor structure of the present application is proposed.
  • a second insulating layer 6 is also provided on the first insulating layer 4 .
  • the specific resistance value of the resistor structure still needs to be detected.
  • the process of adjusting the metal layer 3 in the resistor structure may be involved. For example, during the etching process of metal layer 3, there is a certain amount of under-etching or over-etching, resulting in a certain difference between the resistance value of the resistor structure and the actual required resistance value. In this case, metal layer 3 needs to be adjusted, thereby Make the resistance value of the resistor structure meet the requirements.
  • the structure of the first metal region 31 can usually be fine-tuned directly.
  • the first insulating layer 4 is provided on the first metal region 31, the first metal region 31 is When the area 31 is adjusted, the structure of the first insulating layer 4 will be damaged.
  • a second insulating layer 6 can also be provided on the first insulating layer 4, thereby effectively preventing the first metal area 31 from being exposed to the external environment. parts are exposed to the outside environment.
  • the structure and composition of the second insulating layer 6 can be the same as the first insulating layer 4, or of course different.
  • the second insulating layer 6 can prevent the first electrode region 31 on the metal layer 3 from being oxidized by the external environment. It can be destroyed by processes such as nitriding.
  • the first insulating layer 4 and the second insulating layer 6 can also be composed of solder resist ink.
  • the sum of the thicknesses of the first metal region 31 , the first insulating layer 4 and the second insulating layer 6 can be set to be equal to the thickness of the electrode layer. 5 thicknesses are the same.
  • the electrode layer 5, the first metal region 31, the first insulating layer 4 and the second insulating layer 6 are all necessary structures.
  • the electrode layer 5 is disposed in the electrode region on the second metal region 32 , and the first metal region 31 , the first insulating layer 4 and the second insulating layer 6 are sequentially disposed in the non-electrode region of the second metal region 32 . Setting the sum of the thicknesses of the first metal region 31 , the first insulating layer 4 and the second insulating layer 6 to be the same as the thickness of the electrode layer 5 can reduce the thickness of the resistance structure while improving other properties of the resistance structure. performance.
  • the thickness of the electrode layer 5 when the thickness of the electrode layer 5 is greater than the sum of the thicknesses of the first metal region 31 , the first insulating layer 4 and the second insulating layer 6 , the thickness of the first insulating layer 4 or the second insulating layer 6 can be increased, so that Without changing the overall thickness of the resistor structure, the protection of the metal layer 3 is further enhanced; and when the thickness of the electrode layer 5 is less than the sum of the thicknesses of the first metal region 31, the first insulating layer 4 and the second insulating layer 6 In this case, the thickness of the copper layer Cu in the electrode layer 5 can be appropriately adjusted to increase the stability of the resistance structure measurement.
  • the thickness of the second metal region 32 may be 120 microns
  • the thickness of the first metal region 31 may be 80 microns
  • the thickness of the copper layer Cu may be 80 microns
  • the thickness of the nickel layer Ni may be 5 microns
  • the thickness of the tin layer Sn can be 10 microns
  • the thickness of the first insulating layer 4 disposed on the first metal region 31 can be set to 5um
  • the thickness of the second insulating layer 6 may be 85 microns
  • the thickness of the second insulating layer 6 may be 10 microns.
  • the thickness of the rack copper layer in the electrode area can be adjusted.
  • the thickness of the rack-plated copper layer Cu in the electrode area on the etched metal layer 3 can be adjusted.
  • the thickness of the copper layer Cu in the rack-plated electrode layer 5 should be greater than the thickness of the first metal region 31.
  • the overall thickness of the electrode layer 5 can also be greater than the first metal region 31, the first insulating layer 4 and the first metal region 31.
  • FIG. 6 is a schematic flowchart of a first embodiment of a resistor structure manufacturing method according to the present application.
  • This application also provides a resistance structure manufacturing method based on the resistance structure.
  • the resistance structure manufacturing method includes:
  • Step S10 Obtain the base.
  • the substrate is the bottom for carrying the entire resistive structure.
  • the substrate may be composed of organic materials, inorganic materials, or a mixture of organic materials and inorganic materials, such as ceramic substrates, glass fiber substrates, etc.
  • a contact layer may also be provided on the substrate.
  • the contact layer can be used to fix the metal layer on the substrate.
  • a certain amount of adhesive can be used, and the adhesive is between the metal and the glass plate. contact layer.
  • the contact layer can be composed of epoxy or acrylic materials, which can make the metal layer and the substrate better adhered.
  • a connecting layer can be provided on the substrate.
  • Step S20 Arrange a metal layer on the contact base, and etch the metal layer to obtain a convex metal layer.
  • the metal layer it is also necessary to determine whether a contact layer is set on the substrate. If the contact layer is not set, the metal layer can be set directly on the base; if the contact layer is set, it is necessary to A metal layer is placed on the contact layer.
  • the metal layer is a conductive structure layer, and the specific resistance value of the resistance structure is directly related to the size and constituent materials of the metal layer.
  • the materials that make up the metal layer have a certain resistivity, making the resistive structure appear resistive.
  • the metal layer may be composed of pure metal or metal alloy, such as pure metal materials such as copper and silver or alloys including copper, silver, manganese, tin and other materials.
  • the metal layer may be an integral structure composed of the first metal region and the second metal region, and the structure is a convex metal layer structure. Wherein, the area of the first metal region is smaller than the area of the second metal region.
  • Step S30 Set a first insulating layer on the non-electrode area of the convex metal layer.
  • a first insulating layer is provided on the upper surface of the non-electrode area on the metal area.
  • the first insulating layer can effectively isolate the metal layer from the external environment, thereby preventing the metal layer from being affected by the external environment and protecting the metal layer.
  • the first insulating layer can be composed of organic materials, inorganic materials, or a mixture of organic materials and inorganic materials.
  • the organic materials can be solder resist ink, and the inorganic materials can be silicon dioxide, gallium nitride, aluminum nitride, etc.
  • the mixed material can be a stack of organic materials and inorganic materials, for example, a layer of silicon dioxide is provided on the solder mask ink, or a layer of solder mask ink is provided on the silicon dioxide.
  • a certain area in the second metal area can be selected as the electrode area, and then a certain thickness of solder resist ink can be coated on the non-electrode area outside the electrode area as the first insulating layer.
  • Step S40 rack-plating an electrode layer in the electrode area of the convex metal layer.
  • the electrode layer is a lead used to connect the metal layer to external components.
  • the electrode layer can be disposed in the electrode area by rack plating.
  • the electrode layer may be composed of pure metal material or alloy material, and the composition material of the electrode layer may be the same as the composition material of the metal layer.
  • the electrode layer may include a copper layer, a nickel layer, and a tin layer.
  • the electrode layer can be set in the electrode area on the second metal area by rack plating.
  • a copper layer of a first preset thickness can be rack plated in the electrode area
  • a nickel layer of a second preset thickness can be rack plated on the copper layer
  • a tin layer of a third preset thickness can be rack plated on the nickel layer to complete the entire process.
  • Rack plating of electrode layers For example, a copper layer of a first preset thickness can be rack plated in the electrode area, then a nickel layer of a second preset thickness can be rack plated on the copper layer, and finally a tin layer of a third preset thickness can be rack plated on the nickel layer to complete the entire process.
  • Rack plating of electrode layers For example, a copper layer of a first preset thickness can be rack plated in the electrode area, then a nickel layer of a second preset thickness can be rack plated on the copper layer, and finally a tin layer of a third preset thickness can be rack plated on the
  • the first preset thickness is a preset thickness of the copper layer, and the thickness of the copper layer may be the same as the thickness of the first metal region.
  • the tin layer is the material layer placed on top of the rack metal layer. Since the tin material has certain oxidation resistance, if the tin layer is directly exposed to the external environment, the external environment will not affect the structure of the rack metal layer.
  • the third preset thickness is the preset thickness of the tin layer. In the specific setting, the thickness of the tin layer only needs to meet the wear requirements. Therefore, the third preset thickness of the tin layer can be much smaller than that of the copper layer. The first preset thickness of the layer.
  • the tin layer can also be directly disposed on the copper layer. Due to the large material difference between tin and copper, the adhesion between the two is poor, which may cause the resistance structure to be damaged. The resistance value detection is not accurate. Therefore, in practical applications, a nickel layer can be provided between the copper layer and the tin layer. The nickel layer can better bond the copper layer and the tin layer together.
  • the second preset thickness is the preset thickness of the nickel layer. Since the nickel layer serves to provide better adhesion between the copper layer and the tin layer, there is no need to provide a thicker nickel layer. The second preset thickness may be less than the third preset thickness of the tin layer.
  • a resistance structure manufacturing method includes: obtaining a substrate; setting a contact layer on the substrate; setting a metal layer on the contact substrate, and etching the metal layer to obtain a convex metal layer; setting a first insulating layer on the non-electrode area of the convex metal layer; rack-plating an electrode layer in the electrode area of the convex metal layer.
  • the metal layer by arranging the metal layer into a first metal region and a second metal region, the first metal region is located in the non-electrode region on the second metal region, thereby reducing the thickness of both ends of the metal layer, Then the electrode layers are disposed at both ends of the metal layer to reduce the overall thickness of the resistance structure of the resistance element without changing the resistance value of the resistance element.
  • FIG. 7 is a schematic flowchart of a second embodiment of a resistor structure manufacturing method according to the present application. Based on the above first embodiment of the resistance structure manufacturing method, a second embodiment of the resistance structure manufacturing method of the present application is proposed.
  • step S50 after the above step S50, it also includes:
  • Step S50 Test the current resistance value of the resistance structure through the rack plating electrode layer.
  • Step S60 When the current resistance value does not meet the preset resistance value condition, adjust the metal layer.
  • Step S70 Set a second insulating layer on the modified metal layer.
  • the specific resistance value of the resistor structure still needs to be detected.
  • the process of trimming the metal layers in the resistor structure may be involved. For example, during the etching process of the metal layer, there is a certain amount of under-etching or over-etching, resulting in a certain difference between the resistance value of the resistor structure and the actual required resistance value. In this case, the metal layer 3 needs to be adjusted, so that the The resistance value of the resistor structure meets the requirements.
  • the structure of the first metal region can usually be fine-tuned directly.
  • the first insulating layer is provided on the first metal region, the first metal region needs to be adjusted. , it will cause damage to the structure of the first insulating layer.
  • a second insulating layer can also be provided on the first insulating layer, thereby effectively preventing the first metal area from being exposed to the outside environment. in the external environment.
  • the structure and composition of the second insulating layer may be the same as that of the first insulating layer, or may be different, as long as it can prevent the first electrode region on the metal layer from being oxidized, nitrided, etc. by the external environment.
  • the first insulating layer and the second insulating layer may also be composed of organic material solder mask ink, inorganic material silicon dioxide and other materials.
  • the resistance value of the resistance structure can be detected in real time during the mechanical adjustment of the resistance structure.
  • the adjustment of the resistance value will stop. Otherwise, the resistance value of the resistance structure will be adjusted.
  • the adjustment can be carried out by means of electro-jet trimming.
  • the adjustment can also be carried out by means of mechanical trimming, such as grinding the structure of the first metal region.
  • a second insulating layer can be provided in the non-electrode area of the modified resistor structure.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

本申请提供了一种电阻结构及其制作方法，该电阻结构包括：基底；设置在所述基底上的金属层，所述金属层包括第一金属区和第二金属区，所述第一金属区位于所述第二金属区上的非电极区内；所述金属层上设有第一绝缘层和电极层，所述第一绝缘层覆盖所述非电极区，所述电极层设置在所述第二金属区上的电极区内。

Description

电阻结构及其制作方法
本申请要求于2022年7月26号申请的、申请号为202210887582.4的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子元件技术领域，尤其涉及一种电阻结构及其制作方法。
 背景技术
随着科技的飞速发展，各种设备越来越向小型化、便携化发展。相应的组成各种设备的电子元器件的体积越来越小，同样为目前的发展趋势。对于电阻元器件，调整电阻元件的电阻值可以通过改变电阻面积、长度、材料等方式实现，或者是改变电阻元器件的整体体积。
在电阻元件的应用过程中，通常面电阻的厚度、面积等尺寸信息与电阻的阻值之间存在一定的关系。在部分应用结构内，在确定电阻值的情况下，可能会由于电阻的面积、厚度等尺寸因素导致对应电阻值的电阻元件无法正常使用，造成电压或电流不精确等影响。
上述内容仅用于辅助理解本申请的技术方案，并不代表承认上述内容是现有技术。
 技术问题
本申请的主要目的在于提供一种电阻结构及其制作方法，旨在解决现有技术中在电阻值不变的情况下，如何降低电阻元件厚度的技术问题。
 技术解决方案
为实现上述目的，本申请提出一种电阻结构，所述电阻结构包括：基底；
设置在所述基底上的金属层，所述金属层包括第一金属区和第二金属区，所述第一金属区位于所述第二金属区上的非电极区内；
所述金属层上设有第一绝缘层和电极层，所述第一绝缘层覆盖所述非电极区，所述电极层设置在所述第二金属区上的电极区内。
在一实施方式中，所述电极层包括：第一挂镀金属层和第二挂镀金属层；
所述电极区包括分别设置在所述第二金属区上表面两端的第一电极区和第二电极区；
所述第一挂镀金属层设置在所述第一电极区内，所述第二挂镀金属层设置于所述第二电极区内。
在一实施方式中，所述电极层的厚度大于所述第一金属区和所述第一绝缘层的厚度。
在一实施方式中，所述第一挂镀金属层和第二挂镀金属层均包括：第一预设厚度的铜层；
设置在所述铜层上第二预设厚度的镍层；
以及设置在所述镍层上第三预设厚度的锡层。
在一实施方式中，所述电阻结构还包括设置在所述基底上的接触层，所述金属层设置在所述接触层上。
在一实施方式中，所述第一绝缘层上还设置有第二绝缘层。
在一实施方式中，所述第一绝缘层和所述第二绝缘层由有机材料、无机材料或有机材料和无机材料的组合材料组成。
在一实施方式中，所述第一金属区、所述第一绝缘层以及所述第二绝缘层的厚度之和小于或等于所述电极层厚度。
为实现上述目的，本申请还提出一种电阻结构制作方法，所述电阻结构制作方法包括：
获取基底；
在所述基底上设置金属层，刻蚀所述金属层获得凸型金属层；
在所述凸型金属层的非电极区上设置第一绝缘层；
在所述凸型金属层的电极区内挂镀电极层。
在一实施方式中，所述在所述凸型金属层的电极区内设置挂镀电极层的步骤之后，还包括；
通过所述挂镀电极层对所述电阻结构的当前阻值进行测试；
在所述当前阻值不满足预设阻值条件时，对所述金属层进行调修；
在调修后的金属层上设置第二绝缘层。
 有益效果
本申请提供了一种电阻结构及其制作方法，该电阻结构包括：基底；设置在所述基底上的金属层，所述金属层包括第一金属区和第二金属区，所述第一金属区位于所述第二金属区上的非电极区内；所述金属层上设有第一绝缘层和电极层，所述第一绝缘层覆盖所述非电极区，所述电极层设置在所述第二金属区上的电极区内。在本申请中，通过将金属层设置为第一金属区和第二金属区，所述第一金属区位于所述第二金属区上的非电极区内，从而降低金属层两端的厚度，然后将电极层设置在金属层两端，实现不改变电阻元件阻值的同时降低电阻元件的电阻结构的整体厚度。
 附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图示出的结构获得其他的附图。
图1为本申请提出的电阻结构第一实施例的结构示意图；
图2为本申请提出的电阻结构第二实施例的结构示意图；
图3为本申请提出的电阻结构第二实施例的俯视图；
图4为本申请提出的电阻结构第三实施例的结构示意图；
图5为本申请提出的电阻结构第三实施例的俯视图；
图6为本申请电阻结构制作方法第一实施例的流程示意图；
图7为本申请电阻结构制作方法第二实施例的流程示意图。
附图标号说明：
标号 名称 标号 名称
1 基底 2 接触层
3 金属层 4 第一绝缘层
5 电极层 6 第二绝缘层
31 第一金属区 32 第二金属区
Cu 铜层 Ni 镍层
Sn 锡层    
本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
 本发明的实施方式
应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
需要说明，本申请实施例中所有方向性指示（诸如上、下、左、右、前、后……）仅用于解释在某一特定姿态（如附图所示）下各部件之间的相对位置关系、运动情况等，如果该特定姿态发生改变时，则该方向性指示也相应地随之改变。
另外，在本申请中涉及“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当人认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。
参照图1，图1为本申请提出的电阻结构第一实施例的结构示意图。基于图1提出本申请电阻结构第一实施例。
在本实施例中，所述电阻结构包括：基底1；
设置在所述基底1上的金属层3，所述金属层包括第一金属区31和第二金属区32，所述第一金属区31位于所述第二金属区32上的非电极区内；
所述金属层上设有第一绝缘层4和电极层5，所述第一绝缘层4覆盖所述非电极区，所述电极层5设置在所述第二金属区32上的电极区内。
应理解的是，基底1是用于承载整个电阻结构的底部。该基底1可以由有机材料、无机材料或者有机材料与无机材料的混合材料组成，例如陶瓷基底、玻璃纤维基底等。
所述电阻结构还包括设置在所述基底1上的接触层2，所述金属层3设置在所述接触层2上。接触层2可用于将所述金属层3固定于基底1上，在不设置接触层2的情况下，金属层3无法直接设置在基底1上。例如在需要将金属设置在玻璃板上时，可以使用一定量的粘胶，该粘胶便为金属与玻璃板之间的接触层。接触层2可以由环氧系或亚克力系等材料组成，可以使金属层3与基底1可以更好的粘连。
可以理解的是，金属层3为导电结构层，电阻结构的具体电阻值与金属层3的尺寸以及组成材料直接相关。组成金属层3的材料具有一定的电阻率，从而使电阻结构呈现电阻性。金属层3可以由纯金属或者金属合金组成，例如铜、银、金等纯金属材料或者由包括铜、银、锰、金等材料的合金。
在本实施例中，金属层3可以为第一金属区31和第二金属区32组成的一个整体结构。其中，第一金属区31的面积小于第二金属区32的面积。第二金属区32上设有电极区，电极区是用于连接电极引线将电阻结构与其他元器件连接的区域。电极区位于第二金属区32的两端。在电极区内可以设置电极层5即电极引线。电极层5是用于将金属层3与外接元件连接的结构。在具体设置过程中，可以通过刻蚀整个金属层3的两端，将两端的部分金属刻蚀除去，然后将电极层5设置在对应的第二金属区32上被刻蚀除去一定金属的部分的电极区内。电极层5可以通过挂镀的方式设置在所述电极区内。电极层5可以由纯金属材料或合金材料组成，电极层5的组成材料可以与金属层3的组成材料相同。此外，在本实施例中，还可以在金属层3电极区内设置多个电极层，例如一端设置两个电极层，形成四电极结构。
此外，第二金属区32上除了电极区还包括非电极区，第一金属区31便位于非电极区内。处于非电极区内的第一金属区31与设置在电极区内的电极层之间设有一定的距离，二者之间并不接触。其中，第一金属区31和第二金属区32组成为一个凸型结构的金属层3。
需要说明的是，为了防止外部环境中的氧化气体、氮化气体等过程对金属层3的结构造成氧化、钝化等影响导致电阻结构的电阻值发生变化，还需要在第一金属区31和第二金属区32上的非电极区的上表面设置第一绝缘层4。第一绝缘层4可以有效的将金属层3与外界环境件隔离，从而避免金属层3受外界环境影响，对金属层3进行保护。其中，第一绝缘层4可以由有机材料组成、无机材料组成或者有机材料与无机材料的混合材料组成，其中，有机材料可以为防焊油墨，无机材料可以为二氧化硅、氮化镓、氮化铝等，混合材料可以为叠层设置的有机材料和无机材料，例如在防焊油墨上设置一层二氧化硅，或者在二氧化硅上设置一层防焊油墨。
在本实施例中提供了一种电阻结构，该电阻结构包括：基底；设置在所述基底上的金属层，所述金属层包括第一金属区和第二金属区，所述第一金属区位于所述第二金属区上的非电极区内；所述金属层上设有第一绝缘层和电极层，所述第一绝缘层覆盖所述非电极区，所述电极层设置在所述第二金属区上的电极区内。在本申请中，通过将金属层设置为第一金属区和第二金属区，所述第一金属区位于所述第二金属区上的非电极区内，从而降低金属层两端的厚度，然后将电极层设置在金属层两端，实现不改变电阻元件阻值的同时降低电阻元件的电阻结构的整体厚度。
参照图2和图3，图2为本申请提出的电阻结构第二实施例的结构示意图；图3为本申请提出的电阻结构第二实施例的俯视图。基于上述电阻结构的第一实施例提出本申请电阻结构的第二实施例。
在本实施例中，所述电极层5包括：第一挂镀金属层和第二挂镀金属层；
所述电极区5包括分别设置在所述第二金属区32上表面两端的第一电极区和第二电极区；
所述第一挂镀金属层设置在所述第一电极区内，所述第二挂镀金属层设置于所述第二电极区内。
应理解的是，在电阻结构设置过程中，需要设置两个电极引线分别将电阻的两端与外部器件连接。因此，在挂镀电极层5时，需要设置两个挂镀金属层，即电极层包括两个挂镀金属层。挂镀金属层为通过挂镀的方式在第二金属区32的电极区内设置的金属层。该挂镀金属层可以通过导线之间与其他元器件连接。同理，在第二金属区32上也应当包括两个电极区即第一电极区和第二电极区，其中第一电极区和第二电极区内均可以挂镀一层挂镀金属层。
其中，第一电极区和第二电极区应当分别设置在第二金属区32的两端，并且第一电极区、第二电极区与第一金属区31之间存在一定的间隔，可以避免电极区内的电极层5与第一金属区31可能存在的接触，还可以将整个金属层3的电阻率均采集，避免电阻结构的电阻值误检。通过电极层5采集到的电阻值为两个电极层之间的金属层3上的电阻值，在电极层5不处于金属层3两端的情况下，检测到的电阻值并不是整个金属层3的实际电阻值。
此外在本实施例中，所述电极层5的厚度大于或等于所述第一金属区31和所述第一绝缘层4的厚度。
应理解的是，在电阻结构设置过程中，需要将电极层5引出，从而将电阻结构与其他元器件建立连接。因此，设置在第二金属区32上的电极层5的厚度应当大于或等于第一金属区31与第一绝缘层4的厚度之和，从而使电极层5突出设置在电阻结构上。
在本实施例中，所述第一挂镀金属层和第二挂镀金属层均包括：第一预设厚度的铜层Cu；
设置在所述铜层Cu上第二预设厚度的镍层Ni；
以及，设置在所述镍层Ni上第三预设厚度的锡层Sn。
应理解的是，由于铜具有良好的导电率，因此在将通过金属层3上的电流引出时，可以设置厚度较大的铜层Cu。其中，第一预设厚度为预先设定的铜层Cu的厚度，该铜层Cu的厚度可以与第一金属区31的厚度相同。锡层Sn是设置在挂镀金属层最上层的材料层。由于锡材料具有一定的抗氧化性，将锡层Sn直接暴露在外界环境内，外部环境并不会对挂镀金属层的结构造成影响。其中，第三预设厚度为预先设定的设置锡层Sn的厚度，在具体设置时，锡层Sn的厚度仅需要满足磨损的需求即可，因此锡层Sn的第三预设厚度可以远远小于铜层Cu的第一预设厚度。
需要说明的是，在本实施例中也可以直接将锡层Sn设置在铜层Cu上，由于锡与铜之间的材料差异较大，二者之间的粘连性较差，可能会导致电阻结构的电阻值检测的并不精确，还会导致电阻功率系数产生的问题。因此，在实际应用中，可以在铜层Cu与锡层Sn之间设置一层镍层Ni，镍层Ni可以更好的将铜层Cu与锡层Sn粘连在一起，还可以避免金属挂镀层内产生的电阻功率系数的问题。
可以理解的是，第二预设厚度为预先设定的镍层Ni的厚度，由于镍层Ni起的作用为使铜层Cu与锡层Sn之间更好的粘连，因此，并不需要设置较厚的镍层Ni，该镍层Ni的第二预设厚度可以小于锡层Sn的第三预设厚度。例如铜层Cu与第一金属区31的厚度均可以设置为80微米，而镍层Ni的厚度为5微米、锡层Sn的厚度为10微米即可。
参照图4和图5，图4为本申请提出的电阻结构第三实施例的结构示意图；图5为本申请提出的电阻结构第二实施例的俯视图。基于上述第二实施例提出本申请电阻结构的第三实施例。
在本实施例中，所述第一绝缘层4上还设置有第二绝缘层6。
应理解的是，在该电阻结构设置完成后，还需要对电阻结构的具体电阻值进行检测。在检测过程中，可能会涉及对电阻结构中的金属层3进行调修的过程。例如在金属层3的刻蚀过程中，存在一定的少刻或过刻，导致电阻结构的电阻值与实际所需的电阻值之间存在一定的差异，则需要金属层3进行调修，从而使电阻结构的电阻值满足需求。
需要说明的是，在对电阻值进行调修时，通常可以直接对第一金属区31的结构进行微调，但是由于第一金属区31上设置有第一绝缘层4，因此在对第一金属区31进行调整时，会对第一绝缘层4的结构造成破坏。而在电阻结构的电阻值调节完成后，为了避免第一金属区31部分裸露在外界环境中，还可以在第一绝缘层4上设置第二绝缘层6，从而有效的避免第一金属区31的部分裸露在外界环境中。
可以理解的是，第二绝缘层6的结构与组成可以与第一绝缘层4相同，当然也可以不同，第二绝缘层6可以避免金属层3上的第一电极区31被外界环境氧化、氮化等过程破坏即可。当然在实际设置过程中，所述第一绝缘层4和所述第二绝缘层6同样可以由防焊油墨组成。
在本实施例中，为了进一步的降低电阻结构的厚度还可以将所述第一金属区31、所述第一绝缘层4以及所述第二绝缘层6的厚度之和设置与所述电极层5厚度相同。
可以理解的是，在电阻结构制作过程中，电极层5、第一金属区31、第一绝缘层4以及第二绝缘层6均为必要结构。其中，电极层5设置在第二金属区32上的电极区内，而第一金属区31、第一绝缘层4以及第二绝缘层6依次设置在第二金属区32的非电极区内。将所述第一金属区31、所述第一绝缘层4以及所述第二绝缘层6的厚度之和设置与所述电极层5厚度相同可以在降低电阻结构厚度的同时提高电阻结构的其他性能。例如在电极层5的厚度大于第一金属区31、第一绝缘层4以及第二绝缘层6厚度之和的情况下，可以提升设置第一绝缘层4或第二绝缘层6的厚度，从而在不改变电阻结构整体厚度的情况下，进一步的加强对金属层3的保护；而在电极层5的厚度小于第一金属区31、第一绝缘层4以及第二绝缘层6厚度之和的情况下，可以适当的调节电极层5中铜层Cu的厚度，增加电阻结构测量时的稳定性。参照图4，在图4中，第二金属区32的厚度可以为120微米，第一金属区31的厚度可以为80微米，铜层Cu的厚度可以为80微米，镍层Ni的厚度可以为5微米，锡层Sn的厚度可以为10微米，设置在第一金属区31上的第一绝缘层4的厚度可以设置为5um，而第二金属区32上的第一绝缘层4的最大厚度可以为85微米，第二绝缘层6的厚度可以为10微米。
此外，在本方案中，由于金属层3的第一金属区31与第二金属区32的凸字形结构。因此在考虑到电阻结构阻值调节的情况下，可以将处于电极区内的挂镀铜层的厚度进行调节。例如在对电阻结构的厚度要求并不是很高，但是需要降低电阻结构的阻值的场景下，可以对刻蚀后的金属层3上处于电极区内的挂镀铜层Cu的厚度进行调节，通过增加铜层Cu的厚度降低整体电极结构内的电阻率，从而降低电阻结构的电阻值。其中，挂镀的电极层5的内的铜层Cu厚度应当大于第一金属区31的厚度，此时，电极层5的整体厚度也可以大于第一金属区31、第一绝缘层4以及第二绝缘层6的厚度之和。通过增加处于电极区内铜层Cu厚度的方式，虽然会对电阻结构的整体厚度造成一定的影响，但是在对电阻结构厚度要求并不严格的场景下，可以实现对电阻结构的阻值的降低。
此外为实现上述目的，参照图6，图6为本申请电阻结构制作方法第一实施例的流程示意图。本申请还提供了基于所述的电阻结构的电阻结构制作方法，所述电阻结构制作方法包括：
步骤S10：获取基底。
可以理解的是，基底是用于承载整个电阻结构的底部。该基底可以由有机材料、无机材料或者有机材料与无机材料的混合材料组成，例如陶瓷基底、玻璃纤维基底等。
应理解的是，在设置完基底之后，还可以在所述基底上设置接触层。
需要说明的是，接触层可用于将所述金属层固定于基底上，例如在需要将金属设置在玻璃板上时，可以使用一定量的粘胶，该粘胶便为金属与玻璃板之间的接触层。接触层可以由环氧系或亚克力系等材料组成，可以使金属层与基底可以更好的粘连。
在具体实施中，考虑到基底与金属层之间的粘连性，在基底设置完成后，可以在基底上设置一层连接层。
步骤S20：在所述接基底上设置金属层，刻蚀所述金属层获得凸型金属层。
应理解的是，在金属层设置之前还需要确定基底上是否设置接触层，在未设置接触层的情况下，直接将金属层设置在基底上即可；在设置接触层的情况下，则需要将金属层设置在接触层上。
需要说明的是，金属层为导电结构层，电阻结构的具体电阻值与金属层的尺寸以及组成材料直接相关。组成金属层的材料具有一定的电阻率，从而使电阻结构呈现电阻性。金属层可以由纯金属或者金属合金组成，例如铜、银等纯金属材料或者由包括铜、银、锰、锡等材料的合金。
在本实施例中，金属层可以为第一金属区和第二金属区组成的一个整体结构，该结构为凸型金属层结构。其中，第一金属区的面积小于第二金属区的面积。
在具体实施过程中，可以先直接设置一个完整厚度的金属层，然后在金属层的两端分别选取一定的面积和厚度进行刻蚀，在将该面积和厚度的金属刻蚀完成后，便得到第一金属区和第二金属区组成的凸型金属层结构。
步骤S30：在所述凸型金属层的非电极区上设置第一绝缘层。
可以理解的是，为了防止外部环境中的氧化气体、氮化气体等过程对金属层的结构造成氧化、钝化等影响导致电阻结构的电阻值发生变化，还需要在第一金属区和第二金属区上的非电极区的上表面设置第一绝缘层。第一绝缘层可以有效的将金属层与外界环境隔离，从而避免金属层受外界环境影响，对金属层进行保护。其中，第一绝缘层可以由有机材料组成、无机材料组成或者有机材料与无机材料的混合材料组成，有机材料可以为防焊油墨，无机材料可以为二氧化硅、氮化镓、氮化铝等，混合材料可以为叠层设置的有机材料和无机材料，例如在防焊油墨上设置一层二氧化硅，或者在二氧化硅上设置一层防焊油墨。
在具体设置过程中，可以在第二金属区内选取一定的区域作为电极区，然后在电极区以外的非电极区上涂覆一定厚度防焊油墨作为第一绝缘层。
步骤S40：在所述凸型金属层的电极区内挂镀电极层。
应理解的是，电极层是用于将金属层与外接元件连接的引线。电极层可以通过挂镀的方式设置在所述电极区内。电极层可以由纯金属材料或合金材料组成，电极层的组成材料可以与金属层的组成材料相同。电极层可以包括铜层、镍层以及锡层。
在具体设置过程中，可以在第二金属区上的电极区内通过挂镀的方式设置电极层。例如可以在电极区先挂镀第一预设厚度的铜层，然后在铜层上挂镀第二预设厚度的镍层，最后在镍层上挂镀第三预设厚度的锡层完成整个电极层的挂镀。
需要说明的是，由于铜具有良好的导电率，因此在将通过金属层上的电流引出时，可以设置厚度较大的铜层。其中，第一预设厚度为预先设定的铜层的厚度，该铜层的厚度可以与第一金属区的厚度相同。锡层是设置在挂镀金属层最上层的材料层。由于锡材料具有一定的抗氧化性，将锡层直接暴露在外界环境内，外部环境并不会对挂镀金属层的结构造成影响。其中，第三预设厚度为预先设定的设置锡层的厚度，在具体设置时，锡层的厚度仅需要满足磨损的需求即可，因此锡层的第三预设厚度可以远远小于铜层的第一预设厚度。
需要说明的是，在本实施例中也可以直接将锡层设置在铜层上，由于锡与铜之间的材料差异较大，二者之间的粘连性较差，可能会导致电阻结构的电阻值检测的并不精确。因此，在实际应用中，可以在铜层与锡层之间设置一层镍层，镍层可以更好的将铜层与锡层粘连在一起。第二预设厚度为预先设定的镍层的厚度，由于镍层起的作用为使铜层与锡层之间更好的粘连，因此，并不需要设置较厚的镍层，该镍层的第二预设厚度可以小于锡层的第三预设厚度。
在本实施例中提供了一种电阻结构制作方法，该方法包括：获取基底；在所述基底上设置接触层；在所述接基底上设置金属层，刻蚀所述金属层获得凸型金属层；在所述凸型金属层的非电极区上设置第一绝缘层；在所述凸型金属层的电极区内挂镀电极层。在本实施例中，通过将金属层设置为第一金属区和第二金属区，所述第一金属区位于所述第二金属区上的非电极区内，从而降低金属层两端的厚度，然后将电极层设置在金属层两端，实现不改变电阻元件阻值的同时降低电阻元件的电阻结构的整体厚度。
参照图7，图7为本申请电阻结构制作方法第二实施例的流程示意图。基于上述电阻结构制作方法的第一实施例，提出本申请电阻结构制作方法的第二实施例。
在本实施例中，上述步骤S50之后还包括：
步骤S50：通过所述挂镀电极层对所述电阻结构的当前阻值进行测试。
步骤S60：在所述当前阻值不满足预设阻值条件时，对所述金属层进行调修。
步骤S70：在调修后的金属层上设置第二绝缘层。
应理解的是，在该电阻结构设置完成后，还需要对电阻结构的具体电阻值进行检测。在检测过程中，可能会涉及对电阻结构中的金属层进行调修的过程。例如在金属层的刻蚀过程中，存在一定的少刻或过刻，导致电阻结构的电阻值与实际所需的电阻值之间存在一定的差异，则需要金属层3进行调修，从而使电阻结构的电阻值满足需求。
需要说明的是，在对电阻值进行调修时，通常可以直接对第一金属区的结构进行微调，但是由于第一金属区上设置有第一绝缘层，因此在对第一金属区进行调整时，会对第一绝缘层的结构造成破坏。而在电阻结构的电阻值调节完成后，为了避免第一金属区部分裸露在外界环境中，还可以在第一绝缘层上设置第二绝缘层，从而有效的避免第一金属区的部分裸露在外界环境中。
可以理解的是，第二绝缘层的结构与组成可以与第一绝缘层相同，当然也可以不同，只要其可以避免金属层上的第一电极区被外界环境氧化、氮化等即可。当然在实际设置过程中，所述第一绝缘层和所述第二绝缘层也可以由有机材料防焊油墨、无机材料二氧化硅等材料组成。
在具体设置过程中，可以在对电阻结构机械能调修过程中，实时对电阻结构的电阻值进行检测，在电阻结构的电阻值满足预设阻值条件时则停止对电阻值进行调修，否则继续进行调修，直至电阻结构的电阻值满足预设阻值条件。在对电阻结构的电阻值进行调修时可以采用电射修阻的方式进行调修，当然也可以通过机械修阻的方式进行调修，例如对第一金属区的结构进行研磨。当电阻结构的电阻值满足预设阻值条件时，在调修后的电阻结构的非电极区内设置第二绝缘层即可。
以上仅为本申请的可选实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (10)

  1. 一种电阻结构，其中，所述电阻结构包括：
    基底；
    设置在所述基底上的金属层，所述金属层包括第一金属区和第二金属区，所述第一金属区位于所述第二金属区上的非电极区内；
    所述金属层上设有第一绝缘层和电极层，所述第一绝缘层覆盖所述非电极区，所述电极层设置在所述第二金属区上的电极区内。
  2. 如权利要求1所述的电阻结构，其中，所述电极层包括：第一挂镀金属层和第二挂镀金属层；
    所述电极区包括分别设置在所述第二金属区上表面两端的第一电极区和第二电极区；
    所述第一挂镀金属层设置在所述第一电极区内，所述第二挂镀金属层设置于所述第二电极区内。
  3. 如权利要求2所述的电阻结构，其中，所述电极层的厚度大于所述第一金属区和所述第一绝缘层的厚度。
  4. 如权利要求3所述的电阻结构，其中，所述第一挂镀金属层和第二挂镀金属层均包括：第一预设厚度的铜层；
    设置在所述铜层上第二预设厚度的镍层；
    以及设置在所述镍层上第三预设厚度的锡层。
  5. 如权利要求4所述的电阻结构，其中，所述电阻结构还包括设置在所述基底上的接触层，所述金属层设置在所述接触层上。
  6. 如权利要求1所述的电阻结构，其中，所述第一绝缘层上还设置有第二绝缘层。
  7. 如权利要求6所述的电阻结构，其中，所述第一绝缘层和所述第二绝缘层由有机材料、无机材料或有机材料和无机材料的组合材料组成。
  8. 如权利要求7所述的电阻结构，其中，所述第一金属区、所述第一绝缘层以及所述第二绝缘层的厚度之和小于或等于所述电极层厚度。
  9. 一种基于权利要求1-8任一项所述的电阻结构的电阻结构制作方法，其中，所述电阻结构制作方法包括：
    获取基底；
    在所述基底上设置金属层，刻蚀所述金属层获得凸型金属层；
    在所述凸型金属层的非电极区上设置第一绝缘层；
    在所述凸型金属层的电极区内挂镀电极层。
  10. 如权利要求9所述的电阻结构制作方法，其中，所述在所述凸型金属层的电极区内设置挂镀电极层的步骤之后，还包括；
    通过所述挂镀电极层对所述电阻结构的当前阻值进行测试；
    在所述当前阻值不满足预设阻值条件时，对所述金属层进行调修；
    在调修后的金属层上设置第二绝缘层。
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CN210349484U (zh) * 2019-08-19 2020-04-17 南京隆特电子有限公司 一种精密合金电阻器
CN212676004U (zh) * 2020-07-27 2021-03-09 江门市钧崴电子科技有限公司 侦测电阻及主板
CN217588573U (zh) * 2022-05-10 2022-10-14 钧崴电子科技股份有限公司 一种电流感测电阻器
CN115206607A (zh) * 2022-07-26 2022-10-18 钧崴电子科技股份有限公司 电阻结构及其制作方法

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