WO2024017724A1 - Procédé et dispositif de réduction d'un courant de circuit, onduleur, et système comprenant une pluralité d'onduleurs - Google Patents
Procédé et dispositif de réduction d'un courant de circuit, onduleur, et système comprenant une pluralité d'onduleurs Download PDFInfo
- Publication number
- WO2024017724A1 WO2024017724A1 PCT/EP2023/069271 EP2023069271W WO2024017724A1 WO 2024017724 A1 WO2024017724 A1 WO 2024017724A1 EP 2023069271 W EP2023069271 W EP 2023069271W WO 2024017724 A1 WO2024017724 A1 WO 2024017724A1
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- WO
- WIPO (PCT)
- Prior art keywords
- intermediate circuit
- inverter
- wrn
- voltage
- duty cycle
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 35
- 239000004065 semiconductor Substances 0.000 claims abstract description 12
- 238000012937 correction Methods 0.000 claims description 28
- 238000005259 measurement Methods 0.000 claims description 3
- 230000001276 controlling effect Effects 0.000 description 5
- 230000009467 reduction Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 241000209094 Oryza Species 0.000 description 2
- 235000007164 Oryza sativa Nutrition 0.000 description 2
- KYIKRXIYLAGAKQ-UHFFFAOYSA-N abcn Chemical compound C1CCCCC1(C#N)N=NC1(C#N)CCCCC1 KYIKRXIYLAGAKQ-UHFFFAOYSA-N 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 235000009566 rice Nutrition 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 238000013016 damping Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000004146 energy storage Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 239000000446 fuel Substances 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4833—Capacitor voltage balancing
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/493—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode the static converters being arranged for operation in parallel
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
Definitions
- the application relates to a method and a device for reducing a circulating current in inverters connected in parallel on the DC side and AC side, each with a divided intermediate circuit (DC: direct current/direct voltage, AC: alternating current/alternating voltage).
- DC direct current/direct voltage
- AC alternating current/alternating voltage
- An inverter can have a DC intermediate circuit for temporarily storing energy and smoothing power flows, which can be implemented using one or more intermediate circuit capacitors.
- Divided intermediate circuits with several intermediate rice capacitors have an intermediate tap, which is ideally located in the middle between two identical intermediate rice capacitors and thus in the middle between positive and negative DC voltage and is therefore also referred to as the center point.
- Shared intermediate circuits can offer advantages in inverter design, e.g. B. can be operated with less loss by means of suitable timing, if necessary taking into account the midpoint potential.
- the shared DC intermediate circuits of the DC/AC converters may be unequally charged. i.e. have voltage asymmetries. If the shared intermediate circuit is asymmetrical, e.g. B. understood that the intermediate tap of the divided intermediate circuit does not correspond to the middle of the positive and negative DC voltage. The asymmetries can also be different between the DC/AC converters connected in parallel, i.e. H. The position of the potential of the respective intermediate taps of the divided DC intermediate circuits can be different between the DC/AC converters connected in parallel.
- the asymmetries can e.g. B. be due to component tolerances and/or asymmetries within the respective intermediate circuits themselves or between the intermediate circuits of the DC/AC converters. Due to the asymmetries of the divided DC intermediate circuits relative to one another, potential differences in the zero system can arise on the AC side of three-phase inverters, which in turn lead to AC and DC side circulating currents between the intermediate circuits of the DC/AC converters connected in parallel. Circulating currents are undesirable because they can lead to additional losses and instabilities in the system.
- Circulating currents can e.g. B. can be addressed by EM technology and taken into account when designing the EMC filters of the DC/AC converters. With large circulating currents, the effort for EMC filtering increases.
- the application is based on the task of offering a method and a device which improves the operation of parallel-connected DC/AC converters.
- a method for reducing a circulating current in inverters connected in parallel on the DC side and AC side, each with a divided intermediate circuit has the following steps for at least one of the inverters:
- the process enables highly dynamic balancing of the two halves of the DC link of the inverter operated using the process.
- the symmetry has a direct effect on the cycle ratio generation of the AC current control.
- the duty cycle is suitably modified in order to achieve symmetry of the DC intermediate circuit of the inverter and thus symmetry of all inverters of the entire system using the method with one another. This is Particularly advantageous for three-phase inverters connected in parallel on the DC side and AC side. To improve the result, the method can be applied to all parallel-connected inverters in the entire system.
- the use of the first and second intermediate circuit voltage has a particular effect on the balancing of the respective inverter, and the use of the AC-side differential current can contribute to stabilizing the overall system, since its influence causes the divided intermediate circuits to be balanced across several inverters.
- a respective differential current measured locally at the inverter corresponds to the local part of a circulating current circulating in the system and represents a local asymmetry of the intermediate circuit of the respective inverter relative to the entirety of the intermediate circuits of the other inverters.
- the resulting circulating current is made up of the differential currents of all inverters connected in parallel.
- the duty cycle is determined using an asymmetry of the divided intermediate circuit in such a way that the asymmetry of the divided intermediate circuit is reduced. This means e.g. B. that with greater asymmetry, the influence of the asymmetry on the duty cycle is greater and has a stronger effect in the direction of symmetry.
- the duty cycle is determined using a modified first and second DC intermediate circuit voltage.
- the respective modified intermediate circuit voltages are determined from the respective intermediate circuit voltages by a first correction value and/or a second correction value.
- the first correction value depends on the respective differential current of the inverter and the second correction value depends on the first and second intermediate circuit voltage of the inverter.
- the first modified intermediate circuit voltage is determined from the first intermediate circuit voltage.
- the first modified intermediate circuit voltage depends on the first intermediate circuit voltage and a first correction value and/or a second correction value.
- the second modified intermediate circuit voltage is determined in particular from the second intermediate circuit voltage.
- the second modified intermediate circuit voltage depends on the second intermediate circuit voltage and a first correction value and/or a second correction value.
- the respective first correction values for the first and the second intermediate circuit voltage depend on the respective differential current on the AC side of the respective inverter and the respective second correction values depend on the first and the second intermediate circuit voltage.
- the duty cycle for a positive half-wave of the AC target voltage depends on the first modified intermediate circuit voltage and/or the duty cycle for a negative half-wave of the AC target voltage depends on the second modified intermediate circuit voltage.
- the first intermediate circuit voltage or the first modified intermediate circuit voltage corresponds to a positive DC voltage and the second intermediate circuit voltage or the second modified intermediate circuit voltage corresponds to a negative DC voltage.
- the duty cycle described above relates in particular to a control of semiconductor switches of a bridge circuit of the inverter for converting direct voltage into alternating voltage.
- the first correction value is determined using the differential current measured on the AC side by means of a first controller.
- the first controller can in particular be designed as a PI controller.
- the second correction value is determined using the asymmetry of the divided intermediate circuit using a second controller, in particular a second PI controller.
- a measure of the asymmetry of the divided intermediate circuit can in particular be the difference in the amounts of the first and second intermediate circuit voltage.
- the first modified intermediate circuit voltage is determined from the first intermediate circuit voltage by adding the first and/or the second correction value.
- the modified second intermediate circuit voltage is determined from the second intermediate circuit voltage by adding the first and/or the second correction value.
- a device for reducing a circulating current can be used, for example, in a three-phase inverter.
- the inverter has a divided intermediate circuit and can be operated in parallel with at least one other inverter.
- the device is designed and set up to receive measured values for a first and a second measured intermediate circuit voltage of a first and second half of the divided intermediate circuit of the inverter. These measured values are recorded, for example, by voltmeters attached to the inverter on the DC side and transmitted to the device.
- the device is further designed and set up to receive a measured value of an AC-side differential current of the inverter.
- the AC-side differential current is a sum of the currents through all three phases of the AC side. In an overall symmetrical system with several connected in parallel For inverters, this differential current would have to be zero. A non-zero differential current can therefore serve as a measure of asymmetry in the system.
- the device is further designed and set up to determine a duty cycle for setting an AC-side output voltage of the inverter corresponding to an AC target voltage using the intermediate circuit voltages and the AC-side differential current.
- the AC-side output voltage includes AC voltages for each phase.
- the device is further designed and set up to output the duty cycle for controlling semiconductor switches of the inverter. Based on the duty cycle, a controller of the inverter can then appropriately control semiconductor switches of the inverter and adjust the AC-side output voltage accordingly.
- the device is designed and set up to determine the duty cycle using an asymmetry of the divided intermediate circuit in such a way that the asymmetry of the divided intermediate circuit is reduced.
- An asymmetry of a divided intermediate circuit occurs in particular when the center of the divided intermediate circuit is not in the middle between the first and second intermediate circuit voltage.
- An inverter with a split intermediate circuit can have a previously described device.
- the inverter is designed and set up to adjust the AC-side output voltage according to a target AC voltage by controlling semiconductor switches using the duty cycle.
- the inverter is in particular a three-phase inverter, which can be operated in parallel connection on the DC and AC sides with at least one further inverter.
- the inverter further has a voltmeter for measuring the first and second intermediate circuit voltage and/or a differential current sensor for measuring the AC-side differential current.
- the voltmeter for measuring the first and second intermediate circuit voltage is located on the DC side of the inverter and the differential current sensor for measuring the differential current is located on the AC side of the inverter.
- the inverter is designed as a three-phase inverter and the differential current sensor is designed as a forward converter across the three phases of the AC voltage on the AC side of the inverter.
- the device described and the method described are particularly advantageous for three-phase inverters connected in parallel on the DC side and the AC side, since asymmetries in the respective divided intermediate circuits of the inverters cause circulating currents across the three phases can arise.
- These circulating currents can be measured as differential currents across the three phases on the AC side of the respective inverter and can be used for targeted, individual modification of the clock ratios in order to counteract the asymmetries of the intermediate circuits within themselves and among themselves as the cause of the circulating currents.
- a system with inverters has several inverters connected in parallel on the DC side and the AC side. At least one inverter has a device for reducing a circulating current between the inverters, which is designed and set up to carry out one of the previously described methods.
- any low-frequency oscillation of the voltage of an intermediate circuit center point M against earth which occurs due to slight asymmetries in the intermediate circuits and can lead to large circulating currents in an avalanche-like manner, can be effectively dampened, i.e. reduced, by the method and device described.
- an internal size of the respective inverter is used, e.g. B. the asymmetry of the halves of the divided intermediate circuit to one another, and on the other hand an overall size that results from the interaction of the parallel-connected inverters during operation, e.g. B. the differential current as the respective local share of the circulating current.
- the method or device can therefore be used to create a scalable, expandable and highly available system, e.g. B. as part of an energy supply system.
- a scalable, expandable and highly available system e.g. B. as part of an energy supply system.
- three-phase inverters with a split intermediate circuit and three-wire AC connection can be connected in parallel on the DC and AC sides.
- Hard parallel connection here means a parallel connection without any further circuitry effort, in particular without electrical isolation.
- the system can be implemented without connecting the intermediate circuit center to the AC side and without communication between the inverters, which enables more cost-effective solutions, e.g. B. can be used in photovoltaic systems, energy storage systems, electrolysers or fuel cell systems.
- FIG. 1 shows schematically an exemplary embodiment of a system with several inverters
- Fig. 2 shows schematically a method for reducing a circulating current
- Fig. 3 shows a device for reducing a circulating current as part of an inverter control
- Fig. 4 shows schematically an exemplary embodiment of the device for reducing a circulating current.
- each inverter WR1, WR2 to WRn has a divided intermediate circuit on its respective DC side with a respective center point M, which is connected to the inverter bridge of the respective inverter WR1, WR2 to WRn.
- a positive first intermediate circuit voltage u_Z1+, u_Z2+ to u_Zn+ is present at the respective first half of the divided intermediate circuit.
- a negative second intermediate circuit voltage u_Z1-, u_Z2- to u_Zn- is present at the respective second intermediate circuit half.
- the inverters WR1, WR2 to WRn are connected in parallel on the DC side via a DC bus 20.
- the inverters WR1, WR2, to WRn are three-phase inverters which are connected in parallel on the AC side and connected to an AC network 22.
- the respective AC phase currents i_abc1, i_abc2 to i_abcn flow on the AC side of the respective inverters WR1, WR2 to WRn.
- the differential currents i_di 1 , i_di2 to i_din can be measured via differential current sensors 24.1, 24.2 to 24. n via the three AC phases on the AC side of the respective inverters WR1, WR2 to WRn.
- a method for reducing a circulating current for a system is shown schematically in FIG. 2, as shown, for example, in FIG. 1.
- the first intermediate circuit voltage u_Z+ of the first half of the divided intermediate circuit is measured for an inverter.
- the second intermediate circuit voltage u_Z- of the second half of the divided intermediate circuit is also measured in S1.
- the AC-side differential current i_di, i_di 1, i_di2 to i_din of the respective inverter WR1, WR2 to WRn is measured.
- a duty cycle DuCy is determined, which is used to set an AC-side output voltage of the inverter WR1, WR2 to WRn.
- the duty cycle is determined using the respective intermediate circuit voltages u_Z+, u_Z- and the respective AC-side differential current i_di.
- the AC-side output voltage is then set in S4 by controlling semiconductor switches of the inverter WR1, WR2 to WRn using the duty cycle DuCy.
- the semiconductor switches are controlled, for example, by a control 12 of the inverter WR.
- the inverter control 12 has a DC static 12.
- DC which has the first intermediate circuit voltage u_Z+ and the second intermediate circuit voltage u_Z- as input variables and is responsible, for example, for regulating the entire intermediate circuit voltage.
- the inverter control 12 further has an AC control 12.AC, which is responsible in particular for controlling the AC output power of the inverter and for this purpose receives an input value from the DC statics and has the AC phase current i_abc as a further input variable.
- the AC control 12. AC outputs an AC target voltage U_ac_soll from the inverter control 12 to the device 10 for reducing a circulating current.
- the device 10 therefore has the AC target voltage from the inverter control U_ac_soll as an input variable.
- Further input variables of the device 10 are the differential current i_di and the first intermediate circuit voltage u_Z+ as well as the second intermediate circuit voltage u_Z-.
- the device 10 determines a duty cycle DuCy for setting the AC-side output voltage of the inverter WR1, WR2, ... WRn .
- the AC output voltage of the inverter WR1, WR2, ... WRn can then be adjusted using the duty cycle DuCy by clocking the semiconductor switches of the inverter bridge of the respective inverter WR1, WR2, ... WRn.
- the device 10 determines the duty cycle DuCy from the differential current i_di and the first intermediate circuit voltage u_Z+ and the second intermediate circuit voltage u_Z- in such a way that an asymmetry of the divided intermediate circuit of the inverter WR1, WR2, ... WRn is reduced.
- a reduction in the asymmetry of the divided intermediate circuit means that the center of the divided intermediate circuit is shifted more towards the middle between the positive and negative DC voltage of the entire system if it is not exactly in the middle.
- a reduction in the asymmetry of the divided intermediate circuits is accompanied by a reduction in a circulating current in a system with several inverters connected in parallel on the AC side and DC side.
- the device 10 has the input variables previously described in connection with FIG. 3: AC target voltage from the inverter control u_ac_soll, first intermediate circuit voltage u_Z+, second intermediate circuit voltage u_Z- and differential current i_di.
- the differential current i_di is converted using a virtual Impedance 30 and a first PI controller 26 determines a first correction value.
- a second correction value is determined using a second PI controller 28.
- the PI controller (proportional-integral controller) is the combination of P and I controller and combines the advantage of the P controller, namely a fast response, with the advantage of the I controller, namely precise regulation without a permanent one Deviation from the rule.
- the PI control is therefore precise and medium-fast.
- Such a control element is well suited for damping, i.e. reducing, circulating currents, since a medium-fast reaction to changes in circulating currents is sufficient and at the same time precise control is desired.
- the first and second correction values are added to the first intermediate circuit voltage u_Z+.
- the first and second correction values are also added to the second intermediate circuit voltage u_Z-.
- the modified first intermediate circuit voltage u'_Z+ then results from the first intermediate circuit voltage u_Z+, the first correction value and the second correction value.
- the second intermediate circuit voltage u_Z- results in the modified second intermediate circuit voltage u‘_Z-,
- a duty cycle is determined from the AC target voltage U_ac_soll from the inverter control 12 and the modified first intermediate circuit voltage u'_Z+, which should be used for a positive half-wave of the AC alternating voltage.
- the inverter control 12 uses the AC target voltage U_ac_soll to determine a duty cycle from the modified second intermediate circuit voltage u'_Z-, which is to be used for a negative half-wave of the AC alternating voltage.
- a discriminator 14 uses the AC target voltage U_ac_soll received from the inverter control 12 to decide whether there is a positive or negative half-wave of the AC target voltage and accordingly the output value of the first divider 16 is selected for a positive half-wave or the output value of the second divider 18 chosen for a negative half wave. The corresponding duty cycle DuCy is then output by the discriminator 14.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
L'invention concerne un procédé de réduction d'un circuit de courant dans des onduleurs (WR1, WR2,... WRn) qui sont connectés les uns aux autres en parallèle sur le côté CC et sur le côté CA et dont chacun comprend un circuit intermédiaire divisé. Le procédé comprend les étapes suivantes consistant à, pour au moins un onduleur : - mesurer une première et une seconde tension de circuit intermédiaire (u_Z+, u_Z-) d'une première ou d'une seconde moitié du circuit intermédiaire divisé de l'onduleur respectif (WR1, WR2,... WRn), -mesurer un courant différentiel côté CA (i_di, i_di1, i_di2,... i_din) de l'onduleur respectif (WR1, WR2,... WRn), - déterminer le rapport cyclique (DuCy) afin d'ajuster une tension de sortie côté CA de l'onduleur respectif (WR1, WR2,... WRn) en fonction d'une tension cible CA à l'aide des tensions de circuit intermédiaire (u_Z+, u_Z-) et du courant différentiel côté CA (i_di), et - ajuster la tension de sortie côté CA en actionnant des commutateurs à semi-conducteur de l'onduleur respectif (WR1, WR2,... WRn) à l'aide du rapport cyclique (DuCy). L'invention concerne en outre un dispositif (10) de production d'un circuit de courant, un onduleur (WR1, WR2,... WRn), ainsi qu'un système comprenant une pluralité d'onduleurs.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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DE102022118430.7A DE102022118430A1 (de) | 2022-07-22 | 2022-07-22 | Verfahren und vorrichtung zur reduzierung eines kreisstromes, wechselrichter und system mit mehreren wechselrichtern |
DE102022118430.7 | 2022-07-22 |
Publications (1)
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WO2024017724A1 true WO2024017724A1 (fr) | 2024-01-25 |
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PCT/EP2023/069271 WO2024017724A1 (fr) | 2022-07-22 | 2023-07-12 | Procédé et dispositif de réduction d'un courant de circuit, onduleur, et système comprenant une pluralité d'onduleurs |
Country Status (2)
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DE (1) | DE102022118430A1 (fr) |
WO (1) | WO2024017724A1 (fr) |
Citations (1)
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WO2021170239A1 (fr) * | 2020-02-27 | 2021-09-02 | Abb Schweiz Ag | Onduleur à 3 niveaux npc parallèle sans connexion de point médian des liaisons cc |
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CN105743378B (zh) | 2016-04-20 | 2018-06-19 | 山东大学 | 一种t型三电平逆变器并联系统及其解耦控制方法 |
CN106786748B (zh) | 2016-12-27 | 2019-01-25 | 电子科技大学 | 一种三电平逆变器并联系统零序环流抑制方法 |
CN107733215B (zh) | 2017-10-16 | 2020-09-08 | 许继电气股份有限公司 | 一种三电平多模块逆变器均流控制方法及装置 |
CN112003491B (zh) | 2020-07-10 | 2021-11-09 | 国网山东省电力公司青岛供电公司 | 一种模块化并联三相三电平逆变器的控制方法及系统 |
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2022
- 2022-07-22 DE DE102022118430.7A patent/DE102022118430A1/de active Pending
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- 2023-07-12 WO PCT/EP2023/069271 patent/WO2024017724A1/fr unknown
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2021170239A1 (fr) * | 2020-02-27 | 2021-09-02 | Abb Schweiz Ag | Onduleur à 3 niveaux npc parallèle sans connexion de point médian des liaisons cc |
Non-Patent Citations (3)
Title |
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GAN JIANGHUA ET AL: "Reasearch on the circulating current suppression for parallel T-type three-level PCS based on on-line synchronization and average current", 2019 IEEE 3RD ADVANCED INFORMATION MANAGEMENT, COMMUNICATES, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE (IMCEC), IEEE, 11 October 2019 (2019-10-11), pages 773 - 776, XP033705395, DOI: 10.1109/IMCEC46724.2019.8984035 * |
LI KAI ET AL: "Elimination of zero sequence circulating current between parallel operating three-level inverters", IECON 2016 - 42ND ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, IEEE, 23 October 2016 (2016-10-23), pages 2277 - 2282, XP033034093, DOI: 10.1109/IECON.2016.7793891 * |
SHAO ZHANGPING ET AL: "Modeling and Elimination of Zero-Sequence Circulating Currents in Parallel Three-Level T-Type Grid-Connected Inverters", IEEE TRANSACTIONS ON POWER ELECTRONICS, INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, USA, vol. 30, no. 2, 1 February 2015 (2015-02-01), pages 1050 - 1063, XP011560827, ISSN: 0885-8993, [retrieved on 20141007], DOI: 10.1109/TPEL.2014.2309634 * |
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