WO2024016301A1 - 非对称半桥反激电路的控制电路、电源模组和电子设备 - Google Patents

非对称半桥反激电路的控制电路、电源模组和电子设备 Download PDF

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Publication number
WO2024016301A1
WO2024016301A1 PCT/CN2022/107275 CN2022107275W WO2024016301A1 WO 2024016301 A1 WO2024016301 A1 WO 2024016301A1 CN 2022107275 W CN2022107275 W CN 2022107275W WO 2024016301 A1 WO2024016301 A1 WO 2024016301A1
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Prior art keywords
circuit
control circuit
power tube
resonant capacitor
auxiliary power
Prior art date
Application number
PCT/CN2022/107275
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English (en)
French (fr)
Inventor
何祖伟
杨滚
伍梁
Original Assignee
华为数字能源技术有限公司
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Application filed by 华为数字能源技术有限公司 filed Critical 华为数字能源技术有限公司
Priority to PCT/CN2022/107275 priority Critical patent/WO2024016301A1/zh
Publication of WO2024016301A1 publication Critical patent/WO2024016301A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only

Definitions

  • the present application relates to the field of power supply technology, and in particular to a control circuit, power module and electronic equipment of an asymmetric half-bridge flyback circuit.
  • a power module usually includes a DC conversion circuit and a control circuit.
  • the control circuit is used to output control signals to control the DC conversion circuit.
  • the DC conversion circuit as an asymmetric half-bridge flyback circuit as an example
  • the asymmetric half-bridge flyback circuit includes a half-bridge circuit, a transformer and a resonant capacitor.
  • the half-bridge circuit includes a main power tube and an auxiliary power tube.
  • the charge discharge in the resonant capacitor will generate a large current, which will have a great impact on the auxiliary power tube and rectifier circuit, seriously affecting the life of the device and may even cause direct damage to the device.
  • This application provides a control circuit, power module and electronic equipment for an asymmetric half-bridge flyback circuit, used to reduce the current generated by the discharge of the resonant capacitor in the asymmetric half-bridge flyback circuit.
  • a first aspect of this application provides a power module, including: an asymmetric half-bridge flyback circuit and a control circuit.
  • An asymmetric half-bridge flyback circuit is used to receive an input voltage and provide an output voltage.
  • the asymmetric half-bridge flyback circuit includes a transformer, resonant capacitor, main power tube and auxiliary power tube.
  • the control circuit is used to output a control signal to control the asymmetric half-bridge flyback circuit.
  • the resonant capacitor is used to discharge according to a preset number of times according to the control signal.
  • the resonant capacitor is used to discharge a preset number of times according to the control signal. Since the resonant capacitor is periodically discharged a preset number of times based on the control signal, the current generated by a single discharge of the resonant capacitor is small and will not cause excessive current stress in the auxiliary power tube, transformer, and rectifier circuit. Therefore, the stable operation of the asymmetric half-bridge flyback circuit, power module and the electronic equipment in which they are located is ensured, and the service life of the asymmetric half-bridge flyback circuit, power module and electronic equipment is improved.
  • the control circuit After the resonant capacitor is discharged a preset number of times, the control circuit responds to the resonant capacitor being discharged a preset number of times and the input voltage is greater than or equal to the minimum operating voltage value of the asymmetric half-bridge flyback circuit.
  • the main power tube and the auxiliary power tube are used for It turns on and off alternately according to the control signal, so that the asymmetric half-bridge flyback circuit operates in a normal working state. Since the charge in the resonant capacitor has been released, after the resonant capacitor is discharged a preset number of times, the control circuit can more accurately respond to an input voltage greater than or equal to the lowest operating voltage value of the asymmetric half-bridge circuit. This enables the control circuit to more effectively protect the asymmetric half-bridge flyback circuit from low voltage, thereby ensuring the safe operation of the asymmetric half-bridge flyback circuit, power module and electronic equipment.
  • the transformer includes a primary winding and a secondary winding.
  • the main power tube is used to keep off according to the control signal
  • the auxiliary power tube is used to keep it off according to the control signal.
  • the signal alternately turns on and off.
  • the number of times the auxiliary power tube is turned on is a preset number.
  • the control circuit can control the resonant capacitor to discharge or stop discharging by controlling the main power tube and the auxiliary power tube in the half-bridge circuit.
  • the control logic is relatively simple and easy to implement, which can improve the efficiency of discharging the resonant capacitor.
  • the auxiliary power tube conducts each time according to the control signal for a first preset time length, and the resonant capacitor is turned on every time.
  • the duration of the first discharge is the first preset duration
  • the duration of each time the auxiliary power tube is turned off according to the control signal is the second preset duration
  • the duration of each time the resonant capacitor stops discharging is the second preset duration.
  • the preset number of times, the first preset duration and the second preset duration may be preset fixed values, or may be calculated by the control circuit.
  • the resonant capacitor and resonant inductor of the asymmetric half-bridge flyback circuit form a resonant circuit
  • the control circuit is used to calculate the first preset time period based on the resonant period of the resonant circuit, or the control circuit is used to calculate the first preset time period based on the resonant capacitor and resonant inductance.
  • the ratio of the first preset time length to the resonant period of the resonant circuit is less than or equal to 0.25, and the sum of the second preset time length and the first preset time length is equal to the period of the control circuit outputting the control signal.
  • the control circuit provided in this embodiment can determine control parameters according to different methods, so that the control circuit can control different asymmetric half-bridge flyback circuits, which can improve the utilization rate and intelligence of the control circuit.
  • the power module includes an auxiliary winding circuit
  • the auxiliary winding circuit includes an auxiliary winding
  • the auxiliary winding is coupled with the primary winding.
  • the main power tube and the auxiliary power tube are used to alternately turn on and off according to the control signal
  • the auxiliary winding circuit is used to supply power to the control circuit.
  • the resonant capacitor discharges to generate electric energy for charging the capacitor in the auxiliary winding circuit.
  • the electrical energy stored in the capacitor can be used later when the auxiliary winding circuit supplies power to the control circuit. Therefore, the utilization rate of the electric energy generated by the resonant capacitor discharge can be improved.
  • a second aspect of this application provides a control circuit for an asymmetric half-bridge flyback circuit.
  • the asymmetric half-bridge flyback circuit is used to receive an input voltage and provide an output voltage.
  • the asymmetric half-bridge flyback circuit includes a half-bridge circuit, a transformer and a resonant capacitor.
  • the half-bridge circuit includes a main power tube and an auxiliary power tube.
  • the control circuit is used to output a control signal to control the asymmetric half-bridge flyback circuit.
  • the control circuit controls the half-bridge circuit to discharge the resonant capacitor according to a preset number of times.
  • the control circuit discharges the resonant capacitor according to a preset number of times after starting. Since the resonant capacitor is periodically discharged a preset number of times based on the control signal, the current generated by a single discharge of the resonant capacitor is small, and excessive current stress will not be generated in the auxiliary power tube, transformer, and rectifier circuit. Therefore, the stable operation of the asymmetric half-bridge flyback circuit, power module and the electronic equipment in which they are located is ensured, and the service life of the asymmetric half-bridge flyback circuit, power module and electronic equipment is improved.
  • the control circuit also detects the voltage value of the input voltage of the asymmetric half-bridge flyback circuit after the resonant capacitor discharges a preset number of times. And the control circuit controls the main power tube and the auxiliary power tube of the asymmetric half-bridge flyback circuit to alternately turn on and off in response to the control circuit, so that the asymmetric half-bridge flyback circuit operates in a normal working state. Since the charge in the resonant capacitor has been released, the control circuit provided by this application can more accurately detect the input voltage when performing low voltage detection on the asymmetric half-bridge flyback circuit after the resonant capacitor has discharged a preset number of times. Therefore, the control circuit can more effectively protect the asymmetric half-bridge flyback circuit from low voltage, thus ensuring the safe operation of the asymmetric half-bridge flyback circuit, power module and electronic equipment.
  • the transformer includes a primary winding and a secondary winding.
  • the control circuit controls the main power tube to remain turned off, and the auxiliary power The tube is alternately turned on and off, and the number of times the auxiliary power tube is turned on is the preset number.
  • the control circuit is also used to obtain the preset number of times.
  • control circuit can control the resonant capacitor to discharge or stop discharging by controlling the main power tube and the auxiliary power tube in the half-bridge circuit.
  • the control logic is relatively simple and easy to implement, which can improve the efficiency of discharging the resonant capacitor.
  • the control circuit before detecting the voltage value of the input voltage of the asymmetric half-bridge flyback circuit, controls the auxiliary power tube to conduct each time for a first preset time period, and the resonant capacitor The duration of each discharge is the first preset duration, the duration of each time the auxiliary power tube is turned off according to the control signal is the second preset duration, and the duration of each time the resonant capacitor stops discharging is the second preset duration.
  • the control circuit is also used to obtain the first preset duration.
  • the preset number of times, the first preset duration and the second preset duration may be preset fixed values, or may be calculated by the control circuit. Then, the control circuit obtains parameters such as the preset number of times and the first preset time length before controlling the resonant capacitor to discharge.
  • the control circuit provided in this embodiment can determine control parameters according to different methods, so that the control circuit can control different asymmetric half-bridge flyback circuits, which can improve the utilization rate and intelligence of the control circuit.
  • the resonant capacitor and the resonant inductor of the asymmetric half-bridge flyback circuit constitute a resonant circuit
  • the control circuit is used to calculate the first preset time period according to the resonant period of the resonant circuit, or the control circuit is used to
  • the first preset time length is calculated based on the resonant capacitance and the resonant inductance.
  • the ratio of the first preset time length to the resonant period of the resonant circuit is less than or equal to 0.25.
  • the sum of the second preset time length and the first preset time length is equal to the control circuit output. Control the period of the signal.
  • a third aspect of this application provides an electronic device, including a power module provided in any embodiment of the first aspect of this application, or a control circuit provided in any embodiment of the second aspect of this application.
  • Figure 1 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • Figure 2 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • Figure 3 is a schematic structural diagram of a power module provided by an embodiment of the present application.
  • Figure 4 is a schematic circuit structure diagram of a power module provided by an embodiment of the present application.
  • FIG. 5 is a simplified circuit diagram of the power module
  • Figure 6 is a schematic diagram of the equivalent circuit after the auxiliary power tube in the power module is turned on;
  • Figure 7 is a schematic circuit structure diagram of a power module provided by an embodiment of the present application.
  • Figure 8 is a control logic diagram of a control circuit in the prior art
  • FIG. 9 is a schematic diagram of the control logic of the control circuit provided by this application.
  • FIG. 10 is a schematic diagram of the control timing of the control circuit provided by this application.
  • Figure 11 is a schematic flow chart of the control circuit provided by this application controlling the asymmetric half-bridge flyback circuit.
  • connection relationship described in this application refers to direct or indirect connection.
  • a and B can be connected directly, or A and B can be connected indirectly through one or more other electrical components.
  • a and C can be directly connected, and C and B can be connected directly. , so that the connection between A and B is realized through C.
  • a connects B described in this application can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components.
  • FIG. 1 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • the electronic device 1 includes a power module 11 and a load 12 .
  • the power module 11 is used to receive the input voltage V in and provide the output voltage V out to power the load 12 .
  • the input voltage V in may be provided by an external power supply, or may also be provided by an internal power supply of the electronic device 1 .
  • the electronic device 1 provided in the embodiment shown in Figure 1 may be a mobile phone, a notebook computer, a computer case, an electric vehicle, a smart speaker, a smart watch or a wearable device or other electrical device.
  • the power module provided by the embodiment of the present application can be applied to the electronic device 1 as shown in FIG. 1 .
  • FIG. 2 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • the electronic device 1 includes a power module 11 .
  • the power module 11 is used to receive the input voltage V in and provide the output voltage V out to power the load subsequently connected to the electronic device 1 .
  • the input voltage V in may be provided by an external power supply, or may also be provided by an internal power supply of the electronic device 1 .
  • the electronic device 1 provided in this embodiment may be a power adapter, a charger, a mobile power supply, or other power supply equipment.
  • the power module provided by the embodiment of the present application can be applied to the electronic device 1 as shown in FIG. 2 .
  • the electronic device 1 may further include multiple power modules 11 , and the multiple power modules 11 provide output voltage V out to power the load 12 .
  • the electronic device 1 may include multiple loads 12 , and the power module 11 provides multiple output voltages V out to power the multiple loads 12 respectively.
  • the electronic device 1 may include multiple power modules 11 and multiple loads 12 , and the multiple power modules 11 respectively provide multiple output voltages V out to power the multiple loads 12 .
  • the input voltage V in may be AC power
  • the power module 11 may include an AC-DC conversion circuit.
  • the input voltage V in may be a direct current
  • the internal power supply may include an energy storage device
  • the power module 11 may include a DC conversion circuit.
  • the energy storage device of the internal power supply can supply power to the power module 11 .
  • the input voltage Vin may be a direct current.
  • the load 12 of the electronic device 1 may include one or more of an electrical device, an energy storage device, or an external device.
  • the load 12 may be a power consumption device of the electronic device 1, such as a processor, a display, etc.
  • the load 12 may be an energy storage device of the electronic device 1, such as a battery.
  • the load 12 may be an external device of the electronic device 1, such as a display, a keyboard and other electronic devices.
  • FIG. 3 is a schematic structural diagram of a power module provided by an embodiment of the present application.
  • the power module 11 includes a control circuit 111 , a DC conversion circuit 112 , an auxiliary winding circuit 113 and a rectifier circuit 114 .
  • the power module 11 is used to receive the input voltage V in provided by the input power supply and provide the output voltage V out to power the load 12 .
  • the control circuit 111 is connected to the DC conversion circuit 112 .
  • the control circuit 111 is used to control the operation of the DC conversion circuit 112.
  • the control circuit may be configured to output a control signal, and the control signal is used to control the DC conversion circuit 112 .
  • the input end of the DC conversion circuit 112 is used to receive the input voltage Vin , and the control circuit 111 controls the DC conversion circuit 112 to process the input voltage Vin and then provide the output voltage V 1 .
  • the input voltage V in is a direct current.
  • the rectifier circuit 114 is used to rectify the output voltage V 1 provided by the DC conversion circuit 112 and then provide the output voltage V out .
  • the auxiliary winding circuit 113 is used to receive power from the transformer in the DC conversion circuit 112 and provide power to the control circuit 111 .
  • the auxiliary winding circuit 113 may include a voltage stabilizing circuit and the like.
  • the primary winding refers to the winding placed on the primary side of the transformer and corresponding to the current of the input voltage V in .
  • the secondary winding refers to the winding placed on the secondary side of the transformer and corresponding to the current of the output voltage V 1 .
  • the auxiliary winding circuit 113 includes an auxiliary winding coupled to the transformer.
  • the main power transistor and the auxiliary power transistor may be Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) or Insulated Gate Bipolar Transistor (Insulated Gate Bipolar Transistor). Gate Bipolar Transistor (IGBT), bipolar power transistor (bipolar power transistor) or wide bandgap semiconductor field effect transistor, etc.
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • IGBT Insulated Gate Bipolar Transistor
  • bipolar power transistor bipolar power transistor
  • wide bandgap semiconductor field effect transistor etc.
  • the main power transistor and the auxiliary power transistor may be different types of transistors respectively.
  • the main power transistor is a MOSFET and the auxiliary power transistor is an IGBT.
  • the main power transistor and the auxiliary power transistor may be transistors of the same type.
  • the main power transistor and the auxiliary power transistor are both MOSFETs. It can be understood that in the embodiment of the present application, only the main power transistor and the auxiliary power transistor are used as MOSFETs for exemplary description, but the embodiment of the present application does not limit the transistor types of the main power transistor and the auxiliary power transistor.
  • the driving mode of the main power tube and the auxiliary power tube is high-level conduction and low-level turn-off.
  • the main power transistor receives a high-level driving signal, and the main power transistor is turned on.
  • the main power tube receives a low-level drive signal and is turned off.
  • the main power tube and the auxiliary power tube can also adopt other driving methods.
  • the embodiment of the present application does not limit the driving method of the main power tube and the auxiliary power tube.
  • the control circuit may include a pulse-width modulation (Pulse-width modulation, PWM) controller, a central processing unit (CPU), other general-purpose processors, and a digital signal processor (DSP). ), application specific integrated circuit (ASIC), off-the-shelf programmable gate array (field-programmable gate array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, etc.
  • PWM pulse-width modulation
  • CPU central processing unit
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA off-the-shelf programmable gate array
  • FPGA field-programmable gate array
  • FIG. 4 is a schematic circuit structure diagram of a power module provided by an embodiment of the present application.
  • the power module 11 includes a DC conversion circuit 112 , a rectifier circuit 114 , an auxiliary winding circuit 113 and a control circuit 111 .
  • the DC conversion circuit 112 in the power module 11 is an asymmetrical half bridge (AHB) flyback circuit 112a as an example.
  • the asymmetric half-bridge flyback circuit 112a specifically includes a half-bridge circuit 1121, a transformer 1122 and a resonant capacitor 1123.
  • the half-bridge circuit 1121 includes a main power transistor Q L and an auxiliary power transistor Q H .
  • the main power transistor Q L and the auxiliary power transistor Q H form an asymmetric half-bridge topology.
  • the control circuit 111 may send a control signal to the main power tube QL and the auxiliary power tube QH , so that the main power tube QL and the auxiliary power tube QH are turned on according to the received control signal.
  • the drain of the main power tube QL receives the input voltage V in
  • the source of the main power tube QL is connected to the drain of the auxiliary power tube QH
  • the source of the auxiliary power tube QH is connected to the reference ground. .
  • the gate of the main power tube QL is used to receive the first control signal GL sent by the control circuit 111, and is turned on according to the first control signal GL .
  • the gate of the auxiliary power tube QH is used to receive the second control signal GH from the control circuit 111, and is turned on according to the second control signal GH .
  • the half-bridge circuit 1121 is used to receive the input voltage V in and provide an output voltage to the primary winding 11221 of the transformer 1122 through the resonant capacitor 1123 according to the control signal provided by the control circuit 111 .
  • the transformer 1122 includes a primary winding 11221, a secondary winding 11222 and a magnetic core 11223.
  • the secondary winding 11222 and the primary winding 11221 of the transformer 1122 are coupled through the magnetic core 11223, and the auxiliary winding 1131 and the primary winding 11221 of the transformer 1122 are coupled through the magnetic core 11223.
  • the primary winding 11221 of the transformer 1122 is used to receive the output voltage of the half-bridge circuit 1121 and generate the primary winding voltage.
  • the secondary winding 11222 of the transformer 1122 is coupled with the primary winding 11221, and a secondary winding voltage is generated on the secondary winding 11222.
  • the secondary rectifier circuit 1125 is used to receive the secondary winding voltage on the secondary winding 11222 and convert it into the output voltage V 1 .
  • one end of the resonant capacitor C r is connected to the source of the main power tube Q L and the drain of the auxiliary power tube Q H , and the other end of the resonant capacitor C r is connected to the same end of the primary winding 11221.
  • the opposite end of the side winding 11221 is connected to the drain of the auxiliary power tube Q H.
  • the output voltage V 1 provided by the secondary winding 11222 of the transformer 1122 is processed by the rectifier circuit 1125 to provide the output voltage V out .
  • the rectifier circuit 1125 includes a diode D 1 and a capacitor C 1 .
  • the anode of diode D 2 is connected to the opposite terminal of secondary winding 11222.
  • the two ends of the capacitor C 1 are respectively connected to the cathode of the diode D 2 and the same terminal of the secondary winding 11222.
  • Auxiliary winding circuit 113 includes auxiliary winding 1131 .
  • Auxiliary winding 1131 is coupled to edge winding 11221 through magnetic core 11223.
  • the primary winding voltage on the primary winding 11221 is coupled to generate an auxiliary winding voltage on the auxiliary winding 1131.
  • the auxiliary winding circuit 113 supplies power to the control circuit 111 according to the auxiliary winding voltage.
  • the auxiliary winding circuit 113 may include a BOOST circuit, a BUCK circuit, a BUCK-BOOST circuit, etc.
  • the auxiliary winding circuit 113 may also be a voltage stabilizing circuit such as a low dropout linear voltage stabilizing circuit (low dropout regulator, LDO).
  • control circuit 111 sends a control signal G to control the main power tube Q L and the auxiliary power tube Q H in the half-bridge circuit 1121 of the asymmetric half-bridge flyback circuit 112a, thereby controlling the asymmetric half-bridge flyback The operating status of circuit 112a.
  • control circuit 111 adjusts the frequency or duty cycle of the control signal G to control the conduction frequency or conduction duration of the main power transistor QL and the auxiliary power transistor QH in the half-bridge circuit 1121, thereby adjusting the half-bridge circuit accordingly.
  • the voltage value of the output voltage of 1121 is used to adjust the voltage value of the output voltage V 1 of the asymmetric half-bridge flyback circuit 112 a and to control the voltage value of the output voltage V out of the power module 11 .
  • the control circuit 111 may send a control signal G to control the turn-on and turn-off of the main power transistor QL and the auxiliary power transistor QH in the half-bridge circuit 1121.
  • the control circuit 111 can control the main power tube QL to be turned on or off by sending a first control signal GL to the main power tube QL , and by sending a second control signal GH to the auxiliary power tube QH. Control the auxiliary power tube Q H to be turned on or off.
  • the first control signal GL and the second control signal GH may include high-level signals or low-level signals.
  • the main power transistor QL is turned on according to the first control signal GL
  • the auxiliary power transistor QH is turned on according to the second control signal GH .
  • the main power transistor QL is turned off according to the first control signal GL
  • the auxiliary power transistor QH is turned off according to the second control signal GH .
  • Figure 5 is a simplified circuit diagram of the power module. According to the power module 11 shown in Figure 4, a simplified circuit as shown in Figure 5 can be obtained.
  • the primary winding 11221 of the transformer 1122 in the asymmetric half-bridge flyback circuit 112a can provide the resonant inductance L r .
  • the resonant inductance L r may be parasitic on the primary winding 11221 of the transformer 1122 .
  • the main power transistor Q L and the auxiliary power transistor Q H of the asymmetric half-bridge flyback circuit 112a are alternately turned on and off.
  • the output voltage V out of the power module 11 is stabilized at the rated output voltage.
  • the voltage value of the rated output voltage is recorded is V 0 .
  • the approximate equation V cr ⁇ N*V out can be obtained, where V cr is the voltage on both sides of the resonant capacitor C r , and N is the turns ratio of the primary winding 11221 and the secondary winding 11222 of the transformer 1122 .
  • the voltage on both sides of the resonant capacitor C r and the output voltage V out of the power module 11 exist in the above approximate equation expressed relationship.
  • the voltage on both sides of the resonant capacitor C r may be much higher than N*V out , making the above equation unable to hold.
  • the control circuit 111 periodically sends a control signal G to the main power tube QL and the auxiliary power tube QH in the asymmetric half-bridge flyback circuit 112a, the controlled main power tube QL and the auxiliary power tube QH Alternately on and off.
  • the control circuit 111 determines the abnormality by monitoring the voltage of the auxiliary winding 1131 or other methods.
  • the control circuit 111 can immediately stop sending the control signal G to the main power tube QL and the auxiliary power tube QH , so that both the main power tube QL and the auxiliary power tube QH remain closed, and control the asymmetric half-bridge flyback circuit 112a from The working state in which the main power tube QL and the auxiliary power tube QH are alternately turned on is converted to the working state in which both the main power tube QL and the auxiliary power tube QH are turned off, thereby realizing the protection of the asymmetric half-bridge flyback circuit 112a. . It can be understood that if there is a large amount of charge in the resonant capacitor C r at this time, it will not be released.
  • the control circuit 111 is powered on again and starts to supply power to the main power tube QL and the auxiliary power tube QH in the asymmetric half-bridge flyback circuit 112a.
  • Send control signal G The main power tube QL and the auxiliary power tube QH are alternately turned on and off according to the control signal.
  • the asymmetric half-bridge flyback circuit 112a is converted from the working state in which both the main power transistor QL and the auxiliary power transistor QH are turned off to the working state again.
  • Figure 6 is a schematic diagram of the equivalent circuit after the auxiliary power transistor in the power module is turned on. It can be seen that when the auxiliary power transistor Q H in the power module 11 is turned on, the current generated by the charge discharge in the resonant capacitor C r will be directly transmitted to the secondary rectifier circuit 1125 through the transformer 1122 . Therefore, if there is a large amount of charge in the resonant capacitor C r before the auxiliary power tube Q H is turned on, then when the auxiliary power tube Q H is turned on, the current generated by the resonant capacitor C r will flow through the auxiliary power tube Q H and the transformer 1122 And great current stress is generated on the secondary rectifier circuit 1125.
  • FIG. 7 is a schematic circuit structure diagram of a power module provided by an embodiment of the present application.
  • the power module 11 shown in FIG. 7, based on the power module 11 shown in FIG. 4, also includes a resonant inductor 1124.
  • the source of the auxiliary power transistor Q H is connected to one end of the resonant inductor 1124, and the other end of the resonant inductor 1124 is connected to the opposite end of the primary winding 11221.
  • the simplified structure of the power module 11 as shown in FIGS. 5 and 6 can also be realized.
  • the control circuit 111 when the control circuit 111 is powered on again, the control circuit 111 needs to first control the auxiliary power transistor Q H to be turned on for a period of time, so that the input voltage V in can charge the bootstrap capacitor that controls the power Q L . Subsequently, the main power tube Q L and the auxiliary power tube Q H that can be controlled by the control circuit 111 are alternately turned on and off, so that the main power tube Q L and the auxiliary power tube Q H of the asymmetric half-bridge flyback circuit 112 a are turned on alternately. and shutdown. That is, the asymmetric half-bridge flyback circuit 112a works in a normal working state and outputs a rated voltage. At the same time, when the auxiliary power transistor Q H is turned on, in addition to the input voltage V in charging the bootstrap capacitor of the main power Q L , the charge existing in the resonant capacitor C r will also be released.
  • FIG. 8 is a control logic diagram of a control circuit in the prior art.
  • the control circuit 111 is powered on at time t0 and completes startup at time t2 . Subsequently, starting at time t 2 , the control circuit 111 sends the second control signal G H to the auxiliary power transistor Q H and continues until time t 3 . Then the auxiliary power transistor Q H is turned on between time t 2 and time t 3 according to the second control signal GH , and the main power transistor Q L remains off.
  • the control circuit 111 controls the main power transistor QL and the auxiliary power transistor QH of the asymmetric half-bridge flyback circuit 112a to alternately conduct.
  • the non-control circuit 111 can control by periodically sending control signals G 1 , G 2 . . .
  • the current generated when the resonant capacitor C r is discharged generates great current stress on the auxiliary power transistor Q H , the transformer 1122 and the rectifier circuit 114 , affecting the stable operation of the power module 11 and the electronic equipment 10 in which it is located, and reducing the power supply module.
  • the service life of the group 11 and electronic device 10 may even cause damage.
  • the control circuit 111 also needs to control the main power transistor Q L and the auxiliary power transistor Q H of the asymmetric half-bridge flyback circuit 112 a to conduct alternately and output the rated voltage.
  • the input voltage V in of 112a performs low voltage detection. Specifically, when the control circuit 111 determines that the voltage value of the input voltage V in is greater than or equal to the minimum operating voltage value, it controls the main power tube Q L and the auxiliary power tube Q H of the asymmetric half-bridge flyback circuit 112 to alternately conduct.
  • the asymmetric half-bridge flyback circuit 112a outputs a rated voltage.
  • control circuit 111 determines that the voltage value of the input voltage Vin is less than the minimum operating voltage value, it performs low-voltage protection on the asymmetric half-bridge flyback circuit 112a, for example, controls the asymmetric half-bridge flyback circuit 112a to stop working.
  • the voltage V cr on both sides of the resonant capacitor C r may be much greater than the voltage V cr at the output end of the power module 11 Output voltage V out *N.
  • the voltage V AUX of the auxiliary winding 1131 will be clamped by the lower of V out *N and V cr .
  • the control circuit 111 performs low-voltage detection on the input voltage V in at time t 1 in Figure 10 , the input voltage V in cannot be accurately detected through the auxiliary winding voltage VAUX , causing the control circuit 111 to be unable to effectively detect asymmetric
  • the half-bridge flyback circuit 112a performs low-voltage protection, which affects the operation of the asymmetric half-bridge flyback circuit 112a, the power module 11 and the electronic device 10. Therefore, at what time the control circuit 111 can more accurately and effectively detect the input voltage V in of the asymmetric half-bridge flyback circuit 112a is also a technical problem that needs to be solved in this field.
  • the present application provides a control circuit, power module and electronic device for an asymmetric half-bridge flyback circuit, which can be used to overcome the problems existing in the prior art shown in Figure 8 above.
  • the technical solution of the present application will be described in detail below with specific examples. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.
  • FIG. 9 is a schematic diagram of the control logic of the control circuit provided by this application.
  • the control circuit provided by this application can be applied to the power module 11 shown in Figure 4 or Figure 7 .
  • the control circuit 111 provided in this application can be specifically used to control the asymmetric half-bridge flyback circuit 112a as shown in Figure 4 or Figure 7 .
  • the DC conversion circuit 112 is the asymmetric half-bridge flyback circuit 112 a in FIG. 4 or FIG. 7 as an example. It can be understood that the control logic executed by the control circuit 111 provided in this application can also be applied to the control of other types of DC conversion circuits 112 by the control circuit 111 .
  • the control circuit 111 is powered on and starts. For example, the control circuit 111 may start after receiving external power supply at time t 0 . Alternatively, the control circuit 111 may start the control circuit 111 after receiving the start command at time t 0 based on receiving external power supply. Subsequently, the control circuit 111 completes startup at time t21 .
  • the embodiment of the present application does not limit the startup performed by the control circuit 111.
  • the control circuit 111 can perform startup steps such as initialization and driver loading.
  • the control circuit 111 can control the resonant capacitor C r to discharge according to a preset number of times.
  • the control circuit 111 sends a control signal to the resonant capacitor C r to control the number of times the resonant capacitor C r is discharged to be a preset number of times.
  • the resonant capacitor C r is discharged a preset number of times according to the received control signal.
  • control circuit 111 may send a control signal to the half-bridge circuit to control the half-bridge circuit to discharge the resonant capacitor C r .
  • the auxiliary power tube QH periodically alternately turns on and off according to the second control signal GH , and the main power tube QL remains turned off.
  • the input voltage V in charges the bootstrap capacitor of the main power Q L , and at the same time the resonant capacitor C r is discharged.
  • the control circuit 111 may periodically send the second control signal GH to the auxiliary power transistor QH , and the second control signal GH sent each time lasts for the first preset time length T1. After the first preset time period T1, the control circuit 111 stops sending the second control signal GH to the auxiliary power transistor QH , and stops sending the second control signal GH each time for the second preset time period T2. For example, in the example shown in FIG. 9 , after time t 21 , the control circuit 111 first sends the second control signal G H that lasts for the first preset time length T1 to the auxiliary power transistor Q H . After the second preset time period T2, the control circuit 111 sends the second control signal G H1 to the auxiliary power transistor Q H for the first preset time period T1, and so on.
  • the control circuit 111 controls the resonant capacitor C r to discharge a preset number of times, then the auxiliary power tube Q H will be turned on according to the control signal reaches the preset number of times.
  • the auxiliary power tube QH receives the second control signal GH , it is turned on for the first preset time period T1 according to the second control signal GH and then closed. If the second control signal G H is received again after the second preset time period T2, it will be turned on again according to the second control signal G H and then closed for the first preset time period T1, ultimately realizing the alternation of the auxiliary power tube Q H according to the control signal.
  • the control circuit 111 controls the resonant capacitor C r to discharge a preset number of times, then the auxiliary power tube Q H will be turned on according to the control signal reaches the preset number of times.
  • the auxiliary power tube QH receives the second control signal GH , it is turned on for the first preset time period T1 according to the second control signal GH and
  • the length of one cycle in which the auxiliary power transistor Q H is turned on and off is the sum of the first preset time length T1 and the second preset time length T2, which is recorded as T3. Then the length between time t 21 and time t 31 is the product of the preset number of times and T3, which is recorded as the preset time. That is, after the control circuit 111 completes starting, within the preset time between time t 21 and time t 31 , the resonant capacitor C r is controlled to discharge the number of times to reach the preset number.
  • the resonant capacitor C r can be discharged through resonance.
  • the resonant circuit in which the resonant capacitor C r resonates includes the resonant capacitor C r and the resonant inductor L r .
  • the resonant inductance L r may be parasitic from the leakage inductance on the primary winding 11221 .
  • the resonant inductor L r may be a device provided in the half-bridge circuit 1121 .
  • the auxiliary power transistor Q H when the auxiliary power transistor Q H is turned on, zero-input corresponding resonance occurs in the resonant circuit in the half-bridge circuit 1121.
  • the resonant capacitor C r periodically alternately discharges and stops discharging, so that the charge in the resonant capacitor C r is gradually released.
  • the voltage value V cr waveform of the resonant capacitor C r shown in Figure 9 the voltage on both sides of the resonant capacitor C r shows a "step-like" decreasing pattern.
  • the first preset duration T1 of the second control signal G H is less than the predetermined value.
  • the predetermined value may be 25% of the resonant period of the resonant circuit in the half-bridge circuit 1121.
  • the first preset time period T1 may be 10%-15% of the resonance period, etc.
  • the control circuit 111 controls the resonant capacitor C r to discharge a preset number of times, and the control circuit 111 sends the second control signal G H to the auxiliary power transistor Q H a preset number of times, then the control circuit 111 can stop. Continue to send the second control signal G H to the auxiliary power transistor Q H.
  • the preset number of times, the first preset time length T1 and the second preset time length T2 may be preset fixed values, or may be calculated by the control circuit.
  • the preset number of times can be set to 20 in advance, and the first preset duration T1 and the second preset duration T2 can also be fixed values set in advance.
  • the control circuit 111 can obtain one or more of the preset number of times, the first preset time length T1 , and the second preset time length T2 .
  • the preset number of times can be set to 20 in advance, and the first preset duration T1 and the second preset duration T2 can be calculated in real time. Then the control circuit 111 can obtain the stored preset times after time t 0 and before time t 21 , and calculate the first preset time length T1 and the second preset time according to the obtained circuit parameters of the asymmetric half-bridge flyback circuit 112a. Let the duration be T2.
  • the control circuit 111 can obtain the circuit parameters of the asymmetric half-bridge flyback circuit 112a through a Universal Asynchronous Receiver/Transmitter (UART) interface or other means.
  • the circuit parameters include the capacitance value of the resonant capacitor C r , the inductance value of the resonant inductor L r , the frequency f pre at which the control circuit 111 sends the second control signal G H and the preset number of times 20 for the auxiliary power tube Q H to be turned on, etc.
  • the circuit parameters obtained by the control circuit 111 may be configured by engineers.
  • the control circuit 111 can calculate the first preset time length T1 and the second preset time length T2 based on these circuit parameters after time t 0 and before time t 21 .
  • the first preset time length T1 may be 10%-15% of the length of the resonance period formed by the resonant capacitor C r and the resonant inductor L r .
  • the first preset time length T1 is 300 ns.
  • the period t pre during which the control circuit 111 sends the second control signal G H may be 10 times the first preset time length T1. Because the sum of the first preset time length T1 and the second preset time length T2 is equal to the period t pre during which the control circuit 111 outputs the second control signal G H. Therefore, after the first preset time length T1 is determined, the second preset time length T2 can be obtained according to the difference between the period t pre during which the control circuit 111 sends the second control signal G H and the first preset time length T1.
  • the control circuit 111 stops sending the second control signal GH to the auxiliary power transistor QH , so that the resonant capacitor C r stops discharging. Since the control circuit 111 controls the auxiliary power transistor Q H to be turned on periodically from time t 21 to time t 31 , the resonant capacitor C r is discharged, and the voltage V cr on both sides of the resonant capacitor C r decreases. Therefore, at time t 31 , the difference between the voltage V cr on both sides of the resonant capacitor C r and N*V out is less than the preset value. Among them, the default value can be set smaller. Then at time t 31 , the voltage V cr on both sides of the resonant capacitor C r is close to and slightly larger than N*V out , making the approximate equation V cr ⁇ N*V out true.
  • the voltage Vcr on both sides of the resonant capacitor Cr decreases from Vcr_ini to between Vcr2 and Vcr1 .
  • the voltage V cr on both sides of the resonant capacitor C r can also be reduced from V cr_ini to other voltage values smaller than V cr1 or larger than V cr2 .
  • the voltage V cr on both sides of the resonant capacitor C r remains unchanged from time t 31 to time t 4 .
  • the control circuit 111 controls the auxiliary power transistor Q H to be turned on periodically, in addition to discharging the resonant capacitor C r , it will also charge the bootstrap capacitor of the main power transistor Q L. Therefore, after time t31 , the main power tube QL completes the bootstrap charging, and the control circuit 111 can send a control signal to the main power tube QL , so that the main power tube QL is turned on according to the control signal.
  • the control circuit 111 may periodically alternately send the first control signal G L to the main power transistor Q L of the asymmetric half-bridge flyback circuit 112a and to the auxiliary power transistor Q H
  • the second control signal G H is sent so that the main power tube Q L and the auxiliary power tube Q H are alternately turned on and off according to the received control signal.
  • the asymmetric half-bridge flyback circuit 112a can operate in a normal working state and output a rated voltage according to the input voltage.
  • control circuit 111 when the control circuit 111 provided by the embodiment of the present application controls the discharge of the resonant capacitor C r , it does not continuously turn on the auxiliary power tube Q H to continuously discharge the resonant capacitor C r , but controls the auxiliary power tube Q H to periodically conduct Turning on and off causes the resonant capacitor C r to discharge periodically. Therefore, between time t 21 and time t 31 , the current generated by the discharge of the resonant capacitor C r flows through the auxiliary power transistor Q H for the first preset time period, and then stops for the second preset time period.
  • the current generated by the resonant capacitor C r being discharged within the first preset time period T1 is small and will not cause any leakage between the auxiliary power tube QH and the transformer. Excessive current stress is generated on 1122 and rectifier circuit 114.
  • the degree of change in the current generated by each discharge of the resonant capacitor C r is small. This is reflected in the waveform diagram of the voltage change on both sides of the resonant capacitor C r as shown in Figure 9.
  • the slope of the decreasing waveform of the voltage V cr on both sides of the resonant capacitor C r is small.
  • the resonant capacitance C r The charge stored in the capacitor decreases, and the voltage on both sides of the resonant capacitor C r decreases. This further reduces the difference between the reflected voltage of the residual voltage of the resonant capacitor C r and the residual voltage of the output capacitor, so the current stress generated each time the resonant capacitor C r is discharged will be lower than the current stress generated during the previous discharge.
  • control circuit 111 controls the asymmetric half-bridge flyback circuit 112a, reducing the current discharged by the resonant capacitor C r on the auxiliary power transistor Q H , the transformer 1122 and the rectifier circuit 114 during discharge.
  • the generated current stress ensures the stable operation of the asymmetric half-bridge flyback circuit 112a, the power module 11 and the electronic equipment 10 in which it is located, and improves the stability of the asymmetric half-bridge flyback circuit 112a, the power module 11 and the electronic equipment 10. service life.
  • the control circuit 111 controls the resonant capacitor C r to discharge between time t 21 and time t 31 . After time t31 , in response to the number of times the resonant capacitor C r is discharged reaching the preset number, the control circuit 111 can start to perform low voltage detection on the input voltage V in of the asymmetric half-bridge flyback circuit 112a. In one embodiment, the above-mentioned low voltage detection of the input voltage V in of the asymmetric half-bridge flyback circuit 112a may also be referred to as “Brown In”.
  • FIG. 10 is a schematic diagram of the control timing of the control circuit provided by this application, showing the control timing after the control circuit 111 is powered on. Among them, at time t0 , the control circuit 111 is powered on and starts. At time t 21 , after the control circuit 111 completes the startup, it controls the auxiliary power transistor Q H in the asymmetric half-bridge flyback circuit 112a to be turned on and off periodically, so that the resonant capacitor C r is periodically discharged. Until time t31 , the control circuit 111 responds to the resonant capacitor C r discharging a preset number of times, and the control circuit 111 can start to perform low voltage detection on the input voltage Vin of the asymmetric half-bridge flyback circuit 112a.
  • the control circuit 111 specifically determines that the voltage value of the input voltage V in is greater than the minimum operating voltage value. Then after time t 4 , the control circuit 111 responds that the voltage value of the input voltage V in is greater than the minimum operating voltage value, and the control circuit 111 sends a signal to the main power transistor Q L and the auxiliary power transistor Q H of the asymmetric half-bridge flyback circuit 112 a.
  • the control signal causes the main power transistor QL and the auxiliary power transistor QH to alternately turn on and off according to the control signal, and the asymmetric half-bridge flyback circuit 112a operates in a normal working state. When the asymmetric half-bridge flyback circuit 112a is operating in a normal working state, it can be used to receive the input voltage V in and provide the output voltage V 1 , and the voltage value of the output voltage V 1 is the rated voltage.
  • the low voltage detection performed by the control circuit 111 on the input voltage Vin of the asymmetric half-bridge flyback circuit 112a specifically includes the following detection logic.
  • N p is the number of turns of the primary winding 11221
  • Na is the number of turns of the auxiliary winding 114.
  • Na is the number of turns of the secondary winding 11222. Since the control circuit 111 has controlled the resonant capacitor C r to discharge before time t31 , the approximate equation V Cr ⁇ N p *N s *Vo is established at time t31 . Subsequently, the control circuit 111 adds the detected V aux1 and V aux2 to obtain the voltage value of the input voltage Vin.
  • the detected voltage value of the input voltage V in may have a certain error range. That is, the voltage value of the input voltage V in detected by the control circuit 111 is approximately equal to the actual voltage value.
  • the control circuit 111 in response to the voltage value of the input voltage V in being less than the minimum operating voltage value, controls the main power transistor Q L and the auxiliary power transistor Q H in the asymmetric half-bridge flyback circuit 112 a All remain off, so that the asymmetric half-bridge flyback circuit 112a stops inputting the voltage V in and also stops providing the output voltage V 1 , thereby realizing low-voltage protection for the asymmetric half-bridge flyback circuit 112a.
  • control circuit 111 provided in this embodiment can perform low voltage detection on the input voltage Vin of the asymmetric half-bridge flyback circuit 112a immediately after controlling the resonant capacitor C r to discharge a preset number of times.
  • the asymmetric half-bridge flyback circuit 112a is controlled to operate normally. It can be seen from the waveform diagram in Figure 9 that when the control circuit 111 performs low voltage detection at time t31 , V Cr is close to or lower than N*V o because the charge in the resonant capacitor C r has been released.
  • the control circuit 111 can detect the input voltage V in more accurately, so that the control circuit 111 can more effectively perform low-voltage protection on the asymmetric half-bridge flyback circuit 112a, thereby ensuring the asymmetric half-bridge flyback circuit 112a. Safe operation of the bridge flyback circuit 112a, the power module 11 and the electronic device 1.
  • the power circuit 11 provided by this application also includes a power supply unit.
  • the power supply unit can be used to store electrical energy, and before time t4 , the power supply unit can be used to supply power to the power supply circuit 11 through its stored electrical energy.
  • the asymmetric half-bridge flyback circuit 112a can output the rated voltage according to the input voltage V in .
  • the auxiliary winding 1131 is coupled to the edge winding 11221 through the magnetic core 11223, the input voltage Vin generates a primary winding voltage on the primary winding 11221. Through the coupling of the transformer, an auxiliary winding voltage can be generated on the auxiliary winding 1131.
  • the auxiliary winding circuit 113 supplies power to the control circuit 111 according to the auxiliary winding voltage. After time t4 , the auxiliary winding circuit 113 supplies power to the control circuit 111, and the power supply unit stops supplying power to the control circuit 111.
  • auxiliary winding circuit 113 includes a capacitor and a diode. Between time t 21 and time t 31 , when the auxiliary power transistor Q H is turned on and the resonant capacitor C r is discharged, the primary winding voltage will also be generated on the primary winding 11221. The primary winding voltage can generate an auxiliary winding voltage on the auxiliary winding 1131 through coupling of the transformer. Since the voltage value generated by the discharge of the resonant capacitor C r is small and the diode cannot be turned on, the auxiliary winding circuit 113 cannot supply power to the control circuit 111 according to the auxiliary winding voltage.
  • the auxiliary winding voltage generated by the discharge of the resonant capacitor C r after the auxiliary power transistor Q H is turned on is used to charge the capacitor in the auxiliary winding circuit 113.
  • the electric energy generated by the capacitor discharging the resonant capacitor C r is stored. It can be understood that the electric energy stored in the capacitor between time t 21 and time t 31 can be used when the auxiliary winding circuit 113 supplies power to the control circuit 111 after time t 4 . Therefore, this embodiment can also improve the utilization rate of electric energy generated by discharging the resonant capacitor C r .
  • FIG 11 is a schematic flow chart of the control circuit provided by this application controlling the asymmetric half-bridge flyback circuit.
  • the control circuit 111 is powered on and starts up. Subsequently, in S101, the control circuit 111 controls the auxiliary power transistor Q H in the asymmetric half-bridge flyback circuit 112a to conduct for the first preset time period T1. In S102, the control circuit 111 controls the auxiliary power transistor QH in the asymmetric half-bridge flyback circuit 112a to stop conducting for the second preset time period T2. The control circuit 111 repeatedly executes S101-S102 until the auxiliary power transistor QH is turned on for a preset number of times.
  • the control circuit 111 performs low voltage detection on the input voltage Vin of the asymmetric half-bridge flyback circuit 112a.
  • the control circuit 111 responds that the voltage value of the input voltage V in is greater than or equal to the minimum operating voltage value
  • the asymmetric half-bridge flyback circuit 112a is controlled to operate in the normal operating state to cause the asymmetric half-bridge flyback Circuit 112a outputs rated voltage.
  • the control circuit 111 performs low-voltage protection on the asymmetric half-bridge flyback circuit 112a in response to the voltage value of the input voltage V in being less than the minimum operating voltage value.
  • This application also provides an electronic device, including the control circuit 111 provided in any embodiment of this application, or the power module 11 provided in any embodiment of this application.
  • the control circuit 111 as the execution subject may include a hardware structure. and/or software modules to implement the above functions in the form of hardware structures, software modules, or hardware structures plus software modules. Whether one of the above functions is performed as a hardware structure, a software module, or a hardware structure plus a software module depends on the specific application and design constraints of the technical solution. It should be noted that it should be understood that the division of each module of the above device is only a division of logical functions. In actual implementation, they can be fully or partially integrated into a physical entity, or they can also be physically separated.
  • modules can all be implemented in the form of software calling through processing components; they can also all be implemented in the form of hardware; some modules can also be implemented in the form of software calling through processing components, and some modules can be implemented in the form of hardware. It can be a separate processing element, or it can be integrated into a chip of the above-mentioned device. In addition, it can also be stored in the memory of the above-mentioned device in the form of program code, and called and executed by a certain processing element of the above-mentioned device. Determine the function of the module. The implementation of other modules is similar. In addition, all or part of these modules can be integrated together or implemented independently.
  • the processing element described here may be an integrated circuit with signal processing capabilities.
  • each step of the above method or each of the above modules can be completed by instructions in the form of hardware integrated logic circuits or software in the processor element.
  • the above modules may be one or more integrated circuits configured to implement the above methods, such as: one or more application specific integrated circuits (ASICs), or one or more digital signal processors ( digital signal processor (DSP), or one or more field programmable gate arrays (field programmable gate array, FPGA), etc.
  • ASICs application specific integrated circuits
  • DSP digital signal processor
  • FPGA field programmable gate array
  • the processing element can be a general-purpose processor, such as a central processing unit (Central Processing Unit, CPU) or other processors that can call the program code.
  • these modules can be integrated together and implemented in the form of a system-on-a-chip (SOC).
  • SOC system-on-a-chip
  • the steps performed by the control circuit 111 may be implemented in whole or in part by software, hardware, firmware, or any combination thereof.
  • software When implemented using software, it may be implemented in whole or in part in the form of a computer program product.
  • the computer program product includes one or more computer instructions.
  • the computer program instructions When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device.
  • the computer instructions may be stored in or transmitted from one computer-readable storage medium to another, e.g., the computer instructions may be transferred from a website, computer, server, or data center Transmission to another website, computer, server or data center by wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) means.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains one or more available media integrated.
  • the available media may be magnetic media (eg, floppy disk, hard disk, magnetic tape), optical media (eg, DVD), or semiconductor media (eg, solid state disk (SSD)), etc. .
  • This application also provides a computer-readable storage medium.
  • the computer-readable storage medium stores computer instructions. When the computer instructions are executed, they can be used to perform any of the methods performed by the control circuit 111 in the foregoing embodiments of this application.
  • the embodiment of the present application also provides a chip that runs instructions, and the chip is used to execute any of the methods executed by the control circuit 111 as mentioned above in this application.
  • An embodiment of the present application also provides a computer program product.
  • the program product includes a computer program.
  • the computer program is stored in a storage medium.
  • At least one processor can read the computer program from the storage medium.
  • the at least one processor can read the computer program from the storage medium.
  • When a processor executes the computer program it may implement any method executed by the control circuit 111 as described above in this application.
  • the aforementioned program can be stored in a computer-readable storage medium.
  • the steps including the above method embodiments are executed; and the aforementioned storage medium includes various media that can store program codes, such as ROM, magnetic disk, or optical disk.

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Abstract

本申请提供一种非对称半桥反激电路的控制电路、电源模组和电子设备。控制电路用于输出控制信号控制非对称半桥反激电路。控制电路在启动后，非对称半桥反激电路中的谐振电容根据控制电路发送的控制信号按照预设次数放电。响应于谐振电容放电的次数达到预设次数、且输入电压大于或等于非对称半桥反激电路的最低工作电压值，非对称半桥反激电路中的主功率管和辅助功率管交替导通和关断。本申请提供的控制电路在谐振电容放电时，谐振电容放电所产生的电流较小，不会产生较大的电流应力。因此能够保证非对称半桥反激电路的控制电路、电源模组和电子设备的稳定运行并提高使用寿命。

Description

非对称半桥反激电路的控制电路、电源模组和电子设备 技术领域
本申请涉及电源技术领域，尤其涉及一种非对称半桥反激电路的控制电路、电源模组和电子设备。
背景技术
现有技术中，电源模块通常包括直流变换电路和控制电路。控制电路用于输出控制信号控制直流变换电路。以直流变换电路为非对称半桥反激电路为例，非对称半桥反激电路包括半桥电路、变压器和谐振电容。半桥电路包括主功率管和辅助功率管。当控制电路启动后，控制电路需要控制辅助功率管导通一段时间，使输入电压为主管功率的自举电容充电。当谐振电容存储的电荷较多时，谐振电容中电荷放电将产生的较大的电流，对辅助功率管和整流电路产生极大的冲击，严重影响器件寿命甚至可能导致器件直接损坏。
发明内容
本申请提供一种非对称半桥反激电路的控制电路、电源模组和电子设备，用于降低非对称半桥反激电路中谐振电容放电产生的电流。
本申请第一方面提供一种电源模组，包括：非对称半桥反激电路和控制电路。非对称半桥反激电路用于接收输入电压并提供输出电压。非对称半桥反激电路包括变压器、谐振电容、主功率管和辅助功率管。控制电路用于输出控制信号控制非对称半桥反激电路。
其中，谐振电容用于根据控制信号按照预设次数放电。在一种实施例中，在控制电路启动后，谐振电容用于根据控制信号按照预设次数放电。由于谐振电容是根据控制信号周期性放电预设次数次，使得谐振电容单次放电所产生的电流较小，不会在辅助功率管、变压器以及整流电路等产生 过大的电流应力。因此保证了非对称半桥反激电路、电源模组及其所在电子设备的稳定运行，提高了非对称半桥反激电路、电源模组及电子设备的使用寿命。
在谐振电容放电预设次数后，控制电路响应于谐振电容放电的次数达到预设次数、且输入电压大于或等于非对称半桥反激电路的最低工作电压值，主功率管和辅助功率管用于根据控制信号交替导通和关断，使非对称半桥反激电路运行于正常工作状态。由于谐振电容内的电荷已经被释放，因此在谐振电容放电预设次数后，控制电路能够对更加准确地响应于输入电压大于或等于非对称半桥电路的最低工作电压值。使得控制电路能更加有效地对非对称半桥反激电路进行低电压保护，进而保证了非对称半桥反激电路、电源模组及电子设备的安全运行。
在本申请第一方面一实施例中，变压器包括原边绕组和副边绕组，在谐振电容放电的次数达到预设次数前，主功率管用于根据控制信号保持关断，辅助功率管用于根据控制信号交替导通和关断。辅助功率管的导通次数为预设次数，辅助功率管导通时谐振电容放电，辅助功率管关断时谐振电容停止放电。本实施例中，控制电路可以通过控制半桥电路中主功率管和辅助功率管的方式，控制谐振电容放电或者停止放电，控制逻辑较为简单，易于实现，能够提高对谐振电容放电的效率。
在本申请第一方面一实施例中，在控制电路启动后、谐振电容放电的次数达到预设次数前，辅助功率管根据控制信号每次导通的时长为第一预设时长，谐振电容每次放电的时长为第一预设时长，辅助功率管根据控制信号每次关断的时长为第二预设时长，谐振电容每次停止放电的时长为第二预设时长。本实施例中，控制电路控制辅助功率管导通时，由于辅助功率管导通的第一预设时长较小，谐振电容单次在第一预设时长内放电所产生的电流较小，因此不会在辅助功率管、变压器以及整流电路上产生过大的电流应力。
在本申请第一方面一实施例中，预设次数、第一预设时长和第二预设时长可以是预设的固定值，也可以是由控制电路计算得到的。例如，非对称半桥反激电路的谐振电容和谐振电感构成谐振电路，控制电路用于根据 谐振电路的谐振周期计算第一预设时长，或者控制电路用于根据谐振电容、谐振电感计算第一预设时长，第一预设时长与谐振电路的谐振周期的时长之比小于或等于0.25，第二预设时长与第一预设时长之和等于控制电路输出控制信号的周期。本实施例提供的控制电路能够根据不同的方式确定控制参数，使得控制电路能够控制不同的非对称半桥反激电路，能够提高了控制电路的利用率和智能化程度等。
在本申请第一方面一实施例中，电源模组包括辅助绕组电路，辅助绕组电路包括辅助绕组，辅助绕组与原边绕组耦合。其中，主功率管和辅助功率管用于根据控制信号交替导通和关断时，辅助绕组电路用于为控制电路供电。当主功率管和辅助功率管根据控制信号交替导通和关断之前，辅助功率管导通且主功率管保持关断时，谐振电容放电产生电能用于向辅助绕组电路中的电容充电。电容存储的电能可用于之后辅助绕组电路向控制电路供电时使用。因此能够提高谐振电容放电产生的电能的利用率。
本申请第二方面提供一种非对称半桥反激电路的控制电路，非对称半桥反激电路用于接收输入电压并提供输出电压。非对称半桥反激电路包括半桥电路、变压器和谐振电容。半桥电路包括主功率管和辅助功率管。控制电路用于输出控制信号控制非对称半桥反激电路。
其中，控制电路控制电路控制半桥电路根据预设次数对谐振电容放电。在一种实施例中，控制电路在启动后根据预设次数对谐振电容放电。由于谐振电容是根据控制信号周期性放电预设次数次，使得谐振电容单次放电所产生的电流较小，不会在辅助功率管、变压器以及整流电路等产生过大的电流应力。因此保证了非对称半桥反激电路、电源模组及其所在电子设备的稳定运行，提高了非对称半桥反激电路、电源模组及电子设备的使用寿命。
控制电路在谐振电容放电预设次数后，还检测所述非对称半桥反激电路的输入电压的电压值。并且控制电路响应于控制电路控制非对称半桥反激电路的主功率管和辅助功率管交替导通和关断，使非对称半桥反激电路运行于正常工作状态。由于谐振电容内的电荷已经被释放，因此本申请提供的控制电路在谐振电容放电预设次数后，对非对称半桥反激电路进行低 电压检测时，能够对更加准确地检测得到输入电压。因此控制电路能更加有效地对非对称半桥反激电路进行低电压保护，进而保证了非对称半桥反激电路、电源模组及电子设备的安全运行。
在本申请第二方面一实施例中，变压器包括原边绕组和副边绕组，在检测非对称半桥反激电路的输入电压的电压值前，控制电路控制主功率管保持关断，辅助功率管交替导通和关断，辅助功率管的导通次数为预设次数，辅助功率管导通时谐振电容放电，辅助功率管关断时谐振电容停止放电。在本申请第二方面一实施例中，控制电路还用于获取预设次数。本实施例中，控制电路可以通过控制半桥电路中主功率管和辅助功率管的方式，控制谐振电容放电或者停止放电，控制逻辑较为简单，易于实现，能够提高对谐振电容放电的效率。
在本申请第二方面一实施例中，在检测非对称半桥反激电路的输入电压的电压值前，控制电路控制辅助功率管根每次导通的时长为第一预设时长，谐振电容每次放电的时长为第一预设时长，辅助功率管根据控制信号每次关断的时长为第二预设时长，谐振电容每次停止放电的时长为第二预设时长。在本申请第二方面一实施例中，控制电路还用于获取第一预设时长。本实施例中，控制电路控制辅助功率管导通时，由于辅助功率管导通的第一预设时长较小，谐振电容单次在第一预设时长内放电所产生的电流较小，因此不会在辅助功率管、变压器以及整流电路上产生过大的电流应力。
在本申请第二方面一实施例中，预设次数、第一预设时长和第二预设时长可以是预设的固定值，也可以是由控制电路计算得到的。则控制电路在控制谐振电容放电之前，获取预设次数、第一预设时长等参数。本实施例提供的控制电路能够根据不同的方式确定控制参数，使得控制电路能够控制不同的非对称半桥反激电路，能够提高了控制电路的利用率和智能化程度等。
在本申请第一方面一实施例中，非对称半桥反激电路的谐振电容和谐振电感构成谐振电路，控制电路用于根据谐振电路的谐振周期计算第一预设时长，或者控制电路用于根据谐振电容、谐振电感计算第一预设时长， 第一预设时长与谐振电路的谐振周期的时长之比小于或等于0.25，第二预设时长与第一预设时长之和等于控制电路输出控制信号的周期。
本申请第三方面提供一种电子设备，包括如本申请第一方面任一项实施例提供的电源模组，或者如本申请第二方面任一实施例提供的控制电路。
附图说明
图1为本申请实施例提供的电子设备的一种结构示意图；
图2为本申请实施例提供的电子设备的一种结构示意图；
图3为本申请实施例提供的电源模组的一种结构示意图；
图4为本申请实施例提供的一种电源模组的电路结构示意图；
图5为电源模组的一种简化电路图；
图6为电源模组中辅助功率管导通后的等效电路示意图；
图7为本申请实施例提供的一种电源模组的电路结构示意图；
图8为一种现有技术中控制电路的控制逻辑示意图；
图9为本申请提供的控制电路的控制逻辑示意图；
图10为本申请提供的控制电路的控制时序示意图；
图11为本申请提供的控制电路对非对称半桥反激电路进行控制的流程示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的本申请的实施例例如能够以除了在这里图示或描述 的那些以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
本申请中所描述的连接关系指的是直接或间接连接。例如，A与B连接，既可以是A与B直接连接，也可以是A与B之间通过一个或多个其它电学元器件间接连接，例如可以是A与C直接连接，C与B直接连接，从而使得A与B之间通过C实现了连接。还可理解的，本申请中所描述的“A连接B”可以是A与B直接连接，也可以是A与B通过一个或多个其它电学元器件间接连接。
图1为本申请实施例提供的电子设备的一种结构示意图。如图1所示，电子设备1包括电源模组11和负载12。电源模组11用于接收输入电压V in，并提供输出电压V out为负载12供电。在一种实施例中，输入电压V in可以是外部电源提供的，或者还可以是电子设备1的内部电源提供的。
如图1所示实施例提供的电子设备1可以是移动电话、笔记本电脑、电脑机箱、电动汽车、智能音箱、智能手表或可穿戴设备等用电设备。本申请实施例提供的电源模组可11应用于如图1所示的电子设备1中。
图2为本申请实施例提供的电子设备的一种结构示意图。如图2所示，电子设备1中包括电源模组11。电源模组11用于接收输入电压V in，并提供输出电压V out，为电子设备1后续连接的负载供电。在一种实施例中，输入电压V in可以是外部电源提供的，或者还可以是电子设备1的内部电源提供的。
如图2所示本实施例提供的电子设备1可以是电源适配器、充电器、移动电源等供电设备。本申请实施例提供的电源模组可应用于如图2所示的电子设备1中。
在本申请一种实施例中，电子设备1可以还包括多个电源模组11，多个电源模组11提供输出电压V out为负载12供电。在本申请一种实施例中，电子设备1可以包括多个负载12，电源模组11提供多个输出电压V out分别为多个负载12供电。在本申请一种实施例中，电子设备1可以包括多个电源模组11和多个负载12，多个电源模组11分别提供多个输出电压V out 为多个负载12供电。
本申请一种实施例中，输入电压V in可以为交流电，电源模组11可以包括交直流转换电路。本申请实施例中，输入电压V in可以为直流电，内部电源可以包括储能装置，电源模组11可以包括直流变换电路。相应地，在电子设备1独立工作时，内部电源的储能装置可以为电源模组11供电。
本申请一种实施例中，输入电压V in可以为直流电。电子设备1的负载12可以包括用电装置、储能装置或外接设备中的一种或多种。在一种实施例中，负载12可以是电子设备1的用电装置，比如处理器、显示器等。在一种实施例中，负载12可以是电子设备1的储能装置，比如电池。在一种实施例中，负载12可以是电子设备1的外接设备，比如显示器、键盘等其他电子设备。
图3为本申请实施例提供的电源模组的一种结构示意图。如图3所示，电源模组11包括控制电路111、直流变换电路112、辅助绕组电路113和整流电路114。电源模组11用于接收输入电源提供的输入电压V in，并提供输出电压V out为负载12供电。
控制电路111与直流变换电路112连接。控制电路111用于控制直流变换电路112的运行。在一种实施例中，控制电路可用于输出控制信号，控制信号用于控制直流变换电路112。例如，直流变换电路112的输入端用于接收输入电压V in，控制电路111控制直流变换电路112对输入电压V in进行处理后提供输出电压V 1。在本申请实施例中，输入电压V in为直流电。
整流电路114用于对直流变换电路112提供的输出电压V 1进行整流等处理后，提供输出电压V out。
辅助绕组电路113用于接收直流变换电路112中变压器的供电，并为控制电路111供电。在本申请实施例中，辅助绕组电路113可以包括稳压电路等。
在本申请实施例中，原边绕组是指放置于变压器初级，对应于输入电压V in的电流的绕组。副边绕组是指放置于变压器次级，对应于输出电压V 1的电流的绕组。辅助绕组电路113包括辅助绕组，辅助绕组与变压器耦合。
需要说明的是，在本申请实施例中，主功率管、辅助功率管可以是金 属氧化物半导体场效应管(Metal-Oxide-Semiconductor Field-Effect Transistor，MOSFET)、绝缘栅双极型晶体管(Insulated Gate Bipolar Transistor，IGBT)、双极型功率晶体管(bipolar power transistor)或宽禁带半导体场效应管等。
在本申请实施例中，主功率管、辅助功率管可以分别是不同类型晶体管。示例性的，主功率管是MOSFET，辅助功率管是IGBT。或者，主功率管、辅助功率管可以是同一类型晶体管。示例性的，主功率管、辅助功率管都是MOSFET。可以理解的是，本申请实施例中仅以主功率管、辅助功率管以为MOSFET进行示例性说明，但本申请实施例对主功率管、辅助功率管的晶体管类型不做限定。
在本申请实施例中，主功率管、辅助功率管的驱动方式是高电平导通、低电平关断。示例性的，主功率管接收高电平驱动信号，主功率管导通。主功率管接收低电平驱动信号，主功率管关断。可以理解的是，本申请实施例中主功率管、辅助功率管还可以采用其他驱动方式，本申请实施例对于主功率管、辅助功率管的驱动方式不做限定。
本申请实施例提供的控制电路可以包括脉冲宽度调制(Pulse-width modulation，PWM)控制器、中央处理单元(central processing unit，CPU)、其他通用处理器、数字信号处理器(digital signal processor，DSP)、专用集成电路(application specific integrated circuit，ASIC)、现成可编程门阵列(field-programmable gate array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件等。
图4为本申请实施例提供的一种电源模组的电路结构示意图。如图4所示，电源模组11包括直流变换电路112、整流电路114、辅助绕组电路113和控制电路111。其中，以电源模组11中的直流变换电路112为非对称半桥(Asymmetrical Half Bridge，AHB)反激电路112a作为示例。非对称半桥反激电路112a具体包括半桥电路1121、变压器1122和谐振电容1123。
其中，半桥电路1121包括主功率管Q L和辅助功率管Q H。主功率管Q L和辅助功率管Q H形成非对称半桥拓扑。在一种实施例中，控制电路111可以向主功率管Q L和辅助功率管Q H发送控制信号，使得主功率管Q L和辅助功率管Q H根据接收到的控制信号导通。如图4示例，主功率管Q L的 漏极接收输入电压V in，主功率管Q L的源极与辅助功率管Q H的漏极相连，辅助功率管Q H的源极与参考地相连。主功率管Q L的栅极用于接收控制电路111发送的第一控制信号G L，并根据第一控制信号G L导通。辅助功率管Q H的栅极用于接收控制电路111的第二控制信号G H，并根据第二控制信号G H导通。
半桥电路1121用于接收输入电压V in，并根据控制电路111提供的控制信号，通过谐振电容1123向变压器1122的原边绕组11221提供输出电压。
变压器1122包括原边绕组11221、副边绕组11222和磁芯11223。变压器1122的副边绕组11222与原边绕组11221通过磁芯11223相耦合，辅助绕组1131与变压器1122的原边绕组11221通过磁芯11223相耦合。变压器1122的原边绕组11221用于接收半桥电路1121的输出电压，并产生原边绕组电压。变压器1122的副边绕组11222与原边绕组11221相耦合，副边绕组11222上产生副边绕组电压。副边整流电路1125用于接收副边绕组11222上的副边绕组电压，并转换为输出电压V 1。
如图4所示的示例，谐振电容C r的一端连接主功率管Q L的源极与辅助功率管Q H的漏极，谐振电容C r的另一端连接原边绕组11221的同名端，原边绕组11221的异名端连接辅助功率管Q H的漏极。变压器1122的副边绕组11222提供的输出电压V 1，经过整流电路1125的处理后提供输出电压V out。
在一种实施例中，整流电路1125包括二极管D 1和电容C 1。二极管D 2的阳极与副边绕组11222的异名端连接。电容C 1的两端分别连接二极管D 2的阴极和副边绕组11222的同名端。
辅助绕组电路113包括辅助绕组1131。辅助绕组1131通过磁芯11223与边缘绕组11221耦合。原边绕组11221上的原边绕组电压经过耦合，在辅助绕组1131上产生辅助绕组电压。辅助绕组电路113根据辅助绕组电压向控制电路111供电。辅助绕组电路113可以包括升压(BOOST)电路、是降压(BUCK)电路、升降压(BUCK-BOOST)电路等。在一种实施例中，辅助绕组电路113还可以是低压差线性稳压电路(low dropout regulator，LDO)等稳压电路。
在一种实施例中，控制电路111发送控制信号G控制非对称半桥反激 电路112a的半桥电路1121中的主功率管Q L和辅助功率管Q H，从而控制非对称半桥反激电路112a的运行状态。例如，控制电路111调整控制信号G的频率或占空比，可以控制半桥电路1121中主功率管Q L及辅助功率管Q H的导通频率或导通时长，从而相应地调整半桥电路1121的输出电压的电压值，进而调整非对称半桥反激电路112a的输出电压V 1的电压值，及控制电源模组11的输出电压V out的电压值。在一种实施例中，控制电路111可以发送控制信号G，来控制半桥电路1121中的主功率管Q L和辅助功率管Q H的导通和关断。
例如，控制电路111可以通过向主功率管Q L发送第一控制信号G L的方式控制主功率管Q L导通或截止，以及通过向辅助功率管Q H发送第二控制信号G H的方式控制辅助功率管Q H导通或截止。在本申请实施例中，第一控制信号G L、第二控制信号G H可以包括高电平信号或低电平信号等实现方式。在一种实施例中，主功率管Q L根据第一控制信号G L导通，辅助功率管Q H根据第二控制信号G H导通。在一种实施例中，主功率管Q L根据第一控制信号G L关断，辅助功率管Q H根据第二控制信号G H关断等。
图5为电源模组的一种简化电路图。根据图4所示的电源模组11，可以得到如图5所示的简化电路。其中，非对称半桥反激电路112a中的变压器1122的原边绕组11221可以提供谐振电感L r。例如，谐振电感L r可以寄生在变压器1122的原边绕组11221上。
非对称半桥反激电路112a的主功率管Q L和辅助功率管Q H交替导通和关断，电源模组11的输出电压V out稳定在额定输出电压，将额定输出电压的电压值记为V 0。同时，根据简化电路可以得到约等式V cr≈N*V out，其中，V cr为谐振电容C r两侧的电压，N为变压器1122的原边绕组11221和副边绕组11222的匝数比。
虽然在非对称半桥反激电路112a的主功率管Q L和辅助功率管Q H交替导通时，谐振电容C r两侧的电压与电源模组11的输出电压V out存在上述约等式表示的关系。但是，在一些情况下，谐振电容C r两侧的电压可能远高于N*V out，使上述约等式无法成立。例如，当控制电路111通过周期性地向非对称半桥反激电路112a中的主功率管Q L和辅助功率管Q H发送控制信号G，控制的主功率管Q L和辅助功率管Q H交替导通和关断。此时，电源模组11的输出电压V out稳定在额定电压。随后，如果电源模组11的 输出端所连接的负载出现短路等异常，控制电路111通过监测辅助绕组1131的电压等方式确定出现的异常。控制电路111可以立即停止向主功率管Q L和辅助功率管Q H发送控制信号G，使主功率管Q L和辅助功率管Q H都保持关闭状态，控制非对称半桥反激电路112a从主功率管Q L和辅助功率管Q H交替导通的工作状态转换到主功率管Q L和辅助功率管Q H都关断的工作状态，从而实现对非对称半桥反激电路112a的保护。可以理解的是，如果此时谐振电容C r中存在大量的电荷，将无法释放。
则当相关异常处理设备或者人员对负载出现的异常进行处理并消除异常后，控制电路111重新上电启动，向非对称半桥反激电路112a中的主功率管Q L和辅助功率管Q H发送控制信号G。主功率管Q L和辅助功率管Q H根据控制信号交替导通和关断。使非对称半桥反激电路112a从主功率管Q L和辅助功率管Q H都关断的工作状态重新转换为工作状态。
图6为电源模组中辅助功率管导通后的等效电路示意图。可以看出，当电源模组11中辅助功率管Q H导通后，谐振电容C r中电荷放电产生的电流将直接通过变压器1122直接传输到副边整流电路1125。因此，如果辅助功率管Q H导通前谐振电容C r中存在大量的电荷，则当辅助功率管Q H导通后，谐振电容C r所产生的电流将在辅助功率管Q H、变压器1122以及副边整流电路1125上产生极大的电流应力。
图7为本申请实施例提供的一种电源模组的电路结构示意图。如图7所示的电源模组11，在图4所示的电源模组11的基础上，还包括谐振电感1124。辅助功率管Q H的源极连接谐振电感1124的一端，谐振电感1124的另一端连接原边绕组11221的异名端。其中，通过在电源模组11的非对称半桥反激电路112a中，设置实体谐振电感1124，同样可以实现如图5和图6所示的电源模组11的简化结构。
在现有技术中，当控制电路111重新上电启动后，控制电路111需要首先控制辅助功率管Q H导通一段时间，由输入电压V in为主管功率Q L的自举电容充电。随后，控制电路111才能控制的主功率管Q L和辅助功率管Q H交替导通和关断，使非对称半桥反激电路112a的主功率管Q L和辅助功率管Q H交替导通和关断。即非对称半桥反激电路112a工作在正常工作状态并输出额定电压。同时，当辅助功率管Q H导通，除了输入电压V in为主管功率Q L的自举电容充电，谐振电容C r中存在的电荷也将被释放。
例如，图8为一种现有技术中控制电路的控制逻辑示意图。如图8所示，控制电路111在t 0时刻上电，并t 2时刻完成启动。随后，在t 2时刻开始，控制电路111向辅助功率管Q H发送第二控制信号G H，并持续到t 3时刻。则辅助功率管Q H根据第二控制信号G H在t 2时刻-t 3时刻之间导通，主功率管Q L保持关断。结合图5所示的电路结构图和图6所示的等效电路结构图，当辅助功率管Q H导通、主功率管Q L关断，谐振电容C r通过原边绕组11221、谐振电感L r和辅助功率管Q H放电，并在原边绕组11221上产生原边绕组电压。原边绕组电压经过变压器耦合，在副边绕组11222上产生副边绕组电压，副边绕组电压经过整流电路114提供输出电压V out。在放电的过程中，由于谐振电容C r内的电荷通过原边绕组11221、谐振电感L r和辅助功率管Q H的回路被快速泄放，谐振电容C r放电产生的电流将在辅助功率管Q H、变压器1122以及整流电路114上产生极大的电流应力。
假设控制电路111启动前谐振电容C r残存的电荷在其两侧产生的电压为V cr_ini，则经过t 2时刻-t 3时刻谐振电容C r的放电过程，谐振电容C r两侧的电压V cr逐渐从V cr_ini降低至V cr2与V cr1之间。最终，在t 4时刻之后，控制电路111控制非对称半桥反激电路112a的主功率管Q L和辅助功率管Q H交替导通。在一种具体的实现方式中，在非连续导通模式下，非控制电路111可以通过周期性地向主功率管Q L和辅助功率管Q H发送控制信号G 1、G 2……，控制的主功率管Q L和辅助功率管Q H交替导通和关断。此时，由于谐振电容C r残存的电荷已经被释放，因此，在t 4时刻之后，辅助功率管Q H、变压器1122以及整流电路114上也就不会出现因谐振电容C r放电产生的较大的电流应力。
综上，当控制电路111通过如图8所示的现有技术控制谐振电容C r进行放电时，需持续导通辅助功率管Q H。但是，在t 2时刻-t 3时刻之间，由于辅助功率管Q H持续导通，谐振电容C r放电的电流的变化程度较大。体现在波形图上，谐振电容C r两侧的电压V cr波形下降的斜率较大。因此，谐振电容C r放电时产生的电流在辅助功率管Q H、变压器1122以及整流电路114上产生极大的电流应力，影响电源模组11及其所在电子设备10的稳定运行，降低电源模组11及电子设备10的使用寿命甚至可能造成损坏。
此外，控制电路111在启动后、在控制非对称半桥反激电路112a的主功率管Q L和辅助功率管Q H交替导通，输出额定电压之前，还需要对非对 称半桥反激电路112a的输入电压V in进行低电压检测。其中，控制电路111具体在确定输入电压V in的电压值大于或等于最低工作电压值时，控制非对称半桥反激电路112的主功率管Q L和辅助功率管Q H交替导通，使非对称半桥反激电路112a输出额定电压。控制电路111具体在确定输入电压V in的电压值小于最低工作电压值时，对非对称半桥反激电路112a进行低电压保护，例如控制非对称半桥反激电路112a停止工作等。
示例性地，如图8所示，在t 3时刻之前，由于控制电路111还没有完成对谐振电容C r的放电，谐振电容C r两侧的电压V cr可能远大于电源模组11输出端的输出电压V out*N。辅助绕组1131的电压V AUX将会被V out*N和V cr中的较低者所钳位。假设控制电路111在图10中的t 1时刻对输入电压V in进行低电压检测，则并不能通过辅助绕组电压V AUX准确地检测得到输入电压V in，导致控制电路111不能有效地对非对称半桥反激电路112a进行低电压保护，影响非对称半桥反激电路112a、电源模组11及电子设备10的运行。因此，控制电路111在什么时刻能够更为准确、有效地对非对称半桥反激电路112a的输入电压V in进行检测，也是本领域需要解决的技术问题。
本申请提供一种非对称半桥反激电路的控制电路、电源模组和电子设备，可用于克服上述图8所示的现有技术中存在的问题。下面以具体地实施例对本申请的技术方案进行详细说明。下面这几个具体的实施例可以相互结合，对于相同或相似的概念或过程可能在某些实施例不再赘述。
图9为本申请提供的控制电路的控制逻辑示意图。本申请提供的控制电路可以应用于如图4或者图7所示的电源模组11中。本申请提供的控制电路111具体可用于对如图4或者图7所示的非对称半桥反激电路112a进行控制。在图9所示的示例中，以直流变换电路112为图4或者图7中的非对称半桥反激电路112a作为示例。可以理解的是，本申请提供的由控制电路111执行的控制逻辑，还可以应用于控制电路111对其他类型的直流变换电路112进行的控制。
在t 0时刻，控制电路111上电并开始启动。例如，控制电路111可以在t 0时刻接收到外部供电后开始启动。或者，控制电路111可以在接收到外部供电的基础上，当t 0时刻接收到启动指令后，控制电路111开始启动。随后，控制电路111在t 21时刻完成启动。本申请实施例对控制电路111进 行的启动不做限定，例如，控制电路111可以进行初始化、加载驱动等启动步骤。
在t 21时刻，当控制电路111完成启动后，控制电路111可以控制谐振电容C r根据预设次数放电。在一种实施例中，当控制电路111完成启动后，控制电路111向发送谐振电容C r控制信号，控制谐振电容C r放电的次数为预设次数。谐振电容C r则根据接收到的控制信号，按照预设次数放电。
在一种实施例中，控制电路111可以向半桥电路发送控制信号，控制半桥电路对谐振电容C r放电。其中，辅助功率管Q H根据第二控制信号G H周期性交替导通和关断，主功率管Q L保持关断。当辅助功率管Q H导通且主功率管Q L关断时，使输入电压V in为主管功率Q L的自举电容充电，同时谐振电容C r放电。
在一种实施例中，控制电路111可以周期性向辅助功率管Q H发送第二控制信号G H，并且每次发送的第二控制信号G H持续第一预设时长T1。在第一预设时长T1之后，控制电路111停止向辅助功率管Q H发送第二控制信号G H，并且每次停止发送第二控制信号G H持续第二预设时长T2。例如，在图9所示的示例中，控制电路111在t 21时刻之后，首先向辅助功率管Q H发送持续时长为第一预设时长T1的第二控制信号G H。在第二预设时长T2之后，控制电路111再向辅助功率管Q H发送持续时长为第一预设时长T1的第二控制信号G H1，以此类推。
在t 21时刻-t 31时刻之间，当控制电路111完成启动后，控制电路111控制谐振电容C r放电的次数为预设次数，则对于辅助功率管Q H，则将根据控制信号导通达预设次数。其中，辅助功率管Q H在每次接收到第二控制信号G H后，根据第二控制信号G H导通第一预设时长T1后闭合。如果第二预设时长T2后再次接收到第二控制信号G H，则再次根据第二控制信号G H导通第一预设时长T1后闭合，最终实现辅助功率管Q H根据控制信号的交替导通和关断。辅助功率管Q H导通和关断的一个周期的长度为第一预设时长T1和第二预设时长T2之和，记为T3。则t 21时刻-t 31时刻之间的长度为预设次数与T3的乘积，记为预设时间。即，当控制电路111完成启动后，在t 21时刻-t 31时刻之间的预设时间内，控制谐振电容C r放电的次数达预设次数。
在一种实施例中，谐振电容C r可以通过谐振的方式放电。谐振电容 C r进行谐振的谐振电路包括谐振电容C r和谐振电感L r。例如，在图4所示的电源模组11中，谐振电感L r可以是原边绕组11221上的漏感所寄生得到的。在图7所示的电源模组11中，谐振电感L r可以是半桥电路1121中设置的器件。在一种实施例中，当辅助功率管Q H导通时，半桥电路1121中谐振电路发生零输入相应谐振。
结合图4所示的电路结构图，当辅助功率管Q H导通时，谐振电容C r即可通过原边绕组11221和辅助功率管Q H放电。当辅助功率管Q H关闭时，谐振电容C r停止放电。结合图7所示的电路结构图，当辅助功率管Q H导通时，谐振电容C r即可通过原边绕组11221、谐振电感L r和辅助功率管Q H放电放电。当辅助功率管Q H关闭时，谐振电容C r停止放电。
在辅助功率管Q H周期性交替导通和关闭的过程中，谐振电容C r周期性交替放电和停止放电，使得谐振电容C r内的电荷逐渐释放。在图9所示的谐振电容C r的电压值V cr波形图上，谐振电容C r两侧的电压呈现出“阶梯状”的下降规律。
在一种实施例中，第二控制信号G H持续的第一预设时长T1小于预定值。预定值可以是半桥电路1121中谐振电路的谐振周期的25％。例如，第一预设时长T1可以是谐振周期的10％-15％等。其中，当谐振电路发生零输入相应谐振的谐振时间低于谐振周期的25％，谐振电容C r两侧的电压V cr不会大于电源模组11输出端的输出电压V out，从而可以有效限制谐振时长并减少谐振电路的过冲电流。
在t 31时刻，控制电路111控制谐振电容C r放电的次数达预设次数，控制电路111向辅助功率管Q H发送第二控制信号G H的次数到达预设次数，则控制电路111可以停止继续向辅助功率管Q H发送第二控制信号G H。
在一种实施例中，预设次数、第一预设时长T1和第二预设时长T2可以是预设的固定值，也可以是由控制电路计算得到的。例如，预设次数可以提前设置为20，第一预设时长T1和第二预设时长T2也可以是提前设置的固定值。则在t 0时刻之后、t 21时刻前，即控制电路111的启动过程中，控制电路111可以获取预设次数、第一预设时长T1，第二预设时长T2中的一个或多个。又例如，预设次数可以提前设置为20，第一预设时长T1和第二预设时长T2可以是实时计算得到的。则控制电路111可以在t 0时刻之后、t 21时刻之前，获取存储的预设次数，并根据获取的非对称半桥反 激电路112a的电路参数计算得到第一预设时长T1和第二预设时长T2。
在一种实施例中，控制电路111可以通过通用异步收发差传输器(Universal Asynchronous Receiver/Transmitter，UART)接口等方式，获取非对称半桥反激电路112a的电路参数。电路参数包括谐振电容C r的电容值、谐振电感L r的电感值、控制电路111发送第二控制信号G H的频率f pre和辅助功率管Q H导通的预设次数20等。控制电路111获取的电路参数可以是工程人员配置的。
随后，控制电路111在t 0时刻之后、t 21时刻之前，即可根据这些电路参数计算得到第一预设时长T1和第二预设时长T2。其中，第一预设时长T1可以是谐振电容C r和谐振电感L r构成的谐振周期长度的10％-15％，例如得到第一预设时长T1为300ns。控制电路111发送第二控制信号G H的周期t pre可以是第一预设时长T1的10倍。由于第一预设时长T1与第二预设时长T2之和等于控制电路111输出第二控制信号G H的周期t pre。因此当确定第一预设时长T1后，可以根据控制电路111发送第二控制信号G H的周期t pre与第一预设时长T1之差得到第二预设时长T2。
在t 31时刻之后，控制电路111停止继续向辅助功率管Q H发送第二控制信号G H，使谐振电容C r停止放电。由于经过t 21时刻-t 31时刻控制电路111控制辅助功率管Q H周期性导通，使谐振电容C r放电，谐振电容C r两侧的电压V cr降低。因此，在t 31时刻，谐振电容C r两侧的电压V cr与N*V out之差小于预设值。其中，预设值可以设定的较小。则在t 31时刻，谐振电容C r两侧的电压V cr接近并略大于N*V out，使约等式V cr≈N*V out成立。
在图9所示的示例中，在t 31时刻，谐振电容C r两侧的电压V cr从V cr_ini降低至V cr2与V cr1之间。或者，在其他可能的实现方式中，谐振电容C r两侧的电压V cr还可以从V cr_ini降低到其他小于V cr1或者大于V cr2的电压值。在一种实施例中，谐振电容C r两侧的电压V cr在t 31时刻到t 4时刻之间保持不变。
在t 21时刻-t 31时刻之间，控制电路111控制辅助功率管Q H周期性导通时，除了会使谐振电容C r放电，也会给主功率管Q L的自举电容充电。因此，在t 31时刻之后，主功率管Q L完成自举充电，控制电路111可以向主功率管Q L发送控制信号，使主功率管Q L根据控制信号导通。例如，从t 4时刻开始，控制电路111可以周期性地交替向非对称半桥反激电路112a 的主功率管Q L主功率管Q L发送第一控制信号G L和向辅助功率管Q H发送第二控制信号G H，使得主功率管Q L和辅助功率管Q H根据接收到的控制信号交替导通和关断。当主功率管Q L和辅助功率管Q H交替导通和关断时，非对称半桥反激电路112a可以运行于正常工作状态，并根据输入电压输出额定电压。在t 4时刻之后，由于谐振电容C r残存的电荷已经被释放，谐振电容C r两侧的电压V cr较低。因此，在主功率管Q L和辅助功率管Q H交替导通和关断时，谐振电容C r放电的电流不会在辅助功率管Q H、变压器1122以及整流电路114上产生极大的电流应力。
特别地，本申请实施例提供的控制电路111在控制谐振电容C r放电时，并不是持续导通辅助功率管Q H使谐振电容C r持续放电，而是控制辅助功率管Q H周期性导通和关断，使谐振电容C r周期性放电。因此，在t 21时刻-t 31时刻之间，谐振电容C r放电所产生的电流流经辅助功率管Q H达第一预设时长后，还会停止第二预设时长。由于辅助功率管Q H导通的第一预设时长T1较小，谐振电容C r单次在第一预设时长T1内放电所产生的电流较小，不会在辅助功率管Q H、变压器1122以及整流电路114上产生过大的电流应力。谐振电容C r每一次放电产生的电流的变化程度较小。体现在如图9所示的谐振电容C r两侧电压变化的波形图上，谐振电容C r两侧的电压V cr下降波形的斜率较小。
同时，由于辅助功率管Q H导通的第一预设时长T1较小，辅助功率管Q H每次导通并关闭后，使下一次辅助功率管Q H导通前，谐振电容C r的内存储的电荷变少，谐振电容C r两侧的电压降低。从而进一步降低谐振电容C r的残压与输出电容残压的反射电压之差，故谐振电容C r每一次放电时产生的电流应力会较上一次放电时产生的电流应力更低。
综上，本申请实施例提供的控制电路111对非对称半桥反激电路112a进行的控制，减少了谐振电容C r放电的电流放电时在辅助功率管Q H、变压器1122以及整流电路114上产生的电流应力，保证了非对称半桥反激电路112a、电源模组11及其所在电子设备10的稳定运行，提高了非对称半桥反激电路112a、电源模组11及电子设备10的使用寿命。
在一种实施例中，控制电路111在t 21时刻-t 31时刻之间控制谐振电容C r放电。在t 31时刻后，响应于谐振电容C r放电的次数达到预设次数，控 制电路111即可开始对非对称半桥反激电路112a的输入电压V in进行低电压检测。在一种实施例中，上述对非对称半桥反激电路112a的输入电压V in进行的低电压检测又可被称为“Brown In”。
图10为本申请提供的控制电路的控制时序示意图，示出了控制电路111上电后的控制时序。其中，在t 0时刻，控制电路111上电并开始启动。在t 21时刻，控制电路111完成启动后，控制非对称半桥反激电路112a中的辅助功率管Q H周期性导通和关断，使谐振电容C r周期性放电。直到t 31时刻，控制电路111响应于谐振电容C r放电的次数达预设次数，控制电路111即可开始对非对称半桥反激电路112a的输入电压V in进行低电压检测。随后在t 4时刻，控制电路111具体确定输入电压V in的电压值大于最低工作电压值。则在t 4时刻之后，控制电路111响应于输入电压V in的电压值大于最低工作电压值，控制电路111向非对称半桥反激电路112a的主功率管Q L和辅助功率管Q H发送控制信号，使主功率管Q L和辅助功率管Q H根据控制信号交替导通和关断，非对称半桥反激电路112a运行于正常工作状态。非对称半桥反激电路112a运行于正常工作状态时，可用于接收输入电压V in并提供输出电压V 1，输出电压V 1的电压值为额定电压。
在一种实施例中，控制电路111对非对称半桥反激电路112a的输入电压V in进行的低电压检测，具体包括如下检测逻辑。在主功率管Q L导通、辅助功率管Q H关闭时，控制电路111检测得到辅助绕组1131上的电压V aux1＝N p/N a*(V in-V Cr)。N p为原边绕组11221的匝数，N a为辅助绕组114的匝数。以及，在主功率管Q L关闭、辅助功率管Q H导通时，控制电路111检测得到辅助绕组1131上的电压V aux2＝N s/N a*V o。N a为副边绕组11222的匝数。由于t 31时刻之前控制电路111已经控制谐振电容C r放电，使得t 31时刻，约等式V Cr≈N p*N s*Vo成立。随后，控制电路111将检测得到的V aux1与V aux2相加，即可获得输入电压V in的电压值。在具体的实现中，控制电路111对非对称半桥反激电路112a进行低电压保护时，检测得到的输入电压V in的电压值可以具有一定的误差范围。即，控制电路111检测得到的输入电压V in的电压值约等于实际的电压值。
在一种实施例中，控制电路111响应于输入电压V in的电压值小于最低工作电压值，控制电路111控制非对称半桥反激电路112a中的主功率管Q L和辅助功率管Q H均保持关断，使非对称半桥反激电路112a停止输入电 压V in，也停止提供输出电压V 1，实现对非对称半桥反激电路112a进行低电压保护。
综上，本实施例提供的控制电路111可以在控制控制谐振电容C r放电预设次数之后，立即对非对称半桥反激电路112a的输入电压V in进行低电压检测。并响应于输入电压V in的电压值大于最低工作电压值后控制非对称半桥反激电路112a正常工作。从图9的波形图中可以看出，当控制电路111在t 31时刻进行低电压检测时，由于谐振电容C r内的电荷已经被释放，V Cr接近或低于N*V o。当主功率管Q L关闭、辅助功率管Q H导通时，辅助绕组1131上的电压可以更加准确地反映谐振电容C r两侧的电压V Cr，从而可以更加准确地得到输入电压V in。因此，本实施例中，控制电路111能够对更加准确地检测得到输入电压V in，使控制电路111能更加有效地对非对称半桥反激电路112a进行低电压保护，进而保证了非对称半桥反激电路112a、电源模组11及电子设备1的安全运行。
在一种实施例中，本申请提供的电源电路11还包括供电单元。供电单元可用于存储电能，在t 4时刻之前，供电单元可用于通过其存储的电能向电源电路11供电。在t 4时刻之后，由于非对称半桥反激电路112a运行于正常工作状态，可以根据输入电压V in输出额定电压。由于辅助绕组1131通过磁芯11223与边缘绕组11221耦合，则输入电压Vin在原边绕组11221上产生原边绕组电压经过变压器的耦合，可以在辅助绕组1131上产生辅助绕组电压。辅助绕组电路113根据辅助绕组电压向控制电路111供电。在t 4时刻之后，辅助绕组电路113向控制电路111供电，供电单元停止向控制电路111供电。
在一种实施例中，辅助绕组电路113包括电容和二极管。在t 21时刻-t 31时刻之间，当辅助功率管Q H导通后，谐振电容C r放电时，也会在原边绕组11221上产生原边绕组电压。原边绕组电压经过变压器的耦合，可以在辅助绕组1131上产生辅助绕组电压。由于谐振电容C r放电产生的电压值较小，不能使二极管导通，因此辅助绕组电路113不能根据辅助绕组电压向控制电路111供电。在t 21时刻-t 31时刻之间，辅助功率管Q H导通后谐振电容C r放电产生的辅助绕组电压都用于向辅助绕组电路113中的电容充电。最终由电容对谐振电容C r放电产生的电能进行存储。可以理解的是，在t 21时刻-t 31时刻之间电容存储的电能，可用于在t 4时刻之后辅助绕组电路113 向控制电路111供电时使用。因此本实施例还能够提高谐振电容C r放电产生的电能的利用率。
图11为本申请提供的控制电路对非对称半桥反激电路进行控制的流程示意图。在S100中，控制电路111上电并完成启动。随后，在S101中，控制电路111控制非对称半桥反激电路112a中的辅助功率管Q H导通第一预设时长T1。在S102中控制电路111控制非对称半桥反激电路112a中的辅助功率管Q H停止导通第二预设时长T2。控制电路111重复执行S101-S102直到辅助功率管Q H导通次数达预设次数。在S104中，控制电路111对非对称半桥反激电路112a的输入电压V in进行低电压检测。在S105中，控制电路111响应于输入电压V in的电压值大于或等于最低工作电压值时，在S106中控制非对称半桥反激电路112a运行于正常工作状态，使非对称半桥反激电路112a输出额定电压。在S105中，控制电路111响应于输入电压V in的电压值小于最低工作电压值时，对非对称半桥反激电路112a进行低电压保护。
本申请还提供一种电子设备，包括如本申请任一实施例中提供的控制电路111，或者包括如本申请任一实施例中提供的电源模组11。
在前述实施例中，对本申请实施例提供的控制电路111所执行的方法进行了介绍，而为了实现上述本申请实施例提供的方法中的各功能，作为执行主体的控制电路111可以包括硬件结构和/或软件模块，以硬件结构、软件模块、或硬件结构加软件模块的形式来实现上述各功能。上述各功能中的某个功能以硬件结构、软件模块、还是硬件结构加软件模块的方式来执行，取决于技术方案的特定应用和设计约束条件。需要说明的是，应理解以上装置的各个模块的划分仅仅是一种逻辑功能的划分，实际实现时可以全部或部分集成到一个物理实体上，也可以物理上分开。且这些模块可以全部以软件通过处理元件调用的形式实现；也可以全部以硬件的形式实现；还可以部分模块通过处理元件调用软件的形式实现，部分模块通过硬件的形式实现。可以为单独设立的处理元件，也可以集成在上述装置的某一个芯片中实现，此外，也可以以程序代码的形式存储于上述装置的存储器中，由上述装置的某一个处理元件调用并执行以上确定模块的功能。其它模块的实现与之类似。此外这些模块全部或部分可以集成在一起，也可以独立实现。这里所述的处理元件可以是一种集成电路，具有信号的处理 能力。在实现过程中，上述方法的各步骤或以上各个模块可以通过处理器元件中的硬件的集成逻辑电路或者软件形式的指令完成。例如，以上这些模块可以是被配置成实施以上方法的一个或多个集成电路，例如：一个或多个特定集成电路(application specific integrated circuit，ASIC)，或，一个或多个数字信号处理器(digital signal processor，DSP)，或，一个或者多个现场可编程门阵列(field programmable gate array，FPGA)等。再如，当以上某个模块通过处理元件调度程序代码的形式实现时，该处理元件可以是通用处理器，例如中央处理器(central processing unit，CPU)或其它可以调用程序代码的处理器。再如，这些模块可以集成在一起，以片上系统(system-on-a-chip，SOC)的形式实现。
在上述实施例中，控制电路111所执行的步骤可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘solid state disk(SSD))等。.
本申请还提供一种计算机可读存储介质，计算机可读存储介质存储有计算机指令，计算机指令被执行时可用于执行如本申请前述实施例中任一由控制电路111执行的方法。
本申请实施例还提供一种运行指令的芯片，所述芯片用于执行如本申请前述任一由控制电路111执行的方法。
本申请实施例还提供一种计算机程序产品，所述程序产品包括计算机程序，所述计算机程序存储在存储介质中，至少一个处理器可以从所述存储介质读取所述计算机程序，所述至少一个处理器执行所述计算机程序时可实现如本申请前述任一由控制电路111执行的方法。
本领域普通技术人员可以理解：实现上述实施例的全部或部分步骤可以通过程序指令相关的硬件来完成。前述的程序可以存储于一计算机可读取存储介质中。该程序在执行时，执行包括上述各方法实施例的步骤；而前述的存储介质包括ROM、磁碟或者光盘等各种可以存储程序代码的介质。
本领域普通技术人员可以理解：为便于说明本申请技术方案，本申请实施例中通过功能模块进行分别描述，各个模块中的电路器件可能存在部分或全部重叠，不作为对本申请保护范围的限定。
最后应说明的是：以上各实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述各实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。

Claims (14)

  1. 一种电源模组，其特征在于，包括非对称半桥反激电路和控制电路，所述非对称半桥反激电路用于接收输入电压并提供输出电压，所述非对称半桥反激电路包括变压器、谐振电容、主功率管和辅助功率管，所述控制电路用于输出控制信号控制所述非对称半桥反激电路，其中：
    所述谐振电容用于：根据所述控制信号按照预设次数放电；
    所述主功率管和所述辅助功率管用于：响应于所述谐振电容放电的次数达到所述预设次数、且所述输入电压大于或等于所述非对称半桥反激电路的最低工作电压值，根据所述控制信号交替导通和关断。
  2. 根据权利要求1所述的电源模组，其特征在于，所述变压器包括原边绕组和副边绕组，所述主功率管的源极连接所述辅助功率管的漏极和所述谐振电容的一端，所述辅助功率管的源极连接参考地和所述原边绕组的异名端，所述谐振电容的另一端连接所述原边绕组的同名端，其中：
    所述主功率管用于：在所述谐振电容放电的次数达到所述预设次数前，根据所述控制信号保持关断；
    所述辅助功率管用于：根据所述控制信号交替导通和关断，所述辅助功率管的导通次数为所述预设次数，所述辅助功率管导通时所述谐振电容放电，所述辅助功率管关断时所述谐振电容停止放电。
  3. 根据权利要求1-2任意一项所述的电源模组，其特征在于，在所述谐振电容放电的次数达到所述预设次数前，所述辅助功率管根据所述控制信号每次导通的时长为第一预设时长，所述谐振电容每次放电的时长为所述第一预设时长，所述辅助功率管根据所述控制信号每次关断的时长为第二预设时长，所述谐振电容每次停止放电的时长为所述第二预设时长。
  4. 根据权利要求3所述的电源模组，其特征在于，所述第二预设时长与所述第一预设时长之和等于所述控制信号的周期。
  5. 根据权利要求3-4任意一项所述的电源模组，其特征在于，所述非对称半桥反激电路的所述谐振电容和谐振电感构成谐振电路，所述第一预设时长与所述谐振电路的谐振周期的时长之比小于或等于0.25。
  6. 根据权利要求1-5任意一项所述的电源模组，其特征在于，所述电源模组包括辅助绕组电路，所述辅助绕组电路包括辅助绕组，所述辅助绕组与所 述原边绕组耦合，其中：所述主功率管和所述辅助功率管用于：根据所述控制信号交替导通和关断，所述辅助绕组电路用于为所述控制电路供电。
  7. 一种非对称半桥反激电路的控制电路，所述非对称半桥反激电路包括半桥电路、变压器和谐振电容，所述半桥电路包括主功率管和辅助功率管，其特征在于，所述控制电路用于：
    控制所述半桥电路根据预设次数对所述谐振电容放电；
    检测所述非对称半桥反激电路的输入电压的电压值；
    响应于所述输入电压的电压值大于或等于所述非对称半桥反激电路的最低工作电压值，控制所述主功率管和所述辅助功率管交替导通和关断。
  8. 根据权利要求7所述的控制电路，其特征在于，在所述控制电路启动后、检测所述非对称半桥反激电路的输入电压的电压值前，所述控制电路用于：
    控制所述辅助功率管交替导通和关断；
    控制所述主功率管保持关断；
    根据所述预设次数控制所述辅助功率管的导通次数。
  9. 根据权利要求8所述的控制电路，其特征在于，所述控制电路用于获取所述预设次数。
  10. 根据权利要求7-9任意一项所述的控制电路，其特征在于，在检测所述非对称半桥反激电路的输入电压的电压值前，所述控制电路用于控制：
    所述辅助功率管每次导通的时长为第一预设时长；
    所述辅助功率管每次关断的时长为第二预设时长。
  11. 根据权利要求10所述的控制电路，其特征在于，所述控制电路用于获取所述第一预设时长。
  12. 根据权利要求10所述的控制电路，其特征在于，所述非对称半桥反激电路的谐振电容和谐振电感构成谐振电路，所述控制电路用于根据所述谐振电路的谐振周期计算所述第一预设时长，或者所述控制电路用于根据所述谐振电容、所述谐振电感计算所述第一预设时长。
  13. 根据权利要求10所述的控制电路，其特征在于，所述第一预设时长与所述谐振电路的谐振周期的时长之比小于或等于0.25。
  14. 一种电子设备，包括如权利要求1-6任一项所述的电源模组，或者，包括如权利要求7-13任一项所述的非对称半桥反激电路的控制电路。
PCT/CN2022/107275 2022-07-22 2022-07-22 非对称半桥反激电路的控制电路、电源模组和电子设备 WO2024016301A1 (zh)

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