WO2024007756A1 - 超导阻抗变换参量放大器的确定方法、装置、超导阻抗变换参量放大器、电子设备、计算机程序产品以及计算机可读存储介质 - Google Patents

超导阻抗变换参量放大器的确定方法、装置、超导阻抗变换参量放大器、电子设备、计算机程序产品以及计算机可读存储介质 Download PDF

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WO2024007756A1
WO2024007756A1 PCT/CN2023/095810 CN2023095810W WO2024007756A1 WO 2024007756 A1 WO2024007756 A1 WO 2024007756A1 CN 2023095810 W CN2023095810 W CN 2023095810W WO 2024007756 A1 WO2024007756 A1 WO 2024007756A1
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WIPO (PCT)
Prior art keywords
superconducting
amplifier
impedance conversion
impedance
parametric amplifier
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PCT/CN2023/095810
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English (en)
French (fr)
Inventor
安硕明
戴茂春
胡晶晶
张文龙
李登峰
张胜誉
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腾讯科技(深圳)有限公司
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Publication of WO2024007756A1 publication Critical patent/WO2024007756A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/36Circuit design at the analogue level
    • G06F30/367Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F19/00Amplifiers using superconductivity effects

Definitions

  • the present application relates to signal processing technology, and in particular to a method and device for determining a superconducting impedance conversion parameter amplifier, a superconducting impedance conversion parameter amplifier, electronic equipment, computer program products, and computer-readable storage media.
  • Qubit quantum bits on superconducting chips are carriers of quantum states and carry quantum information.
  • Superconducting quantum computing has the advantage of fast operation and is widely used.
  • the superconducting quantum chip is in an extremely low temperature ( ⁇ 30mK) environment and is greatly affected by noise, and the signal output from the superconducting quantum chip is very weak.
  • a multi-stage amplifier is required at the output end. To increase signal strength.
  • Related Technology Commercial low-temperature amplifiers generally work at a 4K temperature level, which will bring great thermal noise.
  • the Josephson parametric amplifier which works at the same temperature level as the superconducting quantum chip, has great gain and will not introduce additional noise.
  • the Josephson parametric amplifier is a necessary device for superconducting quantum computing.
  • additional circuits are used to achieve a smoother transition between the environmental impedance and the amplifier impedance, thereby achieving a wider spectrum range coupling between the environment and the parametric oscillation circuit.
  • the combined impedance conversion Josephson parametric amplifier has a low yield during processing, which increases the production cost of the quantum chip.
  • Embodiments of the present application provide a method and device for determining a superconducting impedance conversion parameter amplifier, a superconducting impedance conversion parameter amplifier, electronic equipment, a computer program product, and a computer-readable storage medium, which can effectively improve the performance of the impedance conversion parameter amplifier. Reduce the loss of the impedance conversion parametric amplifier, while improving the manufacturing yield of the impedance conversion parametric amplifier.
  • Embodiments of the present application provide a method for determining a superconducting impedance conversion parameter amplifier.
  • the method is executed by an electronic device.
  • the method includes:
  • the quantum chip determine the central wavelength parameters, gain parameters and bandwidth parameters of the superconducting impedance conversion parametric amplifier
  • the gain parameter and the bandwidth parameter calculate the impedance value of the impedance conversion line of the superconducting impedance conversion parameter amplifier and the capacitance value of the amplifier;
  • Embodiments of the present application also provide a device for determining a superconducting impedance transformation parameter amplifier.
  • the device includes:
  • a signal transmission module configured to determine the center wavelength parameters, gain parameters and bandwidth parameters of the superconducting impedance conversion parametric amplifier according to the usage environment parameters of the quantum chip;
  • a simulation design module configured to calculate the impedance value of the impedance conversion line of the superconducting impedance conversion parameter amplifier and the capacitance value of the amplifier based on the wavelength parameter, the gain parameter and the bandwidth parameter;
  • the simulation design module is configured to calculate the superconducting Line width dimensions of the coplanar waveguide of the impedance transformation parametric amplifier
  • the simulation design module is configured to calculate the stub size of the superconducting impedance conversion parameter amplifier based on the impedance value of the impedance conversion line and the capacitance value of the amplifier;
  • the simulation design module is configured to determine structural parameters of the superconducting impedance conversion parameter amplifier based on the line width size and the stub size.
  • Embodiments of the present application also provide a superconducting impedance conversion parameter amplifier.
  • the superconducting impedance conversion parameter amplifier includes:
  • Impedance converter and Josephson parametric amplifier the impedance converter and Josephson parametric amplifier are integrated in the same quantum chip
  • the impedance converter includes: a coplanar waveguide, the length of the coplanar waveguide is one-half wavelength of the center frequency;
  • the Josephson parametric amplifier includes: a stub, the length of the stub matches the capacitance value of the superconducting impedance conversion parametric amplifier.
  • An embodiment of the present application also provides an electronic device, where the electronic device includes:
  • Memory for storing computer-executable instructions
  • the processor is configured to implement the method for determining the superconducting impedance transformation parameter amplifier provided by the embodiment of the present application when running the computer executable instructions stored in the memory.
  • Embodiments of the present application provide a computer program product, which includes computer-executable instructions.
  • the computer-executable instructions are executed by a processor, the method for determining the superconducting impedance conversion parameter amplifier provided by the embodiment of the present application is implemented.
  • Embodiments of the present application also provide a computer-readable storage medium that stores computer-executable instructions.
  • the computer-executable instructions are executed by a processor, the method for determining the superconducting impedance conversion parameter amplifier provided by the embodiment of the present application is implemented.
  • This application determines the central wavelength parameters, gain parameters and bandwidth parameters of the superconducting impedance conversion parametric amplifier based on the usage environment parameters of the quantum chip; based on the wavelength parameters, gain parameters and bandwidth parameters, calculates the impedance transformation line of the superconducting impedance conversion parametric amplifier.
  • the impedance value and capacitance value of the amplifier based on Based on the impedance value of the impedance conversion line, calculate the line width size of the coplanar waveguide of the superconducting impedance conversion parametric amplifier; based on the impedance value of the impedance conversion line and the capacitance value of the amplifier, calculate the stub size of the superconducting impedance conversion parametric amplifier; based on The line width size and stub size determine the structure of the superconducting impedance conversion parametric amplifier. Therefore, by applying for the determination method of the superconducting impedance conversion parametric amplifier provided, it is not only possible to improve the performance of the impedance conversion parametric amplifier, but also to achieve better performance.
  • Figure 1 is a schematic diagram of the usage scenario of the method for determining the superconducting impedance conversion parameter amplifier provided by the embodiment of the present application;
  • Figure 2 is a schematic structural diagram of a determining device for a superconducting impedance conversion parameter amplifier provided by an embodiment of the present application;
  • Figure 3 is an optional structural schematic diagram of a parametric amplifier in an embodiment of the present application.
  • Figure 4 is an optional structural schematic diagram of a parametric amplifier in an embodiment of the present application.
  • Figure 5A is an optional process schematic diagram of the method for determining the superconducting impedance conversion parameter amplifier in the embodiment of the present application
  • Figure 5B is an optional process schematic diagram of the method for determining the superconducting impedance conversion parameter amplifier in the embodiment of the present application;
  • Figure 6 is a schematic structural diagram of a superconducting impedance conversion parametric amplifier in an embodiment of the present application
  • Figure 7A is a schematic diagram of a capacitor used in a quantum parametric amplifier in the related art
  • Figure 7B is a schematic diagram of the principle of the stub capacitor in the embodiment of the present application.
  • Figure 7C is a schematic cross-sectional view of the stub capacitor in the embodiment of the present application.
  • Figure 8 is a schematic diagram of the use of the superconducting impedance conversion parameter amplifier in the embodiment of the present application.
  • Figure 9 is a schematic diagram of the test effect of the superconducting impedance conversion parametric amplifier in the embodiment of the present application.
  • Layout Also known as circuit layout, it is a design drawing that describes how the components in the circuit are laid out, placed and connected. It is a planar geometric shape description of the physical conditions of the real circuit.
  • Superconducting qubit is a superconducting quantum circuit formed by using Josephson junction.
  • the superconducting quantum chip is the central processing unit of the superconducting quantum computer.
  • a quantum computer is a machine that uses the principles of quantum mechanics to perform calculations. Based on the superposition principle of quantum mechanics and quantum entanglement, quantum computers have strong parallel processing capabilities and can solve some problems that are difficult for classical computers to calculate.
  • the zero-resistance characteristics of superconducting qubits and the manufacturing process close to that of integrated circuits make the quantum computing system constructed using superconducting qubits one of the most promising systems for realizing practical quantum computing in related technologies.
  • Coplanar Waveguide It is a microwave planar transmission line with superior performance and easy processing, used to transmit microwave signals.
  • a central conductor strip is made on one side of the dielectric substrate, and conductor planes are made on both sides of the central conductor strip, thus forming a coplanar waveguide, also called a coplanar microstrip transmission line.
  • Coplanar waveguides propagate TEM waves and have no cutoff frequency. Since the central conductor and the conductor plate are located in the same plane, it is very convenient to install components in parallel on the coplanar waveguide. It can be used to make a monolithic microwave integrated circuit with transmission lines and components on the same side. A large amount of coplanar waveguide technology is used in superconducting quantum chips.
  • Photolithography etching is an important part of the semiconductor process. It is a patterning processing technology that selectively etches and peels off the surface of the semiconductor substrate according to the layout design. Etching is the process of selectively removing unwanted material from the surface of a silicon wafer using chemical or physical methods. Its basic goal is to correctly replicate the mask pattern on the glued silicon wafer. Wet etching is an etching method that immerses the etching material in a corrosive liquid for corrosion. It has the advantages of good selectivity and repeatability, high production efficiency, simple equipment and low cost.
  • Micro-nano manufacturing technology refers to the design, processing, assembly, integration and application technology of components or systems composed of specific components. Specific components are components with dimensions of sub-millimeter, micron and nanometer levels.
  • Components The general term for components and devices, which are electronic components and constituent elements in circuits, such as resistors, capacitors, inductors, etc.
  • Amplifier Microwave power amplifier device.
  • JPA Josephson Parametric Amplifier
  • the input signal is the microwave signal to be amplified that is input to the amplifier.
  • the pump signal is provided to the amplifier through the pump port to convert energy and amplify the microwave of the input signal.
  • Idler signal is a non-demand microwave output automatically generated by the nonlinear process of mixing waves.
  • Impedance Transformation is impedance matching, which is used to solve the matching between microwave transmission lines and microwave devices. Using additional circuits for impedance matching can achieve a smoother transition between the environment impedance and the amplifier impedance, allowing for a wider spectrum range of coupling between the environment and the parametric oscillation circuit.
  • Impedance Matched Josephson Parametric Amplifier Impedance Matched Josephson Parametric Amplifier, IMPA: The impedance transformation Josephson parametric amplifier is obtained by integrating the impedance transformation module in the Josephson parametric amplifier, which can achieve parametric amplification in a wider bandwidth range.
  • the stub is a transmission line or waveguide used for connection.
  • the stub can be used as a capacitor in a range equal to or lower than the target frequency. It is called a stub capacitor.
  • the stub is Use a waveguide structure that is less than one-quarter wavelength of the target frequency connected to the open-circuit load.
  • Dielectric Capacitance Use insulating dielectric materials, such as SiOx, AlOx, etc., between the bottom layer of the chip and the top metal to separate the bottom layer of the chip and the top metal by tens to hundreds of nanometers and form a lump. Form of capacitance, the capacitance formed is the dielectric capacitance.
  • Photolithography Also called optical lithography or ultraviolet lithography, it is a precision processing process for patterning parts and an important step in semiconductor manufacturing.
  • Figure 1 is a schematic diagram of a usage scenario of the qubit frequency control signal processing method provided by the embodiment of the present application. See Figure 1.
  • the superconducting quantum computer is An electronic device that uses quantum logic to perform universal computations. Compared with traditional computers, superconducting quantum computers can greatly improve the computing efficiency when solving some specific problems, so they have received widespread attention.
  • Superconducting quantum chips can use relevant semiconductor process technologies to achieve large-scale integration. At the same time, superconducting qubits show better performance than other physical systems in terms of key indicators for quantum computing such as interaction control, selective operation, and error correction. With superior performance, it is one of the most promising platforms for realizing superconducting quantum computers.
  • superconducting quantum computers mainly include superconducting quantum chips and hardware systems for chip control and measurement.
  • the hardware systems mainly include various microwave frequency band signal generators and various microwave frequency band devices, including but not limited to filtering. converters, amplifiers, isolators, etc., as well as dilution refrigerators equipped with microwave transmission lines.
  • the key technology of superconducting quantum computers is the precise control and accurate measurement of the state of qubits on superconducting quantum chips.
  • the intrinsic energy of superconducting qubits is in the gigahertz (GHz) microwave band, realizing quantum gate operations and quantum states. Reading requires applying a pulse microwave signal of specific phase, amplitude and duration to the superconducting qubit.
  • GHz gigahertz
  • the superconducting quantum computer requires a large number of signal sources in the GHz microwave frequency band and arbitrary waveform signal modulation with a GHz sampling rate.
  • superconducting qubits need to be kept at a temperature of millikelvin to reduce thermal noise and maintain the coherent state of superconducting qubits for a long time.
  • a dilution refrigerator is used to provide a low-temperature environment for superconducting quantum chips. diluted system
  • the cold machine needs to be equipped with a microwave transmission line to transmit the microwave signal prepared at room temperature to the superconducting qubit in a low-temperature state.
  • the control subsystem is used to control the Qubit state for quantum computing, such as single-bit logic gate calculations and two-bit logic gate calculations; the superconducting quantum chip is used to carry quantum computing information; the measurement subsystem is used to read Take the final state of Qubit and obtain the calculation results of quantum computing. Place the superconducting quantum chip in a low-temperature environment, and the control subsystem generates pulse modulation signals according to the requirements of quantum computing operations, inputs a series of microwave pulse sequences to the superconducting quantum chip, and operates the quantum state of Qubit. After all operations are completed , the measurement system outputs the measurement pulse signal to the superconducting quantum chip, and obtains the status information of Qubit through the change of the returned signal, and finally obtains the calculation result.
  • quantum computing such as single-bit logic gate calculations and two-bit logic gate calculations
  • the superconducting quantum chip is used to carry quantum computing information
  • the measurement subsystem is used to read Take the final state of Qubit and obtain the calculation results of quantum computing. Place the superconducting quantum
  • the Josephson parametric amplifier which works at the same temperature level as the superconducting quantum chip, has a huge gain and is not It has excellent characteristics that will introduce additional noise, so the Josephson parametric amplifier is a necessary device for superconducting quantum computing.
  • additional circuits are used to achieve a smoother transition between the environmental impedance and the amplifier impedance, thereby achieving a wider spectrum range coupling between the environment and the parametric oscillation circuit.
  • the combined impedance transformation Josephson parametric amplifier has a low yield during processing, which increases the production cost of the quantum chip.
  • the required The capacitance is large and the insertion loss of the dielectric capacitor is large, resulting in insufficient performance improvement of the impedance transformation Josephson parametric amplifier and excessive power consumption. Therefore, it is necessary to provide a superconducting impedance conversion parametric amplifier with a new structure to ensure high yield production of superconducting impedance conversion parametric amplifiers with large bandwidth and low insertion loss close to quantum limit noise to meet the large-scale use of quantum chips.
  • the determination device of the superconducting impedance conversion parameter amplifier can be implemented in various forms, such as the determination device with a superconducting impedance conversion parameter amplifier.
  • the functional superconducting quantum chip can also be an integrated chip with a certain device processing function provided with a superconducting impedance conversion parameter amplifier, such as the superconducting quantum chip 200 in FIG. 1 .
  • Figure 2 is a schematic diagram of the composition and structure of the determination device of the superconducting impedance conversion parameter amplifier provided by the embodiment of the present application. It can be understood that Figure 2 only shows an exemplary structure of the determination device of the superconducting impedance conversion parameter amplifier and not the entire structure. Part or all of the structure shown in Figure 2 can be implemented as needed.
  • the determination device of the superconducting impedance conversion parameter amplifier includes: at least one processor 201, a memory 202, a user interface 203, and at least one network interface 204.
  • the individual components in the determination device of the superconducting impedance conversion parametric amplifier are coupled together via a bus system 205 .
  • the bus system 205 is used to implement connection communication between these components.
  • the bus system 205 also includes a power bus, a control bus and a status signal bus.
  • the various buses are labeled as bus system 205 in FIG. 2 .
  • the user interface 203 may include a display, keyboard, mouse, trackball, click wheel, keys, buttons, touch pad or touch screen, etc.
  • the memory 202 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories.
  • the memory 202 in the embodiment of the present application can store data to support operations in the superconducting quantum chip in the terminal. Examples of this data include: any computer programs, such as operating systems and applications, used to operate on the terminal's superconducting quantum chip.
  • the operating system includes various system programs, such as framework layer, core library layer, driver layer, etc., which are used to implement various basic services and process hardware-based tasks.
  • Applications can contain various applications.
  • the determining device of the superconducting impedance conversion parameter amplifier provided by the embodiment of the present application can be implemented by combining software and hardware.
  • the determining device of the superconducting impedance conversion parameter amplifier provided by the embodiment of the present application can be A processor in the form of a hardware decoding processor is used, which is programmed to execute the method for determining the superconducting impedance transformation parameter amplifier provided by the embodiment of the present application.
  • a processor in the form of a hardware decoding processor can use one or more application specific integrated circuits (ASIC, Application Specific Integrated Circuit), DSP, programmable logic device (PLD, Programmable Logic Device), complex programmable logic Device (CPLD, Complex Programmable Logic Device), Field Programmable Gate Array (FPGA, Field-Programmable Gate Array) or other electronic components.
  • ASIC Application Specific Integrated Circuit
  • DSP digital signal processor
  • PLD programmable logic device
  • CPLD Complex Programmable logic Device
  • FPGA Field Programmable Gate Array
  • FPGA Field-Programmable Gate Array
  • the determination device of the superconducting impedance conversion parameter amplifier provided by the embodiment of the present application can be directly embodied as executed by the processor 201 A combination of software modules.
  • the software module can be located in a storage medium.
  • the storage medium is located in the memory 202.
  • the processor 201 reads the information included in the software module in the memory 202.
  • the executable instructions combined with necessary hardware (for example, including the processor 201 and other components connected to the bus 205), complete the method for determining the superconducting impedance transformation parameter amplifier provided by the embodiment of the present application.
  • the processor 201 may be a superconducting electronic chip with signal processing capabilities, such as a general-purpose processor, a digital signal processor (DSP, Digital Signal Processor), or other programmable logic devices, discrete gates, or transistor logic. Devices, discrete hardware components, etc., where the general processor can be a microprocessor or any conventional processor, etc.
  • DSP Digital Signal Processor
  • the device provided by the embodiment of the present application can be directly executed by using the processor 201 in the form of a hardware decoding processor, for example, by One or more application specific integrated circuits (Application Specific Integrated Circuit, ASIC), DSP, programmable logic device (Programmable Logic Device, PLD), complex programmable logic device (Complex Programmable Logic Device, CPLD), field programmable gate Array (Field-Programmable Gate Array, FPGA) or other electronic components execute the method for determining the superconducting impedance conversion parameter amplifier provided in the embodiment of the present application.
  • ASIC Application Specific Integrated Circuit
  • DSP digital signal processor
  • PLD programmable logic device
  • complex programmable logic device Complex Programmable Logic Device
  • CPLD Complex Programmable Logic Device
  • FPGA Field-Programmable Gate Array
  • the memory 202 in the embodiment of the present application is used to store various types of data to support the operation of the determination device of the superconducting impedance conversion parameter amplifier. Examples of these data include: any executable instructions for operating on the determination device of the superconducting impedance conversion parameter amplifier, such as executable instructions, the program that implements the determination method of the superconducting impedance conversion parameter amplifier according to the embodiment of the present application can Contained in executable instructions.
  • the determination device of the superconducting impedance conversion parameter amplifier provided by the embodiment of the present application can be implemented in a software manner.
  • Figure 2 shows the determination device of the superconducting impedance conversion parameter amplifier stored in the memory 202, which can It is software in the form of programs and plug-ins, and includes a series of modules.
  • a program stored in the memory 202 it may include a determining device for a superconducting impedance transformation parameter amplifier.
  • the determining device for a superconducting impedance transformation parameter amplifier includes the following.
  • Software modules signal transmission module 2081 and simulation design module 2082.
  • the signal transmission module 2081 and simulation design module 2082 can form the simulation design software of the microwave generation method to calculate the structural parameters of the superconducting impedance transformation parametric amplifier.
  • the software module in the determination device of the superconducting impedance conversion parameter amplifier is read into the random access memory (Random Access Memory, RAM) by the processor 201 and executed, it will be realized.
  • the method for determining the superconducting impedance conversion parameter amplifier provided by the embodiment of the present application, and the functions of each software module in the device for determining the superconducting impedance conversion parameter amplifier include:
  • the signal transmission module 2081 is configured to determine the center wavelength parameters, gain parameters and bandwidth parameters of the superconducting impedance conversion parametric amplifier according to the usage environment parameters of the quantum chip.
  • the simulation design module 2082 is configured to determine the impedance value of the impedance conversion line of the superconducting impedance conversion parametric amplifier and the capacitance value of the amplifier with the wavelength parameter, the gain parameter and the bandwidth parameter as constraints.
  • the simulation design module 2082 is also configured to calculate the line width size of the coplanar waveguide of the superconducting impedance conversion parametric amplifier based on the impedance value of the impedance conversion line.
  • the simulation design module 2082 is further configured to calculate the stub size of the superconducting impedance conversion parameter amplifier based on the impedance value of the impedance conversion line and the capacitance value of the amplifier.
  • the simulation design module 2082 is also configured to determine the structural parameters of the superconducting impedance conversion parametric amplifier based on the line width size and the stub size.
  • the application also provides a computer program product, which includes computer-executable instructions, and the computer-executable instructions are stored in a computer-readable storage medium.
  • the processor of the electronic device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, causing the electronic device to perform the various optional implementations provided in the above-described method for determining the superconducting impedance transformation parameter amplifier. Different embodiments and combinations of embodiments.
  • an impedance matching structure composed of waveguides is used when the central frequency is at the center of the amplification bandwidth, and the waveguides are a quarter-wavelength waveguide and a half-wavelength waveguide.
  • the parametric amplifier is usually composed of a resonant circuit (usually a resonant circuit with an inductor-capacitor in parallel).
  • tunable nonlinear elements semiconductors usually To use variable capacitance, superconducting circuits typically use a Josephson junction (adjustable inductance) and an externally applied pump drive that acts at twice the resonant frequency.
  • FIG 4 is a schematic structural diagram of an optional parametric amplifier in the embodiment of the present application.
  • the superconducting Josephson junction as a typical superconducting nonlinear device, plays a core role in the superconducting parametric amplifier.
  • the magnetic flux quantization effect in the Josephson junction loop makes the loop behave like an inductor that can be modulated by externally applied magnetic flux under small current conditions.
  • Small current is the abbreviation of small current grounding line selection device in the industry, and is suitable for 3KV-66KV neutral point is not grounded or the neutral point is selected through single-phase grounding system of resistor and arc suppression coil. And due to the characteristics of superconductivity, its resistance loss can be ignored under ideal circumstances.
  • the input signal can be effectively amplified when a magnetic flux pump of approximately twice the input signal is applied to the superconducting loop.
  • Superconducting parametric amplifiers are essentially nonlinear resonators, in which the superconducting phase oscillates.
  • Superconductivity is a typical macroscopic quantum phenomenon. A large number of conduction electrons combine into Cooper pairs through a certain mechanism and condense together to form a collective mode quantum state.
  • Superconducting condensation opens an energy gap in the energy band. The energy gap corresponds to an energy scale, and the energy scale corresponds to interaction. Superconducting condensation can eliminate all interactions lower than this energy gap, which provides excellent protection for the system. , achieving a desirable effect for many applications: zero resistance and complete diamagnetism.
  • Superconductivity is a macroscopic quantum effect. Although the number of particles involved is at the macroscopic level, the only degree of freedom shown is the phase. Usually the noise of the circuit comes from uncontrollable degrees of freedom. In a superconducting parametric amplifier, there is only one degree of freedom involved. A large number of other related degrees of freedom are frozen due to the protection of the superconducting energy gap, so the natural noise is extremely low. . Often people refer to the quantum limit noise of superconducting parametric amplifiers. The existence of nonlinearity makes the oscillation frequency of the amplifier related to the amplitude. For JPA, the greater the amplitude, the lower the resonant frequency.
  • JPA needs to first use a larger power pump signal to drive the system close to this critical state, and then the input signal comes in and is equivalent to this disturbance, and the change in response characteristics causes the output to change.
  • the disturbance signal
  • the pump there is a certain phase relationship between the disturbance (signal) and the pump.
  • significant amplification can only be caused when the two are in the same phase, and when the phase difference is 90 degrees , the output is reduced instead, which theoretically meets the aforementioned condition of "transcending the quantum limit".
  • There are strict conditions for transcending the quantum limit which can only occur when the signal frequency coincides with the pump frequency.
  • the signal light can always be decomposed into two components, half of which is in phase with the pump light, and half of which is 90 degrees different from the pump light. Therefore, the overall gain has nothing to do with the initial phase, that is, the minimum value of the additional noise is half photon.
  • this amplifier also has the problem of too narrow bandwidth and frequency. Especially when multiplexed reading of superconducting quantum computing imposes bandwidth requirements on the bandwidth of superconducting parametric amplifiers.
  • impedance transformers are used in related technologies. The impedance difference between the superconducting parametric amplifier and the 50-ohm environment is reduced through the impedance transformer, making the coupling between them smoother. By reducing the impedance difference between the environment and the amplified resonant circuit, narrowband amplification around 10 megahertz (MHz) can be extended to the required range of hundreds of megahertz. However, the intensity of impedance transformation needs to be controlled during this process. If the bandwidth is too large, it may result in an overall reduction in gain. Ultimately, the goal is to sacrifice part of the gain in exchange for greater bandwidth.
  • the superconducting impedance conversion parametric amplifier solutions provided by the related art all use a structure in which a quarter-wavelength waveguide and a half-wavelength waveguide are connected in series.
  • the quarter-wavelength waveguide plays the role of impedance transformation.
  • the half-wavelength waveguide introduces an auxiliary resonance mode, which can effectively widen the bandwidth by introducing a second resonance point.
  • the quarter-wavelength waveguide in the related art cannot effectively improve the overall performance of the amplifier, and even increases the sensitivity of the entire superconducting impedance conversion parametric amplifier circuit to fluctuations in processing parameters.
  • Figure 5A is a schematic diagram of an optional process for determining the superconducting impedance conversion parametric amplifier in the embodiment of the present application. It is executed by the above-mentioned electronic device, specifically including the following steps 501 to 505.
  • Step 501 Determine the center wavelength parameters, gain parameters and bandwidth parameters of the superconducting impedance conversion parametric amplifier according to the usage environment parameters of the quantum chip.
  • the usage environment parameters of the superconducting quantum chip include the maximum value of the reading frequency, the minimum value of the reading frequency, and the bandwidth range of the reading frequency.
  • the bandwidth range of the reading frequency is from the superconducting quantum chip. It is obtained by reading the bandwidth range of the cavity.
  • the maximum value of the reading frequency is the maximum value among the multiple frequencies obtained after reading the frequency of the cavity multiple times in the superconducting quantum chip.
  • the minimum frequency is the minimum value among the frequencies obtained by reading the frequency of the cavity multiple times in the superconducting quantum chip.
  • the center wavelength parameter, bandwidth parameter and usage environment parameter meet the following matching conditions: the bandwidth parameter is not greater than the bandwidth range of the reading frequency, the center wavelength parameter is the ratio of the speed of light to the center frequency parameter, and the sum of the center frequency parameter and 0.5 times the bandwidth parameter The result is not less than the maximum frequency, and the subtraction result between the center frequency parameter and the 0.5 times bandwidth parameter is not greater than the minimum frequency.
  • the usage environment parameters of the superconducting quantum chip include the bandwidth range of the frequency.
  • the bandwidth range of the frequency (bandwidth parameter) is obtained by reading the bandwidth range of the cavity in the superconducting quantum chip.
  • the bandwidth range is within the 300-500MHz bandwidth, and 1 to 7 frequencies are read evenly. Any bandwidth within the above bandwidth range can be used as the bandwidth parameter of the superconducting impedance conversion parametric amplifier.
  • the bandwidth range of 500MHz as an example to illustrate, when determining the center frequency f of the superconducting impedance conversion parametric amplifier, when the bandwidth range is w , it is necessary to ensure that the 7 reading frequencies are within the frequency range from f-0.5w to f+0.5w, that is, as long as the value of the center frequency f satisfies that the 7 reading frequencies are within the range from f-250MHz to f+250MHz. , and then the central wavelength parameter can be determined based on the central frequency f, which is equal to the ratio of the speed of light to the central frequency.
  • the usage environment parameters of the quantum chip also include the number of frequencies that are read simultaneously when reading the frequency of the cavity from the superconducting quantum chip.
  • the gain parameter and the usage environment parameters meet the following matching conditions: the gain parameter and the number of frequencies that are read simultaneously The number of frequencies satisfies the calculation relationship of negative correlation.
  • the required saturation power is the required saturation power according to the number of simultaneous readings required. Specifically, the power required to read one qubit is P, then reading N bits at the same time requires N*P microwave power.
  • the microwave power here is saturation power. Since the parametric amplifier has output saturation, the greater the microwave power, the smaller the gain that can be obtained, that is, the gain parameter is negatively correlated with the microwave power. Usually the saturation power is -115dBm. If the number of amplifier frequencies that need to be read at the same time is more, the higher the saturation power is required. At this time, the critical current of the Josephson junction when the amplifier circuit resonates can be increased to a certain extent, and the same level is required. Ground increases the capacitance of the resonant circuit, thereby reducing the gain parameter.
  • Step 502 Determine the superconducting impedance transformation parameters using the wavelength parameters, gain parameters and bandwidth parameters as constraints.
  • the impedance of the amplifier is converted into the impedance value of the line and the capacitance value of the amplifier.
  • the impedance value of the impedance transformation line is equal to the square root of the product of the characteristic impedance of the Josephson parametric amplifier and the environmental impedance, which is 50 ohms.
  • the characteristic impedance value of a Josephson parametric amplifier is the square root of the ratio of the inductance to capacitance of the Josephson parametric amplifier.
  • the amplifier in "Capacitance value of amplifier” is actually a Josephson parametric amplifier.
  • the Josephson parametric amplifier here is the structure of a superconducting impedance transformation parametric amplifier.
  • the capacitance value of the Josephson parametric amplifier is the superconducting impedance transformation.
  • the capacitance value of the parametric amplifier, the capacitance value of the Josephson parametric amplifier is the reciprocal of the product of the square of the center frequency and the inductance of the Josephson parametric amplifier.
  • the microwave simulation software After calculating the impedance value of the impedance transformation line and the capacitance value of the amplifier based on the above example, it is also necessary to use the microwave simulation software to test whether the wavelength parameters, gain parameters and bandwidth parameters calculated in step 501 can be achieved, which is equivalent to using the method in step 501.
  • the calculated wavelength parameters, gain parameters and bandwidth parameters are used as conditional constraints to fine-tune the impedance value of the impedance conversion line and the capacitance value of the amplifier.
  • the specific implementation method is to input the impedance value of the impedance conversion line and the capacitance value of the amplifier into the simulation software Test whether the wavelength parameters, gain parameters and bandwidth parameters calculated in step 501 can be output. If these parameter values can be output, fine-tuning is not required.
  • the impedance value of the impedance conversion line and the capacitance value of the amplifier can be adjusted and then input into Test in the simulation software whether the wavelength parameters, gain parameters and bandwidth parameters calculated in step 501 can be output, and adjust until the wavelength parameters, gain parameters and bandwidth parameters calculated in step 501 can be output.
  • Step 503 Based on the impedance value of the impedance conversion line, calculate the line width size of the coplanar waveguide of the superconducting impedance conversion parametric amplifier.
  • the line width size includes the cross-sectional size corresponding to the impedance transformation line and the waveguide length.
  • the line width size here is found through microwave simulation software and is not calculated theoretically.
  • the simulation software After determining the cross-sectional size, enter the cross-sectional size and any For waveguide length, the simulation software outputs the resonant frequency of the coplanar waveguide. Keep the cross-sectional size unchanged and adjust the waveguide length several times until the resonant frequency output by the simulation software is equal to the center frequency parameter calculated in step 501.
  • the line width dimension of the coplanar waveguide is a distance of half the wavelength of the target center frequency. Due to the reduction in the line width dimension of the coplanar waveguide, the requirement for the amplifier capacitance value is reduced. It can be reduced from 3pF to 1pF in related technologies, making it a reality to use planar structures to achieve low-loss capacitors. At the same time, the linewidth size of the coplanar waveguide with a distance of one-half wavelength waveguide can achieve the same amplification performance as in related technologies. At the same time, the tolerance of the overall performance of the amplifier to processing parameter deviation is improved, effectively improving the superconducting performance.
  • the impedance transformation parametric amplifier improves the processing yield and reduces production costs.
  • the characteristic impedance of the impedance conversion part required by the superconducting impedance conversion parametric amplifier changes, it can be achieved by adjusting the cross-sectional size of the coplanar waveguide.
  • the impedance value of the impedance conversion line As an example, When the impedance value of the impedance conversion line decreases, the shape of the coplanar waveguide of the superconducting impedance conversion parametric amplifier is adjusted to a curved state.
  • the microwave resonant frequency of the waveguide will not be significantly different whether it is a straight waveguide or a curved waveguide, so the above can also be achieved.
  • the curved coplanar waveguide can adapt to different installation requirements for quantum chips in more usage scenarios.
  • Step 504 Calculate the stub size of the superconducting impedance conversion parametric amplifier based on the impedance value of the impedance conversion line and the capacitance value of the amplifier.
  • the number of stubs is preset.
  • the stubs are capacitors used to make amplifiers.
  • the capacitance value is calculated in step 502.
  • the number of stubs is 6.
  • the embodiment of this application uses Six stubs are connected in parallel to realize the capacitance value calculated in step 502. Then the capacitance of each stub can be determined, which is obtained by dividing the capacitance value in step 502 by the number of stubs.
  • the simulation software performs microwave simulation to obtain the stub size required to realize the stub capacitor.
  • the stub size here includes the length of the stub and the width of the gap between the stub and ground.
  • Figure 5B is an optional process schematic diagram of the method for determining the superconducting impedance conversion parameter amplifier in the embodiment of the present application.
  • the signal transmission module in Huizhong in the preceding embodiment can be
  • the simulation design software composed of the simulation design module uses the microwave network synthesis method, that is, the method of finding the required circuit component parameters based on the required circuit performance, to determine the ultra Structural parameters of impedance transformation parametric amplifier.
  • Step 505 Generate structural parameters of the superconducting impedance conversion parametric amplifier based on the line width size and stub size.
  • the line width size is used as the structural parameter of the superconducting impedance conversion parametric amplifier
  • the stub size is used as the structural parameter of the superconducting impedance conversion parametric amplifier.
  • the coplanar waveguide and the stub here are both superconducting impedance conversion
  • the simulation software can be used to draw the circuit according to the line width size and stub size, thereby obtaining the parameters of the entire superconducting impedance transformation parametric amplifier. Structure, the structure obtained here can be diverse, as long as the line width size and stub size are met.
  • FIG. 6 Schematic structural diagram of a medium superconducting impedance conversion parametric amplifier, in which one end is the microwave interface for input and output. Typically the circulator's input and output are split out of a port and connected to a section of coplanar waveguide centered at one-half wavelength. This section of waveguide uses a coplanar waveguide structure and is fabricated on the same base chip as the parametric amplifier. Finally, the coplanar waveguide is connected in series with a superconducting parametric amplifier.
  • a coplanar waveguide line can be used to apply a pump frequency approximately twice the center of the amplification frequency to drive the entire amplifier to work. Therefore, in this application, the Josephson parametric amplifier uses a stub structure, so that a planar structure can be used to realize the capacitance of the amplifier, thereby reducing losses.
  • the room temperature resistance value of the Josephson junction of the superconducting impedance conversion parametric amplifier can be calculated based on the capacitance value of the amplifier and the center frequency of the superconducting impedance conversion parametric amplifier to measure the qubit state, where, The room temperature resistance value is used to measure the qubit state and can be determined based on According to the different operating environment parameters of the superconducting impedance conversion parametric amplifier, the center frequency of the superconducting impedance conversion parametric amplifier is determined to meet the corresponding design and use requirements.
  • the inductance value of the parametric amplifier is equal to the square of the center frequency divided by the capacitance value of the parametric amplifier.
  • the room temperature resistance of the Josephson junction can be calculated according to formula (1):
  • is the superconducting energy gap of the superconducting material used
  • e is the basic charge
  • ⁇ 0 is the reduced quantum magnetic flux
  • L j is the inductance value of the parametric amplifier
  • R is the room temperature resistance of the Josephson junction.
  • FIG. 7A is a schematic diagram of a capacitor used in a quantum parametric amplifier in related technologies
  • FIG. 7B is a schematic diagram of the principle of a stub capacitor in an embodiment of the present application
  • FIG. 7C is a schematic diagram of a stub capacitor in an embodiment of the present application. Schematic cross-section of a line capacitor.
  • the insertion loss of the amplifier itself that is, the output when no amplification pump is provided compared to the input due to the introduction of the amplifier itself.
  • the insertion loss of related technologies mainly comes from the capacitive structure that makes up the parametric amplifier.
  • Figure 7A shows a capacitor used in a quantum parametric amplifier in the related art. Its advantage is that the capacitance density is high and the required capacitance can be produced in a small area, thereby reducing the parasitic inductance caused by the geometric structure. However, this capacitor has the disadvantage of large insertion loss due to the use of lossy dielectric materials.
  • the dielectric of the stub capacitor is a vacuum and low-loss base material.
  • This planar design reduces the amplifier's insertion loss by avoiding the use of amorphous dielectric materials.
  • a short coplanar waveguide with an open load is equivalent to a capacitor to ground. Since a single stub provides less capacitance, extending the length will introduce too much parasitic inductance, affecting the gain of the amplifier.
  • multiple similar stub capacitor structures are connected in parallel with the Josephson junction loop to form a parametric amplification circuit. In practical applications, it is also necessary to add an air bridge at the root of the stub as shown in Figure 7C to reduce the parasitic mode caused by the longer stub capacitance.
  • the structural improvement of the impedance conversion parametric amplifier provided in this application is explained, in which the impedance converter and the Josephson parameter amplifier, the impedance converter and the Josephson parameter The amplifier is integrated in the same quantum chip;
  • the impedance transformer includes: a coplanar waveguide, the length of the coplanar waveguide is half the wavelength of the center frequency of the Josephson parametric amplifier;
  • the Josephson parametric amplifier includes: a stub, a stub The length matches the capacitance value of the superconducting impedance transformation parametric amplifier.
  • the length of the stub is calculated based on the capacitance value of the superconducting impedance conversion parametric amplifier, the length of the stub matches the capacitance value of the superconducting impedance conversion parametric amplifier.
  • the calculation method here can be found in step 504. implementation.
  • coplanar waveguides with smaller gaps and thicker centers can be used to reduce parasitic series inductance. Specifically, you can first calculate the impedance values of the stub capacitor of the selected geometric size in a certain range near the desired center frequency. Then use a lumped circuit with a capacitor and an inductor connected in series to fit the above curve of the relationship between impedance and frequency to obtain the capacitance value and parasitic inductance value. And ensure that the total capacitance value of several parallel stub capacitors meets the design value.
  • a half-wavelength coplanar waveguide wire when fabricating a superconducting impedance-converting parametric amplifier, can be connected in series between the parametric amplifier circuit and the pad for connection to the environment. Since the impedance transformer Integrated on the same chip as the Josephson parametric amplifier, it reduces the uncertainty caused by manual processing in the previous discrete design and improves the manufacturing yield rate of the superconducting impedance conversion parametric amplifier.
  • wire bonding is connected to the core wire of a microwave connector externally fixed on the sample box.
  • the length of leads needed to be used when making connections is greater than the number of parallel connections. This ensures that the structure combined with these leads and pads has a characteristic impedance close to the environmental impedance. This can reduce unnecessary reflections from the environment and improve the impedance environment of the amplifier.
  • the large piece of metal in the sample box will also be connected to the large metal film representing the ground on the chip using a large number of leads to ensure good grounding and achieve the durability of the superconducting impedance conversion parametric amplifier.
  • Figure 8 is a schematic diagram of the use of the superconducting impedance conversion parametric amplifier in an embodiment of the present application, in which a target port for accessing the pump signal is configured for the superconducting impedance conversion parametric amplifier, where the target port is used to determine the superconducting
  • the working point of the impedance transformation parametric amplifier can be determined through the target port
  • the center frequency of the superconducting impedance conversion parametric amplifier (the center frequency is determined based on the intensity of the microwave signal reflected by the port, that is, the frequency corresponding to the minimum reflection intensity is regarded as the center frequency).
  • the The read signal passing through the bit chip is introduced into the superconducting impedance conversion parametric amplifier impedance conversion parametric amplifier described in the embodiment of this application through the circulator.
  • the amplified reflected signal is separated from the input signal by the circulator. After secondary and tertiary amplification by low-temperature and room-temperature amplifiers, it is analyzed by room-temperature electronic equipment to determine the state of the qubit.
  • the superconducting impedance conversion parametric amplifier also has ports for accessing pump signals. Generally, the DC bias and microwave driver need to be mixed through a paranoid and then connected to this port.
  • the port here refers to the pump input port required for the amplifier to work, not the working port for the input signal.
  • the operating point of the superconducting impedance conversion parametric amplifier can be determined.
  • the center frequency of the amplifier's operation can be changed to align it with the microwave frequency that needs amplification to determine the operating point.
  • driving microwaves the superconducting impedance conversion parametric amplifier realizes the amplification function.
  • the appropriate driving microwave here refers to obtaining sufficient gain without generating obvious heat and noise.
  • Figure 9 is a schematic diagram of the test effect of the superconducting impedance conversion parametric amplifier in the embodiment of the present application.
  • the maximum available bandwidth of the amplifier that implements the parametric amplification function in the related art is only about 600MHz.
  • the peak available bandwidth of the superconducting impedance conversion parametric amplifier provided is 1GHz.
  • the performance of the impedance conversion parametric amplifier is better, and the loss of the superconducting impedance conversion parametric amplifier is reduced.
  • the superconducting impedance conversion parametric amplifier is shown in Figure 9.
  • the maximum available bandwidth increases from 5500GHz to 7500GHz
  • the maximum loss of the superconducting impedance conversion parametric amplifier is 24dB, and decreases to 8dB at 7500GHz.
  • This application determines the central wavelength parameters, gain parameters and bandwidth parameters of the superconducting impedance conversion parametric amplifier based on the usage environment parameters of the quantum chip; based on the wavelength parameters, gain parameters and bandwidth parameters, calculates the impedance transformation line of the superconducting impedance conversion parametric amplifier.
  • the impedance value and the capacitance value of the amplifier based on the impedance value of the impedance conversion line, calculate the line width size of the coplanar waveguide of the superconducting impedance conversion parametric amplifier; based on the impedance value of the impedance conversion line and the capacitance value of the amplifier, calculate the superconducting impedance Convert the stub size of the parametric amplifier; determine the structural parameters of the superconducting impedance conversion parametric amplifier based on the line width size and the stub size.

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Abstract

本申请提供了一种超导阻抗变换参量放大器的确定方法、装置、超导阻抗变换参量放大器、电子设备、计算机程序产品以及计算机可读存储介质,方法包括:基于波长参数,增益参数和带宽参数,计算超导阻抗变换参量放大器的阻抗变换线的阻抗值和放大器的电容值;基于阻抗变换线的阻抗值,计算超导阻抗变换参量放大器的共面波导的线宽尺寸;基于阻抗变换线的阻抗值和所述放大器的电容值,计算超导阻抗变换参量放大器的短截线尺寸;基于线宽尺寸和短截线尺寸,确定超导阻抗变换参量放大器的结构参数。

Description

超导阻抗变换参量放大器的确定方法、装置、超导阻抗变换参量放大器、电子设备、计算机程序产品以及计算机可读存储介质
相关申请的交叉引用
本申请基于申请号为202210815436.0、申请日为2022年7月8日的中国专利申请提出,并要求中国专利申请的优先权,中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本申请涉及信号处理技术,尤其涉及一种超导阻抗变换参量放大器的确定方法、装置、超导阻抗变换参量放大器、电子设备、计算机程序产品以及计算机可读存储介质。
背景技术
超导芯片上的量子比特(Qubit quantum bit)是量子态的载体,携带有量子信息。超导量子计算具有运行速度快的优点,得到人们广泛应用。超导量子芯片使用中,超导量子芯片处于极低温(<30mK)的环境下,受噪声影响大,并且从超导量子芯片输出的信号非常微弱,一般需要在输出端后级加多级放大器用以提高信号强度。相关技术商用的低温放大器一般工作在4K温度层,会带来极大的热噪声,而和超导量子芯片工作在同一温度层的约瑟夫森参量放大器具有极大的增益、不会引入额外噪声的优良特性,所以约瑟夫森参量放大器是做超导量子计算的必要器件。同时,通过阻抗变换器,使用附加电路实现环境阻抗与放大器阻抗之间更缓和过度,实现环境与参量振荡电路之间更大频谱范围的耦合。但是,约瑟夫森参量放大器和阻抗变换器由于结构复杂,组合而成的阻抗变换约瑟夫森参量放大器在加工过程中的良品率较低,增加了量子芯片的制作成本,同时由于阻抗变换约瑟夫森参量放大器对参数敏感,要求的电容较大,介电电容的插入损耗大,造成了阻抗变换约瑟夫森参量放大器的性能提升不足, 功耗过高。
发明内容
本申请实施例提供一种超导阻抗变换参量放大器的确定方法、装置、超导阻抗变换参量放大器、电子设备、计算机程序产品及计算机可读存储介质,能够有效提升导阻抗变换参量放大器的性能,降低导阻抗变换参量放大器的损耗,同时提升导阻抗变换参量放大器的制造良品率。
本申请实施例的技术方案是这样实现的:
本申请实施例提供了一种超导阻抗变换参量放大器的确定方法,所述方法由电子设备执行,所述方法包括:
根据量子芯片的使用环境参数,确定超导阻抗变换参量放大器的中心波长参数,增益参数和带宽参数;
基于所述波长参数,所述增益参数和所述带宽参数,计算所述超导阻抗变换参量放大器的阻抗变换线的阻抗值和放大器的电容值;
基于所述阻抗变换线的阻抗值,计算所述超导阻抗变换参量放大器的共面波导的线宽尺寸;
基于所述阻抗变换线的阻抗值和所述放大器的电容值,计算所述超导阻抗变换参量放大器的短截线尺寸;
基于所述线宽尺寸和所述短截线尺寸,确定所述超导阻抗变换参量放大器的结构参数。
本申请实施例还提供了一种超导阻抗变换参量放大器的确定装置,所述装置包括:
信号传输模块,配置为根据量子芯片的使用环境参数,确定超导阻抗变换参量放大器的中心波长参数,增益参数和带宽参数;
仿真设计模块,配置为基于所述波长参数,所述增益参数和所述带宽参数,计算所述超导阻抗变换参量放大器的阻抗变换线的阻抗值和放大器的电容值;
所述仿真设计模块,配置为基于所述阻抗变换线的阻抗值,计算所述超导 阻抗变换参量放大器的共面波导的线宽尺寸;
所述仿真设计模块,配置为基于所述阻抗变换线的阻抗值和所述放大器的电容值,计算所述超导阻抗变换参量放大器的短截线尺寸;
所述仿真设计模块,配置为基于所述线宽尺寸和所述短截线尺寸,确定所述超导阻抗变换参量放大器的结构参数。
本申请实施例还提供了一种超导阻抗变换参量放大器,所述超导阻抗变换参量放大器包括:
阻抗变换器和约瑟夫森参量放大器,所述阻抗变换器和约瑟夫森参量放大器集成在同一量子芯片中;
所述阻抗变换器包括:共面波导,所述共面波导的长度为中心频率的二分之一波长;
所述约瑟夫森参量放大器包括:短截线,所述短截线的长度与所述超导阻抗变换参量放大器的电容值相匹配。
本申请实施例还提供了一种电子设备,所述电子设备包括:
存储器,用于存储计算机可执行指令;
处理器,用于运行所述存储器存储的计算机可执行指令时,实现本申请实施例提供的超导阻抗变换参量放大器的确定方法。
本申请实施例提供一种计算机程序产品,包括计算机可执行指令,所述计算机可执行指令被处理器执行时实现本申请实施例提供的超导阻抗变换参量放大器的确定方法。
本申请实施例还提供了一种计算机可读存储介质,存储有计算机可执行指令,所述计算机可执行指令被处理器执行时实现本申请实施例提供的超导阻抗变换参量放大器的确定方法。
本申请实施例具有以下有益效果:
本申请通过根据量子芯片的使用环境参数,确定超导阻抗变换参量放大器的中心波长参数,增益参数和带宽参数;基于波长参数,增益参数和带宽参数,计算超导阻抗变换参量放大器的阻抗变换线的阻抗值和放大器的电容值;基于 阻抗变换线的阻抗值,计算超导阻抗变换参量放大器的共面波导的线宽尺寸;基于阻抗变换线的阻抗值和放大器的电容值,计算超导阻抗变换参量放大器的短截线尺寸;基于线宽尺寸和短截线尺寸,确定超导阻抗变换参量放大器的结构,由此,通过申请所提供的超导阻抗变换参量放大器的确定方法,不但可以实现提升导阻抗变换参量放大器的性能更好,将导阻抗变换参量放大器的损耗降低,同时利用超导阻抗变换参量放大器的结构,使得导阻抗变换参量放大器的制造中,良品率更好,降低制造成本,有利于超导量子芯片的大规模推广。
附图说明
图1为本申请实施例提供的超导阻抗变换参量放大器的确定方法的使用场景示意图;
图2为本申请实施例提供的超导阻抗变换参量放大器的确定装置的组成结构示意图;
图3为本申请实施例中参量放大器一个可选的结构示意图;
图4为本申请实施例中参量放大器一个可选的结构示意图;
图5A为本申请实施例中超导阻抗变换参量放大器的确定方法一个可选的过程示意图;
图5B为本申请实施例中超导阻抗变换参量放大器的确定方法一个可选的过程示意图;
图6为本申请实施例中超导阻抗变换参量放大器的结构示意图;
图7A为相关技术中量子参量放大器中使用的电容示意图;
图7B为本申请实施例中短截线电容的原理示意图;
图7C为本申请实施例中短截线电容的剖面示意图;
图8为本申请实施例中超导阻抗变换参量放大器的使用示意图;
图9为本申请实施例中超导阻抗变换参量放大器的测试效果示意图。
具体实施方式
为了使本申请的目的、技术方案和优点更加清楚,下面将结合附图对本申请作进一步地详细描述,所描述的实施例不应视为对本申请的限制,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本申请保护的范围。
在以下的描述中,涉及到“一些实施例”,其描述了所有可能实施例的子集,但是可以理解,“一些实施例”可以是所有可能实施例的相同子集或不同子集,并且可以在不冲突的情况下相互结合。
对本申请实施例进行进一步详细说明之前,对本申请实施例中涉及的名词和术语进行说明,本申请实施例中涉及的名词和术语适用于如下的解释。
1)版图(Layout):又称为电路版图,是描述电路中的元器件如何布局、摆放和连接的设计图。是真实电路物理情况的平面几何形状描述。
3)超导量子比特,超导量子比特是利用约瑟夫森结形成的超导量子电路。
4)超导量子芯片(Superconducting Quantum Chip):超导量子芯片是超导量子计算机的中央处理器。量子计算机是利用量子力学原理来进行计算的一种机器。基于量子力学的叠加原理和量子纠缠,量子计算机具有较强的并行处理能力,可以解决一些经典计算机难以计算的问题。超导量子比特的零电阻特性及与集成电路接近的制造工艺,使得利用超导量子比特构建的量子计算体系是相关技术最有希望实现实用量子计算的体系之一。
5)共面波导(Coplanar Waveguide,CPW):是一种性能优越、加工方便的微波平面传输线,用于传输微波信号。在介质基片的一个面上制作出中心导体带,并在紧邻中心导体带的两侧制作出导体平面,这样就构成了共面波导,又叫共面微带传输线。共面波导传播的是TEM波,没有截止频率。由于中心导体与导体平板位于同一平面内,因此,在共面波导上并联安装元器件很方便,用它可制成传输线及元件都在同一侧的单片微波集成电路。超导量子芯片中使用大量的共面波导技术。
6)刻蚀(Etching)/湿法刻蚀:即光刻腐蚀,是半导体工艺中重要的一环,按照版图设计对半导体衬底表面进行选择性腐蚀、剥离的图形化处理技术。刻蚀是用化学或物理方法有选择地从硅片表面去除不需要的材料的过程,其基本目标是在涂胶的硅片上正确地复制掩模图形。湿法刻蚀是将刻蚀材料浸泡在腐蚀液内进行腐蚀的刻蚀方法,优点是选择性重复性好、生产效率高、设备简单成本低。
7)微纳加工:微纳制造技术是指由特定元件构成的部件或系统的设计、加工、组装、集成与应用技术,特定元件是尺度为亚毫米、微米和纳米量级的元件。
8)元器件(Components):元件和器件的总称,是电路中的电子部件和组成元素,比如电阻、电容、电感等。
9)放大器(Amplifier):微波功率放大器件。
10)约瑟夫森参量放大器(Josephson Parametric Amplifier,JPA):通常由一个电容与一对并联的约瑟夫森结构成。约瑟夫森参量放大器的放大过程是使用非线性参量过程将输入的微波信号进行放大的过程,前述非线性参量过程是约瑟夫森结的在外磁通调制下的非线性参量过程。
11)输入信号(Input Signal):输入信号是输入至放大器的待放大的微波信号。
12)泵浦信号(Pump Signal):泵浦信号是通过泵浦端口提供给放大器,进行能量转换,放大输入信号的微波。
13)闲波信号(Idler Signal):闲波信号是混波非线性过程自动产生的非需求微波输出。
14)阻抗变换(Impedence Matching):阻抗变换即为阻抗匹配,用于解决微波传输线与微波器件之间匹配。使用附加电路来进行阻抗匹配,可以使得环境阻抗与放大器阻抗之间实现更缓和过度,使得环境与参量振荡电路之间实现更大频谱范围的耦合。
15)阻抗变换约瑟夫森参量放大器(Impedance Matched Josephson Parametric  Amplifier,IMPA):阻抗变换约瑟夫森参量放大器是在约瑟夫森参量放大器中集成阻抗变换模块得到的,它可以在更大带宽范围内实现参量放大。
16)短截线电容(Stub Capacitance):短截线是用于连接的传输线或波导,短截线可以在等于或者低于目标频率范围内作为电容,称为短截线电容,短截线是使用连接开路负载的,长度小于目标频率四分之一波长的波导结构。
17)介质电容(Dielectric Capacitance):在芯片底层和顶层金属之间使用绝缘的介电材料,如SiOx,AlOx等,把芯片底层和顶层金属隔开几十至数百纳米的距离并形成集总形式的电容,所形成的电容即为介质电容。
18)光刻(photolithography):也称光学平版刻法或紫外光刻,是一种零件图形化的精密加工工艺,是半导体制造中一个重要的步骤。
下面对本申请实施例所提供的量子比特的频率控制信号处理方法进行说明,图1为本申请实施例提供的量子比特的频率控制信号处理方法的使用场景示意图,参见图1,超导量子计算机是一种使用量子逻辑进行通用计算的电子设备。相比传统计算机,超导量子计算机在解决一些特定问题时运算效率可大幅提高,因而受到广泛关注。超导量子芯片可以利用相关的半导体工艺技术实现大规模的集成,同时,在相互作用控制、选择性操作以及纠错等进行量子计算的关键性指标方面,超导量子比特展现出较其他物理体系更为优越的性能,是最有希望实现超导量子计算机的平台之一。具体来说,超导量子计算机主要包括超导量子芯片和用于芯片控制和测量的硬件系统,硬件系统主要包括各种微波频段的信号发生器和和各种微波频段的器件,包括不限于滤波器、放大器、隔离器等,以及配备微波传输线的稀释制冷机。超导量子计算机的关键技术是对超导量子芯片上量子比特状态的精密操控和准确测量,超导量子比特的本征能量处于吉赫兹(GHz)的微波波段,实现量子门操作和量子态的读取需要对超导量子比特施加特定相位、幅度和持续时间的脉冲微波信号,故而超导量子计算机需要大量GHz微波频段的信号源和GHz采样率的任意波形信号调制。另外,超导量子比特需要保持在毫开尔文的温度下降低热噪声以长时间的维持超导量子比特的相干状态,一般选择使用稀释制冷机为超导量子芯片提供低温环境。稀释制 冷机需要配备微波传输线,将室温制备的微波信号传递给处于低温状态的超导量子比特。如图1所示,控制子系统用于控制量子比特Qubit状态进行量子计算,例如单比特逻辑门计算和两比特逻辑门计算;超导量子芯片用于承载量子计算信息;测量子系统用于读取Qubit最终状态并获得量子计算的计算结果。将超导量子芯片置于低温环境中,控制子系统按照量子计算操作的需求产生脉冲调制信号,将一系列微波脉冲序列输入到超导量子芯片,对Qubit的量子态进行操作,所有操作完成后,测量系统输出测量脉冲信号到超导量子芯片,通过返回的信号变化得到Qubit的状态信息,最终得到计算结果。在测量过程中,相关技术商用的低温放大器一般工作在4K温度层,会带来极大的热噪声,而和超导量子芯片工作在同一温度层的约瑟夫森参量放大器具有极大的增益、不会引入额外噪声的优良特性,所以约瑟夫森参量放大器是做超导量子计算的必要器件。同时,通过阻抗变换器,使用附加电路实现环境阻抗与放大器阻抗之间更缓和过度,实现环境与参量振荡电路之间更大频谱范围的耦合。但是,约瑟夫森参量放大器和阻抗变换器由于结构复杂,组合而成的阻抗变换约瑟夫森参量放大器在加工过程中的良品率较低,增加了量子芯片的制作成本,同时由于对参数敏感,要求的电容较大,介电电容的插入损耗大,造成了阻抗变换约瑟夫森参量放大器的性能提升不足,功耗过高。因此,需要提供一种新型结构的超导阻抗变换参量放大器,保证高良率地生产大带宽低插损接近量子极限噪声的超导阻抗变换参量放大器,以满足量子芯片的大规模使用。
下面对本申请实施例的超导阻抗变换参量放大器的确定装置的结构做详细说明,超导阻抗变换参量放大器的确定装置可以各种形式来实施,如带有超导阻抗变换参量放大器的确定装置处理功能的超导量子芯片,也可以为设置有超导阻抗变换参量放大器的确定装置处理功能的集成芯片,例如图1中的超导量子芯片200。图2为本申请实施例提供的超导阻抗变换参量放大器的确定装置的组成结构示意图,可以理解,图2仅仅示出了超导阻抗变换参量放大器的确定装置的示例性结构而非全部结构,根据需要可以实施图2示出的部分结构或全部结构。
本申请实施例提供的超导阻抗变换参量放大器的确定装置包括:至少一个处理器201、存储器202、用户接口203和至少一个网络接口204。超导阻抗变换参量放大器的确定装置中的各个组件通过总线系统205耦合在一起。可以理解,总线系统205用于实现这些组件之间的连接通信。总线系统205除包括数据总线之外,还包括电源总线、控制总线和状态信号总线。但是为了清楚说明起见,在图2中将各种总线都标为总线系统205。
其中,用户接口203可以包括显示器、键盘、鼠标、轨迹球、点击轮、按键、按钮、触感板或者触摸屏等。
可以理解,存储器202可以是易失性存储器或非易失性存储器,也可包括易失性和非易失性存储器两者。本申请实施例中的存储器202能够存储数据以支持终端中的超导量子芯片中的操作。这些数据的示例包括:用于在终端的超导量子芯片上操作的任何计算机程序,如操作系统和应用程序。其中,操作系统包含各种系统程序,例如框架层、核心库层、驱动层等,用于实现各种基础业务以及处理基于硬件的任务。应用程序可以包含各种应用程序。
在一些实施例中,本申请实施例提供的超导阻抗变换参量放大器的确定装置可以采用软硬件结合的方式实现,作为示例,本申请实施例提供的超导阻抗变换参量放大器的确定装置可以是采用硬件译码处理器形式的处理器,其被编程以执行本申请实施例提供的超导阻抗变换参量放大器的确定方法。例如,硬件译码处理器形式的处理器可以采用一个或多个应用专用集成电路(ASIC,Ap plication Specific Integrated Circuit)、DSP、可编程逻辑器件(PLD,Programm able Logic Device)、复杂可编程逻辑器件(CPLD,Complex Programmable Lo gic Device)、现场可编程门阵列(FPGA,Field-Programmable Gate Array)或其他电子元件。
作为本申请实施例提供的超导阻抗变换参量放大器的确定装置采用软硬件结合实施的示例,本申请实施例所提供的超导阻抗变换参量放大器的确定装置可以直接体现为由处理器201执行的软件模块组合,软件模块可以位于存储介质中,存储介质位于存储器202,处理器201读取存储器202中软件模块包括的 可执行指令,结合必要的硬件(例如,包括处理器201以及连接到总线205的其他组件)完成本申请实施例提供的超导阻抗变换参量放大器的确定方法。
作为示例,处理器201可以是一种超导电子芯片,具有信号的处理能力,例如通用处理器、数字信号处理器(DSP,Digital Signal Processor),或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等,其中,通用处理器可以是微处理器或者任何常规的处理器等。
作为本申请实施例提供的超导阻抗变换参量放大器的确定装置采用硬件实施的示例,本申请实施例所提供的装置可以直接采用硬件译码处理器形式的处理器201来执行完成,例如,被一个或多个应用专用集成电路(Application Sp ecific Integrated Circuit,ASIC)、DSP、可编程逻辑器件(Programmable Logic Device,PLD)、复杂可编程逻辑器件(Complex Programmable Logic Device,CPLD)、现场可编程门阵列(Field-Programmable Gate Array,FPGA)或其他电子元件执行实现本申请实施例提供的超导阻抗变换参量放大器的确定方法。
本申请实施例中的存储器202用于存储各种类型的数据以支持超导阻抗变换参量放大器的确定装置的操作。这些数据的示例包括:用于在超导阻抗变换参量放大器的确定装置上操作的任何可执行指令,如可执行指令,实现本申请实施例的从超导阻抗变换参量放大器的确定方法的程序可以包含在可执行指令中。
在一些实施例中,本申请实施例提供的超导阻抗变换参量放大器的确定装置可以采用软件方式实现,图2示出了存储在存储器202中的超导阻抗变换参量放大器的确定装置,其可以是程序和插件等形式的软件,并包括一系列的模块,作为存储器202中存储的程序的示例,可以包括超导阻抗变换参量放大器的确定装置,超导阻抗变换参量放大器的确定装置中包括以下的软件模块:信号传输模块2081和仿真设计模块2082,信号传输模块2081和仿真设计模块2082可以组成微波生成方法的仿真设计软件,以计算超导阻抗变换参量放大器的结构参数。当超导阻抗变换参量放大器的确定装置中的软件模块被处理器201读取到随机存取存储器(Random Access Memory,RAM)中并执行时,将实现 本申请实施例提供的超导阻抗变换参量放大器的确定方法,超导阻抗变换参量放大器的确定装置中各个软件模块的功能,包括:
信号传输模块2081,配置为根据量子芯片的使用环境参数,确定超导阻抗变换参量放大器的中心波长参数,增益参数和带宽参数。
仿真设计模块2082,配置为以所述波长参数,所述增益参数和所述带宽参数为约束,确定所述超导阻抗变换参量放大器的阻抗变换线的阻抗值和放大器的电容值。
所述仿真设计模块2082,还配置为基于所述阻抗变换线的阻抗值,计算所述超导阻抗变换参量放大器的共面波导的线宽尺寸。
所述仿真设计模块2082,还配置为基于所述阻抗变换线的阻抗值和所述放大器的电容值,计算所述超导阻抗变换参量放大器的短截线尺寸。
所述仿真设计模块2082,还配置为基于所述线宽尺寸和所述短截线尺寸,确定所述超导阻抗变换参量放大器的结构参数。
本申请还提供了一种计算机程序产品,该计算机程序产品包括计算机可执行指令,该计算机可执行指令存储在计算机可读存储介质中。电子设备的处理器从计算机可读存储介质读取该计算机指令,处理器执行该计算机指令,使得该电子设备执行上述超导阻抗变换参量放大器的确定方法的各种可选实现方式中所提供的不同实施例及实施例的组合。
在介绍本申请所提出的超导阻抗变换参量放大器的确定方法之前,首先对相关技术的超导阻抗变换参量放大器进行介绍,具体来说,参考图3,图3为本申请实施例中参量放大器一个可选的结构示意图,相关技术中超导约瑟夫森结环路作为非线性元件,经过与介电电容的并联做成超导参量谐振电路。为了增大带宽,在相关技术中使用阻抗变换技术,具体而言使用在中心频率在放大带宽中心时的波导组成的阻抗匹配结构,且波导是一个四分之一和一个二分之一波长波导串联的结构。在约瑟夫森结环路附近通过共面波导施加大约放大中心频率二倍左右的驱动和直流偏置实现放大,如图3所示,参量放大器通常由谐振电路(一般是电感-电容并联的谐振电路),可调谐的非线性元件(半导体通常 为使用可变电容,超导电路通常使用约瑟夫森结制作的可调电感)和一个外界施加的谐振频率二倍作用的泵浦驱动。
参考图4,图4为本申请实施例中参量放大器一个可选的结构示意图,超导约瑟夫森结,作为一种典型的超导非线性器件,它在超导参量放大器中起着核心作用。约瑟夫森结环路中的磁通量子化效应使得该环路在小电流条件下表现类似一个可被外部施加磁通所调制的电感,小电流在行业内是小电流接地选线装置的简称,适用于3KV-66KV中性点不接地或中性点经电阻、消弧线圈接地系统的单相接地选线。而且由于超导的特性,其电阻损耗在理想情况下也可以忽略。当给超导环路施加大约输入信号两倍的磁通泵浦时就可以有效地放大输入信号。超导参量放大器本质是非线性谐振器,在其中振荡的是超导相位。超导现象是一种典型的宏观量子现象,大量的传导电子通过一定的机制结合成库伯对并凝聚到一起,形成集体模式的量子态。超导凝聚在能带中打开能隙,能隙对应有能量尺度,能量尺度对应有相互作用,超导凝聚可以将所有低于这个能隙对应的相互作用排除,对系统起到了绝佳的保护,成就了对于很多应用而言求之不得的效应:零电阻和完全抗磁性。超导现象作为一种宏观量子效应,尽管参与的粒子数在宏观量级,但表现出来的自由度只有相位。通常电路的噪声来源于不可控的自由度,在超导参量放大器中,参与的自由度只有这一个,其他大量相关的自由度都因为超导能隙的保护而冻结了,自然噪声就极低了。通常人们会提到超导参量放大器的量子极限噪声。非线性的存在使得放大器的振荡频率与振幅大小相关,对于JPA而言,振幅越大,共振频率越低。当振幅趋近于一个临界值时,极微弱的扰动也将导致系统响应特性出现显著变化。JPA需要先用一个较大功率的泵浦信号将系统驱动到接近这个临界状态,然后输入信号进来就相当于这个扰动,响应特性的变化造成输出变化。在这个过程中,扰动(信号)与泵浦之间有一定的相位关系,当信号与泵浦频率一致时,只有当二者同相位时,才能造成显著的放大,而当相位相差90度时,输出反而是缩小的,理论上这正好满足了前述“超越量子极限”的条件。超越量子极限是有严格条件的,只有当信号频率与泵浦频率一致的时候才能发生。如果二者有偏 差,根据三角函数关系,信号光总能分解成一半与泵浦光同相、一半与泵浦光相差90度的两个分量,因此总体增益就与初相无关了,即附加噪声最小值是半个光子。
但是,这种放大器也有带宽频率过窄的问题。特别是在超导量子计算的多路复用读取,对超导参量放大器的带宽,提出带宽要求的情况下。为了解决上述技术问题,相关技术中使用了阻抗变换器。通过阻抗变换器降低超导参量放大器与50欧姆的环境之间的阻抗差别,使得它们之间的耦合更加顺滑。通过减小环境与放大的谐振电路之间的阻抗差别,可以将10兆赫兹(MHz)左右的窄带放大扩展到需要的数百兆赫兹的范围。但这一过程中需要控制好阻抗变换的强度。如果带宽过大,可能会导致增益的整体减小。最终实现通过牺牲部分增益换取更大带宽的目的。
相关技术所提供的超导阻抗变换参量放大器方案均使用一个四分之一和一个二分之一波长波导串联的结构。其中,四分之一波长波导起到阻抗变换作用。二分之一波长波导引入一个辅助谐振模式,可以通过引入第二个谐振点,等效地拉大带宽。但是申请人发现相关技术中的四分之一波长波导并不能有效地提高放大器的整体表现,甚至增加了整个超导阻抗变换参量放大器的电路对加工参数波动的敏感程度。同时,由于超导阻抗变换参量放大器中所使用的阻抗变换器和参量放大器并不是相同的平面结构,因此,在阻抗变换参量放大器的生产过程中存在良品率较低的缺陷,增加了阻抗变换参量放大器的制造成本。
为了克服上述缺陷,本申请实施例提供能够提升性能的超导阻抗变换参量放大器,参考图5A,图5A为本申请实施例中超导阻抗变换参量放大器的确定方法一个可选的过程示意图,可以由上述的电子设备执行,具体包括以下步骤501至步骤505。
步骤501:根据量子芯片的使用环境参数,确定超导阻抗变换参量放大器的中心波长参数,增益参数和带宽参数。
作为示例,超导量子芯片的使用环境参数包括读取频率的最大值、读取频率的最小值以及读取频率的带宽范围,读取频率的带宽范围是从超导量子芯片 中对腔的带宽范围进行读取得到的,读取频率的最大值是在超导量子芯片中对腔进行频率多次读取后,所得到的多个频率中的最大值,读取频率的最小频率是在超导量子芯片中对腔进行频率多次读取后,所得到的多个频率中的最小值。中心波长参数以及带宽参数与使用环境参数满足以下匹配条件:带宽参数不大于读取频率的带宽范围,中心波长参数是光速与中心频率参数的比值,中心频率参数与0.5倍的带宽参数的求和结果不小于最大频率,中心频率参数与0.5倍的带宽参数之间的相减结果不大于最小频率。
超导量子芯片的使用环境参数包括频率的带宽范围,频率的带宽范围(带宽参数)是从超导量子芯片中对腔的带宽范围进行读取得到的。例如,带宽范围为300-500MHz带宽以内,均匀读取1至7个频率。可以将上述带宽范围内的任意带宽作为超导阻抗变换参量放大器的带宽参数,以带宽范围是500MHz为例进行说明,在确定超导阻抗变换参量放大器的中心频率f时,当带宽范围是w时,需要保证7个读取频率处于f-0.5w至f+0.5w的频率区间内,即只要中心频率f的取值满足7个读取频率处于f-250MHz至f+250MHz的区间内即可,再根据中心频率f可以确定出中心波长参数,中心波长参数等于光速与中心频率的比值。
作为示例,量子芯片的使用环境参数还包括从超导量子芯片中对腔进行频率读取时,同时读取的频率数目,增益参数与使用环境参数满足以下匹配条件:增益参数与同时读取的频率数目满足负相关的计算关系。
根据需要同时读取数目,确定需要的饱和功率,具体而言,读取一个量子比特需要的功率是P,那么同时读取N个比特就需要N*P的微波功率,这里的微波功率即为饱和功率。由于参数放大器有输出饱和现象,微波功率越大,能够得到的增益就越小,即增益参数与微波功率负相关。通常饱和功率在-115dBm,如果需要同时读取的放大器频率的数目越多,需要的饱和功率也就越高,此时可以一定程度增加放大电路谐振时约瑟夫森结的临界电流,也需要同等程度地增大谐振电路的电容,从而会降低增益参数。
步骤502:以波长参数,增益参数和带宽参数为约束,确定超导阻抗变换参 量放大器的阻抗变换线的阻抗值和放大器的电容值。
作为示例,阻抗变换线的阻抗值等于约瑟夫森参量放大器的特征阻抗与环境阻抗的乘积的平方根,环境阻抗是50欧姆。约瑟夫森参量放大器的特征阻抗值为约瑟夫森参量放大器的电感与电容比值的平方根。
作为示例,“放大器的电容值”中的放大器实际上是约瑟夫森参量放大器,这里的约瑟夫森参量放大器是超导阻抗变换参量放大器的组成结构,约瑟夫森参量放大器的电容值即为超导阻抗变换参量放大器的电容值,约瑟夫森参量放大器的电容值是中心频率的平方与约瑟夫森参量放大器的电感的乘积的倒数。
在基于上述示例计算得到阻抗变换线的阻抗值和放大器的电容值之后,还需要通过微波仿真软件测试是否能够实现步骤501中计算得到的波长参数,增益参数和带宽参数,即相当于以501中计算得到的波长参数,增益参数和带宽参数作为条件约束对阻抗变换线的阻抗值和放大器的电容值进行微调,具体实施方式是将阻抗变换线的阻抗值和放大器的电容值输入到仿真软件中测试是否可以输出步骤501计算得到的波长参数,增益参数和带宽参数,如果可以输出这些参数数值,则不需要进行微调,否则可以阻抗变换线的阻抗值和放大器的电容值进行调整后再输入到仿真软件中测试是否可以输出步骤501计算得到的波长参数,增益参数和带宽参数,调整到可以输出步骤501计算得到的波长参数,增益参数和带宽参数为止。
步骤503:基于阻抗变换线的阻抗值,计算超导阻抗变换参量放大器的共面波导的线宽尺寸。
作为示例,线宽尺寸包括阻抗变换线对应的横截面尺寸以及波导长度,这里的线宽尺寸通过微波仿真软件找到,并非理论计算得到。首先通过仿真确定出阻抗变换线的阻抗值对应的横截面尺寸,具体而言,通过在仿真软件中输入任意一个的横截面尺寸,仿真软件输出假设的横截面尺寸对应的阻抗值,再多次调整输入的横截面尺寸直至仿真软件输出的阻抗值与步骤502计算得到的阻抗值相等时为止,将相等时输入的横截面尺寸作为上述线宽尺寸包括的横截面尺寸。再确定出横截面尺寸之后,在仿真软件中输入横截面尺寸以及任意一个 波导长度,仿真软件输出共面波导的谐振频率,保持横截面尺寸不变多次调整波导长度直到仿真软件输出的谐振频率与步骤501计算得到的中心频率参数相等时为止。
通过步骤503的处理,共面波导的线宽尺寸为在目标中心频率的二分之一波长的距离,由于共面波导的线宽尺寸的减少,降低了对放大器电容值的要求。可以有相关技术中3pF下降低到1pF,使得利用平面结构实现低损耗的电容成为现实。同时,二分之一波长波导的距离的共面波导的线宽尺寸可以得到与相关技术中相同的放大表现,同时又提高了放大器整体表现对加工参数偏移的容忍程度,有效提高了超导阻抗变换参量放大器的加工良率,降低生产成本。
在一些实施例中,当超导阻抗变换参量放大器所需的阻抗变换部分的特征阻抗发生变化时,可以通过调整共面波导的截面尺寸来实现,以阻抗变换线的阻抗值减小为例,当阻抗变换线的阻抗值减小时,将超导阻抗变换参量放大器的共面波导的形状调整为弯曲状态,波导的微波谐振频率不会随直线波导还是曲线波导有明显区别,因此同样可以实现上述技术效果,同时,弯曲状态的共面波导,可以适应更多使用场景中对于量子芯片的不同安装需求。
步骤504:基于阻抗变换线的阻抗值和放大器的电容值,计算超导阻抗变换参量放大器的短截线尺寸。
作为示例,短截线的数目是预先设定好的,短截线是用于制作放大器的电容,电容值是步骤502计算得到的,例如,短截线的数目是6,本申请实施例使用6个短截线并联实现步骤502计算得到的电容值,那么可以确定出每个短截线电容,即由步骤502的电容值除以短截线的数目得到,通过设置短截线的端口以及仿真软件进行微波仿真,得到实现短截线电容所需的短截线尺寸,这里的短截线尺寸包括短截线的长度和短截线与地之间的缝隙宽度。
参考图5B,图5B为本申请实施例中超导阻抗变换参量放大器的确定方法一个可选的过程示意图,在执行步骤501-步骤504的过程中,可以通过前序实施例汇中信号传输模块和仿真设计模块所组成的仿真设计软件,通过微波网络合成法,也就是根据需要的电路表现寻找需要的电路元件参数的方法,确定超 导阻抗变换参量放大器的结构参数。类比于合成大带宽带阻滤波器的思路,为了合成有带宽的增益,只要把同样中心,带宽和负增益也就是衰减时候得到的参数赋给放大器电路,同时把里面并联于谐振电路的正电阻变换成同样绝对值大小的负电阻。在得到的新电路中负电阻并联电感的结构将由被参数调制的约瑟夫森环路实现。除了谐振放大电路需要的电容,电感,负电阻,本方法也会同时给出阻抗变换部分的基本参数,即二分之一阻抗变换线的阻抗值。
步骤505:基于线宽尺寸和短截线尺寸,生成超导阻抗变换参量放大器的结构参数。
作为示例,将线宽尺寸作为超导阻抗变换参量放大器的结构参数,并将短截线尺寸作为超导阻抗变换参量放大器的结构参数,这里的共面波导以及短截线均是超导阻抗变换参量放大器的重要结构,在已知的线宽尺寸和短截线尺寸之后,通过仿真软件,按照线宽尺寸和短截线尺寸利用仿真软件进行线路绘制,从而得到整个超导阻抗变换参量放大器的结构,这里得到的结构可以具有多样性,只要满足线宽尺寸以及短截线尺寸即可。
当确定超导阻抗变换参量放大器的结构参数之后,可以继续基于线宽尺寸和短截线尺,对超导阻抗变换参量放大器的功效进行检测和调整,参考图6,图6为本申请实施例中超导阻抗变换参量放大器的结构示意图,其中,一端为输入输出的微波接口。通常会将环形器的输入输出从一个端口中分离出来,之后会连接到一段在中心频率为二分之一波长的共面波导。该段波导使用共面波导结构在于参量放大器相同的基底芯片上制作。最后该共面波导会再与超导参量放大器器串联。在参量放大器的约瑟夫森结附近,可以用共面波导线施加大约放大频率中心2倍的泵浦频率,驱动整个放大器工作。由此,在本申请中,约瑟夫森参量放大器通过使用短截线结构,使得可以使用平面结构实现放大器的电容,降低了损耗。
在一些实施例中,可以根据放大器的电容值和超导阻抗变换参量放大器的中心频率,计算超导阻抗变换参量放大器的约瑟夫森结的室温电阻值,以达到测量量子比特状态的作用,其中,室温电阻值用于测量量子比特状态,可以根 据超导阻抗变换参量放大器的不同使用环境参数,确定超导阻抗变换参量放大器的中心频率,以满足相应的设计使用需求。
作为示例,参量放大器的电感值等于中心频率的平方除以参量放大器的电容值,可以根据公式(1)计算约瑟夫森结的室温电阻:
其中,Δ为所使用超导材料的超导能隙,e为基础电荷,φ0为约化量子磁通,Lj为参量放大器的电感值,R是约瑟夫森结的室温电阻。
参考图7A至图7C,其中,图7A为相关技术中量子参量放大器中使用的电容示意图,图7B为本申请实施例中短截线电容的原理示意图,图7C为本申请实施例中短截线电容的剖面示意图。
在确定超导阻抗变换参量放大器的结构参数时,除了稳定可靠的大带宽放大之外,还需要注意放大器本身的插入损耗,即在不提供放大泵浦情况下的输出相比输入由于放大器本身引入的损耗,相关技术插入损耗中主要来自组成参量放大器的电容结构。
如图7A为相关技术中量子参量放大器中使用的电容,其优点是电容密度高,可以在很小的面积之内做出来需要的电容,从而减小由于几何结构带来的寄生电感。但是这种电容由于使用了有损的介电材料,因此带来了插入损耗大的缺点。
参考图7B所示的短截线电容,短截线电容的电介质为真空与低损耗的基底材料。由于避免使用了无定形状态的介电材料,这种平面设计可以减小放大器的插入损耗。参考图7C,一个负载为开路的长度较短的共面波导即可等价于一个电容对地的电容。由于单一短截线提供的电容较少,如果加长长度又会引入过多的寄生电感,影响放大器的增益。在实际设计中会并联多个类似的短截线电容结构并与约瑟夫森结环路并联,形成参量放大电路。在实际应用中,还需要像图7C所示,在短截线的根部添加一个空桥减小较长的短截线电容带来的寄生模式。
继续结合图6所示的超导阻抗变换参量放大器的结构示意图,说明本申请所提供的导阻抗变换参量放大器的结构改进,其中,阻抗变换器和约瑟夫森参量放大器,阻抗变换器和约瑟夫森参量放大器集成在同一量子芯片中;阻抗变换器包括:共面波导,共面波导的长度为约瑟夫森参量放大器的中心频率的二分之一波长;约瑟夫森参量放大器包括:短截线,短截线的长度与超导阻抗变换参量放大器的电容值相匹配。由于短截线的长度是基于超导阻抗变换参量放大器的电容值进行计算得到的,因此短截线的长度与超导阻抗变换参量放大器的电容值相匹配,这里的计算方式可以参见步骤504的实施方式。
在一些实施例中,多个并联的开路共面波导结构实现电容时,可以使用缝隙更小而中心更粗的共面波导来减小寄生的串联电感。具体来说可以首先计算所选择几何尺寸的短截线电容在所需中心频率附近一定范围的阻抗值。再用电容与电感串联的集总电路对以上阻抗与频率关系的曲线进行拟合,得到电容值和寄生的电感值。并保证数个并联的短截线电容的总电容值符合设计值。
在一些实施例中,在制造超导阻抗变换参量放大器时,可以将一段二分之一波长的共面波导线串联在参量放大电路和用于与环境连接的焊盘之间,由于阻抗变换器与约瑟夫森参量放大器集成在同一片芯片之上,减少了之前分立设计引入由于人工加工引入的不确定性,提升了超导阻抗变换参量放大器的制造良品率。
在一些实施例中,在制造超导阻抗变换参量放大器时,引线键合与外部固定在样品盒上面的微波接头的芯线进行连接。在进行连接时需要使用的引线长度与比并联的数目。由此可以保证这些引线与焊盘组合后的结构拥有与环境阻抗接近的特征阻抗。这样可以减小与环境之间不必要的反射,改善放大器的阻抗环境。同时样品盒的大块金属也将使用大量的引线与芯片上代表地的大片金属膜进行连接,保证良好的接地性,实现了超导阻抗变换参量放大器的耐用性。
参考图8,图8为本申请实施例中超导阻抗变换参量放大器的使用示意图,其中,为超导阻抗变换参量放大器配置接入泵浦信号的目标端口,其中,目标端口用于确定超导阻抗变换参量放大器的工作点,可以实现通过目标端口确定 超导阻抗变换参量放大器的中心频率(根据端口反射的微波信号强度确定出中心频率,即将反射强度最小时对应的频率作为中心频率),具体来说,配合量子比特芯片的读取使用中,把经过比特芯片的读取信号经过环形器引入本申请实施例描述的超导阻抗变换参量放大器阻抗变换参量放大器。经过放大的反射信号,被环形器与输入信号分开。再经过低温和室温放大器的二级和三级放大之后,被室温电子学设备分析判断量子比特所处的状态。除了输入输出端口,超导阻抗变换参量放大器还有用于接入泵浦信号的端口。一般需要将直流偏置与微波驱动经过偏执器混合之后连接到该端口,这里的端口指放大器工作需要的泵浦输入端口,不是输入信号的工作端口。通过扫描合适的直流偏置,确定超导阻抗变换参量放大器的工作点,通过扫描直流偏置,可以改变放大器工作的中心频率,使其对准需要放大的微波频率以确定工作点。通过施加驱动微波,使超导阻抗变换参量放大器实现放大功能,这里合适的驱动微波指得到足够的增益同时不产生明显发热和噪声。
参考图9,图9为本申请实施例中超导阻抗变换参量放大器的测试效果示意图,相关技术中实现参量放大功能的放大器最大可用带宽只有600MHz左右,但是如图9所示,本申请实施例所提供的超导阻抗变换参量放大器的可用带宽的峰值为1GHz,导阻抗变换参量放大器性能更好,同时超导阻抗变换参量放大器的损耗降低,如图9所示的超导阻抗变换参量放大器的最大可用带宽在5500GHz增加到7500GHz的过程中超导阻抗变换参量放大器的损耗最大值为24dB,并在7500GHz时,降低至8dB。
本申请通过根据量子芯片的使用环境参数,确定超导阻抗变换参量放大器的中心波长参数,增益参数和带宽参数;基于波长参数,增益参数和带宽参数,计算超导阻抗变换参量放大器的阻抗变换线的阻抗值和放大器的电容值;基于阻抗变换线的阻抗值,计算超导阻抗变换参量放大器的共面波导的线宽尺寸;基于阻抗变换线的阻抗值和放大器的电容值,计算超导阻抗变换参量放大器的短截线尺寸;基于线宽尺寸和短截线尺寸,确定超导阻抗变换参量放大器的结构参数,由此,可以实现:1)通过本申请所提供的超导阻抗变换参量放大器的 确定方法,可以实现提升导阻抗变换参量放大器的性能更好,将导阻抗变换参量放大器的损耗降低;2)同时利用超导阻抗变换参量放大器的结构,使得导阻抗变换参量放大器的制造中,良品率更好,降低制造成本,有利于超导量子芯片的大规模推广。
以上,仅为本申请的实施例而已,并非用于限定本申请的保护范围,凡在本申请的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本申请的保护范围之内。

Claims (13)

  1. 一种超导阻抗变换参量放大器的确定方法,所述方法由电子设备执行,所述方法包括:
    根据量子芯片的使用环境参数,确定所述超导阻抗变换参量放大器的中心波长参数,增益参数和带宽参数;
    以所述波长参数,所述增益参数和所述带宽参数为约束,确定所述超导阻抗变换参量放大器的阻抗变换线的阻抗值和放大器的电容值;
    基于所述阻抗变换线的阻抗值,计算所述超导阻抗变换参量放大器的共面波导的线宽尺寸;
    基于所述阻抗变换线的阻抗值和所述放大器的电容值,计算所述超导阻抗变换参量放大器的短截线尺寸;
    基于所述线宽尺寸和所述短截线尺寸,确定所述超导阻抗变换参量放大器的结构参数。
  2. 根据权利要求1所述的方法,其中,所述方法还包括:
    当所述阻抗变换线的阻抗值减小时,将所述超导阻抗变换参量放大器的共面波导的形状调整为弯曲状态。
  3. 根据权利要求2或3所述的方法,其中,所述方法还包括:
    根据所述放大器的电容值和所述超导阻抗变换参量放大器的中心频率,计算所述超导阻抗变换参量放大器的约瑟夫森结的室温电阻值,其中,所述室温电阻值用于测量量子比特状态。
  4. 根据权利要求1至3任一项所述的方法,其中,所述方法还包括:
    为所述超导阻抗变换参量放大器配置接入泵浦信号的目标端口,其中,所述目标端口用于确定所述超导阻抗变换参量放大器的工作点。
  5. 一种超导阻抗变换参量放大器的确定装置,所述装置包括:
    信号传输模块,配置为根据量子芯片的使用环境,确定所述超导阻抗变换参量放大器的中心波长参数,增益参数和带宽参数;
    仿真设计模块,配置为以所述波长参数,所述增益参数和所述带宽参数为约束,确定所述超导阻抗变换参量放大器的阻抗变换线的阻抗值和放大器的电容值;
    所述仿真设计模块,配置为基于所述阻抗变换线的阻抗值,计算所述超导阻抗变换参量放大器的共面波导的线宽尺寸;
    所述仿真设计模块,配置为基于所述阻抗变换线的阻抗值和所述放大器的电容值,计算所述超导阻抗变换参量放大器的短截线尺寸;
    所述仿真设计模块,配置为基于所述线宽尺寸和所述短截线尺寸,确定所述超导阻抗变换参量放大器的结构参数。
  6. 根据权利要求5所述的装置,其中,
    所述仿真设计模块,配置为当所述阻抗变换线的阻抗值减小时,将所述超导阻抗变换参量放大器的共面波导的形状调整为弯曲状态。
  7. 根据权利要求5或6所述的装置,其中,
    所述仿真设计模块,配置为根据所述放大器的电容值,和所述超导阻抗变换参量放大器的中心频率,计算所述超导阻抗变换参量放大器的约瑟夫森结的室温电阻值,其中,所述室温电阻值用于测量量子比特状态。
  8. 根据权利要求5至7任一项所述的装置,其中,
    所述仿真设计模块,配置为为所述超导阻抗变换参量放大器配置接入泵浦信号的目标端口,其中,所述目标端口用于确定所述超导阻抗变换参量放大器的工作点。
  9. 一种超导阻抗变换参量放大器,所述超导阻抗变换参量放大器包括阻抗变换器和约瑟夫森参量放大器,所述阻抗变换器和所述约瑟夫森参量放大器集成在同一量子芯片中;
    所述阻抗变换器包括:共面波导,所述共面波导的长度为所述约瑟夫森参量放大器的中心频率的二分之一波长;
    所述约瑟夫森参量放大器包括:短截线,所述短截线的长度与所述超导阻抗变换参量放大器的电容值相匹配。
  10. 一种电子设备,所述电子设备包括:
    存储器,用于存储计算机可执行指令;
    处理器,用于运行所述存储器存储的计算机可执行指令时实现权利要求1至4任一项所述的超导阻抗变换参量放大器的确定方法。
  11. 一种计算机程序产品,包括计算机可执行指令,所述计算机可执行指令被处理器执行时,实现权利要求1至4任一项所述的超导阻抗变换参量放大器的确定方法。
  12. 一种计算机可读存储介质,存储有计算机可执行指令,所述可执行可执行指令被处理器执行时实现权利要求1至4任一项所述的超导阻抗变换参量放大器的确定方法。
  13. 一种计算机程序产品,包括计算机可执行指令,所述计算机可执行指令被处理器执行时实现权利要求1至4任一项所述的超导阻抗变换参量放大器的确定方法。
PCT/CN2023/095810 2022-07-08 2023-05-23 超导阻抗变换参量放大器的确定方法、装置、超导阻抗变换参量放大器、电子设备、计算机程序产品以及计算机可读存储介质 WO2024007756A1 (zh)

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