WO2024004992A1 - 配線基板およびそれを用いた実装構造体 - Google Patents

配線基板およびそれを用いた実装構造体 Download PDF

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Publication number
WO2024004992A1
WO2024004992A1 PCT/JP2023/023741 JP2023023741W WO2024004992A1 WO 2024004992 A1 WO2024004992 A1 WO 2024004992A1 JP 2023023741 W JP2023023741 W JP 2023023741W WO 2024004992 A1 WO2024004992 A1 WO 2024004992A1
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WO
WIPO (PCT)
Prior art keywords
insulating
region
layer
wiring board
conductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/023741
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English (en)
French (fr)
Japanese (ja)
Inventor
英敏 湯川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to KR1020247042090A priority Critical patent/KR20250012619A/ko
Priority to EP23831432.2A priority patent/EP4550949A1/en
Priority to JP2024530863A priority patent/JPWO2024004992A1/ja
Priority to CN202380048059.5A priority patent/CN119384873A/zh
Priority to US18/878,152 priority patent/US20250386433A1/en
Publication of WO2024004992A1 publication Critical patent/WO2024004992A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/032—Organic insulating material consisting of one material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0263—Details about a collection of particles
    • H05K2201/0266—Size distribution
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0779—Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
    • H05K2203/0786—Using an aqueous solution, e.g. for cleaning or during drilling of holes
    • H05K2203/0796—Oxidant in aqueous solution, e.g. permanganate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/09—Treatments involving charged particles
    • H05K2203/095—Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate

Definitions

  • the present invention relates to a wiring board and a mounting structure using the same.
  • an inorganic filler such as silica or alumina is dispersed in an insulating layer included in a wiring board for the purpose of lowering the coefficient of thermal expansion of the insulating layer, as described in Patent Document 1, for example. There is. As shown in Patent Document 1, some inorganic fillers may be exposed from the surface of the insulating layer.
  • a wiring board includes a first insulating layer having a first surface and a conductor layer located on the first surface.
  • the first insulating layer includes an insulating resin and a plurality of insulating particles dispersed in the insulating resin.
  • the plurality of insulating particles include first insulating particles having a first region exposed from the insulating resin on the first surface and a second region other than the first region when the first surface is viewed from above.
  • the conductor layer is located on the surface of the first region and the surface of the insulating resin, and is not located below the first region or between the second region and the insulating resin.
  • the mounting structure according to the present disclosure includes the above wiring board and an electronic component located in the mounting area of the wiring board.
  • FIG. 1 is a cross-sectional view showing a wiring board according to an embodiment of the present disclosure.
  • FIG. 2 is an enlarged cross-sectional view for explaining region X (main part) in FIG. 1.
  • FIG. 3 is an enlarged cross-sectional view for explaining other main parts of the wiring board according to an embodiment of the present disclosure.
  • FIG. 3 is an explanatory diagram for explaining an embodiment of a method for forming a conductor layer on a first surface of a first insulating layer in a wiring board according to an embodiment of the present disclosure.
  • a conductor layer is located on the surface of the insulating layer.
  • a conductor is also formed in the gap between the part of the exposed inorganic filler buried in the insulating layer and the insulating layer.
  • the inorganic filler and the conductor layer have weak adhesion, and if the conductor layer is present on the inorganic filler, the conductor layer may swell or peel. Therefore, there is a need for a wiring board that has excellent adhesion between an insulating layer and a conductor layer on the surface of the insulating layer in which insulating particles are dispersed.
  • the wiring board according to the present disclosure has the configuration described in the column of means for solving the above problems, so that the insulating layer and the conductor layer are in close contact with each other on the surface of the insulating layer in which insulating particles are dispersed. Excellent in sex.
  • FIG. 1 is a cross-sectional view showing a wiring board 1 according to one embodiment.
  • the first insulating layer 11 corresponds to a build-up insulating layer as shown in FIG. As shown in FIG. 2, the first insulating layer 11 has a structure in which insulating particles 14 are dispersed.
  • FIG. 2 is an enlarged sectional view for explaining region X (main part) of FIG. 1.
  • FIG. The first insulating layer 11 is not particularly limited as long as it is an insulating resin 111.
  • the insulating resin 111 include epoxy resin, bismaleimide-triazine resin, polyimide resin, polyphenylene ether resin, and liquid crystal polymer. Only one type of insulating resin 111 may be used, or two or more types may be used in combination.
  • the first insulating layer 11 may further include a reinforcing material.
  • the reinforcing material include insulating cloth materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Two or more reinforcing materials may be used in combination.
  • the thickness of the first insulating layer 11 is not particularly limited, and is, for example, 2 ⁇ m or more and 100 ⁇ m or less.
  • the plurality of insulating particles 14 dispersed in the first insulating layer 11 have a function of reducing the coefficient of thermal expansion of the first insulating layer 11.
  • the insulating particles 14 are not limited, and examples include inorganic insulating fillers such as silica, alumina, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of insulating particles 14 may be used, or two or more types may be used in combination.
  • the average particle diameter of the insulating particles 14 is not limited.
  • the insulating particles 14 may have an average particle diameter of, for example, 0.1 ⁇ m or more and 2 ⁇ m or less, or 1 ⁇ m or less.
  • the filling rate of the insulating particles 14 in the first insulating layer 11 is not limited. In order to make the thermal expansion coefficient of the first insulating layer 11 sufficiently small, the filling rate of the insulating particles 14 in the first insulating layer 11 may be 50 volume % or more and 90 volume % or less.
  • the filling rate of the insulating particles 14 is 50 volume % or more and 90 volume % or less, the contact area between the conductor layer 12 (seed layer 121, which will be described later) and the insulating particles 14 (the second insulating particles 14b, which will be described later) increases. As a result, the portion having an amorphous structure 16, which will be described later, increases, and the conductor layer 12 (seed layer 121) and the insulating particles 14 can be more firmly adhered to each other.
  • the average particle diameter of the insulating particles 14 may be calculated, for example, by processing images taken by an electron microscope of the insulating particles 14 within a predetermined range.
  • the filling rate may be detected by energy dispersive X-ray analysis.
  • the insulating particles 14 are first insulating particles 14a. As shown in FIG. 2, the first insulating particles 14a cover a first region 141 exposed from the insulating resin 111 on the first surface 11a of the first insulating layer 11 and a second region 142 other than the first region 141. have
  • the top of the first region 141 is located farther from the second insulating layer 13 than the insulating resin 111 closest to the first region 141 .
  • the first surface 11a of the first insulating layer 11 corresponds to the main surface of the wiring board 1 that is farther from the center in the thickness direction. In FIG. 1, the first surface 11a of the first insulating layer 11 corresponds to the main surface farther from the second insulating layer 13, which will be described later.
  • a conductor layer 12 is located on the first surface 11a of the first insulating layer 11.
  • the conductor layer 12 is located on the first region 141 of the first insulating particles 14a and the surface of the insulating resin 111, as shown in FIG.
  • the conductor layer 12 is not limited as long as it is a conductor.
  • Examples of the conductor include metals such as copper.
  • the conductor layer 12 is specifically formed of metal plating such as copper plating.
  • the thickness of the conductor layer 12 is not particularly limited, and is, for example, 2 ⁇ m or more and 50 ⁇ m or less at the thickest portion.
  • the conductor layer 12 may include a seed layer 121 that covers the first region 141 of the first insulating particles 14a and the surface of the insulating resin 111, as shown in FIG.
  • the seed layer 121 is formed for the purpose of improving the adhesion of the conductor layer 12 or as a base metal for conduction when the conductor layer 12 is formed on an insulator by electrolytic plating.
  • the seed layer 121 is formed of, for example, a transition metal of Groups 4, 5, 6, and 10 of the periodic table, such as titanium, nickel, and chromium, or an alloy containing these transition metals, such as nichrome.
  • the thickness of the seed layer 121 is not particularly limited, and is, for example, 1 nm or more and 100 nm or less.
  • a via hole conductor 12V is positioned to electrically connect the upper and lower layers of the stacked first insulating layer 11.
  • the via hole conductor 12V is located in a via hole that penetrates the upper and lower surfaces of the first insulating layer 11.
  • the via hole conductor 12V is not limited as long as it is a metal (conductor) such as copper.
  • the via hole conductor 12V may be filled in the via hole as shown in FIG. 1, or may be formed only on the inner wall surface of the via hole.
  • the via hole conductor 12V is connected to the conductor layer 12 located on the surface of the first insulating layer 11.
  • the conductor layer 12 is not located below the first region 141 of the first insulating particle 14a and between the second region 142 of the first insulating particle 14a and the insulating resin 111.
  • the conductor layer 12 is not located below the first region 141 of the first insulating particles 14a, which means that the conductor layer 12 is not located below the first region 141 of the first insulating particle 14a.
  • 12 means that it does not exist in a position overlapping with the first region 141 when viewed from above. That is, the conductor layer 12 is not located below the first insulating particles 14a (on the center side in the thickness direction of the wiring board 1).
  • the conductor layer 12 If the conductor layer 12 is located below the first region 141 of the first insulating particles 14a, the conductor layer 12 will thermally expand under high temperature conditions, and the first insulating particles will pass through the first insulating particles 14a. The conductor layer 12 above the conductor layer 14a may be pushed up, causing a bulge. When the conductor layer 12 is located between the second region 142 of the first insulating particles 14 a and the insulating resin 111 , the first insulating particles 14 a are easily shed from the insulating resin 111 . For this reason, the conductor layer 12 may swell or peel.
  • the wiring board 1 according to an embodiment in which the conductor layer 12 is not located below the first region 141 of the first insulating particle 14a and between the second region 142 of the first insulating particle 14a and the insulating resin 111, The adhesion between the first insulating layer 11 and the conductor layer 12 is excellent.
  • the second insulating layer 13 is located approximately at the center of the wiring board 1 in the thickness direction.
  • the second insulating layer 13 corresponds to a core insulating layer, as shown in FIG.
  • the first insulating layer 11 is located on each of the two second surfaces 13a of the second insulating layer 13.
  • the second surface 13a of the second insulating layer 13 corresponds to the main surface of the second insulating layer 13.
  • the second insulating layer 13 is not particularly limited as long as it is the insulating resin 111.
  • the insulating resin 111 include epoxy resin, bismaleimide-triazine resin, polyimide resin, polyphenylene ether resin, and liquid crystal polymer. Only one type of insulating resin 111 may be used, or two or more types may be used in combination.
  • the insulating resin 111 included in the second insulating layer 13 may be the same as or different from the insulating resin 111 included in the first insulating layer 11.
  • the thickness of the second insulating layer 13 is not particularly limited, and is, for example, 0.04 mm or more and 3 mm or less.
  • the second insulating layer 13 may further include a reinforcing material, insulating particles 14, and the like.
  • the reinforcing material include insulating cloth materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Two or more reinforcing materials may be used in combination.
  • examples of the insulating particles 14 include inorganic insulating fillers such as silica, alumina, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of insulating particles 14 may be used, or two or more types may be used in combination.
  • a through-hole conductor 12T is located in the second insulating layer 13 in order to electrically connect the upper and lower parts of the second insulating layer 13.
  • the through-hole conductor 12T is located in a through-hole penetrating the upper and lower surfaces of the second insulating layer 13.
  • the through-hole conductor 12T is not limited as long as it is a metal (conductor) such as copper.
  • the through-hole conductor 12T may be formed only on the inner wall surface of the through-hole as shown in FIG. 1, or may be filled in the through-hole.
  • the through-hole conductor 12T is connected to the conductor layer 12 located on the upper and lower surfaces of the second insulating layer 13.
  • the conductor layer 12 may include a protrusion 12A that protrudes into the insulating resin 111, as shown in FIG. That is, the protruding portion 12A is located in the direction toward the second insulating layer 13 from the first surface 11a.
  • FIG. 3 is an enlarged cross-sectional view for explaining other main parts of the wiring board 1 according to one embodiment.
  • the depth of the protruding portion 12A from the first surface 11a is not limited, and may be, for example, 30 nm or more and 1 ⁇ m or less at the deepest portion, or 50 nm or more and 500 nm or less.
  • the protrusion 12A having a smaller depth is advantageous in terms of forming finer wiring.
  • the protrusion 12A may include a void 15.
  • the proportion of the voids 15 may be, for example, 10 volume % or more and 60 volume % or less with respect to the volume of the protrusion 12A.
  • the proportion of voids 15 can be calculated by performing cross-sectional observation image processing from multiple directions using an electron microscope. In particular, since the voids 15 are minute, it is best to calculate them using a photograph taken with a transmission electron microscope.
  • the contact portion between the conductor layer 12 (seed layer 121) and the insulating particles 14 may have an amorphous structure 16.
  • the amorphous structure 16 is a structure that does not have a regular arrangement structure like a crystal. Specifically, in the contact portion between the conductor layer 12 (seed layer 121) and the insulating particles 14, the amorphous of the conductor layer 12 (seed layer 121) and the amorphous of the insulating particles 14 are mixed with each other. . The presence of such an amorphous structure 16 allows the conductor layer 12 (seed layer 121) and the insulating particles 14 to be more firmly adhered to each other.
  • the plurality of insulating particles 14 are in contact with the conductor layer 12 (seed layer 121) on the first surface 11a.
  • the second insulating particles 14b may have a third region 143 and a fourth region 144 in contact with the protrusion 12A (seed layer 121).
  • the portion between the third region 143 and the fourth region 144 of the second insulating particles 14b may be covered with the insulating resin 111.
  • this insulating resin 111 is caused by the difference between the coefficient of thermal expansion of the conductor layer 12 and the coefficient of thermal expansion of the second insulating particles 14b. Thermal stress can be alleviated. As a result, the adhesion between the conductor layer 12 and the second insulating particles 14b is further improved.
  • FIG. 4A to 4E are explanatory diagrams for explaining an embodiment of a method for forming the conductor layer 12 on the first surface 11a of the first insulating layer 11 in the wiring board 1 according to the embodiment.
  • 4A to 4E a method for forming the conductor layer 12 on the first surface 11a of the first insulating layer 11 located on the upper surface (second surface 13a) of the second insulating layer 13 will be described as an example.
  • 4A to 4E illustrate a portion where the conductor layer 12 is not present on the second surface 13a of the second insulating layer 13, and the conductor layer 12 is also present on the second surface 13a of the second insulating layer 13. positioned.
  • an insulating sheet 111P made of an insulating resin 111 in which a plurality of insulating particles 14 are dispersed is laminated on the second surface 13a of the second insulating layer 13.
  • the insulating sheet 111P may be thermocompression bonded to the second surface 13a under vacuum.
  • the insulating particles 14 are unevenly distributed on the second insulating layer 13 side, and a portion (layer) having a high proportion of the insulating resin 111 is formed near the surface on the opposite side.
  • the thickness of the portion with a high proportion of the insulating resin 111 is, for example, about 10 nm or more and 100 ⁇ m or less.
  • the obtained laminate is subjected to plasma treatment to reduce the thickness of the portion where the proportion of the insulating resin 111 is high.
  • plasma treatment may be performed so that the thickness becomes about 100 nm.
  • permanganic acid solution treatment is performed.
  • the permanganic acid solution treatment may be performed, for example, at a temperature of 40° C. or more and 60° C. or less for 30 seconds or more and 10 minutes or less. In this way, a portion of the insulating particles 14 is exposed from the surface of the insulating resin 111, as shown in FIG. 4C.
  • the insulating particles 14 partially exposed from the surface of the insulating resin 111 correspond to the first insulating particles 14a.
  • a portion exposed from the surface of the insulating resin 111 corresponds to the first region 141.
  • the permanganate solution treatment After the permanganate solution treatment, it is subjected to plasma treatment again.
  • This second plasma treatment is performed to roughen the surface of the insulating resin 111 exposed between the first insulating particles 14a.
  • the second plasma treatment is performed, for example, so that resin with a depth of about 100 nm or more and 300 nm or less is removed from the surface of the insulating resin 111 exposed between the first insulating particles 14a.
  • a seed layer 121 is formed on the surface of the first region 141 of the first insulating particles 14a and the surface of the insulating resin 111.
  • the seed layer 121 is formed of a transition metal of Groups 4, 5, 6, and 10 of the periodic table, such as titanium, nickel, and chromium, or an alloy containing these transition metals, such as nichrome.
  • the method for forming the seed layer 121 is not limited, and examples thereof include sputtering and vapor deposition.
  • the seed layer 121 is applied to the first region 141 of the first insulating particle 14a exposed from the surface of the insulating resin 111, and the third region 143 and fourth region 144 of the second insulating particle 14b.
  • the forming metals collide and generate thermal energy.
  • the generated thermal energy causes the atomic arrangement to change or transition on the surfaces of the first region 141, third region 143, and fourth region 144.
  • parts of the surfaces of the first region 141, the third region 143, and the fourth region 144 become amorphous, and an amorphous layer of insulating particles 14 is formed.
  • a seed layer 121 is formed on the surface of the insulating resin 111 and on the surfaces of the first region 141, third region 143, and fourth region 144.
  • the metal deposited on the surfaces of the first region 141, the third region 143, and the fourth region 144 is a part of the seed layer 121 (the first region 141, The surfaces (contact surfaces with the surfaces of the third region 143 and the fourth region 144) become amorphous, and an amorphous metal layer is formed. Formation of the metal amorphous layer reduces the possibility that the conductor layer 12 gets between the insulating resin 111 and the insulating particles 14.
  • the conductor layer 12 is formed on the surface of the seed layer 121. Specifically, the conductor layer 12 is formed by depositing a metal such as copper by electrolytic plating. The thickness of the conductor layer 12 is as described above, and detailed explanation will be omitted.
  • insulating sheet 111P made of insulating resin 111 in which a plurality of insulating particles 14 are dispersed is laminated on the top surface and the same procedure is repeated to obtain wiring board 1 with a desired number of laminated layers.
  • a mounting structure according to the present disclosure includes a wiring board according to the present disclosure and an electronic component located in a mounting area of the wiring board.
  • electronic components include semiconductor integrated circuit elements, optoelectronic elements, and the like.
  • the electronic component is connected to the mounting area of the wiring board via solder.
  • the electronic components may be located on both sides of the wiring board, with elements being located on one surface and, for example, a motherboard or the like being located on the other surface.
  • the wiring board of the present disclosure is not limited to the above-described embodiment.
  • the above-described wiring board 1 includes the second insulating layer 13 corresponding to the core insulating layer.
  • the second insulating layer 13 is not an essential member but an optional member. Therefore, the wiring board of the present disclosure may be in the form of a so-called coreless board in which the second insulating layer 13 is not present.
  • the amorphous structure 16 is shown only in the vicinity of the protrusion 12A shown in FIG.
  • the amorphous structure 16 can be formed at any contact portion between the conductor layer 12 (seed layer 121) and the insulating particles 14. Therefore, the amorphous structure 16 may also be formed in at least a portion of the contact portion between the first region 141 of the first insulating particle 14a and the conductor layer 12 (seed layer 121) as shown in FIG.
  • a wiring board includes a first insulating layer having a first surface and a conductor layer located on the first surface.
  • the first insulating layer includes an insulating resin and a plurality of insulating particles dispersed in the insulating resin.
  • the plurality of insulating particles include first insulating particles having a first region exposed from the insulating resin on the first surface and a second region other than the first region when the first surface is viewed from above.
  • the conductor layer is located on the surface of the first region and the surface of the insulating resin, and is not located below the first region or between the second region and the insulating resin.
  • the wiring board according to (1) above further includes a second insulating layer having a second surface, and at least one first insulating layer is located on the second surface.
  • the conductor layer includes a protrusion that protrudes into the insulating resin.
  • the protrusion includes a void.
  • the contact portion between the conductor layer and the insulating particles has an amorphous structure.
  • the plurality of insulating particles protrude from the third region that contacts the conductor layer on the first surface.
  • the second insulating particle has a fourth region in contact with the second insulating particle, and a portion between the third region and the fourth region of the second insulating particle is coated with an insulating resin.
  • the filling rate of the insulating particles is 50 volume % or more and 90 volume % or less.
  • a mounting structure includes the wiring board according to any one of (1) to (7) above, and an electronic component located in a mounting area of the wiring board.
  • Wiring board 11 First insulating layer 11a First surface 111 Insulating resin 12 Conductor layer 12A Protrusion 12T Through-hole conductor 12V Via-hole conductor 121 Seed layer (conductor layer) 13 Second insulating layer 13a Second surface 14 Insulating particles 14a First insulating particles 14b Second insulating particles 141 First region 142 Second region 143 Third region 144 Fourth region 15 Void 16 Amorphous structure

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
PCT/JP2023/023741 2022-06-29 2023-06-27 配線基板およびそれを用いた実装構造体 Ceased WO2024004992A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1020247042090A KR20250012619A (ko) 2022-06-29 2023-06-27 배선 기판 및 그것을 사용한 실장 구조체
EP23831432.2A EP4550949A1 (en) 2022-06-29 2023-06-27 Wiring board and package structure using same
JP2024530863A JPWO2024004992A1 (https=) 2022-06-29 2023-06-27
CN202380048059.5A CN119384873A (zh) 2022-06-29 2023-06-27 布线基板以及使用布线基板的安装构造体
US18/878,152 US20250386433A1 (en) 2022-06-29 2023-06-27 Wiring board and mounting structure using the wiring board

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022105078 2022-06-29
JP2022-105078 2022-06-29

Publications (1)

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WO2024004992A1 true WO2024004992A1 (ja) 2024-01-04

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PCT/JP2023/023741 Ceased WO2024004992A1 (ja) 2022-06-29 2023-06-27 配線基板およびそれを用いた実装構造体

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US (1) US20250386433A1 (https=)
EP (1) EP4550949A1 (https=)
JP (1) JPWO2024004992A1 (https=)
KR (1) KR20250012619A (https=)
CN (1) CN119384873A (https=)
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JP2024157988A (ja) * 2023-04-26 2024-11-08 イビデン株式会社 配線基板

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JP2002190671A (ja) * 2000-12-22 2002-07-05 Shinko Electric Ind Co Ltd 配線基板の製造方法
JP2003094560A (ja) * 2001-09-25 2003-04-03 Matsushita Electric Works Ltd 樹脂基板の金属膜形成方法および金属膜形成樹脂基板
WO2020067299A1 (ja) * 2018-09-27 2020-04-02 株式会社村田製作所 モジュールおよびその製造方法
WO2020188923A1 (ja) * 2019-03-15 2020-09-24 京セラ株式会社 配線基板およびその製造方法
JP2022030289A (ja) 2020-08-06 2022-02-18 イビデン株式会社 配線基板及び配線基板の製造方法

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JP2002190671A (ja) * 2000-12-22 2002-07-05 Shinko Electric Ind Co Ltd 配線基板の製造方法
JP2003094560A (ja) * 2001-09-25 2003-04-03 Matsushita Electric Works Ltd 樹脂基板の金属膜形成方法および金属膜形成樹脂基板
WO2020067299A1 (ja) * 2018-09-27 2020-04-02 株式会社村田製作所 モジュールおよびその製造方法
WO2020188923A1 (ja) * 2019-03-15 2020-09-24 京セラ株式会社 配線基板およびその製造方法
JP2022030289A (ja) 2020-08-06 2022-02-18 イビデン株式会社 配線基板及び配線基板の製造方法

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