WO2024001349A1 - 显示面板、显示装置及显示面板的制备方法 - Google Patents

显示面板、显示装置及显示面板的制备方法 Download PDF

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Publication number
WO2024001349A1
WO2024001349A1 PCT/CN2023/084304 CN2023084304W WO2024001349A1 WO 2024001349 A1 WO2024001349 A1 WO 2024001349A1 CN 2023084304 W CN2023084304 W CN 2023084304W WO 2024001349 A1 WO2024001349 A1 WO 2024001349A1
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Prior art keywords
layer
electrode
display panel
opening
array substrate
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PCT/CN2023/084304
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English (en)
French (fr)
Inventor
颜志敏
高思明
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云谷（固安）科技有限公司
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Priority to KR1020247004530A priority Critical patent/KR20240025042A/ko
Publication of WO2024001349A1 publication Critical patent/WO2024001349A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • B23K26/362—Laser etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80521—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates

Definitions

  • the present application relates to the field of display, and specifically to a display panel, a display device, and a method for preparing a display panel.
  • the cathode is patterned when preparing the electronic device screen, for example, the cathode is etched by laser etching, thereby improving the transmittance of the screen.
  • the cathode material will generally peel inward in the etching area, which will affect subsequent packaging.
  • Embodiments of the present application provide a display panel, a display device, and a method for manufacturing a display panel, so that at least part of the display panel can be light-transmissive and displayable, thereby facilitating the under-screen integration of photosensitive components.
  • a first embodiment of the present application provides a display panel.
  • the display panel includes: an array substrate; a first electrode layer located on one side of the array substrate, and the first electrode layer includes a pixel electrode; and a pixel definition layer located away from the first electrode layer.
  • the pixel definition layer includes an isolation portion and a pixel opening enclosed by the isolation portion;
  • a second electrode layer is located on the side of the pixel definition layer facing away from the array substrate, and the second electrode layer includes a second electrode and an opening,
  • the second electrode includes a body part and an edge part extending from the body part and disposed toward the opening; wherein, the pixel definition layer also includes an opening located in the isolation part, at least part of the array substrate is exposed by the opening, and the edge part and the edge part exposed by the opening At least part of the array substrate is in contact.
  • An embodiment of the second aspect of the present application provides a method for manufacturing a display panel, including:
  • the array substrate includes a first shielding layer, and the first shielding layer includes a first through hole;
  • the pixel definition layer includes an isolation portion and a pixel opening surrounded by the isolation portion;
  • the isolation part of the pixel definition layer is patterned to form an opening, the opening penetrates the isolation part, and at least part of the array substrate is exposed through the opening;
  • the second conductive material layer is laser etched from the side of the array substrate away from the pixel definition layer.
  • the laser passes through the first through hole to etch an opening in the second conductive material layer.
  • the unetched area of the second conductive material layer as the second electrode.
  • a third embodiment of the present application provides a display panel.
  • the display panel includes: an array substrate; a first electrode layer located on one side of the array substrate, the first electrode layer including a pixel electrode; and a pixel definition layer located on the first electrode layer.
  • the pixel definition layer On the side facing away from the array substrate, the pixel definition layer includes an isolation portion and a pixel opening surrounded by the isolation portion; a second electrode layer is located on the side of the pixel definition layer facing away from the array substrate, and the second electrode layer includes a second electrode and an opening.
  • the second electrode includes a body part and an edge part extending from the body part and disposed toward the opening, the body part is in contact with the pixel definition layer, the edge part is in contact with the array substrate or the pixel definition layer, and the edge part is in contact with the array substrate or the pixel definition layer
  • the adhesion force between them is greater than the adhesion force between the body part and the pixel definition layer.
  • a fourth embodiment of the present application provides a display panel.
  • the display panel includes: an array substrate, the array substrate includes a first shielding layer, the first shielding layer includes a first through hole; and a first electrode layer located on one side of the array substrate.
  • the first electrode layer includes a pixel electrode; a pixel definition layer is located on the side of the first electrode layer facing away from the array substrate; the pixel definition layer includes an isolation portion and a pixel opening surrounded by the isolation portion; a second electrode layer is located on the pixel definition layer.
  • the second electrode layer includes a second electrode and an opening, the second electrode includes a body part and an edge part extending from the body part and disposed toward the opening; wherein, the first through hole is in the thickness direction of the display panel.
  • the orthographic projection on the screen overlaps with the orthographic projection of the opening in the thickness direction of the display panel, and the distance between the edge portion and the first shielding layer in the thickness direction of the display panel is smaller than the distance between the main body portion and the first shielding layer in the thickness direction of the display panel. distance.
  • a fifth aspect of the present application provides a display device, including the display panel of any of the above embodiments.
  • the display panel includes an array substrate and a first electrode layer, a pixel definition layer and a second electrode layer provided on the array substrate.
  • the first electrode layer includes a pixel electrode
  • the second electrode layer includes a second electrode and an opening.
  • the array substrate includes a first shielding layer.
  • the first shielding layer includes a first through hole.
  • the first shielding layer is located in the array substrate and can avoid affecting the display of the display panel.
  • the first shielding layer can be used as a mask, and a laser is emitted toward the second electrode layer through the first through hole from the side of the array substrate away from the first electrode layer, thereby forming an opening.
  • openings are provided in the second electrode layer, which can reduce the distribution area of the second electrode, thereby improving the light transmittance of the display panel.
  • the photosensitive component can be integrated on the non-display side of the display panel, which is convenient for the screen of the photosensitive component.
  • Next integration In the embodiments of the present application, on the one hand, due to the existence of the first shielding layer, the distance between the first shielding layer and the second electrode layer is relatively close, and the diffraction effect produced by the laser is small.
  • the surface of the array substrate exposed by the opening can be roughened to improve the surface quality of the array substrate exposed by the opening.
  • the roughness can increase the adhesion between the edge of the second electrode and at least part of the array substrate exposed by the opening, and better improve the problem of the second electrode turning up toward the edge of the opening.
  • Figure 1 is a schematic structural diagram of a display panel provided by the first embodiment of the present application.
  • Figure 2 is a cross-sectional view at A-A in Figure 1;
  • Figure 3 is a cross-sectional view of A-A in Figure 1 in another embodiment
  • Figure 4 is a partial enlarged structural diagram of Q in Figure 1;
  • Figure 5 is a cross-sectional view of A-A in Figure 1 in yet another embodiment
  • Figure 6 is a cross-sectional view of A-A in Figure 1 in yet another embodiment
  • Figure 7 is a cross-sectional view of A-A in Figure 1 in yet another embodiment
  • Figure 8 is a cross-sectional view of A-A in Figure 1 in yet another embodiment
  • Figure 9 is a partial enlarged structural schematic diagram of Q in Figure 1 in yet another embodiment
  • Figure 10 is a cross-sectional view of A-A in Figure 1 in yet another embodiment
  • Figure 11 is a partial enlarged structural schematic diagram of Q in Figure 1 in yet another embodiment
  • FIG. 12 is a schematic flowchart of a method for manufacturing a display panel according to the second embodiment of the present application.
  • a light-transmitting display area can be provided on the above-mentioned electronic device, and the photosensitive component can be arranged on the back of the light-transmitting display area, so as to achieve a full-screen display of the electronic device while ensuring the normal operation of the photosensitive component.
  • the common electrode is patterned.
  • the common electrode is hollowed out in the light-transmitting area of the display panel to increase the light transmittance of the common electrode, thereby increasing the light transmittance of the light-transmitting area of the display panel.
  • methods such as laser ashing are generally used to achieve patterning of the common electrode.
  • the common electrode is irradiated with laser from the side of the substrate away from the array substrate. , using the light-shielding metal layer in the array substrate as a mask, laser etching the common electrode to achieve patterning of the common electrode.
  • the inventor found that after laser etching the common electrode to achieve patterning, the edge of the common electrode is prone to inversion, which affects subsequent thin film packaging and other processes and affects the reliability of the packaging process.
  • embodiments of the present application provide a display panel, a display device, and a method for manufacturing a display panel.
  • a display panel a display device, and a method for manufacturing a display panel.
  • An embodiment of the present application provides a display panel, which may be an organic light emitting diode (OLED) display panel.
  • a display panel which may be an organic light emitting diode (OLED) display panel.
  • FIG. 1 is a schematic structural diagram of a display panel provided by the first embodiment of the present application.
  • FIG. 2 is a cross-sectional view along the line A-A in FIG. 1 .
  • the display panel 10 provided by the first embodiment of the present application includes an array substrate 100 and an array substrate 100 .
  • the array substrate 100 includes a first shielding layer 500 , and the first shielding layer 500 includes a first through hole 510 ;
  • a first electrode layer 200 is located on one side of the array substrate 100 , and the first electrode layer 200 includes a pixel electrode 210 ;
  • the pixel definition layer 300 includes The isolation part 310 and the pixel opening 320 enclosed by the isolation part 310, at least part of the pixel electrode 210 is exposed through the pixel opening 320;
  • the second electrode layer 400 is located on the side of the pixel definition layer 300 away from the array substrate 100, and the second electrode layer 400 It includes a second electrode 410 and an opening 420.
  • the second electrode 410 includes a body part 430 and an edge part 440 extending from the body part 430 and disposed toward the opening 420.
  • the opening 420 and the orthographic projection of the pixel electrode 210 on the array substrate 100 are disposed in an offset manner;
  • the orthographic projection of the first through hole 510 in the thickness direction of the display panel overlaps with the orthographic projection of the opening 420 in the thickness direction of the display panel.
  • the body portion 430 of the second electrode 410 is in contact with the pixel definition layer 300
  • the edge portion 440 of the second electrode 410 is also in contact with the pixel definition layer 300
  • the edge portion 440 is in contact with the pixel definition layer 300 .
  • the adhesion force between the pixel definition layers 300 is greater than the adhesion force between the body part 430 and the pixel definition layer 300 .
  • a plasma bombardment treatment can be performed on a portion of the surface of the pixel definition layer 300 corresponding to the edge portion 440, so that the roughness of the portion of the surface of the pixel definition layer 300 corresponding to the edge portion 440 increases, thereby causing the edge portion 440 to be in contact with the pixel definition layer.
  • the adhesion force between the layers 300 is greater than the adhesion force between the body portion 430 and the pixel definition layer 300 .
  • the display panel 10 includes an array substrate 100 and a first electrode layer 200 , a pixel definition layer 300 and a second electrode layer 400 disposed on the array substrate 100 .
  • the first electrode layer 200 includes a pixel electrode 210
  • the second electrode layer 400 includes a second electrode 410 and an opening 420 .
  • the second electrode 410 includes a body portion 430 and an edge portion 440 extending from the body portion 430 and facing the opening 420 .
  • the first shielding layer 500 includes a first through hole 510 and is located in the array substrate 100 to avoid affecting the display of the display panel 10 .
  • a laser is emitted from the side of the array substrate 100 away from the first electrode layer 200 toward the second electrode layer 400 through the first through hole 510, thereby forming the opening 420.
  • the A shielding layer 500 functions as a mask.
  • the distance between the first shielding layer 500 and the second electrode layer 400 is relatively close, and the diffraction effect produced by the laser is small.
  • the laser can be effectively avoided.
  • the second electrode 410 caused by diffraction is folded toward the edge of the opening 420, which affects the packaging effect of the subsequent packaging process.
  • the array substrate 100 may include a substrate and a TFT array layer, a planarization layer and other film layer structures arranged on the substrate.
  • the array substrate 100 is the substrate.
  • the array substrate 100 further includes a substrate, a buffer layer and a support plate located on a side away from the substrate.
  • the array substrate 100 in this application may have a multi-film layer structure.
  • the first electrode layer 200 is, for example, an anode layer
  • the second electrode layer 400 is a cathode layer.
  • the pixel electrode 210 in the first electrode layer 200 serves as the anode
  • the second electrode 410 of the second electrode layer 400 serves as the cathode.
  • the pixel electrode 210 is disposed at least partially overlapping the pixel opening 320 along the thickness direction Z of the display panel 10 .
  • the display panel 10 has a first display area AA1 , a second display area AA2 and a non-display area surrounding the first display area AA1 and the second display area AA2 .
  • the light transmittance of the display area AA1 is greater than the light transmittance of the second display area AA2.
  • the light transmittance of the optional first display area AA1 is greater than or equal to 15%. In order to ensure the light transmission of the first display area AA1 The light transmittance is greater than 15%, even greater than 40%, and even has a higher light transmittance. In this embodiment, the light transmittance of each functional film layer of the display panel 10 is greater than 80%, and even the light transmittance of at least some of the functional film layers All are greater than 90%.
  • the light transmittance of the first display area AA1 is greater than the light transmittance of the second display area AA2, so that the display panel 10 can integrate a photosensitive component on the back of the first display area AA1 to implement, for example, a camera.
  • the photosensitive components are integrated under the screen, and at the same time, the first display area AA1 can display images, thereby increasing the display area of the display panel 10 and realizing a full-screen design of the display device.
  • the opening 420 of the second electrode layer 400 may be located in the first display area AA1 to increase the light transmittance of the first display area AA1.
  • the opening 420 of the second electrode layer 400 can also be located in the first display area AA1 and the second display area AA2 at the same time, so as to improve the light transmittance of the entire display area.
  • FIG. 3 is a cross-sectional view at A-A in FIG. 1 in another embodiment
  • FIG. 4 is a partially enlarged structural schematic diagram at Q in FIG. 1 .
  • the pixel definition layer 300 further includes an opening 330 located in the isolation portion 310 , and the orthographic projection of the opening 420 on the array substrate 100 is located within the orthographic projection of the opening 330 on the array substrate 100 .
  • a second conductive material layer is first formed on the pixel definition layer 300, and then the second conductive material layer is patterned to form a second conductive material layer.
  • the second conductive material layer can be directly deposited on the array substrate 100 located in the opening 330 to further reduce the distance between the second electrode layer 400 and the first shielding layer 500 .
  • the opening 330 is provided through the isolation part 310 . This enables the laser to better perform laser ashing on the second electrode layer 400 through the opening 330 .
  • the pixel electrode 210 is formed by a wet etching process.
  • the pixel electrode 210 is prepared through a wet etching process, so that the upper surface roughness of the array substrate 100 increases.
  • the opening 330 penetrates the isolation part 310, so that the upper surface roughness of the array substrate 100 at the opening 330 increases.
  • the second conductive material layer It can be deposited directly on the array substrate 100 located in the opening 330, so that the adhesion between the second electrode layer 400 and the upper surface of the array substrate 100 is stronger, making it difficult for the second electrode 410 of the second electrode layer 400 to turn up at the edge.
  • the opening 330 is provided through the isolation portion 310 , at least part of the array substrate 100 is exposed through the opening 330 , and the edge 440 of the second electrode 410 is in direct contact with at least part of the upper surface of the array substrate 100 exposed through the opening 330 , so that the distance between the first shielding layer 500 and the edge 440 of the second electrode 410 is relatively close, which can prevent the second electrode 410 from being folded toward the edge 440 of the opening 420 caused by laser diffraction and affecting the packaging effect of the subsequent packaging process. .
  • the opening 420 can be formed in the area corresponding to the opening 330 , that is, on the second conductive material layer at a distance from the first shielding layer 500 Forming the opening 420 in the closer part can better improve the problem of the second electrode 410 turning up toward the edge 440 of the opening 420 and better improve the impact of the edge 440 of the second electrode 410 turning up on the subsequent packaging process. .
  • the array substrate 100 includes a planarization layer 110 , the pixel electrode 210 is located on a side of the planarization layer 110 close to the second electrode layer 400 , and at least part of the planarization layer 110 is formed by an opening 330 Exposed, the edge portion 440 of the second electrode 410 is in direct contact with at least part of the planarization layer 110 exposed by the opening 330 .
  • the surface of the planarization layer 110 exposed by the opening 330 can be roughened to increase the roughness of the surface of the planarization layer 110 exposed by the opening 330 and increase the edge of the second electrode 410 .
  • the adhesion force between 440 and at least part of the planarization layer 110 exposed by the opening 330 can better improve the problem of the second electrode 410 turning up toward the edge 440 of the opening 420 .
  • the body portion 430 of the second electrode 410 is in contact with the pixel definition layer 300 , and the adhesion force between the edge portion 440 of the second electrode 410 and at least part of the array substrate exposed by the opening 330 is greater than the body portion 430 and pixel definition layer 300 Adhesion.
  • the body portion 430 of the second electrode 410 is in contact with the pixel definition layer 300 , and the adhesion force between the edge portion 440 of the second electrode 410 and at least part of the planarization layer 110 exposed by the opening 330 is greater than the body portion 430 Adhesion to pixel definition layer 300.
  • the planarization layer 110 is located between the first shielding layer 500 and the pixel definition layer 300 , the pixel electrode 210 is located on the side of the planarization layer 110 facing the pixel definition layer 300 , and is located on the edge of the second electrode 410 of the opening 330 The portion 440 is in direct contact with the upper surface of the planarization layer 110 .
  • the first electrode layer 200 is disposed on the planarization layer 110.
  • the wet etching process for example, when a wet etching process is used to remove part of the conductive material to form the pixel electrode 210, the wet etching process The etching liquid used will contact the surface at other locations on the planarization layer 110 , thereby increasing the surface roughness of the planarization layer 110 at the opening 330 .
  • the edge portion 440 of the first electrode 410 located at the opening 330 is in contact with the upper surface of the planarization layer 110, so that the edge portion 440 of the second electrode 410 and the upper surface of the planarization layer 110 have stronger adhesion, making the second electrode It is difficult for 410 to turn up its edges.
  • the shape of the surface of the planarization layer 110 facing the pixel definition layer 300 that is, the upper surface of the planarization layer 110.
  • the upper surface of the planarization layer 110 is planar.
  • the upper surface of the planarization layer 110 is planar, and the edge portion 440 of the second electrode 410 is located in the opening 330 and adheres to at least part of the planarization layer 110 exposed by the opening 330 .
  • the distance between the edge portion 440 of the second electrode 410 and the first shielding layer 500 in the thickness direction of the display panel is smaller than the distance between the body portion 430 of the second electrode 410 and the first shielding layer 500 in the thickness direction of the display panel.
  • the distance between the first shielding layer 500 and the edge 440 of the second electrode 410 is relatively close, and the diffraction effect produced by the laser is small.
  • the second electrode 410 caused by laser diffraction can be effectively prevented from facing the opening 420
  • the edges are folded, which affects the packaging effect of the subsequent packaging process.
  • the planarization layer 110 includes a flat portion 111 and a protruding portion 112 protruding from the flat portion 111 toward the opening 330 .
  • the edge portion 440 of the second electrode 410 is in contact with the protruding portion 112 .
  • the planarization layer 110 is provided with a protrusion 112, at least part of the protrusion 112 is located within the opening 330, and when the second electrode layer 400 is deposited on the pixel definition layer 300, part of the second The electrode layer 400 can be deposited on the protruding portion 112, and the flatness of the second electrode layer 400 can be improved.
  • the surface of the protruding portion 112 close to the second electrode layer 200 and the surface of the isolation portion 310 close to the second electrode layer 200 are located on the same plane, which can further improve the flatness of the second electrode layer 400 .
  • the orthographic projection of the first through hole 510 in the thickness direction of the display panel is located within the orthographic projection of the opening 330 in the thickness direction of the display panel.
  • the first shielding layer 500 is used to pattern the second electrode layer 400 to form the second electrode 410, due to the shielding effect of the first shielding layer 500, the first through hole 510 is formed corresponding to the second electrode layer 400 in the area.
  • the etched opening 420 and the unetched portion are the second electrodes 410 .
  • the orthographic projection of the first through hole 510 in the thickness direction of the display panel is located within the orthographic projection of the opening 330 in the thickness direction of the display panel, then the edge 440 of the second electrode 410 facing the opening 420 is located in the opening 330, Ensure that the edge 440 of the second electrode 410 and the first shielding layer 500 are close to each other, so as to better improve the problem of the second electrode 410 turning up toward the edge of the opening 420 .
  • the plurality of pixel openings 320 are array-distributed along the first direction X and the second direction Y, and the first through hole 510 is located at least between two columns of adjacent pixel openings 320 .
  • the first direction X is the column direction or the row direction
  • the second direction Y is the column direction or the row direction
  • the first direction X is the row direction
  • the second direction Y is the row direction
  • the first direction X is the column direction.
  • This application uses the first direction X as the row direction and the second direction Y as the column direction for description.
  • the first direction X and the second direction Y are perpendicular to straight.
  • the plurality of pixel openings 320 are array-distributed along the first direction X and the second direction Y to ensure uniformity of light emission.
  • the first through hole 510 is disposed between the areas corresponding to at least two adjacent columns of pixel openings 320 , so that the area between at least two adjacent columns of pixel openings 320 serves as an ashing area, and the laser passes through the first through hole 510 to target the first through hole 510 .
  • the two conductive material layers are etched to obtain the opening 420 of the second electrode layer 400 .
  • the first through hole 510 extends along the second direction Y.
  • the first through hole 510 extends along the second direction Y, so that between at least two adjacent columns of pixel openings 320, the laser can etch the second conductive material layer through the first through hole 510 to obtain the second electrode layer 400.
  • a first through hole 510 is provided between any two adjacent columns of pixel openings 320 .
  • the laser can etch the second conductive material layer through the first through hole 510 to obtain the opening 420 of the second electrode layer 400 . Therefore, the distribution area of the openings 420 can be increased, the distribution area of the second electrode 410 can be reduced, and the light transmittance of the display panel 10 can be improved.
  • the openings 330 extend along the second direction Y, and the openings 330 are provided between any two adjacent columns of pixel openings 320 .
  • the light transmittance of the display panel 10 can be improved.
  • the first shielding layer 500 also includes a plurality of first shielding portions 520 for shielding the laser and a first through hole 510 that allows the laser to pass through, at least partially.
  • the first shielding portion 520 is provided on both sides of the pixel opening 320 in the first direction X.
  • the first shielding portions 520 located on both sides of the pixel opening 320 are used to form a first through hole 510 between adjacent pixel openings 320, and the laser passes through the first through hole 510 to etch the first through hole 510.
  • the two electrode layer 400 can form openings 420 on the second electrode layer 400, which can increase the distribution area of the openings 420, reduce the distribution area of the second electrode 410, and improve the light transmittance of the display panel 10.
  • the first shielding layer 500 may also include a connection part 530, and the connection part 530 connects multiple first shielding parts 520.
  • the first shielding portion 520 extends along the second direction Y, the first shielding portion 520 is in a strip shape, and a first shielding portion 520 is provided on both sides of each pixel opening 320 .
  • the first shielding portion 520 extends along the second direction Y and is located on both sides of the pixel opening 320.
  • the first through hole 510 formed by the two first shielding portions 520 is located between two adjacent columns of pixel openings 320.
  • the laser passes through the first through hole 510.
  • the through hole 510 etches the second electrode layer 400 to form the opening 420 on the second electrode layer 400.
  • the first shielding portion 520 functions as a mask.
  • the opening 420 can be enlarged.
  • the distribution area reduces the distribution area of the second electrode 410 and improves the light transmittance of the display panel 10 .
  • the plurality of first shielding parts 520 are arranged side by side along the first direction X, where the first direction X is parallel to the upper surface of the array substrate 100 .
  • a plurality of first shielding parts 520 are arranged side by side along the first direction X, so that a plurality of first through holes 510 extending along the second direction Y are formed in the first direction X, and the laser passes through The first through hole 510 etches the second electrode layer 400 to form the opening 420 on the second electrode layer 400, which can increase the distribution area of the opening 420, reduce the distribution area of the second electrode 410, and improve the light transmittance of the display panel 10 Rate.
  • the pixel definition layer 300 further includes a recess 340 located in the isolation part 310 , and the edge part 440 of the second electrode 410 is located in the recess 340 .
  • the edge portion 440 of the second electrode 410 is in contact with the bottom wall of the depression 340 .
  • the distance between the edge portion 440 of the second electrode 410 and the first shielding layer 500 in the thickness direction of the display panel is smaller than the distance between the body portion 430 of the second electrode 410 and the first shielding layer 500 in the thickness direction of the display panel. .
  • the distance between 500 and the edge 440 of the second electrode 410 is relatively short, and the diffraction effect produced by the laser is small. During the laser etching process, it can effectively avoid the second electrode 410 from being folded toward the edge of the opening 420 due to laser diffraction. And affect the packaging effect of the subsequent packaging process.
  • the body portion 430 of the second electrode 410 contacts the pixel definition layer 300
  • the edge portion 440 of the second electrode 410 is located in the recess 340 and contacts the pixel definition layer 300
  • the edge portion 440 is in contact with the pixel definition layer 300.
  • the adhesion force between the layers 300 is greater than the adhesion force between the body portion 430 and the pixel definition layer 300 .
  • a plasma bombardment treatment can be performed on a portion of the surface of the pixel definition layer 300 corresponding to the edge portion 440, so that the roughness of the portion of the surface of the pixel definition layer 300 corresponding to the edge portion 440 increases, thereby causing the edge portion 440 to be in contact with the pixel definition layer.
  • the adhesion force between the layers 300 is greater than the adhesion force between the body portion 430 and the pixel definition layer 300 .
  • FIG. 8 is a cross-sectional view of A-A in FIG. 1 in yet another embodiment.
  • FIG. 9 is a partially enlarged structural diagram of Q in FIG. 1 in yet another embodiment.
  • the array substrate 100 further includes a first metal layer 600.
  • the first shielding layer 500 is provided in the same layer as the first metal layer 600.
  • the first metal layer 600 includes a first metal wiring 610, a pixel electrode
  • the orthographic projection of 210 in the thickness direction of the display panel at least partially overlaps the orthographic projection of the first metal trace 610 in the thickness direction of the display panel.
  • the first shielding layer 500 and the first metal layer 600 are provided in the same layer, simplifying the preparation process.
  • the first metal trace 610 extends in the second direction Y and overlaps with at least part of the pixel electrode 210 so that the pixel electrode 210 is connected through the first metal trace 610 for signal transmission and ensuring the light emitting of the light-emitting unit.
  • the first metal wire 610 is connected to the pixel electrode 210 so that the pixel electrode 210 can be connected to the driving circuit through the first metal wire 610 .
  • a plurality of first metal wires 610 are arranged side by side along the first direction
  • a first gap 620 exists between the first shielding part 520 and the first metal trace 610 .
  • the first gap 620 separates the first shielding portion 520 and the first metal trace 610 and insulates each other to avoid damaging the first metal during the laser ashing process of the second electrode layer 400 Routing 610 affects electrical properties.
  • FIG. 10 is a cross-sectional view of the display panel in yet another embodiment.
  • FIG. 11 is a partially enlarged structural schematic diagram of the display panel in yet another embodiment.
  • the array substrate 100 further includes a second shielding layer 700.
  • the second shielding layer 700 is located in the array substrate 100.
  • the second shielding layer 700 includes a second shielding portion 710 for shielding the laser.
  • the orthographic projection of the shielding portion 520 and the second shielding portion 710 in the thickness direction of the display panel overlaps with the orthographic projection of the second electrode 410 in the thickness direction of the display panel.
  • the first shielding portion 20 and the second shielding portion 710 can jointly serve as a mask for patterning to form the second electrode layer 400 .
  • the orthographic projection of the pixel opening 320 in the thickness direction of the display panel is located within the orthographic projection of the second shielding portion 710 in the thickness direction of the display panel.
  • the second shielding layer 700 when the laser is emitted toward the second electrode layer 400 on the side of the array substrate 100 away from the second electrode layer 400, the second shielding layer 700 can The portion 710 can block the laser, effectively preventing laser etching damage to the pixel electrode 210 and the first metal trace 610 .
  • the second shielding layer 700 is reused as an electrostatic shielding layer.
  • the second shielding layer 700 is a metal shielding layer (BSM) in the array substrate.
  • BSM metal shielding layer
  • the orthographic projection of at least part of the edge of the second shielding part 710 in the thickness direction of the display panel is located within the orthographic projection of the first shielding part 520 in the thickness direction of the display panel, so that the third There is no gap between the orthographic projections of the first shielding part 520 and the second shielding part 710 in the thickness direction of the display panel.
  • the second shielding portion 710 extends along the second direction Y, the second shielding portion 710 is strip-shaped, and the edge of the second shielding portion 710 parallel to the second direction Y is within the thickness of the display panel.
  • the orthographic projection in the direction is located within the orthographic projection of the first shielding portion 520 in the thickness direction of the display panel.
  • a plurality of second shielding parts 710 are arranged side by side along the first direction X.
  • the orthographic projection of the pixel opening 320 in the thickness direction of the display panel is located between the orthographic projection of the second shielding portion 710 in the thickness direction of the display panel.
  • the TFT device layer and part of the array substrate 100 and the light-emitting unit are protected from the influence of the laser.
  • the orthographic projection of the edge of the second shielding part 710 parallel to the second direction Y in the thickness direction of the display panel is within the orthographic projection of the first shielding part 520 in the thickness direction of the display panel, and the second shielding part 710 is within the thickness direction of the display panel. It overlaps with the first shielding part 520 in one direction
  • the wiring 610 and other film layers may affect the display effect of the display panel.
  • the second shielding part 710 includes: a first subpart 711 extending along the second direction Y and in the shape of a strip. shape, multiple first sub-parts 711 are arranged side by side along the first direction X; the second sub-part 712 is extended along the first direction X and connected to the multiple first sub-parts 711 arranged side by side in the first direction X; wherein , among the plurality of first gaps 620 and the plurality of openings 330 arranged side by side along the first direction The portion 710 is within the orthographic projection in the thickness direction of the display panel.
  • the first subsection 711 can block at least a part of each first gap 620 in the plurality of first gaps 620 located in the same column (when the first direction X is the row direction), and partially The opening 330 is blocked by the second subsection 712 so that the second electrodes 410 in the same row or column can communicate with each other.
  • the second electrodes 410 can be formed in the same distribution area and the same size as the second sub-section 712, so that the second electrodes 410 at different positions can be connected to each other to form a common electrode on the entire surface.
  • the second sub-section 712 is located in the first area and the second sub-section 712 is located in the first area.
  • the second area can further reduce the distribution area of the second electrode 410 in the first area and improve the light transmittance of the first area.
  • the first area may be a first display area AA1
  • the second area may be a non-display area
  • the second area may be a second display area AA2.
  • the first shielding part 520 is closer to the second electrode layer 400 than the second shielding part 710, which can reduce the distance between the first shielding part 520 and the second electrode layer 400. , can improve the problem that the edge portion of the second electrode 410 of the second electrode layer 200 is prone to warping.
  • the second electrode layer 400 further includes a connection portion, the connection portion is used to connect the second electrode 410, and the orthographic projection of the connection portion in the thickness direction of the display panel is located in the first through hole 510 in the display panel. outside the orthographic projection in the thickness direction of the panel.
  • This connection may be formed by the second subsection 712 .
  • connection portion connects the portions of the second electrodes 410 corresponding to the two adjacent columns of pixel openings 320 in the first direction X to form a full-surface electrode, which facilitates the preparation of the second electrode layer 400 .
  • the first shielding layer 500 and/or the second shielding layer 700 includes a metal material, such as Mo (molybdenum).
  • the first shielding layer 500 and/or the second shielding layer 700 are metal composite layers, such as Ti/Al/Ti (titanium/aluminum/titanium), ITO/Ag/ITO (indium tin oxide/silver /Indium tin oxide), etc.
  • the display panel 10 when the display panel 10 only contains the first shielding layer 500, it can be applied to display panels for under-screen cameras, stretchable display panels, transparent display panels, etc.; for display panels for under-screen cameras,
  • the first shielding layer 500 may only exist in the first display area AA1; in addition, the first shielding layer 500 may also exist in both the first display area AA1 and the second display area AA2.
  • the display panel 10 contains the first shielding layer 500 and the second shielding layer 700, it can also be applied to the display panel 10 for an under-screen camera.
  • the first display area AA1 is Containing the first shielding layer 500
  • the second display area AA2 contains the first shielding layer 500 and the second shielding layer 700; in addition, it can also be applied to stretchable display panels and transparent display panels.
  • the orthographic projection of the second electrode 410 of the second electrode layer 400 along the thickness direction Z of the display panel is located along the thickness of the second shielding layer 700 and the first shielding layer 500 .
  • the orthographic projection of the opening 420 along the thickness direction Z of the display panel is located within the orthographic projection of the first through hole 510 along the thickness direction Z of the display panel. That is, the first shielding layer 700 and the second shielding layer 500 cooperate with each other to shield the entire second electrode 410.
  • the first shielding layer 700 and the second shielding layer 500 can jointly shield the laser.
  • the second electrode 410 is prevented from being ashed by the laser.
  • the structural design in this embodiment can be applied to other display panels 10, and the specific selection can be made according to the actual situation, and this application does not specifically limit it.
  • a second embodiment of the present invention also provides a display device, including the display panel 10 of any of the above-mentioned first embodiments. Since the display device provided by the embodiment of the second aspect of the present invention includes the display panel 10 of any embodiment of the first aspect, the display device provided by the embodiment of the second aspect of the present invention has the display panel 10 of any embodiment of the first aspect. 10 has beneficial effects that will not be repeated here.
  • Display devices in embodiments of the present invention include but are not limited to mobile phones, personal digital assistants (PDAs), tablet computers, e-books, televisions, access control, smart landline phones, consoles and other devices with display functions. .
  • PDAs personal digital assistants
  • tablet computers e-books
  • televisions access control
  • smart landline phones consoles and other devices with display functions.
  • FIG. 12 is a schematic flowchart of a method for manufacturing a display panel according to a third embodiment of the present application.
  • the display panel 10 may be the display panel 10 provided in any of the above-mentioned first aspect embodiments.
  • the preparation method of the display panel 10 includes:
  • Step S01 Prepare an array substrate 100.
  • the array substrate 100 includes a first shielding layer 500.
  • the first shielding layer 500 includes a first through hole 510.
  • Step S02 Prepare a first conductive material layer on the array substrate 100, and perform patterning processing to obtain a first electrode layer 200.
  • the first electrode layer 200 includes a pixel electrode 210.
  • Step S03 Prepare a pixel definition layer 300 on the side of the first electrode layer 200 facing away from the array substrate 100.
  • the pixel definition layer 300 includes an isolation portion 310 and a pixel opening 320 surrounded by the isolation portion 310. At least part of the pixel electrode 210 is composed of pixels. Opening 320 is exposed.
  • Step S04 Pattern the isolation portion 310 of the pixel definition layer 300 to form an opening 330.
  • the opening 330 penetrates the isolation portion 310, and at least part of the array substrate is exposed through the opening 330.
  • Step S05 Prepare a second conductive material layer on the side of the pixel definition layer 300 facing away from the array substrate 100.
  • Step S06 Perform laser etching on the second conductive material layer from the side of the array substrate 100 away from the pixel definition layer 300.
  • the laser passes through the first through hole 510 to etch the opening 420 in the second conductive material layer, and the unetched area of the second conductive material layer serves as the second electrode 410 .
  • the first shielding layer 500 is first prepared through step S01, and the pixel electrode 210 can be prepared in step S02. Then, the pixel definition layer 300 is formed through step S03, so that the light-emitting unit can be disposed in the pixel opening 320, and the pixel electrode 210 and the second electrode 410 of the second electrode layer 400 can drive the light-emitting unit to emit light.
  • the opening 330 provided in the isolation part 310 is prepared through step S04, and at least part of the array substrate is exposed through the opening 330.
  • a second conductive material layer is prepared through step S05 for forming the second electrode layer 400 .
  • the second electrode layer 400 includes a second electrode 410 and an opening 420.
  • the first shielding layer 500 includes a first through hole 510 . Moreover, the first shielding layer 500 is located in the array substrate 100 and can avoid affecting the display of the display panel 10 . During the preparation process of the second electrode layer 400, the first shielding layer 500 can be used as a mask to emit laser light from the side of the array substrate 100 away from the first electrode layer 200 through the first through hole 510 toward the second electrode layer 400. , thereby forming opening 420. The orthographic projections of the first through hole 510 and the pixel electrode 210 in the thickness direction Z of the display panel are misaligned to prevent the laser from being etched into the pixel electrode 210 through the first through hole 510 and affecting the light-emitting display.
  • providing the openings 420 in the second electrode layer 400 can reduce the distribution area of the second electrode 410 and thereby increase the light transmittance of the display panel 10 .
  • the distance between the first shielding layer 500 and the second electrode layer 400 is relatively close, which can prevent the second electrode 410 from being folded toward the edge of the opening 420 due to laser diffraction, thereby affecting the packaging effect of the subsequent packaging process.
  • the isolation portion 310 on the pixel definition layer 300 can also be patterned to form the opening 330 , that is, the isolation portion is patterned to form the opening 330 .
  • the orthographic projection of the opening 420 on the array substrate is located within the orthographic projection of the opening 330 on the array substrate 100 .
  • the opening 330 penetrates the isolation portion, and at least part of the array substrate 100 is exposed through the opening 330 . There will be no light-emitting unit in the opening 330.
  • the pixel definition layer 300 is provided with common layers such as a hole injection layer, a hole transport layer, an electron transport layer and an electron injection layer, the common layer can be formed when the opening 330 is formed.
  • step S05 when the second conductive material layer is formed in step S05, there will be no isolation portion 310 and other structures between the second conductive material layer and the first shielding layer 500, which can further reduce the distance between the second conductive material layer and the first shielding layer 500 in the area where the opening 330 is located. The distance of the first occlusion layer 500.
  • step S06 when the second conductive material layer is patterned using the first shielding layer 500 as a mask, since the distance between the second conductive material layer and the first shielding layer 500 is small, diffraction can be improved. This prevents the edge portion 440 of the second electrode 410 from turning upward, thereby avoiding affecting the yield of the subsequent packaging process.
  • the preparation method also includes: performing a wet etching process on the first conductive material layer to obtain spaced-apart pixel electrodes 210, and causing at least part of the array substrate 100 to be formed between two adjacent pixel electrodes 210. The gap is exposed.
  • the pixel electrode 210 is prepared through a wet etching process, so that the roughness of the upper surface of the array substrate 100 exposed between two adjacent pixel electrodes 210 increases.
  • the second conductive material layer can be directly deposited on The upper surface of the array substrate 100 exposed between two adjacent pixel electrodes 210 has a relatively high roughness, causing the second electrode 410 of the second electrode layer 400 to be in contact with the upper surface of the array substrate 100 .
  • the stronger adhesion force makes it difficult for the edge of the second electrode 410 of the second electrode layer 400 to turn up.
  • the array substrate 100 includes a planarization layer 110, and in step S03, at least part of the planarization layer is exposed by the opening 330.
  • the preparation method also includes: preparing a first conductive material layer on the planarization layer 110, performing a wet etching process on the first conductive material layer to obtain spaced distribution pixel electrodes 210, and making at least part of the planarization layer 110 It is exposed by the gap between two adjacent pixel electrodes 210 .
  • the pixel electrode 210 is prepared through a wet etching process, so that the portion exposed between two adjacent pixel electrodes 210 The upper surface roughness of the partial planarization layer 110 increases.
  • the second conductive material layer can be directly deposited on the upper surface of the partial planarization layer 110 exposed between two adjacent pixel electrodes 210 , that is, the second conductive material layer is in direct contact with at least part of the planarization layer 110 exposed by the opening 330 , and the roughness of the upper surface of this part of the planarization layer 110 is relatively high, so that the second electrode 410 of the second electrode layer 400
  • the adhesion force to the upper surface of the planarization layer 110 is stronger, making it difficult for the second electrode 410 of the second electrode layer 400 to turn up at its edge.

Abstract

本申请公开了一种显示面板、显示装置及显示面板的制备方法。显示面板包括：阵列基板；第一电极层，位于阵列基板的一侧，第一电极层包括像素电极；像素定义层，位于第一电极层背离阵列基板的一侧，像素定义层包括隔离部和由隔离部围合形成的像素开口；第二电极层，位于像素定义层背离阵列基板的一侧，第二电极层包括第二电极和开口，第二电极包括本体部及自本体部延伸且朝向开口设置的边缘部；像素定义层还包括位于隔离部的开孔，至少部分阵列基板由开孔露出，边缘部与由开孔露出的至少部分阵列基板接触。这样设计，能够避免激光刻蚀导致的本体部朝向开口的边缘翻折而影响后续的封装效果。

Description

显示面板、显示装置及显示面板的制备方法
相关申请的交叉引用
本申请要求享有于2022年6月29日提交的名称为“显示面板、显示装置及显示面板的制备方法”的中国专利申请第202210750958.7号、及2022年11月21日提交的名称为“显示面板、显示装置及显示面板的制备方法”的中国专利申请第202211544887.1号的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本申请涉及显示领域，具体涉及一种显示面板、显示装置及显示面板的制备方法。
背景技术
随着电子设备的快速发展，用户对显示效果的要求越来越高，使得电子设备的屏幕显示受到业界越来越多的关注。
为了提高电子设备屏幕的显示效果，现有技术中在制备电子设备屏幕时会将阴极进行图形化处理，例如采用激光刻蚀的方法刻蚀阴极，从而提高屏幕的透过率。但在对阴极进行刻蚀的过程中，阴极材料一般在刻蚀区域会向内翻起(Peeling)，对后续封装造成影响。
发明内容
本申请实施例提供一种显示面板、显示装置及显示面板的制备方法，实现显示面板的至少部分区域可透光且可显示，便于感光组件的屏下集成。
本申请第一方面实施例提供一种显示面板，显示面板包括：阵列基板；第一电极层，位于阵列基板的一侧，第一电极层包括像素电极；像素定义层，位于第一电极层背离阵列基板的一侧，像素定义层包括隔离部和由隔离部围合形成的像素开口；第二电极层，位于像素定义层背离阵列基板的一侧，第二电极层包括第二电极和开口，第二电极包括本体部及自本体部延伸且朝向开口设置的边缘部；其中，像素定义层还包括位于隔离部的开孔，至少部分阵列基板由开孔露出，边缘部与由开孔露出的至少部分阵列基板接触。
本申请第二方面的实施例提供一种显示面板的制备方法，包括：
制备阵列基板，阵列基板包括第一遮挡层，第一遮挡层包括第一通孔；
在阵列基板上制备第一导电材料层，并进行图案化处理获得第一电极层，第一电极层包括像素电极；
在第一电极层背离阵列基板的一侧制备像素定义层，像素定义层包括隔离部和由隔离部围合形成的像素开口；
对像素定义层的隔离部进行图案化处理形成开孔，开孔贯穿隔离部，至少部分阵列基板由开孔露出；
在像素定义层背离阵列基板的一侧制备第二导电材料层；
由阵列基板背离像素定义层的一侧对第二导电材料层进行激光刻蚀处理，激光穿过第一通孔将第二导电材料层刻蚀出开口，第二导电材料层未被刻蚀区域作为第二电极。
本申请第三方面的实施例提供一种显示面板，显示面板包括：阵列基板；第一电极层，位于阵列基板的一侧，第一电极层包括像素电极；像素定义层，位于第一电极层背离阵列基板的一侧，像素定义层包括隔离部和由隔离部围合形成的像素开口；第二电极层，位于像素定义层背离阵列基板的一侧，第二电极层包括第二电极和开口；其中，第二电极包括本体部及自本体部延伸且朝向开口设置的边缘部，本体部接触于像素定义层，边缘部接触于阵列基板或像素定义层，边缘部与阵列基板或像素定义层之间的粘附力大于本体部与像素定义层之间的粘附力。
本申请第四方面的实施例提供一种显示面板，显示面板包括：阵列基板，阵列基板包括第一遮挡层，第一遮挡层包括第一通孔；第一电极层，位于阵列基板的一侧，第一电极层包括像素电极；像素定义层，位于第一电极层背离阵列基板的一侧，像素定义层包括隔离部和由隔离部围合形成的像素开口；第二电极层，位于像素定义层背离阵列基板的一侧，第二电极层包括第二电极和开口，第二电极包括本体部及自本体部延伸且朝向开口设置的边缘部；其中，第一通孔在显示面板的厚度方向上的正投影与开口在显示面板的厚度方向上的正投影重叠，边缘部与第一遮挡层在显示面板的厚度方向上的距离小于本体部与第一遮挡层在显示面板的厚度方向上的距离。
本申请第五方面的实施例提供一种显示装置，包括上述任一实施方式的显示面板。
根据本申请实施例的显示面板，显示面板包括阵列基板和设置于阵列基板的第一电极层、像素定义层和第二电极层。第一电极层包括像素电极，第二电极层包括第二电极和开口。阵列基板包括第一遮挡层，该第一遮挡层包括第一通孔，第一遮挡层位于阵列基板内，能够避免影响显示面板的显示。在第二电极层的制备过程中，可以利用第一遮挡层作为掩膜板，由阵列基板背离第一电极层的一侧通过第一通孔朝向第二电极层出射激光，从而形成开口。通过上述结构设计，在第二电极层设置开口，能够减小第二电极的分布面积，进而提高显示面板的透光率，能够在显示面板的非显示侧集成感光组件，即便于感光组件的屏下集成。本申请实施例中，一方面，由于第一遮挡层的存在，第一遮挡层和第二电极层之间的距离较近，激光产生的衍射效果较小，在激光刻蚀过程中，能够有效避免激光衍射导致的第二电极朝向开口的边缘翻折而影响后续的封装效果；另一方面，可以对由开孔露出的阵列基板表面进行粗糙化处理，提高由开孔露出的阵列基板表面的粗糙度，能够增大第二电极的边缘部与由开孔露出的至少部分阵列基板的粘附力，更好地改善第二电极朝向开口的边缘上翻的问题。
附图说明
通过阅读以下参照附图对非限制性实施例所作的详细描述，本申请的其它特征、目的和优点将会变得更明显，其中，相同或相似的附图标记表示相同或相似的特征，附图并未按照实际的比例绘制。
图1是本申请第一方面实施例提供的一种显示面板的结构示意图；
图2是图1中A-A处的剖视图；
图3是另一实施例中图1中A-A处的剖视图；
图4是图1中Q处的局部放大结构示意图；
图5是还一实施例中图1中A-A处的剖视图；
图6是再一实施例中图1中A-A处的剖视图；
图7是又一实施例中图1中A-A处的剖视图；
图8是又一实施例中图1中A-A处的剖视图；
图9是又一实施例中图1中Q处的局部放大结构示意图；
图10是再一实施例中图1中A-A处的剖视图；
图11是再一实施例中图1中Q处的局部放大结构示意图；
图12是本申请第二方面实施例提供的一种显示面板的制备方法流程示意图。
具体实施方式
下面将详细描述本申请的各个方面的特征和示例性实施例，为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及具体实施例，对本申请进行进一步详细描述。应理解，此处所描述的具体实施例仅被配置为解释本申请，并不被配置为限定本申请。对于本领域技术人员来说，本申请可以在不需要这些具体细节中的一些细节的情况下实施。下面对实施例的描述仅仅是为了通过示出本申请的示例来提供对本申请更好的理解。
在诸如手机和平板电脑等电子设备上，需要在设置显示面板的一侧集成诸如前置摄像头、红外光传感器、接近光传感器等感光组件。在一些实施例中，可以在上述电子设备上设置透光显示区，将感光组件设置在透光显示区背面，在保证感光组件正常工作的情况下，实现电子设备的全面屏显示。
为了提高透光区的透光率，在一些相关技术中，对公共电极进行了图案化处理。令公共电极在显示面板的透光区域内形成镂空，以提高公共电极的透光率，进而能够提高显示面板的透光区域的透光率。相关技术中一般采用激光灰化等手段实现公共电极的图案化处理。
然而在相关技术中利用激光灰化对公共电极进行图案化处理时，通常是在衬底上形成阵列基板、发光层和公共电极后，从衬底背离阵列基板的一侧对公共电极进行激光照射，利用阵列基板内的遮光金属层作为掩膜板，对公共电极进行激光刻蚀，以实现公共电极的图形化处理。发明人发现，在对公共电极进行激光刻蚀以实现图案化处理后，公共电极的边缘容易内翻，对后续的薄膜封装等工艺造成影响，影响封装工艺的可靠性。
为解决上述问题，本申请实施例提供了一种显示面板、显示装置及显示面板的制备方法，以下将结合附图对显示面板、显示装置及显示面板的制备方法的各实施例进行说明。
本申请实施例提供一种显示面板，该显示面板可以是有机发光二极管(Organic Light Emitting Diode，OLED)显示面板。
请一并参阅图1和图2，图1是本申请第一方面实施例提供的一种显示面板的结构示意图，图2是图1中A-A处的剖视图。
如图1和图2所示，本申请第一方面实施例提供的显示面板10包括阵列基板100和设置于阵 列基板100上的第一电极层200、像素定义层300和第二电极层400。阵列基板100包括第一遮挡层500，第一遮挡层500包括第一通孔510；第一电极层200位于阵列基板100的一侧，第一电极层200包括像素电极210；像素定义层300包括隔离部310和由隔离部310围合形成的像素开口320，至少部分像素电极210由像素开口320露出；第二电极层400位于像素定义层300背离阵列基板100的一侧，第二电极层400包括第二电极410和开口420，第二电极410包括本体部430及自本体部430延伸且朝向开口420设置的边缘部440，开口420和像素电极210在阵列基板100上的正投影错位设置；第一通孔510在显示面板的厚度方向上的正投影与开口420在显示面板的厚度方向上的正投影重叠。
在一些可选的实施例中，如图2所示，第二电极410的本体部430接触于像素定义层300，第二电极410的边缘部440也接触于像素定义层300，边缘部440与像素定义层300之间的粘附力大于本体部430与像素定义层300之间的粘附力。可选的，可对边缘部440对应的像素定义层300的部分表面进行等离子体轰击处理，使得边缘部440对应的像素定义层300的部分表面的粗糙度上升，从而使得边缘部440与像素定义层300之间的粘附力大于本体部430与像素定义层300之间的粘附力。
根据本申请实施例的显示面板10，显示面板10包括阵列基板100和设置于阵列基板100上的第一电极层200、像素定义层300和第二电极层400。第一电极层200包括像素电极210，第二电极层400包括第二电极410和开口420，第二电极410包括本体部430及自本体部430延伸且朝向开口420设置的边缘部440。第一遮挡层500包括第一通孔510，且第一遮挡层500位于阵列基板100内，能够避免影响显示面板10的显示。在第二电极层400的制备过程中，由阵列基板100背离第一电极层200的一侧通过第一通孔510朝向第二电极层400出射激光，从而形成开口420，在上述过程中，第一遮挡层500起到掩膜板的作用。通过上述结构设计，一方面，在第二电极层400设置开口420，能够减小第二电极410的分布面积，进而提高显示面板10的透光率，能够在显示面板10的非显示侧集成感光组件，即便于感光组件的屏下集成。另一方面，由于第一遮挡层500的存在，第一遮挡层500和第二电极层400之间的距离较近，激光产生的衍射效果较小，在激光刻蚀过程中，能够有效避免激光衍射导致的第二电极410朝向开口420的边缘翻折而影响后续封装工艺的封装效果。
阵列基板100的设置方式还有多种，阵列基板100例如可以包括衬底和设置于衬底的TFT阵列层、平坦化层等膜层结构。或者阵列基板100即衬底。或者阵列基板100还包括衬底和位于背离衬底一侧的缓冲层和支撑板等。本申请中的阵列基板100可以为多膜层结构。
第一电极层200例如为阳极层，第二电极层400为阴极层。在利用第一电极层200和第二电极层400驱动像素开口320内的发光单元发光时，第一电极层200中的像素电极210作为阳极，第二电极层400的第二电极410作为阴极。
可选的，第一电极层200中，与像素开口320沿显示面板10的厚度方向Z至少部分交叠设置的为像素电极210。
请继续参阅图1，在一些可选的实施例中，显示面板10具有第一显示区AA1、第二显示区AA2以及围绕第一显示区AA1、第二显示区AA2的非显示区，第一显示区AA1的透光率大于第二显示区AA2的透光率。
在本申请中，可选的第一显示区AA1的透光率大于等于15％。为确保第一显示区AA1的透光 率大于15％，甚至大于40％，甚至具有更高的透光率，本实施例中显示面板10的各个功能膜层的透光率均大于80％，甚至至少部分功能膜层的透光率均大于90％。
根据本申请实施例的显示面板10，第一显示区AA1的透光率大于第二显示区AA2的透光率，使得显示面板10在第一显示区AA1的背面可以集成感光组件，实现例如摄像头的感光组件的屏下集成，同时第一显示区AA1能够显示画面，提高显示面板10的显示面积，实现显示装置的全面屏设计。
可选的，第二电极层400的开口420可以位于第一显示区AA1以提高第一显示区AA1的透光率。在其他实施例中，第二电极层400的开口420还可以同时位于第一显示区AA1和第二显示区AA2，以提高整个显示区域的透光率。
请一并参阅图3和图4，图3是另一实施例中图1中A-A处的剖视图；图4是图1中Q处的局部放大结构示意图。
在一些可选的实施例中，像素定义层300还包括位于隔离部310的开孔330，开口420在阵列基板100上的正投影位于开孔330在阵列基板100上的正投影之内。
在这些可选的实施例中，在像素定义层300上制备第二电极层400时，首先在像素定义层300上形成第二导电材料层，然后对第二导电材料层进行图案化处理形成第二电极层400。第二导电材料层能够直接沉积在位于开孔330内的阵列基板100上，进一步减小第二电极层400和第一遮挡层500之间的距离。
可选的，开孔330贯穿隔离部310设置。使得激光能够更好地通过开孔330对第二电极层400进行激光灰化。
可选的，像素电极210通过湿刻工艺形成。像素电极210通过湿刻工艺制备，使得阵列基板100上表面粗糙度上升，同时，开孔330贯穿隔离部310，从而使得开孔330处的阵列基板100上表面粗糙度上升，第二导电材料层能够直接沉积在位于开孔330内的阵列基板100上，使第二电极层400与阵列基板100上表面粘附力更强，使第二电极层400的第二电极410难以发生边缘上翻。
可选的，开孔330为贯穿隔离部310设置，至少部分阵列基板100由开孔330露出，第二电极410的边缘部440与由开孔330露出的至少部分阵列基板100的上表面直接接触，使得第一遮挡层500和第二电极410的边缘部440之间的距离较近，能够避免激光衍射导致的第二电极410朝向开口420的边缘部440翻折而影响后续封装工艺的封装效果。当利用第一遮挡层500对第二导电材料层进行激光刻蚀灰化处理时，能够在开孔330对应的区域内形成开口420，即在第二导电材料层上与第一遮挡层500距离较近的部分形成开口420，能够更好地改善第二电极410朝向开口420的边缘部440上翻的问题，更好地改善由于第二电极410的边缘部440上翻对后续封装工艺的影响。
可选的，如图1至图5所示，阵列基板100包括平坦化层110，像素电极210位于平坦化层110靠近第二电极层400的一侧，至少部分平坦化层110由开孔330露出，第二电极410的边缘部440与由开孔330露出的至少部分平坦化层110直接接触。在这些实施例中，可以对由开孔330露出的平坦化层110表面进行粗糙化处理，提高由开孔330露出的平坦化层110表面的粗糙度，能够增大第二电极410的边缘部440与由开孔330露出的至少部分平坦化层110的粘附力，更好地改善第二电极410朝向开口420的边缘部440上翻的问题。
在这些实施例中，第二电极410的本体部430与像素定义层300接触，第二电极410的边缘部440与由开孔330露出的至少部分阵列基板之间的粘附力大于本体部430与像素定义层300之间的 粘附力。可选的，第二电极410的本体部430与像素定义层300接触，第二电极410的边缘部440与由开孔330露出的至少部分平坦化层110之间的粘附力大于本体部430与像素定义层300之间的粘附力。
可选的，平坦化层110位于第一遮挡层500和像素定义层300之间，像素电极210位于平坦化层110朝向像素定义层300的一侧，位于开孔330的第二电极410的边缘部440与平坦化层110的上表面直接接触。
在这些可选的实施例中，第一电极层200设置于平坦化层110上，当图案化形成像素电极210时，例如当利用湿刻工艺去除部分导电材料形成像素电极210时，湿刻工艺所用的刻蚀液会接触到平坦化层110上其他位置的表面，从而使得开孔330处的平坦化层110上表面粗糙度上升。位于开孔330处的第一电极410的边缘部440与平坦化层110的上表面接触，使第二电极410的边缘部440与平坦化层110上表面粘附力更强，使第二电极410难以发生边缘上翻。
平坦化层110朝向像素定义层300表面(即平坦化层110的上表面)的形状设置方式有多种，例如平坦化层110的上表面呈平面状。
在一些可选的实施例中，平坦化层110的上表面呈平面状，第二电极410的边缘部440位于开孔330内且粘附于由开孔330露出的至少部分平坦化层110。第二电极410的边缘部440与第一遮挡层500在显示面板的厚度方向上的距离小于第二电极410的本体部430与第一遮挡层500在显示面板的厚度方向上的距离。第一遮挡层500和第二电极410的边缘部440之间的距离较近，激光产生的衍射效果较小，在激光刻蚀过程中，能够有效避免激光衍射导致的第二电极410朝向开口420的边缘翻折而影响后续封装工艺的封装效果。
在另一些可选的实施例中，如图6所示，平坦化层110包括平坦部111和由平坦部111朝向开孔330凸出设置的凸出部112。第二电极410的边缘部440与凸出部112接触。
在这些可选的实施例中，平坦化层110设置了凸出部112，至少部分凸出部112位于开孔330内，当第二电极层400沉积在像素定义层300上时，部分第二电极层400能够沉积在凸出部112上，能够提高第二电极层400的平坦程度。
可选的，凸出部112靠近第二电极层200一侧的表面和隔离部310靠近第二电极层200一侧的表面位于同一平面，能够进一步提高第二电极层400的平坦程度。
在一些可选的实施例中，第一通孔510在显示面板的厚度方向上的正投影位于开孔330在显示面板的厚度方向上的正投影之内。在利用第一遮挡层500对第二电极层400进行图案化处理形成第二电极410时，由于第一遮挡层500的遮挡作用，第一通孔510对应所在区域内的第二电极层400形成被刻蚀的开口420，未被刻蚀的部分为第二电极410。第一通孔510在显示面板的厚度方向上的正投影位于开孔330在显示面板的厚度方向上的正投影之内，则第二电极410朝向开口420的边缘部440位于开孔330内，保证第二电极410的边缘部440和第一遮挡层500距离较近，更好地改善第二电极410朝向开口420的边缘上翻的问题。
在一些可选的实施例中，多个像素开口320沿第一方向X和第二方向Y阵列分布，第一通孔510至少位于两列相邻的像素开口320之间。
可选的，第一方向X为列方向或者为行方向，第二方向Y为列方向或者为行方向，例如，当第二方向Y为列方向时，第一方向X为行方向；当第二方向Y为行方向时，第一方向X为列方向。本申请以第一方向X为行方向，第二方向Y为列方向进行说明。第一方向X和第二方向Y垂 直。
在这些可选的实施例中，多个像素开口320沿第一方向X和第二方向Y阵列分布，保证发光的均一性。第一通孔510设置于至少两列相邻的像素开口320对应的区域之间，使得至少两列相邻的像素开口320之间的区域作为灰化区域，激光通过第一通孔510对第二导电材料层进行刻蚀获得第二电极层400的开口420。
在一些可选的实施例中，第一通孔510沿第二方向Y延伸设置。沿第二方向Y延伸的第一通孔510，使得至少两列相邻的像素开口320之间，激光能够通过第一通孔510对第二导电材料层进行刻蚀获得第二电极层400的开口420。在一些可选的实施例中，任意相邻的两列像素开口320之间均设置有第一通孔510。
在这些可选的实施例中，在任意相邻的两列像素开口320之间，激光能够通过第一通孔510对第二导电材料层进行刻蚀，获得第二电极层400的开口420。因此，能够增大开口420的分布面积，减小第二电极410的分布面积，提高显示面板10的透光率。
在一些可选的实施例中，开孔330沿第二方向Y延伸设置，任意相邻的两列像素开口320之间均设置有开孔330。能够提高显示面板10的透光率。
请继续参阅图3和图4，在一些可选的实施例中，第一遮挡层500还包括用于遮挡激光的多个第一遮挡部520及允许激光通过的第一通孔510，至少部分第一遮挡部520设置于像素开口320在第一方向X的两侧。
在这些可选的实施例中，位于像素开口320的两侧的第一遮挡部520，用于在相邻像素开口320之间形成第一通孔510，激光穿过第一通孔510蚀刻第二电极层400，能够在第二电极层400上形成开口420，能够增大开口420的分布面积，减小第二电极410的分布面积，提高显示面板10的透光率。
可选的，第一遮挡层500还可以包括连接部530，连接部530连接多个第一遮挡部520。
在一些可选的实施例中，第一遮挡部520沿第二方向Y延伸，第一遮挡部520呈条状，每个像素开口320的两侧各设有一第一遮挡部520。
第一遮挡部520沿第二方向Y延伸且位于像素开口320两侧，通过两第一遮挡部520形成的第一通孔510位于两列相邻的像素开口320之间，激光穿过第一通孔510蚀刻第二电极层400，能够在第二电极层400上形成开口420，在此过程中，第一遮挡部520起到掩膜板的作用，通过上述设计，能够增大开口420的分布面积，减小第二电极410的分布面积，提高显示面板10的透光率。
在一些可选的实施例中，多个第一遮挡部520沿第一方向X并排设置，其中，第一方向X平行于阵列基板100的上表面。
在这些可选的实施例中，多个第一遮挡部520沿第一方向X并排设置，使得在第一方向X上形成多个沿第二方向Y延伸的第一通孔510，激光穿过第一通孔510蚀刻第二电极层400，能够在第二电极层400上形成开口420，能够增大开口420的分布面积，减小第二电极410的分布面积，提高显示面板10的透光率。
请参图7，在一些可选的实施例中，像素定义层300还包括位于隔离部310的凹陷340，第二电极410的边缘部440位于凹陷340内。可选的，第二电极410的边缘部440接触于所述凹陷340的底壁。如此设置，第二电极410的边缘部440与第一遮挡层500在显示面板的厚度方向上的距离小于第二电极410的本体部430与第一遮挡层500在显示面板的厚度方向上的距离。第一遮挡层 500和第二电极410的边缘部440之间的距离较近，激光产生的衍射效果较小，在激光刻蚀过程中，能够有效避免激光衍射导致的第二电极410朝向开口420的边缘翻折而影响后续封装工艺的封装效果。
在一些可选的实施例中，第二电极410的本体部430接触于像素定义层300，第二电极410的边缘部440位于凹陷340内且接触于像素定义层300，边缘部440与像素定义层300之间的粘附力大于本体部430与像素定义层300之间的粘附力。可选的，可对边缘部440对应的像素定义层300的部分表面进行等离子体轰击处理，使得边缘部440对应的像素定义层300的部分表面的粗糙度上升，从而使得边缘部440与像素定义层300之间的粘附力大于本体部430与像素定义层300之间的粘附力。
请一并参阅图5至图9，图8是又一实施例中图1中A-A处的剖视图；图9是又一实施例中图1中Q处的局部放大结构示意图。
在一些可选的实施例中，阵列基板100还包括第一金属层600，第一遮挡层500与第一金属层600同层设置，第一金属层600包括第一金属走线610，像素电极210在显示面板的厚度方向上的正投影与第一金属走线610在显示面板的厚度方向上的正投影至少部分交叠。
在这些可选的实施例中，第一遮挡层500与第一金属层600同层设置，简化制备流程。第一金属走线610在第二方向Y上延伸并与至少部分像素电极210存在交叠，使得像素电极210通过第一金属走线610连接，进行信号传输，保证发光单元的发光。
可选的，第一金属走线610连接像素电极210，以使像素电极210能够通过第一金属走线610连接驱动电路。
可选的，多个第一金属走线610沿第一方向X并排设置，使得多列像素电极210能够与第一金属走线610连接，进行信号传输，保证发光单元的发光。
请继续参阅图8，在一些可选的实施例中，第一遮挡部520和第一金属走线610之间存在第一间隙620。
在这些可选的实施例中，第一间隙620使得第一遮挡部520和第一金属走线610分离，相互绝缘，避免在对第二电极层400进行激光灰化的过程中损伤第一金属走线610，影响电性。
请一并参阅图10和图11，图10是再一实施例中显示面板的剖视图；图11是再一实施例中显示面板的局部放大结构示意图。
在一些可选的实施例中，阵列基板100还包括第二遮挡层700，第二遮挡层700位于阵列基板100内，第二遮挡层700包括用于遮挡激光的第二遮挡部710，第一遮挡部520与第二遮挡部710在显示面板的厚度方向上的正投影与第二电极410在显示面板的厚度方向上的正投影重叠。使得第一遮挡部20与第二遮挡部710能够共同作为图案化处理形成第二电极层400的掩膜板。
可选的，像素开口320在显示面板的厚度方向上的正投影位于第二遮挡部710在显示面板的厚度方向上的正投影之内。
在这些可选的实施例中，通过设置第二遮挡层700，当在阵列基板100背离第二电极层400的一侧朝向第二电极层400出射激光时，第二遮挡层700的第二遮挡部710能够遮挡激光，有效避免激光刻蚀损伤到像素电极210和第一金属走线610。
可选的，第二遮挡层700复用为静电屏蔽层。如第二遮挡层700为阵列基板中的金属屏蔽层(BSM)。
如图11所示，可选的，至少部分第二遮挡部710的边缘在显示面板的厚度方向上的正投影位于第一遮挡部520在显示面板的厚度方向上的正投影之内，使得第一遮挡部520和第二遮挡部710在显示面板的厚度方向上的正投影之间不存在间隙，在对第二导电材料层进行激光刻蚀时，保证刻蚀区域仅存在于相邻的两个第一遮挡部520之间。
在一些可选的实施例中，第二遮挡部710沿第二方向Y延伸，第二遮挡部710呈条状，且与第二方向Y平行的第二遮挡部710的边缘在显示面板的厚度方向上的正投影位于第一遮挡部520在显示面板的厚度方向上的正投影之内。
可选的，多个第二遮挡部710沿第一方向X并排设置。
以第二遮挡部710沿第二方向Y延伸且呈条状为例，像素开口320在显示面板的厚度方向上的正投影均位于第二遮挡部710在显示面板的厚度方向上的正投影之内，通过第二遮挡部710的遮挡作用，保护TFT器件层以及部分阵列基板100和发光单元不受激光影响。与第二方向Y平行的第二遮挡部710的边缘在显示面板的厚度方向上的正投影位于第一遮挡部520在显示面板的厚度方向上的正投影之内，第二遮挡部710在第一方向X上与第一遮挡部520交叠，使得第一遮挡部520与像素开口320之间的区域被第二遮挡部710遮挡，避免因操作不当使得激光损伤到像素电极210和第一金属走线610等其他膜层而影响显示面板的显示效果。
请继续参阅图11，第二遮挡部710的形状设置方式有多种，在一些可选的实施例中，第二遮挡部710包括：第一分部711，沿第二方向Y延伸且呈条状，多个第一分部711沿第一方向X并排设置；第二分部712，沿第一方向X延伸成型并连接在第一方向X上并排设置的多个第一分部711；其中，在沿第一方向X并排设置的多个第一间隙620和多个开孔330中，各第一间隙620和各开孔330在显示面板的厚度方向上的至少部分正投影位于第二遮挡部710在显示面板的厚度方向上的正投影之内。
在这些可选的实施例中，第一分部711能够遮挡位于同一列(当第一方向X为行方向时)的多个第一间隙620中的各第一间隙620的至少一部分，以及部分开孔330被第二分部712遮挡，使得同一行或者同一列的第二电极410能够相互连通。通过第二分部712的遮挡作用，能形成与第二分部712同分布区域和同尺寸的第二电极410，进而使得不同位置的第二电极410能够相互连通，形成整面的公共电极。
第二分部712的位置设置方式有多种，例如当显示面板10具有第一区和环绕至少部分第一区的第二区，第一分部711位于第一区，第二分部712位于第二区，能进一步减小第一区内的第二电极410的分布面积，提高第一区的透光率。第一区可以为第一显示区AA1，第二区可以为非显示区，或者第二区为第二显示区AA2。
可选的，在显示面板的厚度方向Z上，第一遮挡部520相对第二遮挡部710更靠近所述第二电极层400，能够减小第一遮挡部520与第二电极层400的距离，能够改善第二电极层200的第二电极410的边缘部易上翘的问题。
在一些可选的实施例中，第二电极层400还包括连接部，连接部用于连接第二电极410，且连接部在显示面板的厚度方向上的正投影位于第一通孔510在显示面板的厚度方向上的正投影之外。该连接部可以通过第二分部712形成。
在这些可选的实施例中，连接部使得在第一方向X上相邻的两列像素开口320对应的部分第二电极410相互连通形成整面电极，便于第二电极层400的制备。
可选的，第一遮挡层500和/或第二遮挡层700包括金属材料，例如Mo(钼)。在一些实施例中，第一遮挡层500和/或第二遮挡层700为金属复合材料层，例如Ti/Al/Ti(钛/铝/钛)，ITO/Ag/ITO(氧化铟锡/银/氧化铟锡)等。
值得说明的是，当显示面板10中仅含有第一遮挡层500时，可应用于屏下摄像头用显示面板，可拉伸显示面板，透明显示面板等；对于屏下摄像头用显示面板而言，第一遮挡层500可以仅存在于第一显示区AA1中；此外，第一遮挡层500也可以同时存在于第一显示区AA1和第二显示区AA2中。
当显示面板10中含有第一遮挡层500和第二遮挡层700时，也可应用至屏下摄像头用显示面板10，但为了提高显示面板10的透过率，其第一显示区AA1中仅含有第一遮挡层500，其第二显示区AA2中含有第一遮挡层500和第二遮挡层700；此外，也可应用至可拉伸显示面板，透明显示面板中。
可选的，如图5和图6所示，第二电极层400的第二电极410沿显示面板的厚度方向Z的正投影位于第二遮挡层700和第一遮挡层500沿显示面板的厚度方向Z的正投影之内，开口420沿显示面板的厚度方向Z的正投影位于第一通孔510沿显示面板的厚度方向Z的正投影之内。即第一遮挡层700和第二遮挡层500相互配合能够遮挡全部的第二电极410，在激光灰化第二电极层400时，第一遮挡层700和第二遮挡层500能够共同遮挡激光，避免第二电极410被激光灰化。
对于本实施例中的结构设计，可应用至其他显示面板10中，具体可依据实际情况进行选择，本申请不对其进行具体限制。
本发明第二方面的实施例还提供一种显示装置，包括上述任一第一方面实施例的显示面板10。由于本发明第二方面实施例提供的显示装置包括上述第一方面任一实施例的显示面板10，因此本发明第二方面实施例提供的显示装置具有上述第一方面任一实施例的显示面板10具有的有益效果，在此不再赘述。
本发明实施例中的显示装置包括但不限于手机、个人数字助理(Personal Digital Assistant，简称：PDA)、平板电脑、电子书、电视机、门禁、智能固定电话、控制台等具有显示功能的设备。
请参阅图12，图12是本申请第三方面实施例提供的一种显示面板的制备方法流程示意图。该显示面板10可以为上述任一第一方面实施例提供的显示面板10。
如图12并请一并参阅图1至图11所示的显示面板10，显示面板10的制备方法包括：
步骤S01：制备阵列基板100，阵列基板100包括第一遮挡层500，第一遮挡层500包括第一通孔510。
步骤S02：在阵列基板100上制备第一导电材料层，并进行图案化处理以获得第一电极层200，第一电极层200包括像素电极210。
步骤S03：在第一电极层200背离阵列基板100的一侧制备像素定义层300，像素定义层300包括隔离部310和由隔离部310围合形成的像素开口320，至少部分像素电极210由像素开口320露出。
步骤S04：对像素定义层300的隔离部310进行图案化处理形成开孔330，开孔330贯穿隔离部310，至少部分阵列基板由开孔330露出。
步骤S05：在像素定义层300背离阵列基板100的一侧制备第二导电材料层。
步骤S06：由阵列基板100背离像素定义层300的一侧对第二导电材料层进行激光刻蚀处理， 激光穿过第一通孔510将第二导电材料层刻蚀出开口420，第二导电材料层未刻蚀区域作为第二电极410。
在本申请实施例提供的显示面板10的制备方法中，首先通过步骤S01制备第一遮挡层500，步骤S02能够制备像素电极210。然后通过步骤S03形成像素定义层300，使得发光单元能够设置于像素开口320内，像素电极210和第二电极层400的第二电极410能够驱动发光单元发光。通过步骤S04制备设置于隔离部310的开孔330，至少部分阵列基板由开孔330露出。通过步骤S05制备第二导电材料层，用于形成第二电极层400。第二电极层400包括第二电极410和开口420。第一遮挡层500包括第一通孔510。且第一遮挡层500位于阵列基板100内，能够避免影响显示面板10的显示。在第二电极层400的制备过程中，可以利用第一遮挡层500作为掩膜板，由阵列基板100背离第一电极层200的一侧通过第一通孔510朝向第二电极层400出射激光，从而形成开口420。第一通孔510与像素电极210在显示面板的厚度方向Z上的正投影错位设置，避免激光通过第一通孔510刻蚀到像素电极210，影响发光显示。一方面，在第二电极层400设置开口420，能够减小第二电极410的分布面积，进而提高显示面板10的透光率。另一方面，第一遮挡层500和第二电极层400之间的距离较近，能够避免激光衍射导致的第二电极410朝向开口420的边缘翻折而影响后续封装工艺的封装效果。
在步骤S04中，还可以对像素定义层300上的隔离部310进行图案化处理以形成开孔330，即对隔离部进行图案化处理以形成开孔330。可选的，开口420在阵列基板上的正投影位于开孔330在阵列基板100上的正投影之内。可选的，开孔330贯穿所述隔离部，至少部分阵列基板100由开孔330露出。开孔330内不会设置发光单元，当像素定义层300上设置有空穴注入层、空穴传输层、电子传输层和电子注入层等共通层时，共通层可以在形成开孔330时，一起去除，从而使得第二电极层400的第二电极410与由开孔330露出的阵列基板100直接接触，进一步减小第二电极层400与第一遮挡层500之间的距离。在步骤S05中形成第二导电材料层时，第二导电材料层和第一遮挡层500之间不会有隔离部310等结构，能够进一步减小开孔330所在区域内第二导电材料层和第一遮挡层500的距离。在步骤S06中，以第一遮挡层500为掩膜板对第二导电材料层进行图案化处理时，由于第二导电材料层和第一遮挡层500之间的距离较小，能够改善衍射，避免第二电极410的边缘部440上翻，进而避免影响后续封装工艺的良率。
可选的，在步骤S02中，制备方法还包括：对第一导电材料层进行湿刻工艺，得到间隔分布的像素电极210，并使得至少部分阵列基板100由相邻两个像素电极210之间的间隙露出。像素电极210通过湿刻工艺制备，使得由相邻两个像素电极210间露出的阵列基板100的上表面粗糙度上升，在后续制备第二电极层400时，第二导电材料层能够直接沉积在由相邻两个像素电极210间露出的阵列基板100的上表面，该部分的阵列基板100上表面粗糙度较高，使第二电极层400的第二电极410与阵列基板100的上表面的粘附力更强，使第二电极层400的第二电极410难以发生边缘上翻。
可选的，阵列基板100包括平坦化层110，在步骤S03中，至少部分平坦化层由开孔330露出。
在步骤S02中，制备方法还包括：在平坦化层110上制备第一导电材料层，对第一导电材料层进行湿刻工艺，得到间隔分布的像素电极210，并使得至少部分平坦化层110由相邻两个像素电极210之间的间隙露出。像素电极210通过湿刻工艺制备，使得由相邻两个像素电极210间露出的部 分平坦化层110的上表面粗糙度上升，在后续制备第二电极层400时，第二导电材料层能够直接沉积在由相邻两个像素电极210间露出的部分平坦化层110的上表面，即第二导电材料层与由开孔330露出的至少部分平坦化层110直接接触，该部分的平坦化层110的上表面的粗糙度较高，使第二电极层400的第二电极410与平坦化层110的上表面的粘附力更强，使第二电极层400的第二电极410难以发生边缘上翻。
依照本申请如上文所述的实施例，这些实施例并没有详尽叙述所有的细节，也不限制该发明仅为所述的具体实施例。显然，根据以上描述，可作很多的修改和变化。本说明书选取并具体描述这些实施例，是为了更好地解释本申请的原理和实际应用，从而使所属技术领域技术人员能很好地利用本申请以及在本申请基础上的修改使用。本申请仅受权利要求书及其全部范围和等效物的限制。

Claims (20)

  1. 一种显示面板，所述显示面板包括：
    阵列基板；
    第一电极层，位于所述阵列基板的一侧，所述第一电极层包括像素电极；
    像素定义层，位于所述第一电极层背离所述阵列基板的一侧，所述像素定义层包括隔离部和由所述隔离部围合形成的像素开口；
    第二电极层，位于所述像素定义层背离所述阵列基板的一侧，所述第二电极层包括第二电极和开口，所述第二电极包括本体部及自所述本体部延伸且朝向所述开口设置的边缘部；
    其中，所述像素定义层还包括位于所述隔离部的开孔，至少部分所述阵列基板由所述开孔露出，所述边缘部与由所述开孔露出的至少部分所述阵列基板接触。
  2. 根据权利要求1所述的显示面板，其中，所述第二电极的所述本体部与所述像素定义层接触，所述第二电极的所述边缘部与由所述开孔露出的至少部分所述阵列基板之间的粘附力大于所述本体部与所述像素定义层之间的粘附力；
    所述像素电极通过湿刻工艺形成。
  3. 根据权利要求1所述的显示面板，其中，所述像素定义层的所述开孔为贯穿所述隔离部设置，所述边缘部位于所述开孔内且粘附于由所述开孔露出的至少部分所述阵列基板。
  4. 根据权利要求1所述的显示面板，其中，所述阵列基板包括平坦化层，至少部分所述平坦化层由所述开孔露出，所述边缘部与由所述开孔露出的至少部分所述平坦化层接触。
  5. 根据权利要求4所述的显示面板，其中，所述平坦化层包括平坦部和由所述平坦部朝向所述开孔凸出设置的凸出部，所述边缘部与所述凸出部接触。
  6. 根据权利要求5所述的显示面板，其中，所述凸出部靠近所述第二电极层的一侧的表面和所述隔离部靠近所述第二电极层的一侧的表面位于同一平面。
  7. 根据权利要求1所述的显示面板，其中，所述阵列基板包括第一遮挡层，所述第一遮挡层包括用于遮挡激光的多个第一遮挡部及允许激光通过的第一通孔；所述第一通孔在所述显示面板的厚度方向上的正投影与所述第二电极层的所述开口在所述显示面板的厚度方向上的正投影重叠。
  8. 根据权利要求7所述的显示面板，其中，多个所述像素开口沿第一方向和第二方向阵列分布，所述第一方向为行方向，所述第二方向为列方向，且所述第一方向与所述第二方向垂直，所述开孔沿所述第二方向延伸设置；任意相邻的两列所述像素开口之间均设置有所述开孔。
  9. 根据权利要求8所述的显示面板，其中，多个所述第一遮挡部沿所述第一方向并排设置；所述第一遮挡部呈条状且沿所述第二方向延伸。
  10. 根据权利要求7所述的显示面板，其中，所述阵列基板包括第一金属层，所述第一遮挡层与所述第一金属层同层设置，所述第一金属层包括多个第一金属走线；所述像素电极在所述显示面板的厚度方向上的正投影与所述第一金属走线在所述显示面板的厚度方向上的正投影至少部分交叠；
    多个所述第一金属走线沿所述第一方向并排设置；
    所述第一遮挡部和所述第一金属走线之间存在第一间隙。
  11. 根据权利要求7所述的显示面板，其中，所述阵列基板还包括第二遮挡层，所述第二遮挡层包括用于遮挡激光的第二遮挡部，所述第一遮挡部与所述第二遮挡部在所述显示面板的厚度方向上的正投影与所述第二电极在所述显示面板的厚度方向上的正投影重叠，在所述显示面板的厚度方向上，所述第一遮挡部相对所述第二遮挡部更靠近所述第二电极层；
    所述第二遮挡层复用为静电屏蔽层。
  12. 一种显示面板的制备方法，包括：
    制备阵列基板，所述阵列基板包括第一遮挡层，所述第一遮挡层包括第一通孔；
    在所述阵列基板上制备第一导电材料层，并进行图案化处理获得第一电极层，所述第一电极层包括像素电极；
    在所述第一电极层背离所述阵列基板的一侧制备像素定义层，所述像素定义层包括隔离部和由所述隔离部围合形成的像素开口；
    对所述像素定义层的隔离部进行图案化处理形成开孔，所述开孔贯穿所述隔离部，至少部分所述阵列基板由所述开孔露出；
    在所述像素定义层背离所述阵列基板的一侧制备第二导电材料层；
    由所述阵列基板背离所述像素定义层的一侧对所述第二导电材料层进行激光刻蚀处理，激光穿过所述第一通孔将所述第二导电材料层刻蚀出开口，所述第二导电材料层未被刻蚀区域作为第二电极。
  13. 根据权利要求12所述的显示面板的制备方法，其中，所述阵列基板包括平坦化层，至少部分所述平坦化层由所述开孔露出；
    所述在所述阵列基板上制备第一导电材料层，并进行图案化处理获得第一电极层，所述第一电极层包括像素电极的步骤，包括：
    在所述平坦化层上制备第一导电材料层，对所述第一导电材料层进行湿刻工艺，得到间隔分布的多个所述像素电极，至少部分所述平坦化层由相邻两个所述像素电极之间的间隙露出。
  14. 根据权利要求13所述的显示面板的制备方法，其中，所述在所述像素定义层背离所述阵列基板的一侧制备第二导电材料层的步骤，包括：
    在所述像素定义层背离所述阵列基板的一侧制备第二导电材料层，所述第二导电材料层与由所述开孔露出的至少部分所述平坦化层接触。
  15. 一种显示面板，所述显示面板包括：
    阵列基板；
    第一电极层，位于所述阵列基板的一侧，所述第一电极层包括像素电极；
    像素定义层，位于所述第一电极层背离所述阵列基板的一侧，所述像素定义层包括隔离部和由所述隔离部围合形成的像素开口；
    第二电极层，位于所述像素定义层背离所述阵列基板的一侧，所述第二电极层包括第二电极和开口；
    其中，所述第二电极包括本体部及自所述本体部延伸且朝向所述开口设置的边缘部，所述本体部接触于所述像素定义层，所述边缘部接触于所述阵列基板或所述像素定义层，所述边缘部与所述阵列基板或所述像素定义层之间的粘附力大于所述本体部与所述像素定义层之间的粘附力。
  16. 根据权利要求15所述的显示面板，其中，所述阵列基板包括平坦化层，所述像素定义层还 包括位于所述隔离部的开孔，至少部分所述平坦化层由所述开孔露出，所述边缘部与由所述开孔露出的至少部分所述平坦化层接触，所述边缘部与所述平坦化层之间的粘附力大于所述本体部与所述像素定义层之间的粘附力。
  17. 一种显示面板，所述显示面板包括：
    阵列基板，所述阵列基板包括第一遮挡层，所述第一遮挡层包括第一通孔；
    第一电极层，位于所述阵列基板的一侧，所述第一电极层包括像素电极；
    像素定义层，位于所述第一电极层背离所述阵列基板的一侧，所述像素定义层包括隔离部和由所述隔离部围合形成的像素开口；
    第二电极层，位于所述像素定义层背离所述阵列基板的一侧，所述第二电极层包括第二电极和开口，所述第二电极包括本体部及自所述本体部延伸且朝向所述开口设置的边缘部；
    其中，所述第一通孔在所述显示面板的厚度方向上的正投影与所述开口在所述显示面板的厚度方向上的正投影重叠，所述边缘部与所述第一遮挡层在所述显示面板的厚度方向上的距离小于所述本体部与所述第一遮挡层在所述显示面板的厚度方向上的距离。
  18. 根据权利要求17所述的显示面板，其中，所述像素定义层还包括位于所述隔离部的开孔，至少部分所述阵列基板由所述开孔露出，所述边缘部与由所述开孔露出的至少部分所述阵列基板接触。
  19. 根据权利要求17所述的显示面板，其中，所述像素定义层还包括位于所述隔离部的凹陷，所述边缘部位于所述凹陷内；
    所述边缘部接触于所述凹陷的底壁。
  20. 一种显示装置，其中，包括权利要求1-19任一项所述的显示面板。
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Families Citing this family (1)

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Publication number Priority date Publication date Assignee Title
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180074260A (ko) * 2016-12-23 2018-07-03 엘지디스플레이 주식회사 유기 발광 표시 장치
CN109166882A (zh) * 2018-08-01 2019-01-08 云谷（固安）科技有限公司 显示面板及其形成方法、显示装置
CN111785854A (zh) * 2020-08-10 2020-10-16 京东方科技集团股份有限公司 一种显示面板、其制作方法及显示装置
CN112802975A (zh) * 2020-12-31 2021-05-14 上海天马微电子有限公司 一种显示面板、显示装置及阵列基板的制造方法
CN113410268A (zh) * 2021-06-02 2021-09-17 昆山国显光电有限公司 显示面板、显示面板的制造方法及显示装置
CN114220930A (zh) * 2021-10-29 2022-03-22 长沙惠科光电有限公司 显示面板及其制备方法
CN114267685A (zh) * 2021-12-14 2022-04-01 武汉华星光电半导体显示技术有限公司 显示面板及显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180074260A (ko) * 2016-12-23 2018-07-03 엘지디스플레이 주식회사 유기 발광 표시 장치
CN109166882A (zh) * 2018-08-01 2019-01-08 云谷（固安）科技有限公司 显示面板及其形成方法、显示装置
CN111785854A (zh) * 2020-08-10 2020-10-16 京东方科技集团股份有限公司 一种显示面板、其制作方法及显示装置
CN112802975A (zh) * 2020-12-31 2021-05-14 上海天马微电子有限公司 一种显示面板、显示装置及阵列基板的制造方法
CN113410268A (zh) * 2021-06-02 2021-09-17 昆山国显光电有限公司 显示面板、显示面板的制造方法及显示装置
CN114220930A (zh) * 2021-10-29 2022-03-22 长沙惠科光电有限公司 显示面板及其制备方法
CN114267685A (zh) * 2021-12-14 2022-04-01 武汉华星光电半导体显示技术有限公司 显示面板及显示装置

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