WO2024000810A1 - 一种显示面板及其制备方法、显示装置 - Google Patents

一种显示面板及其制备方法、显示装置 Download PDF

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Publication number
WO2024000810A1
WO2024000810A1 PCT/CN2022/117436 CN2022117436W WO2024000810A1 WO 2024000810 A1 WO2024000810 A1 WO 2024000810A1 CN 2022117436 W CN2022117436 W CN 2022117436W WO 2024000810 A1 WO2024000810 A1 WO 2024000810A1
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Prior art keywords
area
shielding layer
sub
display panel
light
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PCT/CN2022/117436
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English (en)
French (fr)
Inventor
于泉鹏
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武汉天马微电子有限公司
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Publication of WO2024000810A1 publication Critical patent/WO2024000810A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • B23K26/362—Laser etching
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/70—Auxiliary operations or equipment
    • B23K26/702—Auxiliary equipment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/828—Transparent cathodes, e.g. comprising thin metal layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices

Definitions

  • the present application relates to the field of display technology, and in particular to a display panel, a preparation method thereof, and a display device.
  • Full-screen is a display with an ultra-high screen-to-body ratio.
  • CUP camera under panel
  • CUP technology is to set optical devices such as cameras on the back of the display area of the display screen.
  • the area where these cameras and optical sensors are set can be called the CUP area. It can be seen that the CUP area can not only display the picture, but also transmit the light required by the camera.
  • how to effectively achieve high light transmittance in the CUP area is an issue that needs to be solved urgently.
  • embodiments of the present application provide a display panel, a preparation method thereof, and a display device.
  • embodiments of the present application provide a display panel, the display area of the display panel includes a first area and a second area, the second area and the first area are adjacent to each other, and the second area The light transmittance is less than the light transmittance of the first region;
  • the display panel also includes:
  • An array layer the array layer is located on one side of the substrate, the array layer includes a plurality of circuit elements;
  • a plurality of light-emitting elements located on the side of the array layer away from the substrate;
  • a blocking layer located on the side of the light-emitting element facing the substrate, including a first blocking layer and a second blocking layer;
  • the first blocking layer overlaps the light-emitting element in the first area
  • the second shielding layer overlaps the circuit elements and/or the light-emitting elements in the second area.
  • the present application provides a display device, including the display panel provided in the first aspect.
  • embodiments of the present application provide a method for manufacturing a display panel, which is used to prepare the display panel provided in the first aspect.
  • the light transmittance in the first area of the display panel and the display device is greater than the light transmittance in the second area, then at least part of the film layer in the first area is etched away by laser to increase the first area. internal light transmittance.
  • a linear laser can be used to laser etch the film layer in the first region. If the shape of the first region is a non-rectangular structure, the etching path of the linear laser It will inevitably exceed the first area.
  • the film layer in the light-emitting element can be protected from laser etching, and by arranging a second shielding layer in the second region, the second shielding layer can be protected.
  • the film layer in the area will not be mistakenly engraved.
  • Figure 1 is a schematic diagram of a display panel provided by an embodiment of the present application.
  • Figure 2 is a schematic diagram of a display panel provided by an embodiment of the present application.
  • Figure 3 is a partial schematic diagram of the CC area in the dotted box in Figures 1 and 2;
  • Figure 4 is a schematic cross-sectional view along the MM’ direction in Figure 3;
  • Figure 5 is a schematic cross-sectional view along the NN’ direction in Figure 3;
  • Figure 6 is a partial schematic diagram of the CC area in the dotted box in Figures 1 and 2;
  • Figure 7 is a schematic cross-sectional view along the MM’ direction in Figure 6;
  • Figure 8 is a schematic cross-sectional view along the NN’ direction in Figure 6;
  • Figure 9 is a partial cross-sectional schematic diagram of the first area and the second area in a display panel provided by an embodiment of the present application.
  • Figure 10 is a partial cross-sectional schematic diagram of the first area and the second area in a display panel according to an embodiment of the present application
  • Figure 11 is another partial schematic diagram of the CC area in the dotted box in Figures 1 and 2;
  • Figure 12 is another partial schematic diagram of the CC area in the dotted box in Figures 1 and 2;
  • Figure 13 is another schematic cross-sectional view along the MM’ direction in Figure 3;
  • Figure 14 is another schematic cross-sectional view along the NN’ direction in Figure 6;
  • Figure 15 is another partial schematic diagram of the CC area in the dotted box in Figures 1 and 2;
  • Figure 16 is another schematic cross-sectional view along the MM’ direction in Figure 3;
  • Figure 17 is another schematic cross-sectional view along the MM’ direction in Figure 3;
  • Figure 18 is another partial schematic diagram of the CC area in the dotted box in Figures 1 and 2;
  • Figure 19 is a schematic diagram of the channel width-to-length ratio of circuit elements in different sub-regions in the second region
  • Figure 20 is a schematic diagram of the channel width-to-length ratio of circuit elements in different sub-regions in the second region
  • Figure 21 is a schematic diagram of the channel width to length ratio of circuit elements in different sub-regions in the second region
  • Figure 22 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 23 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 24 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 25 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 26 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 27 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 28 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 29 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 30 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 31 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 32 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 33 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 34 is a schematic diagram of a display device provided by an embodiment of the present application.
  • Figure 35 is a schematic diagram of a preparation method of a display panel provided by an embodiment of the present application.
  • Figure 36 is a schematic diagram of the relationship between a linear laser and a second shielding layer in a display panel provided by an embodiment of the present application;
  • FIG. 37 is a schematic diagram of the relationship between a linear laser and a second shielding layer in a display panel according to an embodiment of the present application.
  • first, second, third, etc. may be used to describe regions and the like in the embodiments of the present application, these regions and the like should not be limited to these terms. These terms are only used to distinguish areas etc. from each other.
  • the first area may also be called a second area, and similarly, the second area may also be called a first area.
  • the applicant in this case provided a solution to the problems existing in the existing technology through detailed and in-depth research.
  • FIG. 1 is a schematic diagram of a display panel provided by an embodiment of the present application
  • FIG. 2 is a schematic diagram of a display panel provided by an embodiment of the present application.
  • An embodiment of the present application provides a display panel.
  • the display panel 001 is divided into a display area AA and a non-display area NA.
  • the non-display area NA surrounds the display area AA, and the display area AA is used for luminous display.
  • the main area, the non-display area NA is mainly used to set up the packaging structure, peripheral circuits, peripheral signal lines, etc.
  • the display area AA includes a first area A1 and a second area A2.
  • the second area A2 and the first area A1 may be adjacent to each other, and the light transmittance of the second area A2 is smaller than the light transmittance of the first area A1.
  • the first area A1 and the second area A2 are different areas in the display area AA, and the first area A1 has a higher transmittance to external light than the second area A2.
  • the second area A2 may at least partially surround the first area A1.
  • the first area A1 has a higher transmittance to external light, so the area where the first area A1 is located can be used to set optical functional components. For example, a camera, a fingerprint recognition structure, etc. integrated with a light sensor can be set below the first area A1. device. In addition to the function of light-emitting display, the first area A1 can also realize the function of optical signal transmission, such as at least one of the functions of taking pictures and biometric identification.
  • the second area A2 may completely surround the first area A1; as shown in FIG. 2 , the second area A2 may also partially surround the first area A1.
  • the first area A1 can be any shape such as a circle, an ellipse, a rectangle, etc.
  • Figure 3 is a partial schematic diagram of the CC area in the dotted box in Figures 1 and 2. It can be understood that the dotted box area is only to clearly show the CC area limited by the local second area A2, and does not represent the actual area of the present application.
  • Figure 4 is a schematic cross-sectional view along the MM' direction in Figure 3
  • Figure 5 is a schematic cross-sectional view along the NN' direction in Figure 3.
  • the display panel 001 also includes a substrate 01, an array layer 02, and a light-emitting element layer 03.
  • the array layer 02 is located on one side of the substrate 01, and the array layer 02 includes a plurality of circuit elements 20, which emits light.
  • the element layer 03 is located on the side of the array layer 02 away from the substrate 01 and includes a plurality of light-emitting elements 30 .
  • the light-emitting element 30 is the main structure for emitting light in the display panel 001, and may specifically be an organic light-emitting diode.
  • the circuit element 20 may specifically be a transistor, and the plurality of elements 20 may constitute a pixel circuit that is electrically connected to the light-emitting element 30 and provides it with the voltage and current required to emit light.
  • the plurality of circuits The element 20 may constitute a pixel circuit that provides the organic light emitting diode with the current required to emit light.
  • the inventive concept of the present application is explained with reference to the circuit element 20 in the pixel circuit that is electrically connected to the light-emitting element 30. It is understandable that the design concept of the light-emitting element 30 in the present application is also applicable to circuit elements with other functions in the pixel circuit.
  • the display panel also includes a shielding layer 04 , which is located on the side of the light-emitting element layer 03 facing the substrate 01 .
  • the shielding layer 04 overlaps with part of the light-emitting element 30 and is used to protect the light-emitting element 30 from the etching laser irradiated from the back of the display panel 001, thereby ensuring the integrity of the light-emitting element 30 and its light-emitting performance.
  • the shielding layer 04 includes a first shielding layer 41 and a second shielding layer 42, and the first shielding layer 41 overlaps the light-emitting element 30 in the first area A1, and the second shielding layer 42 overlaps with the second shielding layer 42.
  • the circuit elements 20 and/or the light emitting elements 30 in the area A2 overlap.
  • the shielding layer 04 includes the first shielding layer 41 located in the first area A1 and the second shielding layer 42 located in the second area A2, and along the direction Z perpendicular to the display panel 001, within the first area A1
  • the first shielding layer 41 overlaps with the light-emitting element 30 in the first area A1
  • the second shielding layer 42 in the second area A2 overlaps with the light-emitting element 30 in the second area A2.
  • the plurality of light-emitting elements 30 provided in the light-emitting element layer 03 include a first light-emitting element 31 and a second light-emitting element 32.
  • the first light-emitting element 31 is a light-emitting element provided in the first area A1.
  • the element 30 and the second light-emitting element 32 are the light-emitting elements 30 provided in the second area A2.
  • the first shielding layer 41 in the first region A1 overlaps with the first light-emitting element 31 in the first region A1
  • the second shielding layer 42 in the second region A2 overlaps with the first shielding layer 42 in the second region A2.
  • the second light emitting elements 32 in the second area A2 overlap.
  • the second shielding layer 42 in the second area A2 may also overlap with the circuit element 20 in the second area A2.
  • Figure 6 is a partial schematic view of the CC area in the dotted box in Figures 1 and 2.
  • Figure 7 is a cross-sectional schematic view along the MM' direction in Figure 6.
  • Figure 8 is a cross-section along the NN' direction in Figure 6. Schematic diagram.
  • the first shielding layer 41 in the first region A1 overlaps with the first light-emitting element 31 in the first region A1
  • the second shielding layer 42 in the second region A2 overlaps with the first shielding layer 41 in the first region A1.
  • the circuit elements 20 in the second area A2 overlap and do not overlap with the second light-emitting elements 32 in the second area A2.
  • the black matrix in the first area A1 is usually designed with openings, so that the black matrix in the first area A1 only retains the part surrounding the color resistor. .
  • the opening design of the black matrix in the first area A1 exposes a larger area of the cathode layer CE0. Since the cathode layer CE0 is made of magnesium silver material, the reflectivity of the first area A1 increases, and the magnesium silver material will affect the optics that need to enter the camera and so on. The light of the functional components is blocked to a certain extent, so the laser etching process needs to be used to pattern the cathode layer CE0 exposed by the opening of the black matrix.
  • the inventor discovered that when using laser to etch the cathode layer CE0, the cathode layer CE0 on the periphery of the first area A1 will be erroneously etched.
  • the analysis found that the main reason for this problem is that when a point laser is used, since the laser spot is 20 microns-30 microns, when the laser reaches the edge of the first area A1, it will over-engrave the film layer in the second area A2;
  • a linear laser is used to laser etch the film layer in the first area A1 if the shape of the first area A1 is a non-rectangular structure, the etching path of the linear laser will inevitably exceed the first area A1, and the second area A2 The film layer in the film is over-engraved.
  • the light transmittance in the first area A1 is greater than the light transmittance in the second area A2, then at least part of the film layer in the first area A1 is etched away by laser to increase the light transmittance in the first area A1.
  • Transmittance the specific method of using laser to etch away part of the film layer in the first area A1 is as follows: the laser source emits laser light from the backlight of the display panel 001 to the film layer that needs to be partially etched away, that is, the laser light emits light away from the substrate 01
  • One side of the component layer 03 emits laser light toward the film layer that needs to be partially etched away.
  • the film layer in the light-emitting element 20 can be protected from being etched by the laser, and by arranging the second shielding layer 41 in the second region A2 42, which can protect the film layer in the second area A2 from being mistakenly engraved.
  • the first shielding layer 41 can cover the first light-emitting element 31
  • the second shielding layer 42 can cover the second light-emitting element 32 .
  • the plurality of circuit elements 20 provided in the array layer 02 include a first circuit element 21 , and the first circuit element 21 is electrically connected to the first light-emitting element 31 , wherein the first light-emitting element 31 is disposed in the first area A1 and the first circuit element 21 is disposed in the second area A2. That is to say, the first circuit element 21 electrically connected to the first light-emitting element 31 in the first area A1 is not provided in the first area A1, but the first circuit element 21 is provided in the second peripheral area of the first area A1. area A2, therefore, the transmittance of the first area A1 to external light can be increased.
  • the first light-emitting element 31 provided in the first area A1 and the second light-emitting element 32 provided in the second area A2 are electrically connected through the connection electrode CL, and the connection electrode CL Can be prepared using transparent conductive electrodes.
  • the plurality of circuit elements 20 provided in the array layer 02 include a second circuit element 22, and the second circuit element 22 is electrically connected to the second light-emitting element 32, wherein the second circuit element 22 is electrically connected to the second light-emitting element 32.
  • 22 and the second light-emitting element 32 are both disposed in the second area A2. That is to say, not only the second circuit element 22 electrically connected to the second light-emitting element 32 in the second area A2 is provided in the second area A2, but also the second circuit element 22 electrically connected to the first light-emitting element 31 in the first area A1 is provided.
  • a circuit component 21 is provided in the second area A2.
  • the display panel 001 also includes a third area A3, and the second area A2 is located between the first area A1 and the third area A3.
  • the plurality of circuit elements 20 provided in the array layer 02 include a third circuit element 23, and the plurality of light-emitting elements 30 provided in the light-emitting element layer 03 include a plurality of third light-emitting elements 33.
  • the third circuit element 23 is electrically connected to the third light emitting element 33 .
  • the third circuit element 23 and the third light-emitting element 33 are both arranged in the third area A3, that is, the circuit element 20 arranged in the third area A3 can only be electrically connected to the light-emitting element 30 in the third area A3.
  • the optical functional elements can be specifically disposed below the first area A1, and the first area A1 can correspond to the optical functional element area of the display device.
  • the third area A3 may be a regular display area for regular display (in this embodiment, this area is a necessary and unimportant area, and will not be described in detail here, and will be introduced in detail below).
  • the second area A2 may be a transition area provided between the first area A1 and the third area A3.
  • FIG. 9 is a partial cross-sectional view of a first region and a second region in a display panel according to an embodiment of the present application.
  • the first shielding layer 41 and the second shielding layer 42 both include a plurality of sub-shielding layers arranged in a stack.
  • the first shielding layer 41 and the second shielding layer 42 include The number of sub-occlusion layers is the same and the sub-occlusion layers included in both are set on the same layer.
  • the first shielding layer 41 includes a stacked sub-shielding layer 411 and a sub-shielding layer 412
  • the second shielding layer 42 includes a stacked sub-shielding layer 421 and a sub-shielding layer 422, wherein the sub-shielding layer 411
  • the sub-shielding layer 412 and the sub-shielding layer 422 are arranged on the same layer.
  • an insulating layer may be disposed between the sub-shielding layers included in the first shielding layer 41 shown in FIG. 9 , and an insulating layer may be disposed between the sub-shielding layers included in the second shielding layer 42 .
  • the multiple sub-shielding layers included in the first shielding layer 41 can be stacked and do not include insulating layers between each other, and the multiple sub-shielding layers included in the second shielding layer 42 can also be stacked and arranged without including each other. Insulation.
  • the first shielding layer 41 includes a sub-shielding layer of metal material and a sub-shielding layer with higher absorbance
  • the second shielding layer 42 includes a sub-shielding layer of metal material and a sub-shielding layer with higher absorbance.
  • the sub-shielding layer with higher absorbance can be a sub-shielding layer with an absorbance of more than 50%, preferably a sub-shielding layer with an absorbance of more than 65%.
  • the material of the sub-shielding layer 411 and the sub-shielding layer 421 is metal Mo
  • the material of the sub-shielding layer 412 and the sub-shielding layer 422 is both gray-black Si.
  • the sub-shielding layer made of metal materials can reflect laser light more effectively and avoid laser etching of other structures in the display panel.
  • the sub-shielding layer with higher absorbance can absorb part of the laser light directed to the sub-shielding layer made of metal material, reducing the interference of the laser light reflected by the sub-shielding layer made of metal material with the display light emitted by the light-emitting element 30; in addition, the higher absorbance
  • the sub-shielding layer can be set to cover the sub-shielding layer made of metal material and the area of the sub-shielding layer with higher absorbance is larger than the sub-shielding layer made of metal material, then the light emitted by the light-emitting element 30 towards the substrate 01 side can be absorbed by the sub-shielding layer. It is absorbed by the higher sub-shielding layer to prevent this part of the light from affecting the collection of external light signals by the optical functional elements below the first area A1.
  • FIG. 10 is a partial cross-sectional view of a first region and a second region in a display panel according to an embodiment of the present application.
  • the first shielding layer 41 located in the first area A1 includes n layers of laminated sub-shielding layers, and the second shielding layer 42 located in the second area A2 includes m layers.
  • the sub-occlusion layer of the cascading setting where n>m.
  • the first shielding layer 41 located in the first area A1 includes two laminated sub-shielding layers, namely the sub-shielding layer 411 and the sub-shielding layer 412;
  • the first shielding layer 41 in the first area A1 includes at least two sub-shielding layers.
  • the first shielding layer 41 can more effectively reduce the impact of the reflected laser light on the display light emitted by the light-emitting element 20, and can reduce the interference of the light-emitting element 20 on the optical signals required by the optical functional elements provided below the first area A1.
  • At least one sub-shielding layer in the first blocking layer 41 and at least one sub-shielding layer in the second blocking layer 42 are on the same layer and made of the same material. That is to say, at least one sub-shielding layer in the first shielding layer 41 and at least one sub-shielding layer in the second shielding layer 42 are prepared by the same process, so the number of times the mask is used during production can be reduced, thereby reducing process steps to reduce process costs.
  • the sub-shielding layers in the first blocking layer 41 and the second blocking layer 42 arranged on the same layer may all be sub-shielding layers of metal materials.
  • the sub-shielding layers in the first blocking layer 41 411 and the sub-shielding layer 421 in the second shielding layer 42 are both made of metal Mo.
  • the sub-shielding layer made of metal materials can reflect laser light more effectively and avoid laser etching of other structures in the display panel.
  • the first shielding layer 41 may also include at least one sub-shielding layer with higher absorbance.
  • the first shielding layer 41 may further include a sub-shielding layer 412 and the material of the sub-shielding layer 412 may be Si with a gray-black color. Therefore, as analyzed in the previous embodiment, the sub-shielding layer 412 can more effectively reduce the impact of the reflected laser light on the display light emitted by the light-emitting element 20, and can reduce the impact of the light-emitting element 20 on the first area A1. Interference from the optical signals required by the optical functional components set below.
  • FIG. 11 is another partial schematic diagram of the CC area in the dotted box in FIGS. 1 and 2 .
  • the light-emitting element 30 includes a cathode CE, an anode AE, and a light-emitting material layer EL located between the cathode CE and the anode AE.
  • the cathode CE The size of the electric field between the anode AE and the anode AE controls the brightness of the luminescent material layer EL.
  • the anode AE of each light-emitting element 30 can be electrically connected to different circuit elements 20
  • the cathodes CE of multiple light-emitting elements 30 can be electrically connected and are all located on the cathode layer CE0.
  • the cathode layer CE0 where the cathode CE of the light-emitting element 30 is located includes a first hollow part H1 .
  • the first hollow part H1 is provided in the first area A1 .
  • the light-emitting element 30 includes the cathode CE in the cathode layer CE0.
  • the first light-emitting element 31 also includes the cathode CE.
  • the first light-emitting element 31 and the first light-emitting element 31 also include the cathode CE.
  • One hollow part H1 does not overlap.
  • the first shielding layer 41 in the first area A1 overlaps the first light-emitting element 31 in the first area A1.
  • the first light-emitting element 31 does not overlap with the first hollow portion H1, that is, the first hollow portion H1 in the first area A1 does not overlap with the first shielding layer 41 in the first area, and the second shielding layer 42 in the second area A2 Overlapping with the second light emitting element 32 in the second area A2.
  • the transmittance of the first region A1 to external light can be increased.
  • the cathode CE is usually made of magnesium silver material.
  • the magnesium silver material has obvious light reflection effect and poor light transmission effect. Therefore, the cathode layer CE0 in the first area A1 is set to include the first hollow portion H1, which can The light transmission effect of the first area A1 is significantly improved and the light reflection effect of the first area A1 is reduced.
  • the light-emitting element 30 includes the cathode CE and the first shielding layer 41 overlaps the first light-emitting element 31, the shielding layer 40 in the first area A1 overlaps the light-emitting element 30 in the first area A1 and the first area
  • the first hollow portion H1 in A1 does not overlap with the shielding layer 40 in the first area.
  • the specific implementation of the first hollow portion H1 is to irradiate laser light from the back of the display panel 001 to the cathode layer CE0 in the first area A1, so that the cathode CE blocked by the first shielding layer 41 in the first area A1 will not be The laser is etched away, and the portion of the cathode layer CE0 in the first region A1 that is not blocked by the first shielding layer 41 will be etched away by the laser.
  • FIG. 12 is another partial schematic diagram of the CC area in the dotted box in FIGS. 1 and 2 .
  • the first shielding layer 41 in the first area A1 overlaps the first light-emitting element 31 in the first area A1
  • the second shielding layer in the second area A2 Layer 42 overlaps the circuit element 20 in the second area A2 and does not overlap the second light emitting element 32 in the second area A2.
  • the second shielding layer 42 in the second area A2 outside the first area A1 the second area can be protected during the laser etching process of the cathode layer CE0 in the first area A1.
  • the cathode layer CE0 in A2 prevents the cathode CE in the second light-emitting element 32 in the second area A2 from being etched away.
  • Figure 13 is another schematic cross-sectional view along the MM’ direction in Figure 3
  • Figure 14 is another schematic cross-sectional view along the NN’ direction in Figure 6.
  • the display panel 001 further includes a plurality of insulating layers 05 , and the insulating layers 05 are located on the side of the shielding layer 04 away from the substrate 01 , where part of the insulating layers 05 can be disposed between adjacent conductive film layers.
  • the insulating layer 05 may include a second hollow portion H2, and the second hollow portion H2 included in the insulating layer 05 is specifically disposed in the first region A1.
  • the insulating layer between adjacent conductive structures in the circuit element 20 includes a second hollow portion H2 in the first region A1. That is to say, at least part of the insulating layer 05 is in the second region. It extends in A2 and the third area A3 and is hollowed out in the first area A1.
  • the insulating layer 05 including the second hollow portion H2 can be regarded as a continuous structure on the entire surface except that via holes are provided in the second region A2 and the third region A3 to avoid electrical connection between different layers.
  • the cathode layer CE0 includes a first hollow portion H1 in the first region A1 and part of the insulating layer 05 includes a second hollow portion H2 in the first region A1.
  • the first hollow portion H1 and the second hollow portion H2 may at least partially overlap. That is, the first area A1 includes both the first hollow portion H1 and the second hollow portion H2.
  • the second hollow part H2 may cover the first hollow part H1.
  • the insulating layer 05 including the second hollow portion H2 may be completely hollowed out in the first area A1.
  • FIG. 15 is another partial schematic diagram of the CC area in the dotted box in FIGS. 1 and 2 .
  • the cathode layer CE0 when the cathode layer CE0 includes the first hollow portion H1 , the cathode layer CE0 may also include a third hollow portion H3 and the third hollow portion H3 included in the cathode layer CE0 is located in the second area A2 . In addition, the total area of the first hollow portion H1 included in the unit area is greater than the total area of the third hollow portion H3 included in the unit area.
  • the area of a single first hollow portion H1 is larger than the area of a single third hollow portion H3.
  • Figure 16 is another schematic cross-sectional view along the MM' direction in Figure 3
  • Figure 17 is another schematic cross-sectional view along the MM' direction in Figure 3.
  • the second shielding layer 42 includes a fourth hollow portion H4 and the fourth hollow portion H4 exposes at least part of the circuit elements 20 in the second area A2, that is, the fourth hollow portion H4.
  • the four hollow portions H4 expose at least part of the second circuit element 22 .
  • the coupling effect of the fourth hollow portion H4 on the second circuit element 22 can be reduced and the performance of the second circuit element 22 can be ensured.
  • the fourth hollow portion H4 penetrates all the sub-shielding layers in the second shielding layer 42 .
  • the third hollow portion H3 and the fourth hollow portion H4 may at least partially overlap.
  • the fourth hollow portion H4 penetrates some of the sub-shielding layers.
  • the second shielding layer 42 includes a sub-shielding layer 421 and a sub-shielding layer 422, and the sub-shielding layer 421 is a sub-shielding layer made of a metal material for reflecting laser light, and the sub-shielding layer 422 has a higher absorbance.
  • the sub-obscuring layer is made of materials.
  • the fourth hollow portion H4 can penetrate the sub-shielding layer 422 but not the sub-shielding layer 421. Then the second shielding layer 42 can protect the film layer in the second area A2 from the influence of the laser to a greater extent, while reducing the impact of the laser.
  • FIG. 18 is another partial schematic diagram of the CC area in the dotted box in FIGS. 1 and 2 .
  • the second area A2 includes a first sub-area A21 and a second sub-area A22, and the first sub-area A21 is located in the second sub-area A22. Close to one side of the first area A1, the second shielding layer 42 is disposed in the first sub-area A21.
  • the first sub-region A21 and the second sub-region A22 are different regions in the second region A2, and the first sub-region A21 and the first region A1 are arranged adjacent to each other.
  • the shielding layer 04 is included and the second shielding layer 42 is provided in the first sub-region A21.
  • the second shielding layer 42 affects the circuit elements 20 in the second area A2
  • the performance of the circuit elements 20 overlapping the second shielding layer 42 is different from that of other circuit elements 20.
  • the circuit elements 20 in the first sub-region A21 and the second sub-region A22 can be arranged in different ways to reduce the performance difference between the circuit elements 20 and the other circuit elements 20. The influence of the second shielding layer 42 in the second area A2 on the circuit components 20 in the second area A2.
  • the circuit elements 20 in the first sub-region A21 and the second sub-region A22 can be mainly designed to be differentiated. Therefore, the second shielding layer 42 provided only in the first sub-region A21 can be the entire Surface continuous structure.
  • the cathode layer CE0 in the first sub-region A21 may also have a continuous structure over the entire surface, and the cathode layer CE0 in the first region A1 may still include the first hollow portion H1.
  • the circuit elements 20 provided in the second area A2 are located in the second sub-area A22, that is, the first circuit elements located in the second area A2 21 and the second circuit element 22 are specifically disposed in the second sub-region A22 and are not disposed in the first sub-region A21. Therefore, in this technical solution, neither the first circuit element 21 nor the second circuit element 22 located in the second area A2 overlaps with the second shielding layer 42.
  • the second shielding layer 42 When at least part of the second shielding layer 42 is made of metal material, During preparation, the second shielding layer 42 does not generate coupling capacitance with the first circuit element 21 and the second circuit element 22 , so the second shielding layer 42 has minimal influence on the first circuit element 21 and the second circuit element 22 .
  • the display panel 001 also includes a dummy circuit element 20'.
  • the dummy circuit element 20' can also be located in the array layer 02, and the circuit structure of the dummy circuit element 20' can be the same as that of the first circuit element 21, At least one of the second circuit elements 22 is identical.
  • the dummy circuit element 20' is disposed in the first sub-region A21 and is electrically insulated from the light-emitting element 30. That is, the dummy circuit element 20' is not used to provide voltage or current to the light-emitting element 30, and the output end of the dummy circuit element 20' can be in a floating state. In addition, the dummy circuit element 20' may always remain inactive.
  • the dummy circuit element 20' is disposed in the first sub-region A21 and overlaps the second shielding layer 42 in the first sub-region A21.
  • the second shielding layer 42 may cover the dummy circuit element 20'.
  • the circuit element 20 can be arranged away from the second shielding layer 42 to prevent the working performance of the circuit element 20 from being affected by the second shielding layer 42; at the same time, a dummy circuit element 20' is arranged below the second shielding layer 42.
  • the thickness of the array layer 02 can be made relatively uniform in the second area A2, ensuring the yield of signal lines, etc., while avoiding differences in display effects caused by thickness differences.
  • circuit elements 20 are provided in both the first sub-region A21 and the second sub-region A22, that is, at least part of the first circuit elements 21 and/or At least a portion of the second circuit element 22 overlaps the second shielding layer 42 .
  • the circuit element 20 may include elements constituting a pixel circuit, such as thin film transistors (ie, TFTs), wiring, capacitors, etc.
  • the circuit element 20 is a thin film transistor (ie, TFT), and the thin film transistor is connected to a light-emitting element 30 such as a light-emitting diode (LED), so that the driving current flows to the light-emitting element 30, so that the light-emitting element 30 can be driven according to Electricity glows.
  • TFT thin film transistor
  • LED light-emitting diode
  • the second shielding layer 42 affects the circuit elements 20 in the second area A2
  • the performance of the circuit elements 20 overlapping the second shielding layer 42 is different from that of other circuit elements 20.
  • the grooves of the circuit elements 20 in the first sub-region A21 and the second sub-region A22 can be The track width to length ratio is set to be different.
  • the channel width-to-length ratio of the circuit element 20 in the first sub-region A21 may be greater than the channel width-to-length ratio of the circuit element 20 in the second sub-region A22.
  • the degree of external interference of the circuit element 20 overlapping with the second shielding layer 42 can be reduced.
  • the coupling effect of the stacked circuit elements 20 by the second shielding layer 42 is no longer apparent.
  • the following description takes the channel width-to-length ratio of the first circuit element 21 disposed in the second area A2 as an example. It should be noted that the channel width-to-length ratio of the second circuit element 22 disposed in the second area A2 may also adopt the following inventive concept.
  • FIG. 19 is a schematic diagram of the channel width-to-length ratio of circuit elements in different sub-regions in the second region.
  • the semiconductor layer in the circuit element 20 includes a source region SR, a drain region DR, and a channel region CR.
  • the channel region CR is located in the source region. Between SR and drain region DR. And the length of the channel region CR of the circuit element 20 located in the first sub-region A21 is smaller than the length of the channel region CR of the circuit element 20 located in the second sub-region A22.
  • FIG. 20 is a schematic diagram of the channel width-to-length ratio of circuit elements in different sub-regions in the second region.
  • the semiconductor layer in the circuit element 20 includes a source region SR, a drain region DR, and a channel region CR.
  • the channel region is located in the source region SR. and the drain region DR.
  • the width of the channel region CR of the circuit element 20 located in the first sub-region A21 is greater than the width of the channel region CR of the circuit element 20 located in the second sub-region A22.
  • FIG. 21 is a schematic diagram of the channel width-to-length ratio of circuit elements in different sub-regions in the second region.
  • the semiconductor layer in the circuit element 20 includes a source region SR, a drain region DR, and a channel region CR.
  • the channel region is located in the source region SR. and the drain region DR.
  • the length of the channel region CR of the circuit element 20 located in the first sub-region A21 is smaller than the length of the channel region CR of the circuit element 20 located in the second sub-region A22, and the channel of the circuit element 20 located in the first sub-region A21
  • the width of the region CR is greater than the width of the channel region CR of the circuit element 20 located in the second sub-region A22.
  • the length of the channel region CR of the circuit element 20 in the first sub-region A21 is smaller than the length of the channel region CR of the circuit element 20 located in the second sub-region A22; additionally or separately, the length of the channel region CR located in the first sub-region A22
  • the width of the channel region CR of the circuit element 20 of A21 is greater than the width of the channel region CR of the circuit element 20 located in the second sub-region A22. That is, the width-to-length ratio of the channel region CR of the circuit element 20 in the first sub-region A21 is greater than the width-to-length ratio of the channel region CR of the circuit element 20 located in the second sub-region A22. Therefore, the circuit flowing through the first sub-region A21 The amplitude of the driving current of the element 20 is greater than the amplitude of the driving current flowing through the circuit element 20 located in the second sub-region A22.
  • the circuit element 20 is a thin film transistor, which is connected to the light-emitting element 30 so that the driving current flows to the light-emitting element 30 so that the light-emitting element 30 can emit light according to the driving current. Therefore, when the circuit element flows through the first sub-region A21 When the amplitude of the driving current 20 is greater than the amplitude of the driving current flowing through the circuit element 20 located in the second sub-region A22, the display brightness of the second sub-region A22 can be greater than the display brightness of the first sub-region A21, so that the display brightness of the second sub-region A22 is greater than that of the first sub-region A21.
  • the first area A1 to the third area A3 show uniform brightness transition.
  • FIG. 22 is a schematic projection view of a second shielding layer provided by an embodiment of the present application
  • FIG. 23 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • the edge of the second shielding layer 42 close to the first area A1 extends along the edge contour of the first area A1, that is, the second shielding layer 42 is close to the first area A1.
  • the edge of the area A1 extends around the edge contour of the first area A1. It can be understood that the shape of the edge of the second shielding layer 42 close to the first area A1 and the shape of the edge outline of the first area A1 are similar shapes or the same shape. That is to say, the shape of the edge of the second shielding layer 42 close to the first area A1
  • the shape of the edge may be defined according to the shape of the edge profile of the first area A1.
  • the second shielding layer 42 is the area represented by the dotted graphics in the figure, and the first area A1 and the second area A2 are divided by lines with thicker line width in the figure as areas. That is, the area defined by the inner line with thicker line width is represented as the first area A1, and the area between the inner line with thicker line width and the outer line with thicker line width is represented as the second area A2.
  • the division of the second shielding layer 42 and the first area A1 and the second area A2 in the drawings corresponding to the embodiment below ie, FIG. 24 to FIG. 33 ) also follows this principle.
  • the edge of the second shielding layer 42 close to the first area A1 may coincide with the edge outline of the first area A1 , or the edge of the second shielding layer 42 close to the first area A1 is located in the first area A1 . Outside area A1. Then, while not affecting the light transmittance of the first region A1, the second blocking layer 42 can effectively block unnecessary etching of the film layer in the second region A2 by the laser.
  • edge of the second shielding layer 42 close to the first area A1 may include fine jagged edges, and the shape of the edge of the second shielding layer 42 close to the first area A1 may be a smoother shape that ignores jagged edges.
  • the edge of the second shielding layer 42 close to the first area A1 includes a plurality of fine saw teeth, which can reduce the diffraction at the edge of the first area A1 and the edge of the second area A2 close to the first area A1.
  • the edge contour of the first area A1 is one of a circle and an ellipse.
  • the shape of the edge of the second shielding layer 42 close to the first area A1 is a circle. , one of the oval shapes.
  • the edge outline of the first area A1 and the edge of the second shielding layer 42 close to the first area A1 are both circular, or the edge outline of the first area A1 and the second shielding layer 42 are close to the first area A1 .
  • the edges of an area A1 are all elliptical.
  • the shape of the edge of the second shielding layer 42 away from the first area A1 is set to be similar to the shape of the edge contour of the first area A1.
  • the shape of the edge of the second shielding layer 42 away from the first area A1 The shape of the edge may be defined according to the shape of the edge profile of the first area A1. Then it can be achieved that the width of the second shielding layer 42 at each position is the same. Then, the number of circuit elements 20 blocked by the second shielding layer 42 in different circuit element rows is basically the same, and the number of circuit elements 20 blocked by the second shielding layer 42 in different circuit element columns is also basically the same, which makes it easy to realize the control of different circuit elements. 20 compensation.
  • FIG. 24 is a schematic projection view of a second shielding layer provided by an embodiment of the present application
  • FIG. 25 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • the projection of the second shielding layer 42 covers part of the second area A2, that is, it is disposed in part of the second area A2.
  • the second shielding layer 42 is not provided in some locations.
  • the position where the second shielding layer 42 is provided is closer to the first area A1 than the position where the second shielding layer 42 is not provided.
  • the projection of the second shielding layer 42 completely covers the second area A2, that is, the second shielding layer 42 is provided at all positions in the second area A2.
  • the edge profile of the second shielding layer 42 away from the first area A1 is the same as the edge profile of the second area A2 away from the first area A1. It can be understood that the shape of the edge of the second shielding layer 42 away from the first area A1 and the shape of the edge outline of the second area A2 away from the first area A1 are similar shapes or the same shape, that is, the second shielding layer 42 is far away from the first area.
  • the shape of the edge of A1 may be defined according to the shape of the edge profile of the second area A2 away from the first area A1.
  • the display panel 001 when the display panel 001 includes a first area A1 and a second area A2, and the circuit element 20 electrically connected to the light-emitting element 30 in the first area A1 is disposed in the second area A2, the second area will be affected. Circuit element 20 in A2 performs compensation.
  • the edge shape of the second shielding layer 42 away from the first area A1 is similar or the same as the edge shape of the second area A2 away from the first area A1, it is easy to detect the circuit elements 20 in the second area A2. Make compensation.
  • Figure 26 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 27 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • Figure 28 is a schematic projection view of a second shielding layer provided by an embodiment of the present application. Schematic projection view of the second shielding layer.
  • Figure 29 is a schematic projection view of the second shielding layer provided by an embodiment of the present application.
  • the edge shape of the second area A2 away from the first area A1 is one of a circle, an ellipse, and a rectangle.
  • the second shielding layer 42 is away from the first area A1
  • the shape of the edge is one of circular, oval, or rectangular.
  • the edge of the second shielding layer 42 away from the first area A1 and the edge of the second area A2 away from the first area A1 are both circular; or, as shown in FIG. 23 , FIG. 25 and FIG.
  • the edge of the second shielding layer 42 away from the first area A1 and the edge of the second area A2 away from the first area A1 are both elliptical; or, as shown in FIGS. 28 and 29 , the second shielding layer 42 has an elliptical shape.
  • the edge of the layer 42 away from the first area A1 and the edge of the second area A2 away from the first area A1 are both rectangular, specifically square.
  • FIG. 30 is a schematic projection view of a second shielding layer provided by an embodiment of the present application
  • FIG. 31 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • the edge shape of the second shielding layer 42 away from the first area A1 is a rectangle, and the edge outline of the first area A1 is a circle or an ellipse.
  • At least one side of the second shielding layer 42 away from the edge of the first area A1 is tangent to the edge outline of the first area A1.
  • a linear laser can be used to etch part of the film layer in the first area A1, and the outer outline of the second shielding layer 42 can surround the moving path of the linear laser, effectively avoiding The laser performs unnecessary etching on the film layer in the second area A2.
  • at least one side of the second shielding layer 42 away from the edge of the first area A1 is tangent to the edge contour of the first area A1. As long as the laser does not exceed this side, the film layer in the second area A2 will not be processed. unnecessary etching; at the same time, the second shielding layer 42 can be made to have a smaller width in the direction perpendicular to the edge, thereby reducing the influence of the second shielding layer 42 on the circuit elements 20 in the second area A2.
  • any edge of the second shielding layer 42 away from the edge of the first area A1 is tangent to the edge outline of the first area A1. Then, in the process of using the linear laser to etch part of the film layer in the first area A1, while ensuring that the laser does not unnecessarily etch the film layer in the second area A2, the second area can also be made.
  • the shielding layer 42 has the smallest area, minimizing the influence of the second shielding layer 42 on the circuit components 20 in the second area A2.
  • FIG. 32 is a schematic projection view of a second shielding layer provided by an embodiment of the present application
  • FIG. 33 is a schematic projection view of a second shielding layer provided by an embodiment of the present application.
  • part of the second shielding layer 42 extends to the periphery of the second area A2, that is, the second shielding layer 42 not only includes the part located in the second area A2, but also Including the part located in the third area A3.
  • the second shielding layer 42 can also prevent unnecessary etching of the film layer in part of the third region A3 close to the second region A2.
  • Figure 34 is a schematic diagram of a display device provided by an embodiment of the present application.
  • an embodiment of the present application also provides a display device.
  • the display device provided by the embodiment of the present application may include the display panel 001 provided in any of the above embodiments.
  • the display device provided by the embodiment of the present application may be a mobile phone.
  • the display device provided by the embodiment of the present application may also be a display device such as a computer or a television.
  • the display device provided by the embodiment of the present application also includes an optical functional element 002, and the optical functional element 002 is disposed at a position of the display device corresponding to the first area A1 of the display panel 001. That is, along the direction perpendicular to the plane where the display panel 001 is located, the optical functional element 002 is disposed below the first area A1 of the display panel 001 . Then the optical functional element 002 can emit light to the light-emitting surface side of the display panel 001 through the first area A1, and/or can receive light from the light-emitting surface side of the display panel 001 through the first area A1.
  • the optical functional element 002 is at least one of an optical fingerprint sensor, an iris recognition sensor, a camera, etc.
  • the light transmittance in the first area A1 is greater than the light transmittance in the second area A2, then at least part of the film layer in the first area A1 is etched away by laser to increase the light transmittance in the first area A1. Transmittance.
  • the first shielding layer 41 overlapping the light-emitting element 20 in the first region A1, the film layer in the light-emitting element 20 can be protected from being laser etched.
  • the second shielding layer 42 in the second region A2 The film layer in the second area A2 can be protected from being engraved by mistake.
  • An embodiment of the present application also provides a method for manufacturing a display panel, which is used to prepare the display panel 001 provided in any of the above embodiments.
  • FIG. 35 is a schematic diagram of a method for manufacturing a display panel according to an embodiment of the present application.
  • the preparation method provided by the embodiment of the present application includes:
  • the initial display panel 001' includes an initial cathode layer CE0', and the initial cathode layer CE0' can be a continuous structure over the entire surface.
  • the patterned first shielding layer 41 in the first region A1 partially overlaps with the initial cathode layer CE0'. Specifically, the first shielding layer 41 in the first region A1 surrounds the plurality of first hollow portions H1, and The first hollow portion H1 overlaps the portion of the initial cathode layer CE0' that needs to be etched away by the laser.
  • the linear laser 003 is used to etch the initial cathode layer CE0' in the first area A1.
  • the portion of the initial cathode layer CE0' that overlaps with the first shielding layer 41 remains and the portion that does not overlap with the first shielding layer 41 is Etch away.
  • the first shielding layer 41 will reflect the laser so that the laser does not reach the portion of the initial cathode layer CE0' that overlaps the first shielding layer 41, and the laser
  • the initial cathode layer CE0' can be reached through the first hollow portion H1, and the portion of the initial cathode layer CE0' overlapping the first hollow portion H1 will be etched away by the laser.
  • the edge of the second shielding layer 42 in the second area A2 away from the first area A1 surrounds the path of the linear laser when etching the initial cathode layer CE0' in the first area A1.
  • the path along which the linear laser 003 moves in the left-right direction does not exceed the left-right edge of the second shielding layer 42 .
  • the linear laser 003 mainly etches the initial cathode layer CE0' in the first area A1. Since the first area A1 is usually circular or elliptical, when the linear laser 001 is etching the initial cathode layer CE0' in the first area A1, the path of the linear laser 001 is usually rectangular, that is to say, The path of linear laser 001 will definitely exceed the scope of the first area A1. In the embodiment of the present application, the external path of the second shielding layer 42 in the second area A2 is set to be larger than the movement path of the linear laser 001, so that the linear laser 001 can avoid unnecessary etching of the film layer in the second area A2. .
  • Figure 36 is a schematic diagram of the relationship between a linear laser and a second shielding layer in a display panel provided by an embodiment of the present application.
  • the shape of the second shielding layer 42 in the second area A2 away from the edge of the first area A1 is a rectangle
  • the linear laser 003 has The etching path of the cathode layer CE0' coincides with the area where the rectangle is located. Then the shape and size of the second shielding layer 42 are consistent with the shape and shape formed by the motion path of the linear laser 003, which can ensure that the second shielding layer 42 protects the film layer in the second area A2 from unnecessary etching. In addition to etching, the second shielding layer 42 also has a smaller area.
  • the path of the linear laser 003 when etching the initial cathode layer CE0' in the first area A1 coincides with the area where the rectangle is located. This means that within the range of process accuracy, the linear laser 003 etches the initial cathode layer CE0' in the first area A1.
  • the etching path of the initial cathode layer CE0' basically coincides with the area where the rectangle is located.
  • FIG. 37 is a schematic diagram of the relationship between a linear laser and a second shielding layer in a display panel according to an embodiment of the present application.
  • the shape of the edge of the second shielding layer 42 in the second area A2 away from the first area A1 is one of a circle or an ellipse, and the shape is along a direction perpendicular to The direction of the display panel 001, circular or elliptical, surrounds the path of the linear laser 003 when etching the initial cathode layer CE0' in the first area A1.

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Abstract

本申请实施例提供一种显示面板及其制备方法、显示装置，显示面板的第二区域与第一区域彼此相邻且第二区域的透光率小于所述第一区域的透光率；显示面板的阵列层位于衬底的一侧且包括多个电路元件，多个发光元件，位于阵列层远离衬底的一侧，遮挡层位于发光元件朝向衬底的一侧且包括第一遮挡层和第二遮挡层；第一遮挡层与第一区域的发光元件交叠，第二遮挡层与第二区域的电路元件和/或发光元件交叠。通过在第一区域内设置与发光元件交叠的第一遮挡层，可以保护发光元件中的膜层被激光刻蚀掉，通过在第二区域内设置第二遮挡层，可以保护第二区域内的膜层不会被误刻。

Description

一种显示面板及其制备方法、显示装置
本申请要求于2022年06月30日提交中国专利局、申请号为202210769592.8、申请名称为“一种显示面板及其制备方法、显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，其特别涉及一种显示面板及其制备方法、显示装置。
背景技术
随着显示技术的不断发展，全面屏成为主流的显示屏设计，全面屏是具有超高屏占比的显示屏。为了使得显示屏具有更高的屏占比，CUP(camera under panel)技术正被越来越多的厂商所关注。CUP技术是将摄像头等光学器件设置在显示屏的显示区域的背面，则设置该些摄像头、光学传感器的区域可以称为CUP区。可见，CUP区既可以进行画面显示，又可以透射摄像头需要的光线。但是，如何有效实现CUP区的高透光率是亟待解决的问题。
发明内容
有鉴于此，本申请实施例提供了一种显示面板及其制备方法、显示装置。
第一方面，本申请实施例提供一种显示面板，所述显示面板的显示区包括第一区域和第二区域，所述第二区域与所述第一区域彼此相邻且所述第二区域的透光率小于所述第一区域的透光率；
所述显示面板还包括：
衬底；
阵列层，所述阵列层位于所述衬底的一侧，所述阵列层包括多个电路元件；
多个发光元件，位于所述阵列层远离所述衬底的一侧；
遮挡层，位于所述发光元件朝向所述衬底的一侧，包括第一遮挡层和第二遮挡层；
其中，所述第一遮挡层与所述第一区域的所述发光元件交叠；
所述第二遮挡层与所述第二区域的所述电路元件和/或所述发光元件交叠。
第二方面，本申请提供一种显示装置，包括如第一方面提供的显示面板。
第三方面，本申请实施例提供一种显示面板的制备方法，用于制备第一方面提供的显示面板。
在本申请实施例中，显示面板及显示装置的第一区域内的透光率大于第二区域内的透光率，则第一区域的至少部分膜层被激光刻蚀掉以增加第一区域内的透光率。为了增加激光对第一区域中膜层的刻蚀速率，可以采用线性激光对第一区域中的膜层进行激光刻蚀，若第一区域的形状为非矩形结构，则线性激光的刻蚀路径必然会超出第一区域。本申请通过在第一区域内设置与发光元件交叠的第一遮挡层，可以保护发光元件中的膜层被激光刻蚀掉，通过在第二区域内设置第二遮挡层，可以保护第二区域内的膜层不会被误刻。
附图说明
为了更清楚地说明本申请实施例的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1为本申请实施例提供的一种显示面板的示意图；
图2为本申请实施例提供的一种显示面板的示意图；
图3为图1及图2中虚线框中CC区域的一种局部示意图；
图4为图3中沿MM’方向的一种剖面示意图；
图5为图3中沿NN’方向的一种剖面示意图；
图6为图1及图2中虚线框中CC区域的一种局部示意图；
图7为图6中沿MM’方向的一种剖面示意图；
图8为图6中沿NN’方向的一种剖面示意图；
图9为本申请实施例提供的一种显示面板中第一区域与第二区域的局部剖面示意图；
图10为本申请实施例提供的一种显示面板中第一区域与第二区域的局部剖面示意图；
图11为图1及图2中虚线框中CC区域的另一种局部示意图；
图12为图1及图2中虚线框中CC区域的另一种局部示意图；
图13为图3中沿MM’方向的另一种剖面示意图；
图14为图6中沿NN’方向的另一种剖面示意图；
图15为图1及图2中虚线框中CC区域的又一种局部示意图；
图16为图3中沿MM’方向的又一种剖面示意图；
图17为图3中沿MM’方向的又一种剖面示意图；
图18为图1及图2中虚线框中CC区域的再一种局部示意图；
图19为第二区域中不同子区域内的电路元件的沟道宽长比示意图；
图20为第二区域中不同子区域内的电路元件的沟道宽长比示意图；
图21为第二区域中不同子区域内的电路元件的沟道宽长比示意图；
图22为本申请实施例提供的一种第二遮挡层的投影示意图；
图23为本申请实施例提供的一种第二遮挡层的投影示意图；
图24为本申请实施例提供的一种第二遮挡层的投影示意图；
图25为本申请实施例提供的一种第二遮挡层的投影示意图；
图26为本申请实施例提供的一种第二遮挡层的投影示意图；
图27为本申请实施例提供的一种第二遮挡层的投影示意图；
图28为本申请实施例提供的一种第二遮挡层的投影示意图；
图29为本申请实施例提供的一种第二遮挡层的投影示意图；
图30为本申请实施例提供的一种第二遮挡层的投影示意图；
图31为本申请实施例提供的一种第二遮挡层的投影示意图；
图32为本申请实施例提供的一种第二遮挡层的投影示意图；
图33为本申请实施例提供的一种第二遮挡层的投影示意图；
图34为本申请实施例提供的一种显示装置的示意图；
图35为本申请实施例提供的一种显示面板的制备方法示意图；
图36为本申请实施例提供的一种显示面板中线性激光与第二遮挡层的关系示意图；
图37为本申请实施例提供的一种显示面板中线性激光与第二遮挡层的关系示意图。
具体实施方式
为了更好的理解本申请的技术方案，下面结合附图对本申请实施例进行详细描述。
应当明确，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本申请保护的范围。
在本申请实施例中使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本申请。在本申请实施例和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。
应当理解，本文中使用的术语“和/或”仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
本说明书的描述中，需要理解的是，本申请权利要求及实施例所描述的“基本上”、“近似”、“大约”、“约”、“大致”“大体上”等词语，是指在合理的工艺操作范围内或者公差范围内，可以大体上认同的，而不是一个精确值。
应当理解，尽管在本申请实施例中可能采用术语第一、第二、第三等来描述区域等，但这些区域等不应限于这些术语。这些术语仅用来将区域等彼此区分开。例如，在不脱离本申请实施例范围的情况下，第一区域也可以被称为第二区域，类似地，第二区域也可以被称为第一区域。
本案申请人通过细致深入研究，对于现有技术中所存在的问题，而提供了一种解决方案。
图1为本申请实施例提供的一种显示面板的示意图，图2为本申请实施例提供的一种显示面板的示意图。
本申请实施例提供一种显示面板，如图1及图2所示，显示面板001划分为显示区AA和非显示区NA，非显示区NA围绕显示区AA，显示区AA为进行发光显示的主要区域，非显示区NA主要用于设置封装结构、外围电路、外围信号线等。
其中，显示区AA包括第一区域A1和第二区域A2，第二区域A2与第一区域A1可以彼此相邻且第二区域A2的透光率小于第一区域A1的透光率。第一区域A1与第二区域A2为显示区AA中的不同区域且第一区域A1相对于第二区域A2对外界光的透过率更高。此外，第二区域A2可以至少部分包围第一区域A1。
第一区域A1对外界光具有更高的透过率，则第一区域A1所在区域可以用于设置光学功能元件，例如，第一区域A1的下方可以设置摄像头、指纹识别结构等集成有光传感器的器件。则第一区域A1除能够实现发光显示这一功能外，还可以实现光学信号传输的功能，例如拍照、生物特征识别等功能中的至少一者。
如图1所示，第二区域A2可以完全围绕第一区域A1；如图2所示，第二区域A2也可以部分围绕第一区域A1。当然，第一区域 A1可以为圆形、椭圆形、矩形等任意形状中的一种。
图3为图1及图2中虚线框中CC区域的一种局部示意图，可以理解地，虚线框区域仅为清楚展示局部第二区域A2所限定的CC区域，并不代表本申请实际区域，图4为图3中沿MM’方向的一种剖面示意图，图5为图3中沿NN’方向的一种剖面示意图。
结合图3与图4、图5，显示面板001还包括衬底01、阵列层02、发光元件层03，阵列层02位于衬底01的一侧且阵列层02包括多个电路元件20，发光元件层03位于阵列层02远离衬底01的一侧且包括多个发光元件30。
其中，发光元件30为显示面板001中进行发光的主要结构，具体可以为有机发光二极管。电路元件20具体可以为晶体管且多个元件20可以构成与发光元件30电连接且为其提供发光所需的电压和电流的像素电路，例如，当发光元件30为有机发光二极管时，多个电路元件20可以构成为有机发光二极管提供发光所需的电流的像素电路。以下，以像素电路中与发光元件30电连接的电路元件20对本申请的发明构思进行阐述，可以理解地，本申请对发光元件30的设计构思也适用于像素电路中其他功能的电路元件。
此外，显示面板还包括遮挡层04，遮挡层04位于发光元件层03朝向衬底01的一侧。遮挡层04与部分发光元件30交叠，用于保护发光元件30免受由显示面板001的背面照射过来的刻蚀激光的影响，进而保证发光元件30的完整性及其发光性能。
在本申请实施例中，遮挡层04包括第一遮挡层41和第二遮挡层42，且第一遮挡层41与第一区域A1内的发光元件30交叠，第二遮挡层42与第二区域A2内的电路元件20和/或发光元件30交叠。也就是说，遮挡层04包括位于第一区域A1内的第一遮挡层41和位于第二区域A2内的第二遮挡层42，且沿垂直于显示面板001的方向Z，第一区域A1内的第一遮挡层41与第一区域A1内的发光元件30交叠，第二区域A2内的第二遮挡层42与第二区域A2内的发光元件30交叠。
如图3-图5所示，设置在发光元件层03的多个发光元件30中包括第一发光元件31和第二发光元件32，第一发光元件31为设置在第一区域A1内的发光元件30、第二发光元件32为设置在第二区域A2内的发光元件30。
例如，如图3-图5所示，第一区域A1内的第一遮挡层41与第一区域A1内的第一发光元件31交叠，且第二区域A2内的第二遮挡层42与第二区域A2内的第二发光元件32交叠。同时，第二区域A2内的第二遮挡层42还可以与第二区域A2内的电路元件20交叠。
图6为图1及图2中虚线框中CC区域的一种局部示意图，图7为图6中沿MM’方向的一种剖面示意图，图8为图6中沿NN’方向的一种剖面示意图。
例如，如图6-图8所示，第一区域A1内的第一遮挡层41与第一区域A1内的第一发光元件31交叠，且第二区域A2内的第二遮挡层42与第二区域A2内的电路元件20交叠且不与第二区域A2内的第二发光元件32交叠。
发明人经研究发现，为了实现第一区域A1具有较高的透光率，通常会将第一区域A1中的黑矩阵做开口设计，则第一区域A1的黑矩阵仅保留围绕色阻的部分。第一区域A1中黑矩阵的开口设计暴露了更大面积的阴极层CE0，由于阴极层CE0采用镁银材料，则第一区域A1的反射率增加，并且镁银材料会对需要进入摄像头等光学功能元件的光线有一定的遮挡，因此需要采用激光刻蚀工艺对黑矩阵的开口所暴露的阴极层CE0进行图案化。
同时，发明人发现，在采用激光对阴极层CE0进行刻蚀时会对第一区域A1外围的阴极层CE0造成误刻。分析发现，产生该问题的主要原因为，当采用点状激光时，由于激光的光斑20微米-30微米，激光到达第一区域A1边缘时会对第二区域A2中的膜层进行过刻；当采用线性激光对第一区域A1中的膜层进行激光刻蚀，若第一区域A1的形状为非矩形结构，则线性激光的刻蚀路径必然会超出第一区域A1，对第二区域A2中的膜层进行过刻。
在本申请实施例中，第一区域A1内的透光率大于第二区域A2内的透光率，则第一区域A1的至少部分膜层被激光刻蚀掉以增加第一区域A1内的透光率。其中，利用激光刻蚀掉第一区域A1内的部分膜层的具体方式为，激光源由显示面板001的背光面向需要被部分刻蚀掉的膜层发射激光，即激光由衬底01背离发光元件层03的一侧向需要被部分刻蚀掉的膜层发射激光。因此，通过在第一区域A1内设置与发光元件20交叠的第一遮挡层41，可以保护发光元件20中的膜层被激光刻蚀掉，通过在第二区域A2内设置第二遮挡层42，可以保护第二区域A2内的膜层不会被误刻。
在本申请实施例中，第一遮挡层41可以覆盖第一发光元件31，且第二遮挡层42可以覆盖第二发光元件32。
在本申请的一个实施例中，如图3-图8所示，阵列层02内设置的多个电路元件20中包括第一电路元件21，第一电路元件21与第一发光元件31电连接，其中，第一发光元件31设置在第一区域A1且第一电路元件21设置在第二区域A2。也就是说，第一区域A1内不设置与第一区域A1内的第一发光元件31电连接的第一电路元件21，而是将第一电路元件21设置在第一区域A1外围的第二区域A2，因此，可以增加第一区域A1对外界光的透过率。
如图3及图4、图6及图7所示，设置在第一区域A1的第一发光元件31与设置在第二区域A2的第二发光元件32通过连接电极CL电连接，连接电极CL可以采用透明导电电极制备。
在本实施例的一种实现方式中，阵列层02内设置的多个电路元件20中包括第二电路元件22，第二电路元件22与第二发光元件32电连接，其中，第二电路元件22与第二发光元件32均设置在第二区域A2内。也就是说，第二区域A2内不仅设置与第二区域A2内的第二发光元件32电连接的第二电路元件22，还设置与第一区域A1内的第一发光元件31电连接的第一电路元件21。
此外，如图1、图2、图3及图6所示，显示面板001还包括第 三区域A 3，第二区域A2位于第一区域A1与第三区域A3之间。
可选的，阵列层02内设置的多个电路元件20中包括第三电路元件23，且发光元件层03内设置的多个发光元件30中包括多个第三发光元件33，第三电路元件23与第三发光元件33电连接。其中，第三电路元件23及第三发光元件33均设置在第三区域A3，即第三区域A3内所设置的电路元件20可以仅与第三区域A3内的发光元件30电连接。
在本实施例中，若在显示面板001的下方设置光学功能元件，则光学功能元件可以具体设置在第一区域A1的下方，则第一区域A1可以对应显示装置的光学功能元件区。第三区域A3可以为进行常规显示的常规显示区(本实施例中此区域为必要不重要区域，在此不做赘述，下文会进行详细介绍)。第二区域A2可以为设置在第一区域A1与第三区域A3之间的过渡区。
图9为本申请实施例提供的一种显示面板中第一区域与第二区域的局部剖面示意图。
在本申请的一个实施例中，如图9所示，第一遮挡层41与第二遮挡层42均包括层叠设置的多个子遮挡层，第一遮挡层41与第二遮挡层42所包括的子遮挡层的数量相同且两者所包括的子遮挡层分别同层设置。例如，如图9所示，第一遮挡层41包括层叠设置的子遮挡层411和子遮挡层412，第二遮挡层42包括层叠设置的子遮挡层421和子遮挡层422，其中，子遮挡层411与子遮挡层421同层设置且子遮挡层412与子遮挡层422同层设置。
需要说明的是，图9所示的第一遮挡层41所包括的子遮挡层之间可以设置绝缘层，且第二遮挡层42所包括的子遮挡层之间可以设置绝缘层。实际产品中，第一遮挡层41所包括的多个子遮挡层可以层叠设置且相互之间不包括绝缘层，第二遮挡层42所包括的多个子遮挡层也可以层叠设置且相互之间不包括绝缘层。
此外，第一遮挡层41包括金属材料的子遮挡层和吸光度较高的子遮挡层且第二遮挡层42包括金属材料的子遮挡层和吸光度较高 的子遮挡层。其中，吸光度较高的子遮挡层可以为吸光度在50％以上的子遮挡层，优选为吸光度在65％以上的子遮挡层。
例如，如图9所示，子遮挡层411与子遮挡层421的材料均为金属Mo，子遮挡层412与子遮挡层422的材料均为灰黑色的Si。金属材料制备的子遮挡层可以较为有效地反射激光，避免激光对显示面板内其他结构的刻蚀。吸光度较高的子遮挡层可以吸收一部分射向金属材料制备的子遮挡层的激光，减少激光被金属材料制备的子遮挡层反射后干扰发光元件30所发射的显示用光线；此外，吸光度较高的子遮挡层可以设置为覆盖金属材料制备的子遮挡层且吸光度较高的子遮挡层的面积大于金属材料制备的子遮挡层，则发光元件30发射向衬底01一侧的光线可以被吸光度较高的子遮挡层所吸收，避免该部分光线影响第一区域A1下方的光学功能元件对外界光信号的采集。
图10为本申请实施例提供的一种显示面板中第一区域与第二区域的局部剖面示意图。
在本申请的一个实施例中，如图10所示，位于第一区域A1的第一遮挡层41包括n层层叠设置的子遮挡层，位于第二区域A2的第二遮挡层42包括m层层叠设置的子遮挡层，其中，n>m。例如，如图10所示，位于第一区域A1的第一遮挡层41包括2层层叠设置的子遮挡层，分别为子遮挡层411和子遮挡层412；位于第二区域A2的第二遮挡层42包括1层子遮挡层421，分别为子遮挡层411和子遮挡层412，即n＝2且m＝1。
通过减少位于第二区域A2中第二遮挡层42所包括的子遮挡层的层数可以减小第二遮挡层42对第二区域A2中的第二电路元件22及信号线的电容耦合的影响。同时，第一区域A1中的第一遮挡层41包括至少两层子遮挡层，则在显示面板显示同时需要第一区域A1透射外界光时，如上一实施例所进行的分析，第一遮挡层41可以较为有效地减小被反射的激光对发光元件20所发射的显示用光线的影响，且可以减小发光元件20对第一区域A1下方所设置光学功能 元件所需光信号的干扰。
在本实施例对应的一种技术方案中，第一遮挡层41中的至少一个子遮挡层与第二遮挡层42中的至少一层子遮挡层同层且同材料设置。也就是说，第一遮挡层41中的至少一个子遮挡层与第二遮挡层42中的至少一个子遮挡层由同一制程制备获得，因此在制作时可以减少掩膜版的使用次数，从而减少工艺步骤，降低工艺成本。
其中，第一遮挡层41中与第二遮挡层42中同层设置的子遮挡层可以均为金属材料的子遮挡层，例如，如图10所示，第一遮挡层41中的子遮挡层411及第二遮挡层42中的子遮挡层421的材料均为金属Mo。金属材料制备的子遮挡层可以较为有效地反射激光，避免激光对显示面板内其他结构的刻蚀。
此外，第一遮挡层41还可以包括至少一个吸光度较高的子遮挡层。例如，如图10所示，相对于第二遮挡层42，第一遮挡层41还可以包括子遮挡层412且子遮挡层412的材料可以为颜色为灰黑色的Si。因此，如上一实施例所进行的分析，子遮挡层412可以较为有效地减小被反射的激光对发光元件20所发射的显示用光线的影响，且可以减小发光元件20对第一区域A1下方所设置光学功能元件所需光信号的干扰。
图11为图1及图2中虚线框中CC区域的另一种局部示意图。
在本申请的一个实施例中，如图4、图5、图7、图8所示，发光元件30包括阴极CE、阳极AE及位于阴极CE与阳极AE之间的发光材料层EL，阴极CE与阳极AE之间的电场大小控制发光材料层EL发光亮度的大小。为了保证每个发光元件30可以发射不同亮度的光，各个发光元件30的阳极AE可以与不同的电路元件20电连接，且多个发光元件30的阴极CE可以电连接并均位于阴极层CE0。
请结合图11与图5，发光元件30的阴极CE所在的阴极层CE0包括第一镂空部H1，具体地，第一镂空部H1设置在第一区域A1。可以理解地，发光元件30包括阴极层CE0中的阴极CE，同样地，在第一区域A1内，第一发光元件31也包括阴极CE，则在第一区域 A1，第一发光元件31与第一镂空部H1不交叠。
在本实施例中，请结合图11及图5，第一区域A1内的第一遮挡层41与第一区域A1内的第一发光元件31交叠，在第一区域A1，第一发光元件31与第一镂空部H1不交叠，即第一区域A1中的第一镂空部H1与第一区域内的第一遮挡层41无交叠，且第二区域A2内的第二遮挡层42与第二区域A2内的第二发光元件32交叠。
将位于第一区域A1的阴极层CE0至少部分设置为包括第一镂空部H1，则可以增加第一区域A1对外界光的透过率。且阴极CE通常采用镁银材料制备，镁银材料对光的反射作用明显且对光的透射效果较差，因此，将第一区域A1内的阴极层CE0设置为包括第一镂空部H1，可以明显提升第一区域A1对光的透射效果且降低第一区域A1对光的反射效果。
此外，由于发光元件30包括阴极CE且第一遮挡层41与第一发光元件31交叠，则第一区域A1中的遮挡层40与第一区域A1中的发光元件30交叠且第一区域A1中的第一镂空部H1与第一区域中的遮挡层40无交叠。则第一镂空部H1的具体实现方式为，由显示面板001的背面向第一区域A1中的阴极层CE0照射激光，则第一区域A1中被第一遮挡层41遮挡的阴极CE不会被激光刻蚀掉，而第一区域A1中的阴极层CE0中未被第一遮挡层41遮挡的部分会被激光刻蚀掉。
图12为图1及图2中虚线框中CC区域的另一种局部示意图。
在本实施例中，请结合图12与图8，第一区域A1内的第一遮挡层41与第一区域A1内的第一发光元件31交叠，且第二区域A2内的第二遮挡层42与第二区域A2内的电路元件20交叠且不与第二区域A2内的第二发光元件32交叠。
在本申请实施例中，通过在第一区域A1外围的第二区域A2也设置第二遮挡层42，可以在激光对第一区域A1中的阴极层CE0进行刻蚀的过程中保护第二区域A2中的阴极层CE0，避免使得第二区域A2中的第二发光元件32中的阴极CE被刻蚀掉。
图13为图3中沿MM’方向的另一种剖面示意图，图14为图6中沿NN’方向的另一种剖面示意图。
在本申请的一个实施例中，如图13及图14所示，显示面板001还包括多个绝缘层05，且绝缘层05位于遮挡层04远离衬底01的一侧，其中，部分绝缘层05可以设置在相邻的导电膜层之间。
在本申请实施例中，绝缘层05可以包括第二镂空部H2且绝缘层05包括的第二镂空部H2具体设置在第一区域A1。例如，如图13及图14所示，电路元件20中相邻导电结构之间的绝缘层在第一区域A1内包括第二镂空部H2，也就是说，至少部分绝缘层05在第二区域A2及第三区域A3内延伸且在第一区域A1内镂空。通过减少第一区域A1内的绝缘层05的数量，可以降低光线经过多个折射率不同的膜层时的光损耗。
此外，在本实施例中，包括第二镂空部H2的绝缘层05在第二区域A2和第三区域A3内除设置避让异层电连接的过孔外，可以看作是整面连续结构。
在一种技术方案中，如图13及图14所示，阴极层CE0在第一区域A1内的包括第一镂空部H1且部分绝缘层05在第一区域A1内包括第二镂空部H2，第一镂空部H1与第二镂空部H2可以至少部分交叠。即，第一区域A1内既包括第一镂空部H1，又包括第二镂空H2。
可选地，沿垂直显示面板001的方向Z，第二镂空部H2可以覆盖第一镂空部H1。并且，包含第二镂空部H2的绝缘层05可以在第一区域A1内完全镂空。
图15为图1及图2中虚线框中CC区域的又一种局部示意图。
如图15所示，当阴极层CE0包括第一镂空部H1时，阴极层CE0还可以包括第三镂空部H3且阴极层CE0所包括的第三镂空部H3位于第二区域A2。此外，单位面积所包括的第一镂空部H1的总面积大于单位面积所包括的第三镂空部H3的总面积。
例如，如图15所示，单个第一镂空部H1的面积大于单个第三 镂空部H3的面积。
图16为图3中沿MM’方向的又一种剖面示意图，图17为图3中沿MM’方向的又一种剖面示意图。
在本申请的一个实施例中，如图16及图17所示，第二遮挡层42包括第四镂空部H4且第四镂空部H4暴露第二区域A2中的至少部分电路元件20，即第四镂空部H4暴露至少部分第二电路元件22。
通过在第二遮挡层42内设置暴露至少部分第二电路元件22的第四镂空部H4，可以减小第四镂空部H4对第二电路元件22的耦合作用，保证第二电路元件22的性能。
在一种实现方式中，如图16所示，无论第二遮挡层42包括一个子遮挡层还是包括多个子遮挡层，第四镂空部H4贯穿第二遮挡层42中的所有子遮挡层。
本实现方式对应的一种技术方案中，如图16所示，第三镂空部H3与第四镂空部H4可以存在至少部分交叠。
在一种实现方式中，如图17所示，当第二遮挡层42包括多个子遮挡层时，第四镂空部H4贯穿部分子遮挡层。
例如，如图17所示，第二遮挡层42包括子遮挡层421和子遮挡层422，并且子遮挡层421为金属材料制备的用于反射激光的子遮挡层、子遮挡层422为吸光度较高的材料制备的子遮挡层。第四镂空部H4可以贯穿子遮挡层422，但是不贯穿子遮挡层421，则第二遮挡层42可以更大限度的保护第二区域A2中的膜层免受激光的影响，同时减小第二遮挡层42对第二区域A2内的第二电路元件22的耦合作用。
图18为图1及图2中虚线框中CC区域的再一种局部示意图。
在本申请的一个实施例中，如图3、图6及图18所示，第二区域A2中包括第一子区域A21和第二子区域A22，第一子区域A21位于第二子区域A22靠近第一区域A1的一侧，且第二遮挡层42设置在第一子区域A21内。在本实施例中，第一子区域A21与第二子区域A22为第二区域A2中的不同区域且第一子区域A21与第一区 域A1相邻设置，此外，第二子区域A22中不包括遮挡层04且第一子区域A21中设置第二遮挡层42。
由于第二遮挡层42对第二区域A2中的电路元件20存在影响，造成与第二遮挡层42交叠的电路元件20与其他电路元件20的性能存在不同。为了降低与第二遮挡层42交叠的电路元件20与其他电路元件20的性能差异，可以将第一子区域A21与第二子区域A22中的电路元件20的设置方式可以不同，来降低第二区域A2中的第二遮挡层42对第二区域A2中的电路元件20的影响。
在本实施例中，可以主要对第一子区域A21与第二子区域A22中的电路元件20做差异化设计，因此，仅设置在第一子区域A21中的第二遮挡层42可以为整面连续结构。对应地，第一子区域A21中的阴极层CE0也可以为整面连续结构，而第一区域A1中的阴极层CE0仍然可以包括第一镂空部H1。
在本实施例对应的一种技术方案中，如图18所示，第二区域A2内所设置的电路元件20位于第二子区域A22内，即，位于第二区域A2内的第一电路元件21及第二电路元件22具体设置在第二子区域A22内且不设置在第一子区域A21内。因此，在本技术方案中，位于第二区域A2内的第一电路元件21及第二电路元件22均不与第二遮挡层42交叠，则当第二遮挡层42的至少部分采用金属材料制备时，第二遮挡层42不会与第一电路元件21及第二电路元件22间产生耦合电容，因此第二遮挡层42对第一电路元件21及第二电路元件22的影响效果极小。
本技术方案的一种实现方式中，显示面板001中还包括虚设电路元件20’，虚设电路元件20’也可以位于阵列层02且虚设电路元件20’的电路结构可以与第一电路元件21、第二电路元件22中的至少一者相同。
在本实现方式中，虚设电路元件20’设置在第一子区域A21且虚设电路元件20’与发光元件30电绝缘。即虚设电路元件20’不用于向发光元件30提供电压或电流，且虚设电路元件20’的输出端可以 为浮置状态。此外，虚设电路元件20’可以始终保持不工作的状态。
本实现方式中，虚设电路元件20’设置在第一子区域A21且与第一子区域A21中的第二遮挡层42交叠。具体地，第二遮挡层42可以覆盖虚设电路元件20’。在本实现方式中，电路元件20可以避开第二遮挡层42设置，避免电路元件20的工作性能被第二遮挡层42所影响；同时，第二遮挡层42的下方设置虚设电路元件20’，可以使阵列层02的厚度在第二区域A2中较为均匀，保证信号线等的良率，同时避免厚度差异导致的显示效果差异。
在本实施例对应的一种技术方案中，如图3及图6所示，第一子区域A21及第二子区域A22中均设置电路元件20，即至少部分第一电路元件21和/或至少部分第二电路元件22与第二遮挡层42交叠。可选的，电路元件20可以包括构成像素电路的元件，例如薄膜晶体管(即TFT)、走线、电容等。具体地，本实施例中电路元件20为薄膜晶体管(即TFT)，薄膜晶体管连接到诸如发光二极管(LED)的发光元件30，以使驱动电流流到发光元件30，使得发光元件30可以根据驱动电流发光。
由于第二遮挡层42对第二区域A2中的电路元件20存在影响，造成与第二遮挡层42交叠的电路元件20与其他电路元件20的性能存在不同。为了降低第二区域A2中与第二遮挡层42交叠的电路元件20同其他电路元件20之间的性能差异，可以将第一子区域A21与第二子区域A22中的电路元件20的沟道宽长比设置为不同。
具体地，第一子区域A21内的电路元件20的沟道宽长比可以大于第二子区域A22内的电路元件20的沟道宽长比。通过将第一子区域A21内的电路元件20的沟道宽长比较大，可以使得与第二遮挡层42交叠的电路元件20受外界干扰的程度减小，则与第二遮挡层42交叠的电路元件20受第二遮挡层42的耦合作用不再明显。
以下以设置在第二区域A2中的第一电路元件21的沟道宽长比为例进行说明。需要说明的是，设置在第二区域A2中的第二电路元件22的沟道宽长比也可以采用以下发明构思。
图19为第二区域中不同子区域内的电路元件的沟道宽长比示意图。
在本技术方案的一种实现方式中，请结合图17与图19，电路元件20中的半导体层包括源极区SR、漏极区DR及沟道区CR，沟道区CR位于源极区SR与漏极区DR之间。并且位于第一子区域A21电路元件20的沟道区CR的长度小于位于第二子区域A22的电路元件20的沟道区CR的长度。
图20为第二区域中不同子区域内的电路元件的沟道宽长比示意图。
在本技术方案的一种实现方式中，请结合图17与图20，电路元件20中的半导体层包括源极区SR、漏极区DR及沟道区CR，沟道区位于源极区SR与漏极区DR之间。并且位于第一子区域A21的电路元件20的沟道区CR的宽度大于位于第二子区域A22的电路元件20的沟道区CR的宽度。
图21为第二区域中不同子区域内的电路元件的沟道宽长比示意图。
在本技术方案的一种实现方式中，请结合图17与图21，电路元件20中的半导体层包括源极区SR、漏极区DR及沟道区CR，沟道区位于源极区SR与漏极区DR之间。并且位于第一子区域A21电路元件20的沟道区CR的长度小于位于第二子区域A22的电路元件20的沟道区CR的长度，且位于第一子区域A21的电路元件20的沟道区CR的宽度大于位于第二子区域A22的电路元件20的沟道区CR的宽度。
本技术方案中，第一子区域A21电路元件20的沟道区CR的长度小于位于第二子区域A22的电路元件20的沟道区CR的长度；附加地或单独地，位于第一子区域A21的电路元件20的沟道区CR的宽度大于位于第二子区域A22的电路元件20的沟道区CR的宽度。即，第一子区域A21电路元件20的沟道区CR的宽长比大于位于第二子区域A22的电路元件20的沟道区CR的宽长比，因此，流过第 一子区域A21电路元件20的驱动电流的幅值大于流过位于第二子区域A22的电路元件20的驱动电流的幅值。
具体地，本实施例中电路元件20为薄膜晶体管，连接到发光元件30，从而驱动电流流到发光元件30，使得发光元件30可以根据驱动电流发光，所以当流过第一子区域A21电路元件20的驱动电流的幅值大于流过位于第二子区域A22的电路元件20的驱动电流的幅值时，可以使第二子区域A22显示亮度大于第一子区域A21的显示亮度，从而使第一区域A1到第三区域A3显示亮度均匀过渡。
图22为本申请实施例提供的一种第二遮挡层的投影示意图，图23为本申请实施例提供的一种第二遮挡层的投影示意图。
在本申请的一个实施例中，如图22及图23所示，第二遮挡层42靠近第一区域A1的边缘沿着第一区域A1的边缘轮廓延伸，即第二遮挡层42靠近第一区域A1的边缘围绕第一区域A1的边缘轮廓延伸。可以理解为，第二遮挡层42靠近第一区域A1的边缘的形状与第一区域A1的边缘轮廓的形状为相似图形或者相同图形，也就是说，第二遮挡层42靠近第一区域A1的边缘的形状可以根据第一区域A1的边缘轮廓的形状来限定。
其中，在本实施所对应的附图中，第二遮挡层42为图中点状图形所表示的区域，第一区域A1与第二区域A2的划分以图中线宽较粗的线作为区域，即内侧线宽较粗的线圈定的区域示意为第一区域A1，内侧线宽较粗的线与外侧线宽较粗的线之间的区域示意为第二区域A2。下方实施例所对应的附图(即图24-图33)中对第二遮挡层42和第一区域A1与第二区域A2的划分也遵循这一原则。
此外，如图22及图23所示，第二遮挡层42靠近第一区域A1的边缘可以与第一区域A1的边缘轮廓重合，或者第二遮挡层42靠近第一区域A1的边缘位于第一区域A1的外侧。则第二遮挡层42在不影响第一区域A1透光率的同时，可以有效阻挡激光对第二区域A2中的膜层的不必要的刻蚀。
需要说明的是，第二遮挡层42靠近第一区域A1的边缘可以包 括细小的锯齿，第二遮挡层42靠近第一区域A1的边缘的形状可以为忽略锯齿的较为平滑的形状。其中，第二遮挡层42靠近第一区域A1的边缘包括多个细小的锯齿，可以降低第一区域A1边缘及第二区域A2靠近第一区域A1的边缘的衍射。
在本实施例的一种实现方式中，第一区域A1的边缘轮廓为圆形、椭圆形中的一种，则对应地，第二遮挡层42靠近第一区域A1的边缘的形状为圆形、椭圆形中的一种。例如，如图22所示，第一区域A1的边缘轮廓及第二遮挡层42靠近第一区域A1的边缘均为圆形，或者，第一区域A1的边缘轮廓及第二遮挡层42靠近第一区域A1的边缘均为椭圆形。
在本实施例中，将第二遮挡层42远离第一区域A1的边缘的形状设置为与第一区域A1的边缘轮廓的形状相似，换句话说，第二遮挡层42远离第一区域A1的边缘的形状可以根据第一区域A1的边缘轮廓的形状来限定。则可以实现第二遮挡层42各位置处的宽度相同。那么，第二遮挡层42遮挡不同电路元件行中的电路元件20的数量基本相同，且第二遮挡层42遮挡不同电路元件列中的电路元件20的数量也基本相同，易于实现对不同电路元件20的补偿。
图24为本申请实施例提供的一种第二遮挡层的投影示意图，图25为本申请实施例提供的一种第二遮挡层的投影示意图。
在本申请的一个实施例中，如图22及图23所示，沿垂直于显示面板的方向，第二遮挡层42的投影覆盖部分第二区域A2，即第二区域A2的部分位置内设置第二遮挡层42且部分位置内不设置第二遮挡层42。
此外，在第二区域A2中，设置第二遮挡层42的位置相对于不设置第二遮挡层42的位置更靠近第一区域A1。
在本申请的一个实施例中，如图24及图25所示，第二遮挡层42的投影完全覆盖第二区域A2，即第二区域A2内的所有位置均设置第二遮挡层42。
在本申请的一个实施例中，如图22-图25所示，第二遮挡层42 远离第一区域A1的边缘与第二区域A2远离第一区域A1的边缘轮廓相同。可以理解为，第二遮挡层42远离第一区域A1的边缘的形状与第二区域A2远离第一区域A1的边缘轮廓的形状为相似图形或者相同图形，即第二遮挡层42远离第一区域A1的边缘的形状可以根据第二区域A2远离第一区域A1的边缘轮廓的形状来限定。
现有技术中，当显示面板001包括第一区域A1和第二区域A2，且第一区域A1中的发光元件30所电连接的电路元件20设置在第二区域A2时，会对第二区域A2中的电路元件20进行补偿。在本申请实施例中，当第二遮挡层42远离第一区域A1的边缘形状与第二区域A2远离第一区域A1的边缘形状相似或者相同时，易于对第二区域A2中的电路元件20进行补偿。
图26为本申请实施例提供的一种第二遮挡层的投影示意图，图27为本申请实施例提供的一种第二遮挡层的投影示意图，图28为本申请实施例提供的一种第二遮挡层的投影示意图，图29为本申请实施例提供的一种第二遮挡层的投影示意图。
在本实施例的一种实现方式中，第二区域A2远离第一区域A1的边缘形状为圆形、椭圆形、矩形中的一种，则对应地，第二遮挡层42远离第一区域A1的边缘的形状为圆形、椭圆形、矩形中的一种。例如，如图22、图24及图26所示，第二遮挡层42远离第一区域A1的边缘及第二区域A2远离第一区域A1的边缘均为圆形；或者，如图23、图25及图27所示，第二遮挡层42远离第一区域A1的边缘及第二区域A2远离第一区域A1的边缘均为椭圆形；或者，如图28及图29所示，第二遮挡层42远离第一区域A1的边缘及第二区域A2远离第一区域A1的边缘均为矩形，具体可以为正方形。
图30为本申请实施例提供的一种第二遮挡层的投影示意图，图31为本申请实施例提供的一种第二遮挡层的投影示意图。
在本申请的一个实施例中，如图30及图31所示，第二遮挡层42远离第一区域A1的边缘形状为矩形，且第一区域A1的边缘轮廓 为圆形、椭圆形中的一者。第二遮挡层42远离第一区域A1的边缘的至少一条边与第一区域A1的边缘轮廓相切。
将第二遮挡层42的外部轮廓设置为矩形，可以使用线性激光对第一区域A1内的部分膜层进行刻蚀，且第二遮挡层42的外部轮廓可以围绕线性激光的移动路径，有效避免激光对第二区域A2内的膜层进行不必要的刻蚀。此外，第二遮挡层42远离第一区域A1的边缘的至少一条边与第一区域A1的边缘轮廓相切，则只要激光不超过该条边就不会对第二区域A2内的膜层进行不必要的刻蚀；同时还能使得第二遮挡层42在垂直该条边的方向上具有较小的宽度，减小第二遮挡层42对第二区域A2内的电路元件20的影响。
在本实施例的一种实现方式中，如图30及图31所示，第二遮挡层42远离第一区域A1的边缘的任意一条边均与第一区域A1的边缘轮廓相切。则可以在使用线性激光对第一区域A1内的部分膜层进行刻蚀的过程中，在保证激光不会对第二区域A2内的膜层进行不必要的刻蚀时，还能使得第二遮挡层42具有最小的面积，最大限度地减小第二遮挡层42对第二区域A2内的电路元件20的影响。
图32为本申请实施例提供的一种第二遮挡层的投影示意图，图33为本申请实施例提供的一种第二遮挡层的投影示意图。
在本申请的一个实施例中，如图32及图33所示，部分第二遮挡层42延伸至第二区域A2的外围，即第二遮挡层42不仅包括位于第二区域A2的部分，还包括位于第三区域A3的部分。则第二遮挡层42还可以避免靠近第二区域A2的部分第三区域A3中的膜层受到不必要的刻蚀。
图34为本申请实施例提供的一种显示装置的示意图。
本申请实施例还提供一种显示装置，如图34所示，本申请实施例所提供的显示装置可以包括如上述任意一个实施例提供的显示面板001。本申请实施例提供的显示装置可以为手机，此外，本申请实施例提供的显示装置也可以为电脑、电视等显示装置。
如图34所示，本申请实施例提供的显示装置还包括光学功能元 件002，并且光学功能元件002设置在显示装置对应显示面板001的第一区域A1的位置。即沿垂直显示面板001所在平面的方向，光学功能元件002设置在显示面板001的第一区域A1的下方。则光学功能元件002可以通过第一区域A1向显示面板001的出光面一侧发射光线，和/或，可以通过第一区域A1从显示面板001的出光面一侧接收光线。
其中，光学功能元件002为光学指纹传感器、虹膜识别传感器、摄像头等中的至少一者。
在本申请实施例中，第一区域A1内的透光率大于第二区域A2内的透光率，则第一区域A1的至少部分膜层被激光刻蚀掉以增加第一区域A1内的透光率。通过在第一区域A1内设置与发光元件20交叠的第一遮挡层41，可以保护发光元件20中的膜层被激光刻蚀掉，通过在第二区域A2内设置第二遮挡层42，可以保护第二区域A2内的膜层不会被误刻。
本申请实施例还提供一种显示面板的制备方法，用于制备上述任意一个实施例所提供的显示面板001。
图35为本申请实施例提供的一种显示面板的制备方法示意图。
如图35所示，本申请实施例提供的制备方法，包括：
提供初始显示面板001’，初始显示面板001’中包括初始阴极层CE0’，初始阴极层CE0’可以为整面连续结构。其中，第一区域A1内的图案化的第一遮挡层41与初始阴极层CE0’部分交叠，具体地，第一区域A1中的第一遮挡层41围绕多个第一镂空部H1，且第一镂空部H1与初始阴极层CE0’中需要被激光刻蚀掉的部分交叠。
利用线性激光003对第一区域A1内的初始阴极层CE0’进行刻蚀，初始阴极层CE0’中与第一遮挡层41交叠的部分保留且与第一遮挡层41无交叠的部分被刻蚀掉。在利用线性激光003对初始阴极层CE0’进行刻蚀的过程中，第一遮挡层41会反射激光使得激光不会到达初始阴极层CE0’中与第一遮挡层41交叠的部分，而激光可以透过第一镂空部H1到达初始阴极层CE0’，则初始阴极层CE0’中 与第一镂空部H1交叠的部分会被激光刻蚀掉。
其中，沿垂直于显示面板的方向Z，第二区域A2内的第二遮挡层42远离第一区域A1的边缘围绕线性激光对第一区域A1内的初始阴极层CE0’进行刻蚀时的路径。例如，如图33所示，当线性激光003沿着图33中的左右方向移动时，线性激光003沿着左右方向运动的路径不超过第二遮挡层42中左右方向的边缘。
在本申请实施例中，线性激光003主要对第一区域A1内的初始阴极层CE0’进行刻蚀。由于第一区域A1通常为圆形或者椭圆形，则线性激光001在对第一区域A1内的初始阴极层CE0’进行刻蚀的过程中，线性激光001的路径通常为矩形，也就是说，线性激光001的路径一定会超出第一区域A1的范围。本申请实施例将第二区域A2内的第二遮挡层42的外部路径设置为大于线性激光001的运动路径，则可以避免线性激光001对第二区域A2内的膜层进行不必要的刻蚀。
图36为本申请实施例提供的一种显示面板中线性激光与第二遮挡层的关系示意图。
在本申请的一个实施例中，如图36所示，第二区域A2中的第二遮挡层42远离第一区域A1的边缘的形状为矩形，且线性激光003对第一区域A1内的初始阴极层CE0’进行刻蚀时的路径与矩形所在区域重合。则第二遮挡层42的设置形状及大小与线性激光003的运动路径所构成的形状及形状大小一致，可以在保证第二遮挡层42保护第二区域A2中的膜层不被非必要的刻蚀外，还使得第二遮挡层42具体较小的面积。
需要说明的是，线性激光003对第一区域A1内的初始阴极层CE0’进行刻蚀时的路径与矩形所在区域重合，是指在工艺精度范围内，线性激光003对第一区域A1内的初始阴极层CE0’进行刻蚀时的路径与矩形所在区域基本重合。
图37为本申请实施例提供的一种显示面板中线性激光与第二遮挡层的关系示意图。
在本申请的一个实施例中，如图37所示，第二区域A2中的第二遮挡层42远离第一区域A1的边缘的形状为圆形、椭圆形中的一者，且沿垂直于显示面板001的方向，圆形或椭圆形围绕线性激光003对第一区域A1内的初始阴极层CE0’进行刻蚀时的路径。
以上所述仅为本申请的较佳实施例而已，并不用以限制本申请，凡在本申请的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本申请保护的范围之内。

Claims (26)

  1. 一种显示面板，其特征在于，
    所述显示面板的显示区包括第一区域和第二区域，所述第二区域与所述第一区域彼此相邻且所述第二区域的透光率小于所述第一区域的透光率；
    所述显示面板还包括：
    衬底；
    阵列层，所述阵列层位于所述衬底的一侧，所述阵列层包括多个电路元件；
    多个发光元件，位于所述阵列层远离所述衬底的一侧；
    遮挡层，位于所述发光元件朝向所述衬底的一侧，包括第一遮挡层和第二遮挡层；
    其中，所述第一遮挡层与所述第一区域的所述发光元件交叠；
    所述第二遮挡层与所述第二区域的所述电路元件和/或所述发光元件交叠。
  2. 根据权利要求1所述的显示面板，其特征在于，所述发光元件的阴极层包括第一镂空部，所述第一镂空部位于所述第一区域；和/或，
    所述显示面板还包括：
    绝缘层，位于所述遮挡层远离所述衬底的一侧；
    所述绝缘层包括第二镂空部，所述第二镂空部位于所述第一区域。
  3. 根据权利要求2所述的显示面板，其特征在于，
    所述阴极层还包括第三镂空部，所述第三镂空部位于所述第二区域；
    其中，单位面积所包括的所述第一镂空部的总面积大于单位面积所包括的所述第三镂空部的总面积。
  4. 根据权利要求1所述的显示面板，其特征在于，多个所述电路元件中包括第一电路元件，多个所述发光元件中包括第一发光元件；
    所述第一发光元件设置在所述第一区域，所述第一电路元件设置在所述第二区域；所述第一电路元件与所述第一发光元件电连接。
  5. 根据权利要求4所述的显示面板，其特征在于，多个所述电路元件中包括第二电路元件，多个所述发光元件中包括第二发光元件；
    所述第二电路元件与所述第二发光元件均设置在所述第二区域，且所述第二电路元件与所述第二发光元件电连接。
  6. 根据权利要求5所述的显示面板，其特征在于，多个所述电路元件中包括第三电路元件，多个所述发光元件中包括多个第三发光元件；
    所述显示面板还包括第三区域，所述第二区域位于所述第一区域与所述第三区域之间；所述第三电路元件及所述第三发光元件均设置在所述第三区域，且所述第三电路元件与所述第三发光元件电连接。
  7. 根据权利要求1所述的显示面板，其特征在于，所述第二遮挡层包括第四镂空部，所述第四镂空部暴露所述第二区域中的至少部分所述电路元件。
  8. 根据权利要求1所述的显示面板，其特征在于，所述第二区域中包括第一子区域和第二子区域，所述第一子区域位于所述第二子区域靠近所述第一区域的一侧；其中，所述第二区域内所设置的所述电路元件位于所述第二子区域内，所述第二遮挡层设置在所述第一子区域内。
  9. 根据权利要求8所述的显示面板，其特征在于，所述显示面板中还包括虚设电路元件，所述虚设电路元件设置在所述第一子区域且所述虚设电路元件与所述发光元件电绝缘。
  10. 根据权利要求1所述的显示面板，其特征在于，所述第二区域中包括第一子区域和第二子区域，所述第一子区域位于所述第二子区域靠近所述第一区域的一侧；所述第二遮挡层设置在所述第一子区域内，且所述第一子区域及所述第二子区域均设置所述电路 元件；
    所述电路元件包括沟道区，位于所述第一子区域的所述电路元件的所述沟道区的长度小于位于所述第二子区域的所述电路元件的所述沟道区的长度。
  11. 根据权利要求1或10的显示面板，其特征在于，所述第二区域中包括第一子区域和第二子区域，所述第一子区域位于所述第二子区域靠近所述第一区域的一侧；所述第二遮挡层设置在所述第一子区域内，且所述第一子区域及所述第二子区域均设置所述电路元件；
    所述电路元件包括沟道区，位于所述第一子区域的所述电路元件的所述沟道区的宽度大于位于所述第二子区域的所述电路元件的所述沟道区的宽度。
  12. 根据权利要求1所述的显示面板，其特征在于，所述第二遮挡层靠近所述第一区域的边缘沿着所述第一区域的边缘轮廓延伸。
  13. 根据权利要求12所述的显示面板，其特征在于，所述第一区域的边缘轮廓为圆形、椭圆形中的一种。
  14. 根据权利要求1所述的显示面板，其特征在于，沿垂直于所述显示面板的方向，所述第二遮挡层的投影覆盖部分所述第二区域，或者，所述第二遮挡层的投影完全覆盖所述第二区域。
  15. 根据权利要求1所述的显示面板，其特征在于，所述第二遮挡层远离所述第一区域的边缘与所述第二区域远离所述第一区域的边缘轮廓相同。
  16. 根据权利要求14或15所述的显示面板，其特征在于，所述第二区域远离所述第一区域的边缘形状为圆形、椭圆形、矩形中的一种。
  17. 根据权利要求1所述的显示面板，其特征在于，所述第二遮挡层远离所述第一区域的边缘形状为矩形，且所述第一区域的边缘轮廓为圆形、椭圆形中的一者；
    所述第二遮挡层远离所述第一区域的边缘的至少一条边与所述 第一区域的边缘轮廓相切。
  18. 根据权利要求17所述的显示面板，其特征在于，所述第二遮挡层远离所述第一区域的边缘的任意一条边均与所述第一区域的边缘轮廓相切。
  19. 根据权利要求1所述的显示面板，其特征在于，部分所述第二遮挡层延伸至所述第二区域的外围。
  20. 根据权利要求1所述的显示面板，其特征在于，所述第一遮挡层包括n层层叠设置的子遮挡层，所述第二遮挡层包括m层层叠设置的子遮挡层，其中，n>m。
  21. 根据权利要求20所述的显示面板，其特征在于，所述第一遮挡层中的至少一个所述子遮挡层与所述第二遮挡层中的至少一层所述子遮挡层同层且同材料设置。
  22. 一种显示装置，其特征在于，包括如权利要求1-21任意一项所述的显示面板。
  23. 一种显示面板的制备方法，其特征在于，用于制备如权利要求1-21任意一项所述的显示面板。
  24. 根据权利要求23所述的制备方法，其特征在于，所述方法包括：
    提供初始显示面板，所述初始显示面板中包括初始阴极层；所述第一区域内的图案化的所述第一遮挡层与所述初始阴极层部分交叠；
    利用线性激光对所述第一区域内的所述初始阴极层进行刻蚀，所述初始阴极层中与所述第一遮挡层交叠的部分保留且与所述第一遮挡层无交叠的部分被刻蚀掉；
    其中，所述第二遮挡层的边缘形状沿垂直于显示面板方向围绕所述线性激光对所述第一区域内的所述初始阴极层进行刻蚀时的路径。
  25. 根据权利要求24所述的制备方法，其特征在于，所述第二区域中的所述第二遮挡层的边缘形状为矩形，且所述线性激光对所 述第一区域内的所述初始阴极层进行刻蚀时的路径与所述矩形所在区域重合。
  26. 根据权利要求24所述的制备方法，其特征在于，所述第二区域中的所述第二遮挡层的边缘形状为圆形、椭圆形中的一者，且沿垂直于显示面板的方向，所述圆形或所述椭圆形围绕所述线性激光对所述第一区域内的所述初始阴极层进行刻蚀时的路径。
PCT/CN2022/117436 2022-06-30 2022-09-07 一种显示面板及其制备方法、显示装置 WO2024000810A1 (zh)

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CN113889508A (zh) * 2020-07-02 2022-01-04 乐金显示有限公司 显示面板及其制造方法
CN114141821A (zh) * 2020-09-03 2022-03-04 乐金显示有限公司 显示面板和包括该显示面板的显示装置
CN114267685A (zh) * 2021-12-14 2022-04-01 武汉华星光电半导体显示技术有限公司 显示面板及显示装置
CN114267686A (zh) * 2021-12-14 2022-04-01 武汉华星光电半导体显示技术有限公司 显示面板及显示装置
CN114512520A (zh) * 2022-02-07 2022-05-17 武汉华星光电半导体显示技术有限公司 显示面板和显示装置

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Publication number Priority date Publication date Assignee Title
CN113889508A (zh) * 2020-07-02 2022-01-04 乐金显示有限公司 显示面板及其制造方法
CN114141821A (zh) * 2020-09-03 2022-03-04 乐金显示有限公司 显示面板和包括该显示面板的显示装置
CN114267685A (zh) * 2021-12-14 2022-04-01 武汉华星光电半导体显示技术有限公司 显示面板及显示装置
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