WO2023249316A1 - Heat-radiating semiconductor package having heat-conducting member embedded therein, method for manufacturing same, and induction heating soldering device used to manufacture same - Google Patents
Heat-radiating semiconductor package having heat-conducting member embedded therein, method for manufacturing same, and induction heating soldering device used to manufacture same Download PDFInfo
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- WO2023249316A1 WO2023249316A1 PCT/KR2023/008232 KR2023008232W WO2023249316A1 WO 2023249316 A1 WO2023249316 A1 WO 2023249316A1 KR 2023008232 W KR2023008232 W KR 2023008232W WO 2023249316 A1 WO2023249316 A1 WO 2023249316A1
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- heat
- metal layer
- semiconductor package
- induction heating
- semiconductor chip
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- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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- H01L21/4882—Assembly of heatsink parts
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B6/00—Heating by electric, magnetic or electromagnetic fields
- H05B6/02—Induction heating
- H05B6/04—Sources of current
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B6/00—Heating by electric, magnetic or electromagnetic fields
- H05B6/02—Induction heating
- H05B6/10—Induction heating apparatus, other than furnaces, for specific applications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B6/00—Heating by electric, magnetic or electromagnetic fields
- H05B6/02—Induction heating
- H05B6/36—Coil arrangements
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B6/00—Heating by electric, magnetic or electromagnetic fields
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- H05B6/36—Coil arrangements
- H05B6/365—Coil arrangements using supplementary conductive or ferromagnetic pieces
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B6/00—Heating by electric, magnetic or electromagnetic fields
- H05B6/02—Induction heating
- H05B6/36—Coil arrangements
- H05B6/42—Cooling of coils
Definitions
- the present invention relates to semiconductor packages and, in particular, to semiconductor packages including heat dissipation technology through heat-conducting members and their manufacturing.
- a semiconductor package is made by mounting a semiconductor chip on a substrate, and molding a single module with a thermosetting material such as EMC (Epoxy molding compound) to connect the semiconductor chip and lead frame with a bonding flip chip or bonding wire to form the package body (molding part). ) is formed by forming.
- a thermosetting material such as EMC (Epoxy molding compound)
- semiconductor package manufacturing is produced through eight representative processes.
- the wafer which becomes the base of the integrated circuit, is made of very high purity single crystal silicon (SiO2) and is manufactured as an ingot and then cut to be used as a wafer.
- a photo process (sensitization, exposure, development) is performed on the wafer, followed by an etching process, and a circuit pattern is implemented through thin film deposition and metal wiring processes.
- a multi-layer circuit is implemented by repeating this process according to the layered structure.
- it goes through an EDS process to check whether individual semiconductor chips have reached the desired quality level through electrical characteristic inspection.
- a path is created so that the semiconductor chip can exchange signals with the outside world, and it goes through a packaging process in which epoxy resin is discharged and hardened on the semiconductor chip to protect it from various external environments.
- the final product produced through the packaging process is called a semiconductor package.
- ULSI Ultra-Large-Scale Integration
- SOC System-On-a-Chip
- a technology of attaching a heat sink directly to the surface of the package body (hereinafter referred to as a molding portion) is widely used.
- heat generated from the semiconductor chip is transferred to the heat sink through a molding part made of plastic and is emitted to the outside.
- the plastic material that makes up the molding part not only has low thermal conductivity, but also does not emit much heat through the heat sink attached to the molding part due to the thickness of the molding part itself.
- Another heat dissipation technology for semiconductor packages includes a technology for attaching a sheet (TIM sheet) containing a thermally conductive interface material (TIM) to a molding portion, as shown in FIG. 1.
- TIM sheet a sheet
- TIM thermally conductive interface material
- the present invention was developed to solve the problems of the prior art described above.
- the present invention provides an improved semiconductor by preventing malfunction and damage to the semiconductor chip due to overheating by providing a heat dissipation structure for the semiconductor package to effectively dissipate heat generated from the semiconductor chip.
- the purpose is to provide a semiconductor package and manufacturing method that can implement chip performance.
- a heat dissipation semiconductor package for solving the above problems includes a substrate, a semiconductor chip mounted on the substrate, a molding portion surrounding a side of the semiconductor chip on the substrate, and an embedded portion of the molding portion. and a heat-conducting member that radiates heat generated from the semiconductor chip to the outside of the molding part.
- a concave portion with a predetermined thickness is formed on at least one side of the molding portion, and the heat-conducting member includes a heat-conducting sheet bonded to the inside of the concave portion to radiate heat generated from the semiconductor chip to the outside.
- a concave-convex surface with a plurality of irregularities is formed on the bottom surface of the concave portion, and the heat-conducting member further includes a metal layer deposited on the concave-convex surface and a solder paste applied on the metal layer, wherein the heat-conducting sheet is attached to the metal layer. It is joined by soldering.
- a heat dissipation semiconductor package manufacturing method for solving the above problems includes providing a semiconductor package for which the packaging process of a conductor chip has been completed; forming an engraved portion with a concavo-convex surface through laser processing on at least one side of the molding portion forming the outer shape of the semiconductor package; depositing a metal layer on the uneven surface through plating; dispensing solder paste on the metal layer; Mounting a heat-conducting sheet on the solder paste; and melting the solder paste by heating the solder paste.
- an induction heating soldering device that inductively heats the metal layer deposited on the surface of the molding part of the heat dissipation semiconductor package according to the present invention and solders a heat-conducting sheet to the metal layer, and is electrically connected to a high-frequency power supply unit to induce electromagnetism.
- the induction heating coil located inside the induction heating coil to focus magnetic flux onto the heat-conducting sheet; and a coil bobbin in which the induction heating coil is disposed on an outer surface and the magnetic core is installed in the center, wherein the coil bobbin is open at the top so that cooling air flows into the coil bobbin through the upper opening, A plurality of through holes are formed on the side of the coil bobbin so that the cooling air can be discharged to the outside through the through holes after passing through the magnetic core.
- the heat-dissipating semiconductor package with an embedded heat-conducting member of the present invention configured as described above and its manufacturing method have the following advantages.
- the heat conduction member that dissipates heat generated inside the semiconductor package to the outside is embedded within the thickness of the molding part that forms the exterior of the semiconductor package, optimal heat conduction can be achieved within the minimum thickness of the molding part of the semiconductor package. There are benefits to this.
- heat within the semiconductor package can be efficiently discharged without the need for an external heat dissipation member, which has the advantage of realizing high capacity, miniaturization, and high reliability.
- heat conduction members can be installed on the top and/or sides of the molding part, thereby realizing three-dimensional heat dissipation and heat conduction. Additionally, depending on the spatial environment in which the semiconductor package is installed, the heat dissipation area can be There is an advantage in being able to respond actively.
- the heat conduction member is implemented as a porous engraving (concavo-convex surface) on the surface of the molding part, which has the advantage of greatly expanding the heat dissipation surface area and allowing a large amount of heat to be quickly discharged.
- Figure 1 is a photograph taken of a state in which a conventional TIM sheet is attached to a semiconductor package.
- Figure 2 is a schematic cross-sectional view of a heat dissipation semiconductor package according to an embodiment of the present invention.
- Figure 3 is a photograph of an actual product in which a heat-conducting member is directly implemented in a heat dissipation semiconductor package according to an embodiment of the present invention.
- Figure 4 is a diagram showing an example of a use state of a heat dissipation semiconductor package according to an embodiment of the present invention.
- Figure 5 is a flow chart showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention.
- 6 to 8 are conceptual diagrams showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention.
- Figure 9 is a diagram showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention as an actual product.
- Figure 10 is a conceptual diagram showing that the eight processes for manufacturing a conventional semiconductor package and the process for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention are implemented as a continuous in-line process.
- Figure 11 is a conceptual diagram showing a side cooling air discharge type from an induction heating unit applied to a heat dissipation semiconductor package according to an embodiment of the present invention.
- Figure 12 is a conceptual diagram showing the upper cooling air discharge type from the induction heating unit applied to the heat dissipation semiconductor package according to an embodiment of the present invention.
- the heat dissipation semiconductor package according to the present invention includes a substrate, a semiconductor chip mounted on the substrate, a molding portion surrounding a side of the semiconductor chip on the substrate, and a heat dissipation semiconductor package embedded in the molding portion that generates heat from the semiconductor chip. It includes a heat-conducting member that radiates heat to the outside of the molding part.
- the core technical idea of the present invention is to implement a heat dissipation means (hereinafter referred to as a heat conduction member) that radiates heat generated inside the semiconductor package to the outside by embedding it in a molding part forming the outer shape of the semiconductor package. It has the advantage of realizing optimal heat conduction within the minimum thickness of the molding part.
- a heat conduction member that radiates heat generated inside the semiconductor package to the outside by embedding it in a molding part forming the outer shape of the semiconductor package. It has the advantage of realizing optimal heat conduction within the minimum thickness of the molding part.
- the present invention forms a concave concave part with a certain thickness in the molding part of the hot spot ('A' in FIG. 4) of the semiconductor package, deposits a metal layer on this engraved part, and then deposits a metal layer on the engraved part. , It is joined to a metal layer with a heat-conducting sheet through a soldering process.
- Figure 2 is a schematic cross-sectional view of a heat dissipation semiconductor package according to an embodiment of the present invention
- Figure 3 is a photograph of an actual product in which a heat conduction member is directly implemented in a heat dissipation semiconductor package according to an embodiment of the present invention
- Figure 4 is a diagram showing an example of a use state of a semiconductor package according to an embodiment of the present invention.
- the heat dissipation semiconductor package in which the heat conduction member is embedded includes a substrate 10, a semiconductor chip 20, a molding part 30, a heat conduction member 40, and a solder ball 50. It consists of, etc.
- the substrate 10 is, for example, a printed circuit board (PCB).
- PCB printed circuit board
- One or two or more semiconductor chips are mounted on one surface of the substrate 10.
- the other side of the board 10 (the side opposite to the one side) has a connection structure that can be connected to another PCB board (for example, motherboard: 80 in FIG. 4). Examples of the connection structure include solder balls 50 and pin connectors.
- the present invention is not limited to the substrate type. That is, the lead frame type can be applied instead of the substrate type.
- the electrical connection method of the semiconductor chip it is possible to connect it by attaching a solder ball to the substrate, and it is also possible to connect it to a lead frame using a wire.
- the semiconductor chip 20 may be a semiconductor chip that performs various functions such as memory, logic, microprocessor, analog element, digital signal processor, and system on chip. Additionally, the semiconductor chip may be a multi-chip having a structure in which at least two or more semiconductor chips are stacked. For example, at least two semiconductor chips may all be the same type of device, or one of the two or more semiconductor chips may be a memory device and the other may be a microcontroller device.
- the semiconductor chip 20 shown in FIG. 2 is mounted on the substrate 10 using a flip-chip bonding method, but the mounting method of the semiconductor chip 20 is not limited to this.
- semiconductor chips may be mounted on a substrate using a wire bonding method, or they may be mounted using a TSV (Through Silicon Via) method in which multiple semiconductor chips are stacked and connected to each other through via holes. there is.
- TSV Three Silicon Via
- configuration number ‘70’ which is not explained in FIG. 2, is a protective film to protect the semiconductor chip.
- the protective film 70 has the form of an oxide film, a nitride film, or a film.
- the molding part 30 serves to seal the semiconductor chip 20 and protect the semiconductor chip 20 from hazardous elements in the external environment.
- This molding portion 30 is made of an insulating material, for example, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a resin containing reinforcing materials such as an inorganic filler, specifically, ABF, FR-4, and BT resin. It may include etc. Additionally, a molding material such as EMC (Epoxy molding compound) may be used for the molding portion 30.
- EMC is a thermosetting plastic that is a resin with a relatively low molecular weight that can be three-dimensionally cured in the presence of a curing agent or catalyst and has excellent mechanical, electrical insulation, and temperature resistance properties.
- the material of the molding part 30 is not limited to the materials described above.
- the molding part 30 performs roles such as mechanical protection, electrical connection, and mechanical connection of the semiconductor chip 20.
- the molding part 30 protects the semiconductor chip 20 from external mechanical and chemical shock by covering it with a packaging material such as EMC resin, and physically/electrically connects the semiconductor chip 20 to the system to form the semiconductor chip 20. It supplies power for this operation, allows input and output of signals to perform desired functions, and also serves to radiate heat generated when the semiconductor chip 20 operates.
- the present invention implements a heat conduction member (40: heat dissipation means) in the molding portion (30) that dissipates heat generated in the semiconductor chip (20) to the outside of the semiconductor package. That is, the heat-conducting member 40 is implemented within the thickness of the molding portion 30. In the present invention, it is defined and used as a heat-conducting member embedded in the molding part 30.
- the heat-conducting member 40 includes a metal layer 41 formed on the molding part 30 and a heat-conducting sheet 42 bonded to the metal layer 41.
- a metal layer 41 formed on the molding part 30 and a heat-conducting sheet 42 bonded to the metal layer 41.
- an engraved portion 31 on which the metal layer 41 is deposited is formed on one surface of the molding portion 40, and an uneven surface 42 formed on the bottom surface of the engraved portion 31.
- the engraved portion 31 may be formed to have a certain depth in at least one area of the first surface of the molding portion.
- This engraved portion 31 can be formed by removing the molding portion 30 to a certain depth through laser processing, etc., which will be described later.
- a concave portion 31 can be formed.
- the depth of the engraved portion 31 may vary depending on the type and size of the semiconductor package or semiconductor chip.
- the engraved portion 31 has the shape of a concave groove with a four-angled plane inside, with an edge of a certain width on one side of the molding portion 30, as shown in FIG. 3(a). It may also have the shape of a concave groove extending radially from the center and vertex of each side in a four-sided plane to the edge of the molding portion 30, as shown in FIG. 3(b). In the latter case, the area of the heat-conducting member 40 can be maximized, which has the advantage of having a better heat dissipation effect.
- the uneven surface 32 has convex and concave patterns that periodically repeat on the bottom surface of the intaglio part 31 when forming the intaglio part 31 through laser processing, etc. It may have a diagonal or straight concave-convex shape. However, the present invention is not limited to this and may have many different shapes.
- This uneven surface 32 can increase the bonding force with the metal layer 41 through anchoring of metal materials in the deposition process for forming the metal layer 41, and the heat dissipation surface area can be expanded to increase the heat dissipation effect. do.
- the metal layer 41 is formed on the uneven surface 32 inside the concave portion 31 and plays a role in vertically transmitting heat generated from the semiconductor chip 20. In addition, it serves as a medium for soldering the heat-conducting sheet 42 to the molding part 30 made of resin material.
- This metal layer 41 has a structure in which the metal layer 41 is plated and deposited on the engraved area. To elaborate further, the metal layer 41 is formed inside the engraved portion 31 by a selective plating process, and can be performed by dry or wet plating depending on laser processing and the state of the semiconductor package. A more detailed description of the process for forming the metal layer 41 will be described later.
- the metal layer 41 may be composed of multiple layers.
- the metal layer may include a first metal layer 41a and a second metal layer 41b.
- the first metal layer 41a is formed directly on the laser-processed engraved part 31, and serves to provide high bonding strength through anchoring to the molding part 30 made of a resin material and to form a bond between the semiconductor chip 20 and the semiconductor chip 20. Since there may be contact areas, it is advisable to use a metal material with low diffusivity.
- the first metal layer 41a may include at least one of copper (Cu), nickel (Ni), aluminum (Al), titanium (Ti), and silicon (Si).
- the second metal layer 41b has excellent solderability for solder bonding with the heat conductive sheet 420 and acts as a heat conduction intermediate layer after bonding. Therefore, the second metal layer 41b is made of a metal material with excellent soldering and good heat conduction.
- the second metal layer 41b may include at least one of copper (Cu), nickel (Ni), and gold (Au).
- the heat conductive sheet 42 is bonded to the metal layer 41 in the form of a thin plate made of a heat conductive material. More specifically, it is bonded to the second metal layer 41b.
- This heat-conducting sheet 42 is disposed on the outermost side of the engraved portion 31 of the molding portion 30 and serves to radiate heat generated from the semiconductor chip 20 to the outside of the semiconductor package.
- the heat dissipation semiconductor package of the present invention when the heat dissipation semiconductor package of the present invention is assembled on the motherboard 70 of an electronic device, it is connected to the TIM sheet 300 and/or the EMI shielding member 400, which are additional heat dissipation means, to provide external heat dissipation. can effectively dissipate heat.
- the TIM sheet 300 includes a sheet made of a thermally conductive interface material (TIM), and the EMI shielding member 400 is installed around the semiconductor package to block electromagnetic waves.
- TIM thermally conductive interface material
- the heat-conducting sheet 42 may be made of a metal material such as copper or aluminum, a metalloid material such as silicon, or a carbon-based fiber such as carbon or graphite.
- a metal material such as copper or aluminum
- a metalloid material such as silicon
- a carbon-based fiber such as carbon or graphite.
- the material of the heat-conducting sheet is not limited to the materials described above.
- the heat-conducting sheet 42 may be bonded to the metal layer 41 through soldering.
- solder paste 43 is applied between the heat-conducting sheet 42 and the metal layer 41.
- soldering the heat-conducting sheet 42 to the metal layer 41 two major methods can be considered for soldering the heat-conducting sheet 42 to the metal layer 41.
- One of the soldering methods is the reflow soldering method, and the other is the induction heating soldering method.
- induction heating soldering locally heats only the conductor located inside the magnetic field formed by the induction heating coil, so there is no need to use a material with high heat resistance as the molding part, and in particular, it does not cause thermal damage to the semiconductor chip contained in the semiconductor package. There is an advantage to not having any at all.
- the method of joining the metal layer of the heat conduction sheet through induction heating soldering will be described in more detail later.
- the heat dissipation semiconductor package according to the present invention allows heat generated from the semiconductor chip to be transferred directly to the metal layer and the heat-conducting sheet through the concave part forming the minimum thickness in the molding part and released into the air, and can also be released to the outside. It may also be emitted to the outside through other heat dissipation members (TIM sheets or EMI shielding members).
- metallization metal layer
- MID Mold Interconnected Device
- a heat-conducting sheet is bonded to the metal layer by soldering. Accordingly, the heat-conducting member can be mounted directly while embedded inside a molding part made of plastic (MDM: Molding Direct Mounting).
- the heat dissipation semiconductor package according to the present invention can directly form a heat conduction member by applying MID and MDM to the plastic molding part forming the outer shape, thereby enabling three-dimensional heat dissipation and heat conduction according to the three-dimensional shape of the semiconductor package.
- MID and MDM to the plastic molding part forming the outer shape
- Figure 5 is a flow chart showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention
- Figures 6 to 8 present a conceptual diagram showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention
- 9 shows the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention as an actual product.
- a semiconductor package for which the semiconductor packaging process has been completed is provided (step S10 in FIG. 5, FIG. 6), and a certain area is removed by laser processing on the upper surface of the molding part 30 forming the outer shape of the semiconductor packaging to form an engraved portion ( 31) is formed (step S20 of Figure 5, Figure 6, Figure 9(a)).
- a pattern groove in the form of fine unevenness is formed on the bottom surface of the engraved portion 31. That is, an uneven surface 32 in the form of a diagonal or straight line in which convex and concave patterns are periodically repeated may be formed on the bottom surface of the intaglio portion 31.
- the laser may be a diode laser, UV (ultraviolet) laser, or excimer laser.
- forming an engraved portion is not limited to laser processing, and various methods such as CNC (computerized numerical control) milling, wet etching, and dry etching can be applied.
- a metal layer 41 is deposited by plating metal in the area of the concave portion 31 (S30 in Fig. 5, Fig. 7, Fig. 9(b)).
- the metal layer 41 is made of at least one of copper (Cu), nickel (Ni), aluminum (Al), titanium (Ti), and silicon (Si) on the uneven surface 32 forming the bottom surface of the intaglio portion 31. It may be formed by stacking a first metal layer 41a containing one and a second metal layer 41b containing at least one of copper (Cu), nickel (Ni), and gold (Au) on the first metal layer. .
- This metal layer 30 is selectively coated with metal in the area of the concave portion using dry thin film deposition methods such as wet plating using masking (100 in FIG. 7), CVD (Physical Vapor Deposition), PVD (Chemical Vapor Deposition), and E-BEAM. Anger can be realized
- the heat conductive sheet 42 is soldered on the metal layer 30 by induction heating and placed directly on the molding part.
- solder paste 43 is dispensed on the metal layer 41 (S40 in Fig. 5, Fig. 7, Fig. 9(c)).
- the heat-conducting sheet 42 is mounted on the solder paste 43 (S50 in FIG. 5, FIG. 8).
- the induction heating unit 200 is placed on the heat-conducting sheet 42 and heated induction (S60 in FIGS. 5 and 8), thereby melting the solder paste 43 to form the heat-conducting sheet 42 into a molding portion ( 30) can be embedded in the thickness (S70 and 9(d) of Figure 5).
- the induction heating unit 200 inductively heats the metal layer 41.
- the solder paste 43 applied between the molding part 30 and the heat-conducting sheet 42 melts, and the heat-conducting sheet 42 can be directly mounted on the concave part 31 of the molding part 30 made of plastic. You can.
- the induction heating unit 200 includes an induction heating coil 210 electrically connected to a high-frequency power supply unit (not shown), and is disposed inside the induction heating coil 210 and induced by the induction heating coil 210. It consists of a magnetic core 220 to focus the magnetic flux to the soldering area.
- the induction heating unit 200 is not shown, but can be moved in the X-axis/Y-axis/Z-axis directions through a transfer robot (not shown) to continuously solder electronic elements mounted on multiple circuit bricks. You can.
- the transfer robot (not shown) is equipped with a plurality of induction heating units and can simultaneously solder a plurality of semiconductor packages at once.
- a heat-conducting sheet can be directly embedded in a molding part made of plastic injection using magnetic induction local heating of the metal layer. Because of this, compared to the general reflow soldering method, it can be used without restrictions on the material of the molding part that forms the exterior of the semiconductor package, and a heat-conducting sheet can be implemented in the molding part without thermal damage to components such as semiconductor chips mounted inside. It becomes possible.
- the heat dissipation semiconductor package according to the present invention implements a heat conduction member directly in the molding part formed through the semiconductor packaging process, so that it can be manufactured further in-line after the eight manufacturing processes of the existing semiconductor package. This is very advantageous for mass production and production line construction.
- a cooling structure that can cool the heat of the magnetic core 220 is applied to the induction heating unit 200 used when manufacturing the heat dissipation semiconductor package of the present invention, providing an induction heating unit that can improve soldering quality. .
- Figure 11 is a conceptual diagram showing a side cooling air discharge type from an induction heating unit applied to a heat dissipation semiconductor package according to an embodiment of the present invention.
- the induction heating unit 200 includes an induction heating coil 210, a magnetic core 220, and a coil bobbin 230.
- the induction heating coil 210 is electrically connected to a high-frequency power supply unit (not shown) to induce electromagnetism, and uses a hollow copper tube with high electrical conductivity.
- the induction heating coil 210 has a cooling water passage formed inside the hollow space to supply cooling water 235. Accordingly, the heat generated in the magnetic core 220 can be quickly dissipated toward the induction heating coil 210.
- the overall shape of the induction heating coil 210 can be implemented in various shapes such as helical, square, and circular. Furthermore, depending on the type of semiconductor package and the soldering environment, it may be in the form of a very thin wire (for example, Litz wire) rather than a hollow tube.
- the magnetic core 220 is located inside the induction heating coil 210 and serves to concentrate the magnetic induction generated by the induction heating coil 210.
- the magnetic core 220 can be configured in various shapes such as round, square, or hollow.
- the coil bobbin 230 serves as a housing in which a magnetic core 220 is inserted inside and an induction heating coil 210 is placed outside. At this time, the coil bobbin 230 also serves as a pressing plate to prevent the heat-conducting sheet 32 from lifting during soldering.
- a spiral groove may be formed on the outer surface of the coil bobbin 230 so that the induction heating coil 210 can be stably fixed in place.
- a plurality of through holes 231 that serve as passages for cooling air are formed at regular intervals up and down.
- the inner surface of the coil bobbin 230 where the through hole 231 is formed has a relatively wide diameter flow so that the cooling air flowing in from the upper part of the coil bobbin 230 can flow smoothly into the through hole 231. It is desirable for the hole 234 to be formed.
- the upper part of the coil bobbin 230 has an open structure to allow cooling air to flow in. Accordingly, the cooling air flowing into the upper part of the coil bobbin 230 passes through the magnetic core 220 and exits through the through hole 231, thereby quickly discharging the heat generated in the magnetic core 220 to the outside. .
- the magnetic core 220 is either a hollow shape with its interior open at the top and bottom, or a shape that allows a hollow internal space to be maintained inside the coil bobbin 230. desirable.
- the induction heating unit 200 applied to the present invention cools the magnetic core 220 using cooling air, so that the magnetic core 220 is not heated to a high temperature, thereby effectively focusing the magnetic flux of the induction heating coil 210.
- This has the effect of greatly improving the soldering quality of heat-conducting members within a semiconductor package.
- Figure 12 unlike Figure 11, applies the upper cooling air discharge type as the cooling structure of the induction heating unit.
- an entirely closed structure is applied rather than a through-hole 231 formed on the side of the coil bobbin 230, and a partition wall 232 is formed in the center of the open upper part of the coil bobbin 230.
- cooling air is injected to one side around the partition wall 232, and air that has completed heat exchange with the magnetic core 220 is discharged to the other side.
- the air flowing in to one side around the partition wall 232 passes through the magnetic core 220 inserted inside the coil bobbin 230, and then passes through the magnetic core 220 inserted into the coil bobbin 230, and then flows into the air flowing in to the other side around the partition wall 232.
- the semiconductor package according to the present invention can be widely used in many industrial fields for all kinds of purposes such as smartphones, tablets, wearables, digital cameras, wireless routers, etc.
- the present invention relates to a heat dissipating semiconductor package with an embedded heat conductive member, a manufacturing method thereof, and an induction heating soldering device used for manufacturing the same, and is used in the semiconductor manufacturing industry, manufacturing electronic devices such as smartphones, tablets, wearables, digital cameras, wireless routers, etc. It can be widely used in industry and AI industries.
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Abstract
The present invention relates to a heat-radiating semiconductor package having a heat-conducting member embedded therein, and method for manufacturing same, wherein a heat-conducting member is embedded in a molding portion which constitutes the exterior of the semiconductor package, as a heat-radiating means for radiating heat generated inside the semiconductor package to the outside, thereby implementing optical heat conductance within the smallest thickness of the molding portion of the semiconductor package.
Description
본 발명은 반도체 패키지에 관에 관한 것으로, 특히 열전도 부재를 통한 방열 기술을 포함하는 반도체 패키지 및 그 제조에 관한 것이다.The present invention relates to semiconductor packages and, in particular, to semiconductor packages including heat dissipation technology through heat-conducting members and their manufacturing.
반도체 패키지는 기판에 반도체 칩을 실장하고, 본딩 플립칩 또는 본딩 와이어 등으로 반도체 칩과 리드프레임을 연결한 구조의 단일 모듈에 EMC(Epoxy molding compound)와 같은 열경화성 소재로 몰딩하여 패키지 몸체(몰딩부)를 형성하여 이루어진다.A semiconductor package is made by mounting a semiconductor chip on a substrate, and molding a single module with a thermosetting material such as EMC (Epoxy molding compound) to connect the semiconductor chip and lead frame with a bonding flip chip or bonding wire to form the package body (molding part). ) is formed by forming.
도 8에 도시된 바와 같이, 반도체 패키지 제조는 대표적인 8대 공정을 거쳐서 제작된다. 먼저, 직접 회로의 밑판이 되는 웨이퍼는 순도가 매우 높은 단결정 실리콘(SiO2)을 사용하고 있으며 잉곳으로 제작 후 절단해서 웨어퍼로 사용된다. 이러한 웨어퍼 위에 산화 공정 후에 포토 공정(감광, 노광, 현상)을 거친 후에 식각 공정을 하고, 박막 증착과 금속 배선 공정을 통해 회로 패턴을 구현한다. 적층 구조에 따라서 이러한 과정을 반복하면서 다층 회로를 구현한다. 이후, 전기적 특성 검사를 통해서 개별 반도체 칩들이 원하는 품질 수준에 도달했는지를 확인하는 EDS 공정을 거친다. EDS 공정을 통해 일정 품질에 도달한 경우에 반도체 칩이 외부와의 신호를 주고받을 수 있도록 길을 만들고, 다양한 외부 환경으로부터 보호되도록 반도체 칩 상에 에폭시 수지를 토출해서 경화시키는 패키징 공정을 거치게 된다. As shown in Figure 8, semiconductor package manufacturing is produced through eight representative processes. First, the wafer, which becomes the base of the integrated circuit, is made of very high purity single crystal silicon (SiO2) and is manufactured as an ingot and then cut to be used as a wafer. After the oxidation process, a photo process (sensitization, exposure, development) is performed on the wafer, followed by an etching process, and a circuit pattern is implemented through thin film deposition and metal wiring processes. A multi-layer circuit is implemented by repeating this process according to the layered structure. Afterwards, it goes through an EDS process to check whether individual semiconductor chips have reached the desired quality level through electrical characteristic inspection. When a certain quality is reached through the EDS process, a path is created so that the semiconductor chip can exchange signals with the outside world, and it goes through a packaging process in which epoxy resin is discharged and hardened on the semiconductor chip to protect it from various external environments.
이때, 패키징 공정을 거쳐서 최종적으로 만들어진 제품을 반도체 패키지라고 한다. At this time, the final product produced through the packaging process is called a semiconductor package.
초기의 반도체 패키지는 트렌지스터 몇 개만 들어간 소규모 집적회로인 SSI(small-scale integration)라고 불렸으며, 이후 수백 개의 트렌지스터가 포함되는 MSI(Middle Scale Integration), 그리고 이후 수만 개의 트렌지스터가 포함된 LSI(Large Scale Integration)으로 발전되었다. 현재는 VLSI(Very Large Scale Integration)으로 10,000~1,000,000개의 트랜지스터를 포함하는 대규모의 반도체 칩 형태로 발전되고 있다.Early semiconductor packages were called SSI (small-scale integration), a small-scale integrated circuit containing only a few transistors, later MSI (Middle Scale Integration) containing hundreds of transistors, and later LSI (Large Scale Integration) containing tens of thousands of transistors. Integration). Currently, VLSI (Very Large Scale Integration) is being developed into large-scale semiconductor chips containing 10,000 to 1,000,000 transistors.
이후 계속적인 복잡성이 더욱 커진 것을 반영하는 ULSI(Ultra-Large-Scale Integration)는 백만 개가 넘는 트랜지스터를 포함하는 초대규모 집적도의 반도체 칩과 SOC(System-On-a-Chip)와 같은 컴퓨터나 다른 시스템에 필요한 모든 소자들이 한 개의 칩에 포함된 집적회로가 개발되어 제조 되고 있다.ULSI (Ultra-Large-Scale Integration), which reflects the continued increase in complexity, is an ultra-large-scale integration of semiconductor chips containing more than a million transistors and computers and other systems such as SOC (System-On-a-Chip). Integrated circuits containing all the necessary elements on one chip are being developed and manufactured.
이와 같이, 반도체 기술이 고도화되며 반도체 칩의 속도가 빨라지고, 기능이 많아짐에 따라 열 발생 문제는 점점 더 심각해지고 있어 반도체 패키지의 방열 기능(Thermal Dissipation)이 매우 중요해지고 있다.In this way, as semiconductor technology becomes more advanced, the speed of semiconductor chips increases, and the functions increase, the problem of heat generation becomes more and more serious, and the thermal dissipation function of the semiconductor package becomes very important.
종래의 반도체 패키지의 방열 기술로는 패키지 몸체(이하, 몰딩부)의 표면에 직접 방열판을 부착하는 기술이 널리 이용되고 있다. 이러한 종래기술에 따른 반도체 패키지는 반도체 칩에서 발생된 열이 플라스틱으로 이루어진 몰딩부를 통하여 방열판으로 전달되어 외부로 방출된다. As a conventional heat dissipation technology for semiconductor packages, a technology of attaching a heat sink directly to the surface of the package body (hereinafter referred to as a molding portion) is widely used. In the semiconductor package according to the prior art, heat generated from the semiconductor chip is transferred to the heat sink through a molding part made of plastic and is emitted to the outside.
그런데, 몰딩부를 구성하는 플라스틱 재질은 열전도율이 낮을 뿐만 아니라 몰딩부 자체의 두께로 인해 몰딩부에 부착된 방열판을 통한 열 방출이 크지 못하다. However, the plastic material that makes up the molding part not only has low thermal conductivity, but also does not emit much heat through the heat sink attached to the molding part due to the thickness of the molding part itself.
또 다른 반도체 패키지의 방열 기술로는, 도 1에 도시된 바와 같이 몰딩부에 열전도성 계면 물질(TIM : Thermal interface material)을 포함하는 시트(TIM 시트)를 부착하는 기술이 있다. 그러나 이러한 TIM 시트 역시 몰딩부의 표면에 부착되기 때문에 여전히 열 방출이 크지 못하다. 그리고 TIM 시트는 자체 접착력 또는 접착제를 통해 몰딩부에 부착되는데 오랜 시간의 경과 후에는 접착력의 약화로 인해 몰딩부 위에서 쉽게 탈락되고, 이로 인해 열전도 효과가 저하되는 문제가 있다.Another heat dissipation technology for semiconductor packages includes a technology for attaching a sheet (TIM sheet) containing a thermally conductive interface material (TIM) to a molding portion, as shown in FIG. 1. However, because these TIM sheets are also attached to the surface of the molding part, heat dissipation is still not large. In addition, the TIM sheet is attached to the molding part through self-adhesive force or adhesive, but after a long period of time, the adhesive strength weakens and the TIM sheet easily falls off from the molding part, which reduces the heat conduction effect.
본 발명은 상술한 종래기술의 문제점을 해결하기 위하여 안출된 것으로서, 반도체 칩에서 발생되는 열을 효과적으로 방출하기 위한 반도체 패키지의 방열 구조 갖도록 하여 과열로 인한 반도체 칩의 오동작 및 손상을 방지함으로써 보다 향상된 반도체 칩의 성능을 구현할 수 있는 반도체 패키지 및 그 제조 방법을 제공하는 데 목적이 있다. The present invention was developed to solve the problems of the prior art described above. The present invention provides an improved semiconductor by preventing malfunction and damage to the semiconductor chip due to overheating by providing a heat dissipation structure for the semiconductor package to effectively dissipate heat generated from the semiconductor chip. The purpose is to provide a semiconductor package and manufacturing method that can implement chip performance.
상기한 과제를 해결하기 위한 본 발명에 의한 방열 반도체 패키지는 기판과, 상기 기판에 실장된 반도체 칩과, 상기 기판 상에서 상기 반도체 칩의 측면을 둘러싸는 몰딩부와, 상기 몰딩부에 임베디드(Ebedded)되어 상기 반도체 칩에서 발생되는 열을 상기 몰딩부 외부로 방출시키는 열전도부재를 포함한다.A heat dissipation semiconductor package according to the present invention for solving the above problems includes a substrate, a semiconductor chip mounted on the substrate, a molding portion surrounding a side of the semiconductor chip on the substrate, and an embedded portion of the molding portion. and a heat-conducting member that radiates heat generated from the semiconductor chip to the outside of the molding part.
여기서, 상기 몰딩부의 적어도 어느 한 면에서 일정 두께로 오목하게 파여진 음각부가 형성되고, 상기 열전도 부재는 상기 음각부 내부에 접합되어 상기 반도체 칩에서 발생되는 열을 외부로 방출하는 열전도 시트를 포함한다. Here, a concave portion with a predetermined thickness is formed on at least one side of the molding portion, and the heat-conducting member includes a heat-conducting sheet bonded to the inside of the concave portion to radiate heat generated from the semiconductor chip to the outside. .
그리고 상기 음각부의 바닥면에는 다수의 요철이 형성된 요철면이 형성되고, 상기 열전도 부재는 상기 요철면에 증착 형성된 금속층과 상기 금속층 상에 도포된 솔더 페이스트를 더 포함하여, 상기 열전도 시트가 상기 금속층에 솔더링 접합된다. A concave-convex surface with a plurality of irregularities is formed on the bottom surface of the concave portion, and the heat-conducting member further includes a metal layer deposited on the concave-convex surface and a solder paste applied on the metal layer, wherein the heat-conducting sheet is attached to the metal layer. It is joined by soldering.
또한, 상기한 과제를 해결하기 위한 본 발명에 의한 방열 반도체 패키지 제조방법은, 도체 칩의 패키징 공정이 완료된 반도체 패키지를 제공하는 단계; 상기 반도체 패키지의 외형을 이루는 몰딩부의 적어도 어느 한 면에 레이저 가공을 통해 요철면이 형성된 음각부를 형성하는 단계; 상기 요철면 상에 도금을 통해 금속층을 증착하는 단계; 상기 금속층 상에 솔더 페이스트를 디스펜싱하는 단계; 상기 솔더 페이스트에 열전도 시트를 마운트하는 단계; 및 상기 솔더 페이스트를 가열하여 상기 솔더 페이스트를 멜팅하는 단계;를 포함한다. In addition, a heat dissipation semiconductor package manufacturing method according to the present invention for solving the above problems includes providing a semiconductor package for which the packaging process of a conductor chip has been completed; forming an engraved portion with a concavo-convex surface through laser processing on at least one side of the molding portion forming the outer shape of the semiconductor package; depositing a metal layer on the uneven surface through plating; dispensing solder paste on the metal layer; Mounting a heat-conducting sheet on the solder paste; and melting the solder paste by heating the solder paste.
한편, 본 발명에 의한 방열 반도체 패키지의 몰딩부의 표면에 증착된 금속층을 유도 가열하여 상기 금속층에 열전도 시트를 솔더링하는 유도 가열 솔더링장치로서, 고주파 전원 공급 유닛에 전기적으로 연결되어 전자기를 유도하는 유도 가열 코일; 상기 유도 가열 코일 내부에 위치하여 상기 열전도 시트로 자속을 집중시키는 자성체 코어; 및 상기 유도 가열 코일이 외측면에 배치되고 중앙에 상기 자성체 코어가 설치되는 코일 보빈;을 포함하되, 상기 코일 보빈은 상부가 개구되어 냉각 공기가 상부 개구를 통해 상기 코일 보빈 내부로 유입되고, 상기 코일 보빈의 측면에는 구멍이 뚫린 쓰루홀이 다수 형성되어 상기 냉각 공기가 자성체 코어를 거친 후에 상기 쓰루홀을 통해 외측으로 방출될 수 있다.Meanwhile, it is an induction heating soldering device that inductively heats the metal layer deposited on the surface of the molding part of the heat dissipation semiconductor package according to the present invention and solders a heat-conducting sheet to the metal layer, and is electrically connected to a high-frequency power supply unit to induce electromagnetism. coil; a magnetic core located inside the induction heating coil to focus magnetic flux onto the heat-conducting sheet; and a coil bobbin in which the induction heating coil is disposed on an outer surface and the magnetic core is installed in the center, wherein the coil bobbin is open at the top so that cooling air flows into the coil bobbin through the upper opening, A plurality of through holes are formed on the side of the coil bobbin so that the cooling air can be discharged to the outside through the through holes after passing through the magnetic core.
상기와 같이 구성되는 본 발명의 열전도 부재가 임베디드된 방열 반도체 패키지 및 그 제조 방법은 다음과 같은 이점이 있다.The heat-dissipating semiconductor package with an embedded heat-conducting member of the present invention configured as described above and its manufacturing method have the following advantages.
첫째, 반도체 패키지 내부에서 발생되는 열(Thermal)을 외부로 방열시키는 열전도 부재가 반도체 패키지의 외형을 이루는 몰딩부의 두께 내에 임베디드(Embedded)되기 때문에 반도체 패키지의 몰딩부 최소 두께 내에서 최적의 열전도를 구현할 수 있는 이점이 있다. First, because the heat conduction member that dissipates heat generated inside the semiconductor package to the outside is embedded within the thickness of the molding part that forms the exterior of the semiconductor package, optimal heat conduction can be achieved within the minimum thickness of the molding part of the semiconductor package. There are benefits to this.
둘째, 외부에 추가되는 방열부재 없이도 반도체 패키지 내의 열을 효율적으로 배출할 수 있어 고용량, 소형화 및 고신뢰성을 구현할 수 있는 이점이 있다.Second, heat within the semiconductor package can be efficiently discharged without the need for an external heat dissipation member, which has the advantage of realizing high capacity, miniaturization, and high reliability.
셋째, 열전도 부재가 몰딩부의 표면에 임베디드됨에 따라 몰딩부의 상면 및/또는 측면에도 열전도 부재를 설치할 수 있어 3차원의 방열 및 열전도를 구현할 수 있고, 또한 반도체 패키지가 설치되는 공간적인 환경에 따라 방열 부위를 능동적으로 대응할 수 있는 이점이 있다. Third, as the heat conduction member is embedded in the surface of the molding part, heat conduction members can be installed on the top and/or sides of the molding part, thereby realizing three-dimensional heat dissipation and heat conduction. Additionally, depending on the spatial environment in which the semiconductor package is installed, the heat dissipation area can be There is an advantage in being able to respond actively.
넷째, 반도체 패키징 공정을 마친 반도체 패키지에 열전도 부재를 직접 구현함으로써, 패키징 공정 이후에 연속되는 공정(인라인 공정)으로 레이아웃(lay-out) 설계가 가능하여 대량 생산에 매우 유리한 이점이 있다. Fourth, by directly implementing the heat-conducting member in the semiconductor package that has completed the semiconductor packaging process, layout design is possible in a continuous process (in-line process) after the packaging process, which is very advantageous for mass production.
다섯째, 열전도 부재가 몰딩부의 표면에서 다공성 음각(요철면)으로 구현됨으로써 방열 표면적이 크게 확장되어 대량의 열이 신속히 배출할 수 있는 이점이 있다.Fifth, the heat conduction member is implemented as a porous engraving (concavo-convex surface) on the surface of the molding part, which has the advantage of greatly expanding the heat dissipation surface area and allowing a large amount of heat to be quickly discharged.
여섯째, 와이어 본딩, 플림칩본드, TSV(Through Silicon Via) 등 다양한 반도체 패키지 구현 방식에 범용적 대응이 가능하고, 또한 향후 주력 패키지 형태인 팬아웃 웨이퍼 레벨 패키지에서 방열 성능 효과 높일 수 있는 이점이 있다. Sixth, it is possible to universally respond to various semiconductor package implementation methods such as wire bonding, film chip bond, and TSV (Through Silicon Via), and also has the advantage of improving heat dissipation performance in fan-out wafer level packages, which will be the main package type in the future. .
도 1는 종래 TIM 시트가 반도체 패키지 위에 부착되는 상태를 찍은 사진이다. Figure 1 is a photograph taken of a state in which a conventional TIM sheet is attached to a semiconductor package.
도 2는 본 발명의 실시예에 의한 방열 반도체 패키지의 단면도를 개략적으로 도시한 도 Figure 2 is a schematic cross-sectional view of a heat dissipation semiconductor package according to an embodiment of the present invention.
도 3은 본 발명의 실시예에 의한 방열 반도체 패키지에 열전도 부재가 직접 구현된 실제 제품을 찍은 사진Figure 3 is a photograph of an actual product in which a heat-conducting member is directly implemented in a heat dissipation semiconductor package according to an embodiment of the present invention.
도 4는 본 발명의 실시예에 의한 방열 반도체 패키지의 사용 상태의 일예를 도시한 도Figure 4 is a diagram showing an example of a use state of a heat dissipation semiconductor package according to an embodiment of the present invention.
도 5는 본 발명의 실시예에 의한 방열 반도체 패키지를 제조하는 공정 순서를 도시한 플로우챠트 Figure 5 is a flow chart showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention.
도 6 내지 도 8은 본 발명의 실시예에 의한 방열 반도체 패키지를 제조하는 공정 순서를 개념도로 제시한 도6 to 8 are conceptual diagrams showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention.
도 9는 본 발명의 실시예에 의한 방열 반도체 패키지를 제조하는 공정 순서를 실제 제품으로 제시한 도Figure 9 is a diagram showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention as an actual product.
도 10은 기존의 반도체 패키지를 제조하는 8대 공정과 본 발명의 실시예에 의한 방열 반도체 패키지를 제조하는 공정이 연속적인 인라인(in-line) 공정으로 구현되는 것을 도시한 개념도Figure 10 is a conceptual diagram showing that the eight processes for manufacturing a conventional semiconductor package and the process for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention are implemented as a continuous in-line process.
도 11은 본 발명의 실시예에 의한 방열 반도체 패키지에 적용되는 유도 가열부에서 측면 냉각 공기 방출 타입을 도시한 개념도Figure 11 is a conceptual diagram showing a side cooling air discharge type from an induction heating unit applied to a heat dissipation semiconductor package according to an embodiment of the present invention.
도 12는 본 발명의 실시예에 의한 방열 반도체 패키지에 적용되는 유도 가열부에서 상부 냉각 공기 방출 타입을 도시한 개념도Figure 12 is a conceptual diagram showing the upper cooling air discharge type from the induction heating unit applied to the heat dissipation semiconductor package according to an embodiment of the present invention.
본 발명에 의한 방열 반도체 패키지는 기판과, 상기 기판에 실장된 반도체 칩과, 상기 기판 상에서 상기 반도체 칩의 측면을 둘러싸는 몰딩부와, 상기 몰딩부에 임베디드(Ebedded)되어 상기 반도체 칩에서 발생되는 열을 상기 몰딩부 외부로 방출시키는 열전도부재를 포함한다.The heat dissipation semiconductor package according to the present invention includes a substrate, a semiconductor chip mounted on the substrate, a molding portion surrounding a side of the semiconductor chip on the substrate, and a heat dissipation semiconductor package embedded in the molding portion that generates heat from the semiconductor chip. It includes a heat-conducting member that radiates heat to the outside of the molding part.
본 발명은 다양한 변환을 가할 수 있고 여러 가지 실시 예를 가질 수 있는 바, 특정 실시 예들을 도면에 예시하고 상세한 설명에서 상세하게 설명하고자 한다. 그러나, 이는 본 발명을 특정한 실시 형태에 대해 한정하려는 것이 아니며, 본 발명의 사상 및 기술 범위에 포함되는 모든 변환, 균등물 내지 대체물을 포함하는 것으로 이해되어야 한다. 본 발명을 설명함에 있어서 관련된 공지 기술에 대한 구체적인 설명이 본 발명의 요지를 흐릴 수 있다고 판단되는 경우 그 상세한 설명을 생략한다.Since the present invention can be modified in various ways and can have various embodiments, specific embodiments will be illustrated in the drawings and described in detail in the detailed description. However, this is not intended to limit the present invention to specific embodiments, and should be understood to include all transformations, equivalents, and substitutes included in the spirit and technical scope of the present invention. In describing the present invention, if it is determined that a detailed description of related known technologies may obscure the gist of the present invention, the detailed description will be omitted.
본 발명에서 핵심이 되는 기술적 사상은, 반도체 패키지의 내부에서 발생되는 열을 외부로 방출시키는 방열 수단(이하, 열전도 부재)을 반도체 패키지의 외형을 이루는 몰딩부에 임베디드(Ebedded)로 구현하여 반도체 패키지의 몰딩부 최소 두께 내에서 최적의 열전도를 구현할 수 있는 이점이 있다,The core technical idea of the present invention is to implement a heat dissipation means (hereinafter referred to as a heat conduction member) that radiates heat generated inside the semiconductor package to the outside by embedding it in a molding part forming the outer shape of the semiconductor package. It has the advantage of realizing optimal heat conduction within the minimum thickness of the molding part.
이를 위한, 본 발명은 반도체 패키지에 발열이 가장 심한 부위(hot spot: 도 4의 ‘A’)의 몰딩부에 일정 두께로 오목하게 파여진 음각부를 형성하고, 이 음각부에 금속층을 증착한 후, 솔더링 공정을 통해 금속층에 열전도 시트로 접합하는 것이다. For this purpose, the present invention forms a concave concave part with a certain thickness in the molding part of the hot spot ('A' in FIG. 4) of the semiconductor package, deposits a metal layer on this engraved part, and then deposits a metal layer on the engraved part. , It is joined to a metal layer with a heat-conducting sheet through a soldering process.
이하, 본 발명에 의한 열전도 부재가 임베디드된 방열 반도체 패키지의 실시 예를 첨부된 도면을 참조하여 상세히 설명한다.Hereinafter, an embodiment of a heat dissipation semiconductor package with an embedded heat conduction member according to the present invention will be described in detail with reference to the attached drawings.
도 2는 본 발명의 실시예에 의한 방열 반도체 패키지의 단면도를 개략적으로 도시한 도이고, 도 3은 본 발명의 실시예에 의한 방열 반도체 패키지에 열전도 부재가 직접 구현된 실제 제품을 찍은 사진이며, 도 4는 본 발명의 실시예에 의한 반도체 패키지의 사용 상태의 일예를 도시한 도이다. Figure 2 is a schematic cross-sectional view of a heat dissipation semiconductor package according to an embodiment of the present invention, and Figure 3 is a photograph of an actual product in which a heat conduction member is directly implemented in a heat dissipation semiconductor package according to an embodiment of the present invention. Figure 4 is a diagram showing an example of a use state of a semiconductor package according to an embodiment of the present invention.
도 2 및 도 3를 참조하면, 본 발명에 의한 열전도 부재가 임베디드된 방열 반도체 패키지는 기판(10), 반도체 칩(20), 몰딩부(30), 열전도 부재(40) 및 솔더 볼(50) 등을 포함하여 구성된다.Referring to Figures 2 and 3, the heat dissipation semiconductor package in which the heat conduction member is embedded according to the present invention includes a substrate 10, a semiconductor chip 20, a molding part 30, a heat conduction member 40, and a solder ball 50. It consists of, etc.
상기 기판(10)은, 예를 들면, 인쇄회로기판(PCB 기판) 등이 이용된다. 기판(10)의 일면에, 1 또는 2 이상의 반도체 칩이 실장된다. 한편, 기판(10)의 타면(일면과는 반대 측의 면)은, 그 외의 PCB 기판(예를 들어, 마더보드 : 도 4의 80))에 접속 가능한 접속 구조를 갖는다. 접속 구조로서, 예를 들면, 솔더 볼(50), 핀 커넥터 등을 들 수 있다. The substrate 10 is, for example, a printed circuit board (PCB). One or two or more semiconductor chips are mounted on one surface of the substrate 10. On the other hand, the other side of the board 10 (the side opposite to the one side) has a connection structure that can be connected to another PCB board (for example, motherboard: 80 in FIG. 4). Examples of the connection structure include solder balls 50 and pin connectors.
다만, 본 발명은 기판 타입으로 한정되는 것이 아니다. 즉 기판 타입 대신에 리드 프레임 타입이 적용될 수 있다. 다시 말해, 반도체 칩의 전기적 연결 방식에 있어 기판에 솔더 볼을 붙여서 연결하는 방식도 가능하며, 와이어를 이용하여 리드 프레임과 연결하는 방식도 가능할 수 있다.However, the present invention is not limited to the substrate type. That is, the lead frame type can be applied instead of the substrate type. In other words, in terms of the electrical connection method of the semiconductor chip, it is possible to connect it by attaching a solder ball to the substrate, and it is also possible to connect it to a lead frame using a wire.
상기 반도체 칩(20)은 메모리, 로직, 마이크로 프로세서, 아날로그 소자, 디지털 시그널 프로세서, 시스템-온-칩(System On Chip) 등 다양한 기능을 수행하는 반도체 칩일 수 있다. 또한, 반도체 칩은 적어도 두 개 이상의 반도체 칩들이 적층된 구조를 갖는 멀티-칩(multi-chip)일 수도 있다. 예를 들어, 적어도 두 개 이상의 반도체 칩들이 모두 동일한 종류의 소자일 수도 있고, 두 개 이상의 반도체 칩 중 하나는 메모리 소자이고, 다른 하나는 마이크로 컨트롤러 소자일 수 있다.The semiconductor chip 20 may be a semiconductor chip that performs various functions such as memory, logic, microprocessor, analog element, digital signal processor, and system on chip. Additionally, the semiconductor chip may be a multi-chip having a structure in which at least two or more semiconductor chips are stacked. For example, at least two semiconductor chips may all be the same type of device, or one of the two or more semiconductor chips may be a memory device and the other may be a microcontroller device.
도 2에 도시된 반도체 칩(20)은 기판(10) 상에 플립-칩(flip-chip) 본딩 방식으로 실장되나, 반도체 칩(20)의 실장 방식은 이에 한정되지 않는다. 예를 들어, 반도체 칩은 기판 상에 와이어 본딩 방식으로 실장될 수도 있고, 다수의 반도체 칩을 멀티로 적층하여 비아 홀(Via Hole)을 통해 서로 연결되는 TSV(Through Silicon Via) 방식으로 실장될 수도 있다. The semiconductor chip 20 shown in FIG. 2 is mounted on the substrate 10 using a flip-chip bonding method, but the mounting method of the semiconductor chip 20 is not limited to this. For example, semiconductor chips may be mounted on a substrate using a wire bonding method, or they may be mounted using a TSV (Through Silicon Via) method in which multiple semiconductor chips are stacked and connected to each other through via holes. there is.
도 2에 도시된 바와 같이 반도체 칩(20)이 플립-칩 본딩 방식으로 실장될 경우, 반도체 칩(20)은 범프(60)를 통해 기판(10)과 연결될 수 있다. 한편, 도 2에서 설명하지 않은 구성 번호 ‘70’은 반도체 칩을 보호하기 위한 보호막이다. 이때, 보호막(70)은 산화막 또는 질화막 또는 필름 형태를 갖는다. As shown in FIG. 2 , when the semiconductor chip 20 is mounted using a flip-chip bonding method, the semiconductor chip 20 may be connected to the substrate 10 through the bump 60 . Meanwhile, configuration number ‘70’, which is not explained in FIG. 2, is a protective film to protect the semiconductor chip. At this time, the protective film 70 has the form of an oxide film, a nitride film, or a film.
상기 몰딩부(30)는 반도체 칩(20)을 밀봉하여 반도체 칩(20)을 외부 환경의 위험 요소들로부터 보호하는 역할을 수행한다. 이러한 몰딩부(30)는 절연성 물질, 예컨대, 에폭시 수지와 같은 열경화성 수지, 폴리이미드와 같은 열가소성 수지, 또는 이들에 무기 필러와 같은 보강재가 포함된 수지, 구체적으로, ABF, FR-4, BT 수지 등을 포함할 수 있다. 또한, 몰딩부(30)에는 EMC(Epoxy molding compound)와 같은 몰딩 물질을 사용할 수 있다. 여기서, EMC는 경화제나 촉매의 존재하에 3차원 경화가 가능한 비교적 분자량이 작은 수지로서 기계적, 전기 절연 및 온도 저항 특성이 매우 우수한 열경화성 플라스틱이다. 물론, 본 발명에서는 몰딩부(30)의 재질이 전술한 물질들에 한정되는 것은 아니다.The molding part 30 serves to seal the semiconductor chip 20 and protect the semiconductor chip 20 from hazardous elements in the external environment. This molding portion 30 is made of an insulating material, for example, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a resin containing reinforcing materials such as an inorganic filler, specifically, ABF, FR-4, and BT resin. It may include etc. Additionally, a molding material such as EMC (Epoxy molding compound) may be used for the molding portion 30. Here, EMC is a thermosetting plastic that is a resin with a relatively low molecular weight that can be three-dimensionally cured in the presence of a curing agent or catalyst and has excellent mechanical, electrical insulation, and temperature resistance properties. Of course, in the present invention, the material of the molding part 30 is not limited to the materials described above.
이와 같이, 몰딩부(30)는 반도체 칩(20)의 기계적 보호, 전기적 연결 및 기계적 연결 등의 역할을 수행하는 것이다. 그런데, 최근에는 반도체 기술이 고도화되며 제품의 속도가 빨라지고, 기능이 많아짐에 따라 열 문제가 매우 심각하여 몰딩부(30)에서 열을 효과적으로 방출하는 기술들이 접목되고 있다. 즉, 몰딩부(30)는 반도체 칩(20)을 EMC 수지와 같은 패키지 재료로 감싸 외부의 기계적 및 화학적 충격으로 보호해주면서, 물리적/전기적으로 반도체 칩(20)을 시스템과 연결해 반도체 칩(20)이 동작하기 위한 전원을 공급하고, 원하는 기능을 할 수 있도록 신호를 입력 및 출력할 수 있도록 하면서, 반도체 칩(20)의 동작 시 발행하는 열을 방출해주는 역할도 수행하고 있다.In this way, the molding part 30 performs roles such as mechanical protection, electrical connection, and mechanical connection of the semiconductor chip 20. However, recently, as semiconductor technology has advanced, product speeds have increased, and functions have increased, heat problems have become very serious, and technologies that effectively dissipate heat from the molding part 30 are being applied. That is, the molding part 30 protects the semiconductor chip 20 from external mechanical and chemical shock by covering it with a packaging material such as EMC resin, and physically/electrically connects the semiconductor chip 20 to the system to form the semiconductor chip 20. It supplies power for this operation, allows input and output of signals to perform desired functions, and also serves to radiate heat generated when the semiconductor chip 20 operates.
상술한 관점에서, 본 발명은 반도체 칩(20)에서 발생되는 열을 반도체 패키지 외부로 방출시키는 열전도 부재(40: 방열수단)를 몰딩부(30)에 구현한 것이다. 즉, 열전도 부재(40)를 몰딩부(30)의 두께 내에 구현한 것이다. 본 발명에서는 이를 몰딩부(30)에 임베디드(Ebedded)된 열전도 부재로 정의하여 사용하고 있다.In view of the above, the present invention implements a heat conduction member (40: heat dissipation means) in the molding portion (30) that dissipates heat generated in the semiconductor chip (20) to the outside of the semiconductor package. That is, the heat-conducting member 40 is implemented within the thickness of the molding portion 30. In the present invention, it is defined and used as a heat-conducting member embedded in the molding part 30.
이하에서는, 도 2 내지 도 4 및 도 6 내지 7을 참조하여 몰딩부(30)에 임베디드(Ebedded)된 열전도 부재(40)를 보다 구체적으로 설명한다.Hereinafter, the heat conduction member 40 embedded in the molding part 30 will be described in more detail with reference to FIGS. 2 to 4 and 6 to 7.
상기 열전도 부재(40)는 몰딩부(30)에 형성된 금속층(41)과, 상기 금속층(41)에 접합된 열전도 시트(42)를 포함하여 구성된다. 이를 위해, 몰딩부(40)의 일면에는 금속층(41)이 증착되는 음각부(31)와, 상기 음각부(31)의 바닥면에 형성된 요철면(42)이 형성된다. The heat-conducting member 40 includes a metal layer 41 formed on the molding part 30 and a heat-conducting sheet 42 bonded to the metal layer 41. For this purpose, an engraved portion 31 on which the metal layer 41 is deposited is formed on one surface of the molding portion 40, and an uneven surface 42 formed on the bottom surface of the engraved portion 31.
상기 음각부(31)는 몰딩부의 제1 면의 적어도 어느 한 영역에 일정 깊이를 가지도록 형성할 수 있다. 이러한 음각부(31)는 후술할 레이저 가공 등을 통해 몰딩부(30)를 일정 깊이로 제거함으로써 형성될 수 있다. 예를 들어, 도 6에 도시된 바와 같이 몰딩부(30)의 최초의 두께에서 반도체 칩(20)을 보호하기 위해 반도체 칩(20) 위에 5~10um 두께의 몰딩부만 남기고 나머지 부분을 제거하여 음각부(31)를 형성할 수 있다. 다만 이에 한정되지 않고, 음각부(31)의 깊이는 반도체 패키지 또는 반도체 칩의 종류 및 사이즈에 따라 다양하게 변형될 수 있음은 물론이다.The engraved portion 31 may be formed to have a certain depth in at least one area of the first surface of the molding portion. This engraved portion 31 can be formed by removing the molding portion 30 to a certain depth through laser processing, etc., which will be described later. For example, as shown in FIG. 6, in order to protect the semiconductor chip 20 at the initial thickness of the molding portion 30, only the molding portion with a thickness of 5 to 10 μm is left on the semiconductor chip 20 and the remaining portion is removed. A concave portion 31 can be formed. However, it is not limited to this, and the depth of the engraved portion 31 may vary depending on the type and size of the semiconductor package or semiconductor chip.
이때, 음각부(31)는 도 3(a)에 도시된 바와 같이 몰딩부(30)의 어느 한 면에서 일정 폭의 가장자리를 유치한 채 그 내부에 4각의 평면을 갖는 오목한 홈의 형상을 가질 수도 있으며, 도 3(b)에 도시된 바와 같이 4각의 평면에서 각 변의 중앙과 꼭지점에서 방사형으로 몰딩부(30)의 가장자리까지 연장되는 오목한 홈의 형상을 가질 수도 있다. 후자의 경우에 열전도 부재(40)의 면적을 최대화할 수 있어 방열 효과가 보다 우수한 이점이 있다. At this time, the engraved portion 31 has the shape of a concave groove with a four-angled plane inside, with an edge of a certain width on one side of the molding portion 30, as shown in FIG. 3(a). It may also have the shape of a concave groove extending radially from the center and vertex of each side in a four-sided plane to the edge of the molding portion 30, as shown in FIG. 3(b). In the latter case, the area of the heat-conducting member 40 can be maximized, which has the advantage of having a better heat dissipation effect.
도 6 및 도 7에 도시된 바와 같이, 상기 요철면(32)은 레이저 가공 등을 통해 음각부(31)를 형성할 때 음각부(31)의 바닥면에 주기적으로 볼록과 오목 패턴이 반복되는 사선 또는 직선 형태의 요철부 형상을 가질 수 있다. 하지만, 본 발명은 이에 한하지 않으며 여러 가지 다양한 형상을 가질 수 있다. 이러한 요철면(32)은 금속층(41)의 형성을 위한 증착 공정에서 금속 재료들의 앵커링(anchoring)을 통해 금속층(41)과의 결합력을 높일 수 있고, 방열 표면적이 확대되어 방열 효과도 높일 수 있게 된다.As shown in Figures 6 and 7, the uneven surface 32 has convex and concave patterns that periodically repeat on the bottom surface of the intaglio part 31 when forming the intaglio part 31 through laser processing, etc. It may have a diagonal or straight concave-convex shape. However, the present invention is not limited to this and may have many different shapes. This uneven surface 32 can increase the bonding force with the metal layer 41 through anchoring of metal materials in the deposition process for forming the metal layer 41, and the heat dissipation surface area can be expanded to increase the heat dissipation effect. do.
도 7에 도시된 바와 같이, 상기 금속층(41)은 음각부(31) 내부의 요철면(32) 상에 형성되는 것으로서, 반도체 칩(20)에서 발생되는 열을 수직으로 전달하는 역할을 담당함과 아울러, 수지 재질로 이루어진 몰딩부(30)에 열전도 시트(42)의 솔더링을 위한 매개 역할을 담당한다. 이러한 금속층(41)은 음각으로 가공된 영역에 도금되어 증착된 구조를 갖는다. 좀더 부연하면, 금속층(41)은 음각부(31) 내부에 선택적 도금화 공정에 의해 형성되며, 레이저 가공과 반도체 패키지 상태 등에 따라서 건식 또는 습식 도금으로 진행할 수 있다. 금속층(41)을 형성하는 공정에 대한 보다 자세한 설명은 후술하기로 한다. As shown in FIG. 7, the metal layer 41 is formed on the uneven surface 32 inside the concave portion 31 and plays a role in vertically transmitting heat generated from the semiconductor chip 20. In addition, it serves as a medium for soldering the heat-conducting sheet 42 to the molding part 30 made of resin material. This metal layer 41 has a structure in which the metal layer 41 is plated and deposited on the engraved area. To elaborate further, the metal layer 41 is formed inside the engraved portion 31 by a selective plating process, and can be performed by dry or wet plating depending on laser processing and the state of the semiconductor package. A more detailed description of the process for forming the metal layer 41 will be described later.
여기서, 금속층(41)은 다수의 층으로 이루어질 수 있다. 다양한 실시예에 따르면, 금속층은 제1 금속층(41a)과 제2 금속층(41b)으로 포함할 수 있다. 여기서, 제1 금속층(41a)은 레이저 가공된 음각부(31) 위에 직접 형성되는 것으로서, 수지 재질로 이루어진 몰딩부(30)에 앵커링을 통해 높은 접합력을 가지는 역할 수행함과 아울러 반도체 칩(20)과 맞 닿는 영역이 있을 수도 있어 확산성이 적은 금속 소재를 사용하는 것이 바람직하다. 예를 들어, 제1 금속층(41a)은 구리(Cu), 니켈(Ni), 알루미늄(Al), 티타늄(Ti), 실리콘(Si) 중 적어도 어느 하나를 포함할 수 있다. 그리고 제2 금속층(41b)은 열전도 시트(420와 솔더 접합을 위한 솔더성이 우수하고 접합 후에 열전도가 매개 레이어 역할하는 것이다. 따라서, 제2 금속층(41b)은 솔더링이우수하고 열전도가 좋은 금속 소재를 사용하는 것이 바람직하다. 예를 들어, 제2 금속층(41b)은 구리(Cu), 니켈(Ni) 및 금(Au) 중 적어도 어느 하나를 포함할 수 있다. Here, the metal layer 41 may be composed of multiple layers. According to various embodiments, the metal layer may include a first metal layer 41a and a second metal layer 41b. Here, the first metal layer 41a is formed directly on the laser-processed engraved part 31, and serves to provide high bonding strength through anchoring to the molding part 30 made of a resin material and to form a bond between the semiconductor chip 20 and the semiconductor chip 20. Since there may be contact areas, it is advisable to use a metal material with low diffusivity. For example, the first metal layer 41a may include at least one of copper (Cu), nickel (Ni), aluminum (Al), titanium (Ti), and silicon (Si). And the second metal layer 41b has excellent solderability for solder bonding with the heat conductive sheet 420 and acts as a heat conduction intermediate layer after bonding. Therefore, the second metal layer 41b is made of a metal material with excellent soldering and good heat conduction. For example, the second metal layer 41b may include at least one of copper (Cu), nickel (Ni), and gold (Au).
상기, 열전도 시트(42)는 열전도성 재질로 제작된 두께가 얇은 판 형태로 금속층(41) 상에 접합된다. 더 구체적으로는 제2 금속층(41b) 상에 접합된다. 이러한 열전도 시트(42)는 몰딩부(30)에서 음각부(31)의 가장 바깥쪽에 배치되어 반도체 칩(20)에서 발생되는 열을 반도체 패키지 외부로 방출하는 역할을 한다. The heat conductive sheet 42 is bonded to the metal layer 41 in the form of a thin plate made of a heat conductive material. More specifically, it is bonded to the second metal layer 41b. This heat-conducting sheet 42 is disposed on the outermost side of the engraved portion 31 of the molding portion 30 and serves to radiate heat generated from the semiconductor chip 20 to the outside of the semiconductor package.
또한, 도 4에 도시된 바와 같이 본 발명의 방열 반도체 패키지가 전자기기의 마더보드(70)에 조립될 때 추가적인 방열수단인 TIM 시트(300) 및/또는 EMI 차폐부재(400)와 연결되어 외부에 효과적으로 열을 방출할 수 있다. 여기서, TIM 시트(300)는 열전도성 계면 물질(TIM : Thermal interface material)로 이루어진 시트를 포함하고, EMI 차폐부재(400)는 반도체 패키지 주변에 설치되어 전자파를 차단하기 위한 것이다. In addition, as shown in FIG. 4, when the heat dissipation semiconductor package of the present invention is assembled on the motherboard 70 of an electronic device, it is connected to the TIM sheet 300 and/or the EMI shielding member 400, which are additional heat dissipation means, to provide external heat dissipation. can effectively dissipate heat. Here, the TIM sheet 300 includes a sheet made of a thermally conductive interface material (TIM), and the EMI shielding member 400 is installed around the semiconductor package to block electromagnetic waves.
이러한 열전도 시트(42)는 구리, 알루미늄 등의 금속 재질 또는 실리콘 등과 같은 준금속 재질 또는 카본, 그라파이트 등과 같은 탄소 계열의 섬유 등을 사용할 수 있다. 물론, 본 발명에서는 열전도 시트의 재질이 전술한 물질들에 한정되는 것은 아니다. The heat-conducting sheet 42 may be made of a metal material such as copper or aluminum, a metalloid material such as silicon, or a carbon-based fiber such as carbon or graphite. Of course, in the present invention, the material of the heat-conducting sheet is not limited to the materials described above.
도 7 및 도 8을 참조하면, 열전도 시트(42)는 금속층(41)에 솔더링을 통해 접합될 수 있다. 이를 위해서는 열전도 시트(42)와 금속층(41) 사이에는 솔더 페이스트(43)가 도포된다. Referring to FIGS. 7 and 8 , the heat-conducting sheet 42 may be bonded to the metal layer 41 through soldering. For this purpose, solder paste 43 is applied between the heat-conducting sheet 42 and the metal layer 41.
여기서, 열전도 시트(42)가 금속층(41)에 솔더링을 수행하기 위한 방식으로는 크게 2가지 방식이 고려될 수 있다. 솔더링 방식 중 하나는 리플로우 솔더링 방식이고, 다른 하나는 유도가열 솔더링 방식이다. Here, two major methods can be considered for soldering the heat-conducting sheet 42 to the metal layer 41. One of the soldering methods is the reflow soldering method, and the other is the induction heating soldering method.
그런데 리플로우 솔더링 방식에 의해 솔더링되는 경우에는 몰딩부가 고온에 견뎌야 하기 때문에 내열도가 높은 재질을 사용해야 하며, 솔더링 공정 중에 반도체 패키지 내에 포함된 반도체 칩 등에 열적 데미지를 줄 수 있다. 따라서, 따라서, 본 발명에서는 리플로우 솔더링 방식보다 유도가열 방식으로 열전도 시트를 솔더링하는 것이 더 바람직하다. However, when soldering using the reflow soldering method, a material with high heat resistance must be used because the molding part must withstand high temperatures, and thermal damage may be caused to semiconductor chips included in the semiconductor package during the soldering process. Therefore, in the present invention, it is more preferable to solder the heat-conducting sheet using an induction heating method rather than a reflow soldering method.
한편, 유도가열 솔더링은 유도가열 코일에 의해 형성되는 자기장 내부에 위치하는 도체만 국부적으로 가열하므로 몰딩부의 재질을 내열도가 높은 재질을 사용할 필요가 없고, 특히 반도체 패키지 내에 포함된 반도체 칩 등에 열적 데미지가 전혀 없는 이점이 있다. 유도가열 솔더링을 통한 열전도 시트의 금속층에 접합 방법은 뒤에서 보다 자세하게 설명하기로 한다. On the other hand, induction heating soldering locally heats only the conductor located inside the magnetic field formed by the induction heating coil, so there is no need to use a material with high heat resistance as the molding part, and in particular, it does not cause thermal damage to the semiconductor chip contained in the semiconductor package. There is an advantage to not having any at all. The method of joining the metal layer of the heat conduction sheet through induction heating soldering will be described in more detail later.
상술한 구성에 의한, 본 발명에 의한 방열 반도체 패키지는 반도체 칩에서 발생되는 열이 몰딩부에서 최소한의 두께를 이루는 음각부를 통해 금속층과 열전도 시트로 직접 전달되어 공기로 방출될 수 있으며, 또한 외부의 다른 방열부재(TIM 시트 또는 EMI 차폐부재)를 통해서 외부로 방출될 수도 있다.With the above-described configuration, the heat dissipation semiconductor package according to the present invention allows heat generated from the semiconductor chip to be transferred directly to the metal layer and the heat-conducting sheet through the concave part forming the minimum thickness in the molding part and released into the air, and can also be released to the outside. It may also be emitted to the outside through other heat dissipation members (TIM sheets or EMI shielding members).
앞서 설명한 바와 같이, 본 발명의 방열 반도체 패키지는, 반도체 패키지의 외형을 이루는 몰딩부에 금속화(금속층)를 형성하고(MID : Mold Interconnected Device), 금속층에는 열전도 시트가 솔더링에 의해 접합되는 것이다. 이에 따라, 열전도 부재가 플라스틱 재질로 이루어진 몰딩부 내부에 임베디드된 상태로 직접 실장될 수 있다(MDM : Molding Direct Mounting). As previously described, in the heat dissipation semiconductor package of the present invention, metallization (metal layer) is formed on a molding part that forms the exterior of the semiconductor package (MID: Mold Interconnected Device), and a heat-conducting sheet is bonded to the metal layer by soldering. Accordingly, the heat-conducting member can be mounted directly while embedded inside a molding part made of plastic (MDM: Molding Direct Mounting).
이와 같이, 본 발명에 의한 방열 반도체 패키지는 그 외형을 이루는 플라스틱 재질의 몰딩부에 MID와 MDM을 적용하여 열전도 부재를 직접 형성될 수 있어, 반도체 패키지의 3차원 형상에 따른 3차원의 방열 및 열전도를 구현할 수 있고, 이로 인해 반도체 패키지가 설치되는 공간적인 환경에 따라 방열 부위를 능동적으로 대응할 수 있는 이점이 있다.In this way, the heat dissipation semiconductor package according to the present invention can directly form a heat conduction member by applying MID and MDM to the plastic molding part forming the outer shape, thereby enabling three-dimensional heat dissipation and heat conduction according to the three-dimensional shape of the semiconductor package. can be implemented, and this has the advantage of being able to actively respond to the heat dissipation area according to the spatial environment in which the semiconductor package is installed.
이하에서는, 도 5 내지 도 9를 참조하여 본 발명의 일 실시예 의한 열전도 부재가 임베디드된 방열 반도체 패키지를 제조하는 방법에 대하여 설명하기로 한다.Hereinafter, a method of manufacturing a heat dissipation semiconductor package with an embedded heat-conducting member according to an embodiment of the present invention will be described with reference to FIGS. 5 to 9.
도 5는 본 발명의 실시예에 의한 방열 반도체 패키지를 제조하는 공정 순서를 도시한 플로우챠트이고, 도 6 내지 도 8은 본 발명의 실시예에 의한 방열 반도체 패키지를 제조하는 공정 순서를 개념도로 제시한 것이고,도 9는 본 발명의 실시예에 의한 방열 반도체 패키지를 제조하는 공정 순서를 실제 제품으로 제시한 것이다. Figure 5 is a flow chart showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention, and Figures 6 to 8 present a conceptual diagram showing the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention. 9 shows the process sequence for manufacturing a heat dissipation semiconductor package according to an embodiment of the present invention as an actual product.
먼저, 반도체 패키징 공정이 완료된 반도체 패키지가 제공되고(도 5의 S10 단계, 도 6), 상기 반도체 패키징의 외형을 이루는 몰딩부(30)의 상면에 레이저 가공에 의해 일정 영역을 제거하여 음각부(31)를 형성한다(도 5의 S20 단계, 도 6, 도 9(a)). 이때, 레이저 가공에 따라 음각부(31)가 형성되면서 음각부(31)를 이루는 바닥면에는 미세한 요철 형태의 패턴홈이 형성된다. 즉 음각부(31)의 바닥면에는 주기적으로 볼록과 오목 패턴이 반복되는 사선 또는 직선 형태의 요철면(32)이 형성될 수 있다. 레이저는 다이오드(diode) 레이저, UV(ultraviolet) 레이저, 엑시머(excimer) 레이저 등이 사용될 수 있다. 본 발명에서는 음각부를 형성함에 있어 레이저 가공에 한정되지 않고, CNC(computerized numerical control) 밀링 가공, 습식 식각, 건식 식각 등의 다양한 방법이 적용될 수 있다. First, a semiconductor package for which the semiconductor packaging process has been completed is provided (step S10 in FIG. 5, FIG. 6), and a certain area is removed by laser processing on the upper surface of the molding part 30 forming the outer shape of the semiconductor packaging to form an engraved portion ( 31) is formed (step S20 of Figure 5, Figure 6, Figure 9(a)). At this time, as the engraved portion 31 is formed through laser processing, a pattern groove in the form of fine unevenness is formed on the bottom surface of the engraved portion 31. That is, an uneven surface 32 in the form of a diagonal or straight line in which convex and concave patterns are periodically repeated may be formed on the bottom surface of the intaglio portion 31. The laser may be a diode laser, UV (ultraviolet) laser, or excimer laser. In the present invention, forming an engraved portion is not limited to laser processing, and various methods such as CNC (computerized numerical control) milling, wet etching, and dry etching can be applied.
이후 상기 음각부(31) 영역에 도금 금속에 의해 금속층(41)이 증착 형성된다(도 5의 S30, 도 7, 도 9(b)). 여기서, 금속층(41)은 음각부(31)의 바닥면을 이루는 요철면(32)에 구리(Cu), 니켈(Ni), 알루미늄(Al), 티타늄(Ti), 실리콘(Si) 중 적어도 어느 하나를 포함하는 제1 금속층(41a)과, 제1 금속층 상에 구리(Cu), 니켈(Ni) 및 금(Au) 중 적어도 어느 하나를 포함 제2 금속층(41b)이 적층되어 형성될 수 있다. 이러한 금속층(30)은 마스킹(도 7의 100)을 이용한 습식 도금, CVD(Physical Vapor Deposition), PVD(Chemical Vapor Deposition), E-BEAM 등 건식 박막 증착법 등을 이용하여 음각부의 면적에 선택적으로 금속화를 구현할 수 있다Afterwards, a metal layer 41 is deposited by plating metal in the area of the concave portion 31 (S30 in Fig. 5, Fig. 7, Fig. 9(b)). Here, the metal layer 41 is made of at least one of copper (Cu), nickel (Ni), aluminum (Al), titanium (Ti), and silicon (Si) on the uneven surface 32 forming the bottom surface of the intaglio portion 31. It may be formed by stacking a first metal layer 41a containing one and a second metal layer 41b containing at least one of copper (Cu), nickel (Ni), and gold (Au) on the first metal layer. . This metal layer 30 is selectively coated with metal in the area of the concave portion using dry thin film deposition methods such as wet plating using masking (100 in FIG. 7), CVD (Physical Vapor Deposition), PVD (Chemical Vapor Deposition), and E-BEAM. Anger can be realized
다음으로, 금속층(30) 위에 열전도 시트(42)를 유도 가열 방식으로 솔더링 하여 몰딩부에 직실상한다. 이를 위해 솔더 페이스트(43)를 금속층 (41)위에 디스펜싱(dispensing)한다(도 5의 S40, 도 7, 도 9(c)). 그리고 솔더 페이스트(43)에 열전도 시트(42)를 마운팅(mounting) 한다(도 5의 S50, 도 8). 이후에 유도 가열부(200)를 열전도 시트(42) 위에 배치하여 유도 가열함으로써(도 5의 S60 및 도 8), 솔더 페이스트(43)를 멜팅(melting)함으로써 열전도 시트(42)를 몰딩부(30)에 두께에 임베디드(Embedded)될 수 있다(도 5의 S70 및 9(d)). Next, the heat conductive sheet 42 is soldered on the metal layer 30 by induction heating and placed directly on the molding part. For this purpose, solder paste 43 is dispensed on the metal layer 41 (S40 in Fig. 5, Fig. 7, Fig. 9(c)). Then, the heat-conducting sheet 42 is mounted on the solder paste 43 (S50 in FIG. 5, FIG. 8). Thereafter, the induction heating unit 200 is placed on the heat-conducting sheet 42 and heated induction (S60 in FIGS. 5 and 8), thereby melting the solder paste 43 to form the heat-conducting sheet 42 into a molding portion ( 30) can be embedded in the thickness (S70 and 9(d) of Figure 5).
이때 유도 가열부(200)는 금속층(41)을 유도 가열하는 것이다. 이로 인해 몰딩부(30)와 열전도 시트(42) 사이에 도포된 솔더 페이스트(43)가 녹으면서 열전도 시트(42)가 플라스틱 재질로 이루어진 몰딩부(30)의 음각부(31)에 직접 실장될 수 있다. At this time, the induction heating unit 200 inductively heats the metal layer 41. As a result, the solder paste 43 applied between the molding part 30 and the heat-conducting sheet 42 melts, and the heat-conducting sheet 42 can be directly mounted on the concave part 31 of the molding part 30 made of plastic. You can.
여기서, 상기 유도가열부(200)는 고주파 전원 공급 유닛(미도시)에 전기적으로 연결된 유도가열 코일(210)과, 유도가열 코일(210) 내부에 배치되어 유도가열 코일(210)에 의하여 유도되는 자속을 솔더링 부위로 집중시키기 위한 자성체 코어(220)로 이루어진다. 이때, 유도 가열부(200)는 도시되어 있지 않지만, 이송로봇(미도시)를 통해 X축/Y축/Z축 방향으로 이동시켜 다수의 회로 브릭에 마운팅된 전자 소자들을 연속적으로 솔더링을 수행할 수 있다. 또한, 이송로봇(미도시)에는 다수의 유도 가열부가 구비되어 한 번에 다수의 반도체 패키지를 동시에 솔더링을 수행할 수도 있다. Here, the induction heating unit 200 includes an induction heating coil 210 electrically connected to a high-frequency power supply unit (not shown), and is disposed inside the induction heating coil 210 and induced by the induction heating coil 210. It consists of a magnetic core 220 to focus the magnetic flux to the soldering area. At this time, the induction heating unit 200 is not shown, but can be moved in the X-axis/Y-axis/Z-axis directions through a transfer robot (not shown) to continuously solder electronic elements mounted on multiple circuit bricks. You can. Additionally, the transfer robot (not shown) is equipped with a plurality of induction heating units and can simultaneously solder a plurality of semiconductor packages at once.
상술한 바와 같이, 플라스틱 사출물로 이루어진 몰딩부에 금속층을 자기유도방식의 국소가열을 이용해 열전도 시트를 직접 임베디드(Embedded)할 수 있다. 이로 인해, 일반적인 리플로우(reflow) 솔더링 방식에 비해 반도체 패키지의 외형을 이루는 몰딩부의 소재에 제약이 없이 사용될 수 있고, 내부에 실장된 반도체 칩 등의 부품에 열적 손상 없이 열전도 시트를 몰딩부에 구현할 수 있게 된다. As described above, a heat-conducting sheet can be directly embedded in a molding part made of plastic injection using magnetic induction local heating of the metal layer. Because of this, compared to the general reflow soldering method, it can be used without restrictions on the material of the molding part that forms the exterior of the semiconductor package, and a heat-conducting sheet can be implemented in the molding part without thermal damage to components such as semiconductor chips mounted inside. It becomes possible.
한편, 도 10에 도시된 바와 같이, 본 발명에 의한 방열 반도체 패키지는 반도체 패키징 공정을 통해 형성되는 몰딩부에 열전도 부재를 직접 구현함으로써, 기존의 반도체 패키지의 8대 제조 공정 이후에 추가로 이어서 인라인으로 구현할 수 있어 대량 생산 및 생산 라인 구축에 매우 유리한 이점이 있다. Meanwhile, as shown in FIG. 10, the heat dissipation semiconductor package according to the present invention implements a heat conduction member directly in the molding part formed through the semiconductor packaging process, so that it can be manufactured further in-line after the eight manufacturing processes of the existing semiconductor package. This is very advantageous for mass production and production line construction.
또한, 본 발명의 방열 반도체 패키지를 제조할 때 사용되는 유도 가열부(200)에는 자성체 코어(220)의 열을 냉각시킬 수 있는 냉각 구조가 적용되어 솔더링 품질을 향상시킬 수 있는 유도 가열부를 제공한다.In addition, a cooling structure that can cool the heat of the magnetic core 220 is applied to the induction heating unit 200 used when manufacturing the heat dissipation semiconductor package of the present invention, providing an induction heating unit that can improve soldering quality. .
도 11은 본 발명의 실시예에 의한 방열 반도체 패키지에 적용되는 유도가열부에서 측면 냉각 공기 방출 타입을 도시한 개념도이다.Figure 11 is a conceptual diagram showing a side cooling air discharge type from an induction heating unit applied to a heat dissipation semiconductor package according to an embodiment of the present invention.
도 11을 참조하면, 상기 유도가열부(200)는 유도가열 코일(210), 자성체 코어(220), 코일 보빈(230)을 포함하여 구성된다.Referring to FIG. 11, the induction heating unit 200 includes an induction heating coil 210, a magnetic core 220, and a coil bobbin 230.
상기 유도가열 코일(210)은 고주파 전원 공급 유닛(미도시)에 전기적으로 연결되어 전자기를 유도하는 것으로서, 전기 전도도가 높은 중공의 구리관을 이용하다. 유도가열 코일(210)은 중공의 내부에 냉각수로가 형성되어 냉각수(235)가 공급된다. 따라서, 자성체 코어(220)에서 발생되는 열은 유도가열 코일(210) 쪽으로 신속하게 방출될 수 있다. 여기서, 유도가열 코일(210)의 전체 형태는 헬리컬 및 네모, 원형 등의 다양한 형태로 구현이 가능하다. 나아가, 반도체 패키지의 종류 및 솔더링 환경에 따라 중공의 관 형태가 아닌 직경이 매우 가는 와이어 형태(예를 들어, 리츠(Litz) 와이어)일 수도 있다.The induction heating coil 210 is electrically connected to a high-frequency power supply unit (not shown) to induce electromagnetism, and uses a hollow copper tube with high electrical conductivity. The induction heating coil 210 has a cooling water passage formed inside the hollow space to supply cooling water 235. Accordingly, the heat generated in the magnetic core 220 can be quickly dissipated toward the induction heating coil 210. Here, the overall shape of the induction heating coil 210 can be implemented in various shapes such as helical, square, and circular. Furthermore, depending on the type of semiconductor package and the soldering environment, it may be in the form of a very thin wire (for example, Litz wire) rather than a hollow tube.
상기 자성체 코어(220)는 유도가열 코일(210)의 내부에 위치하여 유도가열 코일(210)에서 발생되는 자기 유도를 집중시켜주는 역할을 한다. 여기서, 자성체 코어(220)는 원형, 사각, 중공 등 다양한 형태로 구성할 수 있다.The magnetic core 220 is located inside the induction heating coil 210 and serves to concentrate the magnetic induction generated by the induction heating coil 210. Here, the magnetic core 220 can be configured in various shapes such as round, square, or hollow.
상기 코일 보빈(230)은 내부에 자성체 코어(220)가 삽입되고 외부에 유도가열 코일(210)이 배치되는 하우징의 역할을 수행하는 것이다. 이때, 코일 보빈(230)은 열전도 시트(32)가 솔더링 시에 들뜨지 않도록 눌러주는 누림판 역할도 수행하게 된다. The coil bobbin 230 serves as a housing in which a magnetic core 220 is inserted inside and an induction heating coil 210 is placed outside. At this time, the coil bobbin 230 also serves as a pressing plate to prevent the heat-conducting sheet 32 from lifting during soldering.
이러한 코일 보빈(230)의 외측면에는 유도가열 코일(210)이 정위치에서 안정적으로 고정될 수 있도록 나선형의 홈이 형성될 수 있다. 그리고 코일 보빈(230)의 측면에는 냉각 공기의 통로 역할을 수행하는 쓰루홀(231)이 상하 일정 간격을 두고 다수 형성된다. 이때, 쓰루홀(231)이 형성된 코일 보빈(230)의 내측면에는 코일 보빈(230)의 상부에서 유입되는 냉각 공기가 원활하게 쓰루홀(231)로 유입될 수 있도록 상대적으로 넓은 직경을 갖는 유동홀(234)이 형성되는 것이 바람직하다. A spiral groove may be formed on the outer surface of the coil bobbin 230 so that the induction heating coil 210 can be stably fixed in place. And on the side of the coil bobbin 230, a plurality of through holes 231 that serve as passages for cooling air are formed at regular intervals up and down. At this time, the inner surface of the coil bobbin 230 where the through hole 231 is formed has a relatively wide diameter flow so that the cooling air flowing in from the upper part of the coil bobbin 230 can flow smoothly into the through hole 231. It is desirable for the hole 234 to be formed.
한편, 코일 보빈(230)의 상부는 냉각 공기가 유입될 수 있도록 개구된 구조를 갖는다. 이에 따라, 코일 보빈(230)의 상부로 유입된 냉각 공기는 자성체 코어(220)를 거쳐서 쓰루홀(231)로 빠져나가면서 자성체 코어(220)에서 발생된 열을 외부로 신속하게 방출할 수 있다. 이때, 자성체 코어(220)는 냉각 공기와의 효과적인 열교환을 위해 내부가 상하 전체로 뚫려 있는 중공의 형태이거나 또는 코일 보빈(230)의 내부에 중공의 내부 공간이 유지될 수 있는 형태를 사용하는 것이 바람직하다. Meanwhile, the upper part of the coil bobbin 230 has an open structure to allow cooling air to flow in. Accordingly, the cooling air flowing into the upper part of the coil bobbin 230 passes through the magnetic core 220 and exits through the through hole 231, thereby quickly discharging the heat generated in the magnetic core 220 to the outside. . At this time, for effective heat exchange with cooling air, the magnetic core 220 is either a hollow shape with its interior open at the top and bottom, or a shape that allows a hollow internal space to be maintained inside the coil bobbin 230. desirable.
이와 같이, 본 발명에 적용되는 유도가열부(200)는 냉각 공기를 이용한 자성체 코어(220)를 냉각함으로써 자성체 코어(220)가 고온으로 가열되지 않아 유도가열 코일(210)의 자속을 효과적으로 집속할 수 있어 반도체 패키지 내에서 열전도 부재의 솔더링 품질이 크게 향상되는 효과가 있다.In this way, the induction heating unit 200 applied to the present invention cools the magnetic core 220 using cooling air, so that the magnetic core 220 is not heated to a high temperature, thereby effectively focusing the magnetic flux of the induction heating coil 210. This has the effect of greatly improving the soldering quality of heat-conducting members within a semiconductor package.
한편, 도 12는 도 11과 달리 유도 가열부의 냉각 구조로 상부 냉각 공기 방출 타입을 적용한 것이다. Meanwhile, Figure 12, unlike Figure 11, applies the upper cooling air discharge type as the cooling structure of the induction heating unit.
즉, 코일 보빈(230)의 측면에 구멍이 뚫린 쓰루홀(231)이 형성된 것이 아닌 전체적으로 막힌 구조를 적용하면서, 코일 보빈(230)의 개구된 상부 중앙에 구획벽(232)을 형성한 것이다. 이때, 구획벽(232)을 중심으로 한쪽으로는 냉각 공기가 주입되고 다른 한쪽으로는 자성체 코어(220)와 열교환이 완료된 공기가 방출된다. 좀 더 부연하면, 구획벽(232)을 중심으로 한쪽으로 유입된 공기가 코일 보빈(230) 내부에 삽입된 자성체 코어(220)를 거친 후에 구획벽(232)을 중심으로 공기가 유입되는 반대쪽의 개구부를 통해 빠져나가면서 자성체 코어(220)에서 발생된 열을 외부로 방출하는 흐름을 갖는다. 이때, 자성체 코어(220)와 접하는 보빈 코일(230)의 내측면에는 내측으로 움푹 파인 홈 형태의 유동홈(234)이 상하 일정 간격을 두고 다수 형성된다. 이에 따라, 자성체 코어(220)의 내측은 물론 자성체 코어(220)의 외측에서도 냉각 공기와 충분한 열교환이 이루어져서 자성체 코어의 냉각 효율이 향상될 수 있다. That is, an entirely closed structure is applied rather than a through-hole 231 formed on the side of the coil bobbin 230, and a partition wall 232 is formed in the center of the open upper part of the coil bobbin 230. At this time, cooling air is injected to one side around the partition wall 232, and air that has completed heat exchange with the magnetic core 220 is discharged to the other side. To be more specific, the air flowing in to one side around the partition wall 232 passes through the magnetic core 220 inserted inside the coil bobbin 230, and then passes through the magnetic core 220 inserted into the coil bobbin 230, and then flows into the air flowing in to the other side around the partition wall 232. There is a flow that radiates heat generated in the magnetic core 220 to the outside as it exits through the opening. At this time, on the inner surface of the bobbin coil 230 in contact with the magnetic core 220, a plurality of flow grooves 234 in the form of grooves recessed inward are formed at regular intervals up and down. Accordingly, sufficient heat exchange with cooling air occurs not only inside the magnetic core 220 but also outside the magnetic core 220, so that the cooling efficiency of the magnetic core 220 can be improved.
상기에서는 본 발명의 각 실시예를 도면을 참조하여 설명하였지만, 해당 기술 분야에서 통상의 지식을 가진 자라면 하기의 특허 청구의 범위에 기재된 본 발명의 사상 및 영역으로부터 벗어나지 않는 범위 내에서 본 발명을 다양하게 수정 및 변경시킬 수 있음을 이해할 수 있을 것이다. Although each embodiment of the present invention has been described above with reference to the drawings, those skilled in the art will understand the present invention without departing from the spirit and scope of the present invention as set forth in the claims below. You will understand that it can be modified and changed in various ways.
그리고, 본 발명에 의한 반도체 패키지는 스마트폰, 태블릿, 웨어러블, 디지털 카메라, 무선 라우터 등과 같은 모든 종류의 목적을 위해 많은 산업 분야에서 널리 사용될 수 있다.And, the semiconductor package according to the present invention can be widely used in many industrial fields for all kinds of purposes such as smartphones, tablets, wearables, digital cameras, wireless routers, etc.
본 발명은 열전도 부재가 임베디드된 방열 반도체 패키지 및 그 제조방법 그리고 그 제조에 이용되는 유도 가열 솔더링장치에 관한 것으로서, 반도체 제조산업, 스마트폰, 태블릿, 웨어러블, 디지털 카메라, 무선 라우터 등과 같은 전자기기 제조산업 및 AI 산업 등에 폭넓게 이용될 수 있다.The present invention relates to a heat dissipating semiconductor package with an embedded heat conductive member, a manufacturing method thereof, and an induction heating soldering device used for manufacturing the same, and is used in the semiconductor manufacturing industry, manufacturing electronic devices such as smartphones, tablets, wearables, digital cameras, wireless routers, etc. It can be widely used in industry and AI industries.
Claims (11)
- 기판;Board;상기 기판에 실장된 반도체 칩;a semiconductor chip mounted on the substrate;상기 기판 상에서 상기 반도체 칩의 측면을 둘러싸는 몰딩부; 및a molding portion surrounding a side of the semiconductor chip on the substrate; and상기 몰딩부에 형성되어 상기 반도체 칩에서 발생되는 열을 상기 몰딩부 외부로 방출시키는 열전도 부재;를 포함하는 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지.A heat-conducting member formed in the molding portion to radiate heat generated from the semiconductor chip to the outside of the molding portion.
- 청구항 1에 있어서, In claim 1,상기 열전도 부재는, The heat conducting member is,상기 몰딩부의 적어도 어느 한 면에 증착 형성되는 금속층; A metal layer deposited on at least one side of the molding part;상기 금속층 상에 도포된 솔더 페이스트; 및Solder paste applied on the metal layer; and상기 솔더 페이스트에 의해 상기 금속층에 솔더링 접합되는 열전도 시트;를 포함하는 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지.A heat-conducting sheet soldered to the metal layer using the solder paste.
- 기판;Board;상기 기판에 실장된 반도체 칩;a semiconductor chip mounted on the substrate;상기 기판 상에서 상기 반도체 칩의 측면을 둘러싸는 몰딩부; 및a molding portion surrounding a side of the semiconductor chip on the substrate; and상기 몰딩부에 임베디드(Ebedded)되어 상기 반도체 칩에서 발생되는 열을 상기 몰딩부 외부로 방출시키는 열전도부재;를 포함하는 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지.A heat-conducting member embedded in the molding portion to radiate heat generated from the semiconductor chip to the outside of the molding portion.
- 청구항 3에 있어서, In claim 3,상기 몰딩부의 적어도 어느 한 면에서 일정 두께로 오목하게 파여진 음각부가 형성되고, A concave concave portion with a certain thickness is formed on at least one side of the molding part,상기 열전도 부재는 상기 음각부 내부에 접합되어 상기 반도체 칩에서 발생되는 열을 외부로 방출하는 열전도 시트를 포함하는 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지. The heat-conducting member is a heat-dissipating semiconductor package with an embedded heat-conducting member, characterized in that it includes a heat-conducting sheet bonded to the inside of the concave portion to radiate heat generated from the semiconductor chip to the outside.
- 청구항 4에 있어서, In claim 4,상기 음각부의 바닥면에는 다수의 요철이 형성된 요철면이 형성되고,An uneven surface with a plurality of irregularities is formed on the bottom surface of the intaglio part,상기 열전도 부재는 상기 요철면에 증착 형성된 금속층과 상기 금속층 상에 도포된 솔더 페이스트를 더 포함하여, 상기 열전도 시트가 상기 금속층에 솔더링 접합되는 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지. The heat-conducting member further includes a metal layer deposited on the uneven surface and a solder paste applied on the metal layer, and the heat-conducting sheet is bonded to the metal layer by soldering.
- 청구항 2 또는 청구항 5에 있어서,In claim 2 or claim 5,상기 금속층은. The metal layer is.상기 요철면에 형성되는 것으로서, 구리(Cu), 니켈(Ni), 알루미늄(Al), 티타늄(Ti), 실리콘(Si) 중 적어도 어느 하나를 포함하는 제1 금속층; 및A first metal layer formed on the uneven surface and including at least one of copper (Cu), nickel (Ni), aluminum (Al), titanium (Ti), and silicon (Si); and상기 제1 금속층 위에 형성되는 것으로서, 구리(Cu), 니켈(Ni) 및 금(Au) 중 적어도 어느 하나를 포함하는 제2 금속층; 을 포함하는 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지.a second metal layer formed on the first metal layer and including at least one of copper (Cu), nickel (Ni), and gold (Au); A heat dissipation semiconductor package with an embedded heat conduction member, comprising:
- 청구항 1 또는 청구항 3에 있어서,In claim 1 or claim 3,상기 열전도 시트는 상기 몰딩부를 이루는 재질보다 열전도율이 높은 재질로 이루어진 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지. A heat-dissipating semiconductor package with an embedded heat-conducting member, wherein the heat-conducting sheet is made of a material with higher thermal conductivity than the material forming the molding part.
- 청구항 7에 있어서, In claim 7,상기 열전도 시트는 금속, 탄소섬유, 그라파이트 또는 세라믹으로 이루어진 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지. A heat dissipation semiconductor package with an embedded heat conduction member, wherein the heat conduction sheet is made of metal, carbon fiber, graphite, or ceramic.
- 반도체 칩의 패키징 공정이 완료된 반도체 패키지를 제공하는 단계;Providing a semiconductor package for which the semiconductor chip packaging process has been completed;상기 반도체 패키지의 외형을 이루는 몰딩부의 적어도 어느 한 면에 레이저 가공을 통해 요철면이 형성된 음각부를 형성하는 단계;forming an engraved portion with a concavo-convex surface through laser processing on at least one side of the molding portion forming the outer shape of the semiconductor package;상기 요철면 상에 도금을 통해 금속층을 증착하는 단계;depositing a metal layer on the uneven surface through plating;상기 금속층 상에 솔더 페이스트를 디스펜싱하는 단계;dispensing solder paste on the metal layer;상기 솔더 페이스트에 열전도 시트를 마운트하는 단계; 및 Mounting a heat-conducting sheet on the solder paste; and상기 솔더 페이스트를 가열하여 상기 솔더 페이스트를 멜팅하는 단계;를 포함하는 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지 제조방법.A method of manufacturing a heat-dissipating semiconductor package with an embedded heat-conducting member, comprising the step of melting the solder paste by heating the solder paste.
- 청구항 9에 있어서, In claim 9,상기 솔더 페이스틀 멜팅하기 위한 가열 방식은 유도 가열 솔더링을 이용한 것으로서, The heating method for melting the solder paste uses induction heating soldering,유도 가열부를 상기 열전도 시트에 인접하여 배치하는 단계; 및disposing an induction heating unit adjacent to the heat-conducting sheet; and상기 열전도 시트를 상기 몰딩부 내에 실질적으로 직접 실장하도록 상기 유도 가열부는 상기 솔더 페이스트를 멜팅하는 단계;를 포함하는 것을 특징으로 하는 열전도 부재가 임베디드된 방열 반도체 패키지 제조방법.A method of manufacturing a heat dissipation semiconductor package with an embedded heat conduction member, comprising the step of melting the solder paste by the induction heating unit so that the heat conduction sheet is substantially directly mounted within the molding part.
- 반도체 패키지의 몰딩부의 표면에 증착된 금속층을 유도 가열하여 상기 금속층에 열전도 시트를 솔더링하는 유도 가열 솔더링장치로서, An induction heating soldering device for inductively heating a metal layer deposited on the surface of a molding part of a semiconductor package and soldering a heat-conducting sheet to the metal layer,고주파 전원 공급 유닛에 전기적으로 연결되어 전자기를 유도하는 유도 가열 코일(210); An induction heating coil 210 that is electrically connected to a high-frequency power supply unit to induce electromagnetism;상기 유도 가열 코일(210) 내부에 위치하여 상기 열전도 시트로 자속을 집중시키는 자성체 코어(220); 및 A magnetic core 220 located inside the induction heating coil 210 to concentrate magnetic flux onto the heat-conducting sheet; and상기 유도 가열 코일(210)이 외측면에 배치되고 중앙에 상기 자성체 코어(220)가 설치되는 코일 보빈(230);을 포함하되, A coil bobbin 230 in which the induction heating coil 210 is disposed on the outer side and the magnetic core 220 is installed in the center,상기 코일 보빈(230)은 상부가 개구되어 냉각 공기가 상부 개구를 통해 상기 코일 보빈 내부로 유입되고, 상기 코일 보빈(230)의 측면에는 구멍이 뚫린 쓰루홀(231)이 다수 형성되어 상기 냉각 공기가 자성체 코어(220)를 거친 후에 상기 쓰루홀(231)을 통해 외측으로 방출되는 것을 특징으로 하는 유도 가열 솔더링장치.The coil bobbin 230 is open at the top so that cooling air flows into the coil bobbin through the top opening, and a plurality of through-holes 231 are formed on the side of the coil bobbin 230 to allow the cooling air to flow into the coil bobbin. An induction heating soldering device, characterized in that after passing through the magnetic core (220), it is discharged to the outside through the through hole (231).
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| KR1020220075853A KR20230174805A (en) | 2022-06-21 | 2022-06-21 | Semiconductor Package With Embedded Thermal Conductive Member And Manufacturing Method Of The Same AND Induction Heating Soldering Apparatus |
| KR10-2022-0075853 | 2022-06-21 |
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| KR20120110711A (en) * | 2011-03-30 | 2012-10-10 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package and fabricating method of thereof |
| KR20130123956A (en) * | 2012-05-04 | 2013-11-13 | 삼성전자주식회사 | Semiconductor packages and methods for fabricating the same |
| KR20150053496A (en) * | 2013-11-08 | 2015-05-18 | 주식회사 다원시스 | Induction heating soldering device |
| KR20150137976A (en) * | 2014-05-29 | 2015-12-09 | 삼성전자주식회사 | Semiconductor package having heat dissipating member |
| KR20170020663A (en) * | 2015-08-13 | 2017-02-23 | 삼성전자주식회사 | Semiconductor packages and methods for fabricating the same |
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| JP6950848B2 (en) | 2019-03-20 | 2021-10-13 | 住友ベークライト株式会社 | Thermally conductive composition used for semiconductor packages |
| KR20210096497A (en) | 2020-01-28 | 2021-08-05 | 삼성전자주식회사 | Semiconductor package comprising heat dissipation structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20120110711A (en) * | 2011-03-30 | 2012-10-10 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package and fabricating method of thereof |
| KR20130123956A (en) * | 2012-05-04 | 2013-11-13 | 삼성전자주식회사 | Semiconductor packages and methods for fabricating the same |
| KR20150053496A (en) * | 2013-11-08 | 2015-05-18 | 주식회사 다원시스 | Induction heating soldering device |
| KR20150137976A (en) * | 2014-05-29 | 2015-12-09 | 삼성전자주식회사 | Semiconductor package having heat dissipating member |
| KR20170020663A (en) * | 2015-08-13 | 2017-02-23 | 삼성전자주식회사 | Semiconductor packages and methods for fabricating the same |
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