WO2023245497A1 - 一种宽带LC Balun - Google Patents

一种宽带LC Balun Download PDF

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Publication number
WO2023245497A1
WO2023245497A1 PCT/CN2022/100454 CN2022100454W WO2023245497A1 WO 2023245497 A1 WO2023245497 A1 WO 2023245497A1 CN 2022100454 W CN2022100454 W CN 2022100454W WO 2023245497 A1 WO2023245497 A1 WO 2023245497A1
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terminal
subnetwork
port
balun
electrically connected
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PCT/CN2022/100454
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English (en)
French (fr)
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鲁勇
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上海捷士太通讯技术有限公司
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Priority to PCT/CN2022/100454 priority Critical patent/WO2023245497A1/zh
Publication of WO2023245497A1 publication Critical patent/WO2023245497A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components

Definitions

  • the present invention relates to the field of radio frequency chips, and in particular to a broadband LC Balun.
  • Balun has a wide range of applications in modern communication systems.
  • Balun is needed in the design and implementation of components such as balanced mixers, push-pull amplifiers, differential low-noise amplifiers, and antenna feed networks; the development direction of modern communication systems is Broadband and miniaturization, so Balun’s design direction is also broadband and miniaturization.
  • Balun’s design generally adopts a planar structure; existing technology usually uses coupled transmission lines based on The Marchand Balun topology of the model realizes broadband Balun.
  • this model provides planar, broadband Balun, the coupled transmission line used in this model needs to maintain a certain coupling degree within its operating frequency range.
  • the achievable coupling degree is not only improved
  • the complexity of the design also limits the working bandwidth of this type of Balun, and the products based on this model are larger in size. It is necessary to provide an LC Balun that can achieve ultra-wideband, miniaturization, planar type, and does not require mutual inductance.
  • the Balun is the abbreviation of Balance-Unbalance, which means a balanced unbalanced converter.
  • the goal of the present invention is to provide a broadband LC Balun, and provide a network topology of the broadband Balun that is miniaturized, planar, does not require mutual inductance, and uses an inductor L and a capacitor C with completely lumped parameters. structure, based on this topology, ultra-wideband, miniaturized, planar LC Balun can be realized.
  • the technical solution is a broadband LC Balun.
  • the design of the broadband LC Balun includes three steps:
  • S1 Construct the structure of LC Balun. Its structure includes subnetwork A, subnetwork B, subnetwork C, and subnetwork D. Subnetworks A, B, C, and D are all dual-port networks. The electrical performance of subnetwork A is respectively Connect subnetwork B and subnetwork C. Subnetwork B is electrically connected to subnetwork D;
  • S2 Construct four topological structures.
  • the four topological structures are ⁇ -shaped subnetwork 1, ⁇ -shaped subnetwork 2, T-shaped subnetwork 1, and T-shaped subnetwork 2.
  • the subnetworks A, B, C, and D are respectively Choose any of four topologies;
  • the new LC Balun topology proposed by the present invention only uses lumped parameters inductor L and capacitor C.
  • the inductor L and capacitor C in the present invention can be implemented using planar structures or discrete components, that is, a variety of chip processing techniques, such as complementary Metal oxide semiconductor CMOS, low-temperature co-fired ceramic LTCC, and various chip packaging processes, such as low-temperature co-fired ceramic LTCC, glass substrate, ordinary PCB processing technology and external discrete components can all implement the present invention, and no need
  • the additional mutual inductance components simplify the design complexity and realize the miniaturization of the corresponding components of the present invention.
  • the present invention has ultra-wideband operating performance, and has excellent amplitude and phase balance performance within the ultra-wideband operating frequency range.
  • the present invention also realizes the impedance matching between the source impedance and the load impedance. Therefore, by adopting the system design of the present invention, no additional impedance matching components are needed, and the system size can be further reduced.
  • the present invention can Realize ultra-wideband, miniaturization, planar LC Balun.
  • Figure 1 is a structural diagram and four topological structure diagrams of constructing LC Balun according to the present invention.
  • FIG. 2 is a schematic diagram of Balun composed of a topology structure in which subnetworks A, B, C, and D all select ⁇ -type subnetwork 1.
  • Figure 3 is a diagram showing the simulation results of the return loss performance of the unbalanced port in Example 1 within the operating frequency range.
  • Figure 4 is a diagram showing the simulation results of the insertion loss performance from port 1 to port 2 and port 1 to port 3 in the operating frequency range of implementation example 1.
  • Figure 5 is a diagram showing the simulation results of the balanced signal amplitude imbalance performance within the operating frequency range of implementation case 1.
  • Figure 6 is a diagram showing the simulation results of the balanced signal phase difference performance within the operating frequency range of implementation example 1.
  • Figure 7 is a Balun schematic diagram in which subnetwork A selects the topology structure of T-shaped subnetwork 2, subnetwork B selects the topology structure of T-shaped subnetwork 1, and subnetworks C and D both select the topology structure of ⁇ -shaped subnetwork 2.
  • Figure 8 is a diagram showing the simulation results of the return loss performance of the unbalanced port in the second implementation case within the operating frequency range.
  • Figure 9 is a diagram showing the simulation results of the insertion loss performance from port 1 to port 2 and port 1 to port 3 in the operating frequency range of implementation case 2.
  • Figure 10 is a diagram showing the simulation results of the balanced signal amplitude imbalance performance within the operating frequency range of the second implementation case.
  • Figure 11 is a diagram showing the simulation results of the balanced signal phase difference performance in the operating frequency range of the second implementation case.
  • a broadband LC Balun The design of the broadband LC Balun includes three steps:
  • S1 Construct the structure of LC Balun. Its structure includes subnetwork A, subnetwork B, subnetwork C, and subnetwork D. Subnetworks A, B, C, and D are all dual-port networks. The electrical performance of subnetwork A is respectively Connect subnetwork B and subnetwork C. Subnetwork B is electrically connected to subnetwork D;
  • S2 Construct four topological structures.
  • the four topological structures are ⁇ -shaped subnetwork 1, ⁇ -shaped subnetwork 2, T-shaped subnetwork 1, and T-shaped subnetwork 2.
  • the subnetworks A, B, C, and D are respectively Choose any of four topologies;
  • Described step S1 Construct the structure of LC Balun. Its structure includes subnetwork A, subnetwork B, subnetwork C, and subnetwork D. Subnetworks A, B, C, and D are all dual-port networks. The specific content is:
  • the subnetwork A is a dual-port network.
  • port 1 of subnetwork A is composed of terminal 1 A and terminal 1′ A.
  • Terminal 1′ A is the reference terminal of terminal 1 A ;
  • Port 2 consists of terminal 2 A and terminal 2′ A.
  • Terminal 2′ A is the reference terminal of terminal 2 A.
  • Terminal 1′ A and terminal 2′ A are electrically connected within subnetwork A;
  • the subnetwork B is a dual-port network.
  • port 1 of subnetwork B is composed of terminal 1 B and terminal 1′ B.
  • Terminal 1′ B is the reference terminal of terminal 1 B ;
  • Port 2 consists of terminal 2 B and terminal 2′ B.
  • Terminal 2′ B is the reference terminal of terminal 2 B.
  • Terminal 1′ B and terminal 2′ B are electrically connected within subnetwork B;
  • the subnetwork C is a dual-port network.
  • port 1 of subnetwork C is composed of terminal 1 C and terminal 1′ C.
  • Terminal 1′ C is the reference terminal of terminal 1 C ;
  • Port 2 consists of terminal 2 C and terminal 2′ C.
  • Terminal 2′ C is the reference terminal of terminal 2 C.
  • Terminal 1′ C and terminal 2′ C are electrically connected within subnetwork C;
  • the subnetwork D is a dual-port network.
  • port 1 of subnetwork D is composed of terminal 1 D and terminal 1′ D.
  • Terminal 1′ D is the reference terminal of terminal 1 D ;
  • Port 2 consists of terminal 2 D and terminal 2′ D.
  • Terminal 2′ D is the reference terminal of terminal 2 D.
  • Terminal 1′ D and terminal 2′ D are electrically connected within subnetwork D;
  • Terminal 2 A of port 2 of subnetwork A is electrically connected to terminal 1 B of port 1 of subnetwork B.
  • Terminal 2′ A of port 2 of subnetwork A is electrically connected to terminal 2 C of port 2 of subnetwork C.
  • Terminal 1′ B of port 1 of network B is electrically connected to terminal 1 D of port 1 of subnetwork D ;
  • the port 2 of the subnetwork B is in an open circuit state.
  • the terminals 1C , 1′C , and 2′C of the subnetwork C are electrically connected to the reference ground G of the present invention respectively.
  • the terminals 1′D and 2D of the subnetwork D , 2′ D are electrically connected to the reference ground G of the present invention respectively.
  • the broadband LC Balun also includes three ports, namely ports 1, 2, and 3. Ports 1, 2, and 3 are all unbalanced ports and single-ended ports. Port 1 is composed of terminals 1 and 1′, and port 2 is composed of Terminals 2 and 2′ are constituted, and port 3 is composed of terminals 3 and 3′. Terminals 1′, 2′, and 3′ are reference terminals of terminals 1, 2, and 3 respectively. Terminals 2′ and 3′ are respectively connected with the terminals of the present invention. The reference ground G is connected, and terminal 2 and terminal 3 constitute the balanced port of the present invention, which is a differential port. The balanced port is electrically connected to the external balanced system, and port 1 is electrically connected to the external unbalanced system;
  • the unbalanced port 1 is electrically connected to the port 1 of the subnetwork A.
  • the terminal 1 is electrically connected to the signal of the external unbalanced system
  • the terminal 1' is electrically connected to the signal of the external unbalanced system.
  • the unbalanced load impedance presented by the external unbalanced system at port 1 of the present invention is Z UB
  • R UB is the real part of the unbalanced load impedance value
  • X UB is the imaginary part of the unbalanced load impedance value
  • j is the imaginary unit
  • j 2 -1;
  • the terminal 2 is electrically connected to the terminal 2 C of the subnetwork C port 2, and the terminal 3 is electrically connected to the terminal 1 D of the subnetwork D port 1.
  • the terminal 2 and the terminal 3 are electrically connected to the balanced signal of the external balancing system respectively.
  • terminal 2' and terminal 3' are both electrically connected to the reference ground of the external balancing system; if the external balancing system does not have a reference ground, terminal 2' and terminal 3' are open circuit to the outside world.
  • the balanced load impedance presented by the external balancing system at the balancing port of the present invention is Z B
  • R B is the real part of the balanced load impedance value
  • X B is the balanced load impedance value.
  • the step S2 Construct four topological structures.
  • the four topological structures are ⁇ -shaped subnetwork 1, ⁇ -shaped subnetwork 2, T-shaped subnetwork 1, and T-shaped subnetwork 2.
  • the subnetworks A, B, and C , D respectively select any one of the four topological structures.
  • the specific content is:
  • the subnetworks A, B, C, and D can respectively select any one of the four topological structures (b), (c), (d), and (e) in Figure 1;
  • the specific topological structure of the ⁇ -type subnetwork 1 is: as shown in Figure 1(b), a two-port subnetwork is constructed.
  • Port 1 of the ⁇ -type subnetwork 1 is composed of terminal 1 b and terminal 1′ b .
  • Terminal 1 ′ b is the reference terminal of terminal 1 b ;
  • port 2 of ⁇ -type subnetwork 1 is composed of terminal 2 b and terminal 2′ b ,
  • terminal 2′ b is the reference terminal of terminal 2 b , terminal 1′ b and terminal 2′ b
  • the sub-network is electrically connected internally.
  • the inductor L 1 is connected in series between the sub-network terminals 1 b and 2 b
  • the capacitor C 1 is connected in series between the sub-network terminals 1 b and 1′ b
  • the capacitor C 2 is connected in series between the sub-network terminals 1 b and 1′ b
  • a ⁇ -type subnetwork 1 is formed using capacitor C 1 , inductor L 1 , and capacitor C 2 ;
  • the specific topology structure of the ⁇ -type subnetwork 2 is: as shown in Figure 1(c), a two-port subnetwork is constructed.
  • Port 1 of the ⁇ -type subnetwork 2 is composed of terminal 1c and terminal 1′c .
  • Terminal 1 ′ c is the reference terminal of terminal 1 c ;
  • port 2 of ⁇ -type subnetwork 2 is composed of terminal 2 c and terminal 2′ c ,
  • terminal 2′ c is the reference terminal of terminal 2 c , terminal 1′ c and terminal 2′ c
  • the sub-network is electrically connected internally.
  • the capacitor C 3 is connected in series between the sub-network terminals 1 c and 2 c .
  • the inductor L 2 is connected in series between the sub-network terminals 1 c and 1′ c.
  • the inductor L 3 is connected in series between the sub-network terminals 1 c and 2 c . Between the sub-network terminals 2 c and 2′ c , the inductor L 2 , the capacitor C 3 , and the inductor L 3 form a ⁇ -type sub-network 2;
  • the specific topological structure of the T-shaped subnetwork 1 is: as shown in Figure 1(d), a two-port subnetwork is constructed.
  • Port 1 of the T-shaped subnetwork 1 is composed of terminal 1d and terminal 1′d .
  • Terminal 1 ′ d is the reference terminal of terminal 1 d ;
  • port 2 of T-type subnetwork 1 is composed of terminal 2 d and terminal 2′ d ,
  • terminal 2′ d is the reference terminal of terminal 2 d , terminal 1′ d and terminal 2′ d
  • the sub-network is electrically connected inside.
  • Inductors L 4 and L 5 are connected in series between terminals 1 d and 2 d of the sub-network.
  • Capacitor C 4 is connected in series between the series connection point of inductor L 4 and inductor L 5 and terminal 1′ d. Between them, the inductor L 4 , capacitor C 4 , and inductor L 5 form a T-shaped subnetwork 1;
  • the specific topology structure of the T-shaped subnetwork 2 is: as shown in Figure 1(e), a two-port subnetwork is constructed.
  • Port 1 of the T-shaped subnetwork 2 is composed of terminal 1 e and terminal 1′ e .
  • Terminal 1 ′ e is the reference terminal of terminal 1 e ;
  • port 2 of T-type subnetwork 2 is composed of terminal 2 e and terminal 2′ e ,
  • terminal 2′ e is the reference terminal of terminal 2 e , terminal 1′ e and terminal 2′ e
  • the sub-network is electrically connected internally.
  • Capacitors C 5 and C 6 are connected in series between terminals 1 e and 2 e of the sub-network.
  • Inductor L 6 is connected in series between the series connection point of capacitor C 5 and capacitor C 6 and terminal 1′ e. Among them, the T-shaped subnetwork 2 is formed by using the capacitor C 5 , the inductor L 6 and the capacitor C 6 .
  • step S3 setting subnetwork parameters is:
  • topological structures there are a total of 256 topological structures in the present invention, and the Balun performance of the present invention composed of each topological structure is different. In actual design, a certain topological structure needs to be selected according to specific design requirements.
  • the values of the lumped parameters L and C of each subnetwork are:
  • the frequency range in which the unbalanced port return loss of this design is greater than 10dB is 0.895-18.33GHz, and the relative bandwidth is 181.4%.
  • the amplitude of the Balun balanced signal The difference is 0dB, and the absolute value of the phase difference is 180°. It can be seen that within a relative bandwidth of up to 181.4%, the Balun of the present invention provides excellent Balun performance;
  • Implementation case two Balun with a central operating frequency of 15GHz and balanced and unbalanced load impedance values of 100 ⁇ and 50 ⁇ respectively;
  • Case 2 The design goals of Case 2 are the same as Case 1.
  • the values of L and C calculated in Case 1 are also applicable to Case 2.
  • subnetwork A chooses the topology of Figure 1(e)
  • subnetwork B chooses the topology of Figure 1(d).
  • Figure 9 is the simulation result of the insertion loss performance from port 1 to port 2 and port 1 to port 3 in the implementation case 2 within the operating frequency range.
  • Figure 10 is the implementation case.
  • Figure 11 is the simulation result of the balanced signal phase difference performance of the second implementation case within the operating frequency range;
  • the frequency range in which the unbalanced port return loss of this design is greater than 10dB is 12.35-170.0GHz, and the relative bandwidth is 172.9%.
  • the amplitude difference of the Balun balanced signal is 0dB, and the absolute value of the phase difference is 180°. It can be seen that the Balun of the present invention provides excellent Balun performance within a relative bandwidth of up to 172.9%.
  • the present invention provides a broadband LC Balun, which provides a network topology structure of a broadband Balun that is miniaturized, planar, does not require mutual inductance, and uses an inductor L and a capacitor C with completely lumped parameters. Based on this topology, ultra-wideband can be realized , miniaturized, flat type LC Balun.

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Abstract

本发明公开了一种宽带LC Balun，所述宽带LC Balun的设计包含三个步骤：S1：构建LC Balun的结构，其结构包含子网络A、子网络B、子网络C、子网络D，子网络A、B、C、D都为双端口网络，所述子网络A分别电性能连接子网络B、子网络C，子网络B电性能连接子网络D，S2：构建四种拓扑结构，四种拓扑结构分别为π型子网络1、π型子网络2、T型子网络1、T型子网络2，所述子网络A、B、C、D分别选择四种拓扑结构中的任意一种，S3：进行子网络参数的设定，本发明提供了一种小型化、平面型、无需互感、使用完全集总参数的电感L和电容C构成的宽带Balun的网络拓扑结构，基于该拓扑结构可以实现超宽带、小型化、平面型的LC Balun。

Description

一种宽带LC Balun 技术领域
本发明涉及射频芯片领域，特别是涉及一种宽带LC Balun。
背景技术
Balun在现代通信系统中具有广泛的应用，例如在平衡混频器，推挽放大器，差分低噪放和天线馈电网络等元件的设计实现中都需要用到Balun；现代通信系统的发展方向是宽带化、小型化，因此Balun的设计方向也是宽带化、小型化，另外，为了便于采用现有芯片加工工艺进行大规模生产，Balun的设计一般采用平面型结构；现有技术通常使用基于耦合传输线模型的Marchand Balun拓扑结构实现宽带Balun，尽管这一模型提供了平面型、宽带Balun，但该模型中采用的耦合传输线需要在其工作频率范围内维持一定的耦合度，可实现的耦合度不仅提高了设计的复杂度，还限制了该类Balun的工作带宽，并且基于该模型的产品的尺寸较大，有必要提供一种可以实现超宽带、小型化、平面型、无需互感要求的LC Balun，所述Balun为Balance-Unbalance的缩写，表示平衡非平衡变换器。
发明内容
针对现有技术存在的不足，本发明的目标是提供一种宽带LC Balun，提供一种小型化、平面型、无需互感、使用完全集总参数的电感L和电容C构成的宽带Balun的网络拓扑结构，基于该拓扑结构可以实现超宽带、小型化、平面型LC Balun。
其解决的技术方案是，一种宽带LC Balun，所述宽带LC Balun的设计包含三个步骤：
S1：构建LC Balun的结构，其结构包含子网络A、子网络B、子网络C、子网络D，子网络A、B、C、D都为双端口网络，所述子网络A分别电性能连接子网络B、子网络C，子网络B电性能连接子网络D；
S2：构建四种拓扑结构，四种拓扑结构分别为π型子网络1、π型子网络2、T型子网络1、T型子网络2，所述子网络A、B、C、D分别选择四种拓扑结构中的任意一种；
S3：进行子网络参数的设定。
本发明所实现的有益效果为：
本发明所提出的新型LC Balun拓扑结构仅仅使用了集总参数电感L和电容C,本发明中的电感L和电容C可以使用平面结构或者分立元器件实现，即多种芯片加工工艺，如互补金属氧化物半导体CMOS、低温共烧陶瓷LTCC，以及多种芯片封装工艺，如低温共烧陶瓷LTCC、玻璃基板，还有普通PCB加工工艺及外置分立元器件均可以实现本发明，并且不需要额外的互感元器件，简化了设计的复杂度，实现了本发明所对应元件的小型化，本发明具有超宽带工作性能，在超宽带工作频率范围内，幅度和相位平衡度性能优异，另外，本发明在实现Balun功能的同时，还实现了源阻抗和负载阻抗之间的阻抗匹配，因此采用本发明的系统设计，无需额外的阻抗匹配元器件，其系统尺寸可进一步减小，本发明可以实现超宽带、小型化、平面型LC Balun。
附图说明
图1为本发明的构建LC Balun的结构图和四种拓扑结构图。
图2为子网络A、B、C、D均选择π型子网络1的拓扑结构组成的Balun示意图。
图3为实施案例一的非平衡端口的回波损耗性能在工作频率范围内的仿真结果图。
图4为实施案例一的端口1至端口2和端口1至端口3的插入损耗性能在工作频率范围内的仿真结果图。
图5为实施案例一的平衡信号幅度不平衡度性能在工作频率范围内的仿真结果图。
图6为实施案例一的平衡信号相位差性能在工作频率范围内的仿真结果图。
图7为子网络A选择T型子网络2的拓扑结构，子网络B选择T型子网络1的拓扑结构，子网络C和D均选择π型子网络2的拓扑结构组成的Balun示意图。
图8为实施案例二的非平衡端口的回波损耗性能在工作频率范围内的仿真结果图。
图9为实施案例二的端口1至端口2和端口1至端口3的插入损耗性能在工作频率范围内的仿真结果图。
图10为实施案例二的平衡信号幅度不平衡度性能在工作频率范围内的仿真结果图。
图11为实施案例二的平衡信号相位差性能在工作频率范围内的仿真结果图。
具体实施方式
为有关本发明的前述及其它技术内容、特点与功效，在以下配合附图对实施案例的详细说明中，将可清楚地呈现，以下实施例中所提到的结构内容，均以说明书附图为参考。
以下将参照附图，通过实施方式详细的描述本发明提供的一种宽带LC Balun。
一种宽带LC Balun，所述宽带LC Balun的设计包含三个步骤：
S1：构建LC Balun的结构，其结构包含子网络A、子网络B、子网络C、子网络D，子网络A、B、C、D都为双端口网络，所述子网络A分别电性能连接子网络B、子网络C，子网络B电性能连接子网络D；
S2：构建四种拓扑结构，四种拓扑结构分别为π型子网络1、π型子网络2、T型子网络1、T型子网络2，所述子网络A、B、C、D分别选择四种拓扑结构中的任意一种；
S3：进行子网络参数的设定。
所述步骤S1：构建LC Balun的结构，其结构包含子网络A、子网络B、子网络C、子网络D，子网络A、B、C、D都为双端口网络，具体内容为：
所述子网络A为双端口网络，图1(a)中，子网络A的端口1由端子1 A和端子1′ A构成，端子1′ A为端子1 A的参考端子；子网络A的端口2由端子2 A和端子2′ A构成，端子2′ A为端子2 A的参考端子，端子1′ A和端子2′ A在子网络A内部电性能相连；
所述子网络B为双端口网络，图1(a)中，子网络B的端口1由端子1 B和端子1′ B构成，端子1′ B为端子1 B的参考端子；子网络B的端口2由端子2 B和端子2′ B构成，端子2′ B为端子2 B的参考端子，端子1′ B和端子2′ B在子网络B内部电性能相连；
所述子网络C为双端口网络，图1(a)中，子网络C的端口1由端子1 C和端子1′ C构成，端子1′ C为端子1 C的参考端子；子网络C的端口2由端子2 C和端子2′ C构成，端子2′ C为端子2 C的参考端子，端子1′ C和端子2′ C在子网络C内部电性能相连；
所述子网络D为双端口网络，图1(a)中，子网络D的端口1由端子1 D和端子1′ D构成，端子1′ D为端子1 D的参考端子；子网络D的端口2由端子2 D和端 子2′ D构成，端子2′ D为端子2 D的参考端子，端子1′ D和端子2′ D在子网络D内部电性能相连；
所述子网络A端口2的端子2 A与子网络B端口1的端子1 B电性能相连，子网络A端口2的端子2′ A与子网络C端口2的端子2 C电性能相连，子网络B端口1的端子1′ B与子网络D端口1的端子1 D电性能相连；
所述子网络B端口2为开路状态，子网络C的端子1 C、1′ C、2′ C均分别与本发明的参考地G电性能相连，子网络D的端子1′ D、2 D、2′ D均分别与本发明的参考地G电性能相连。
所述宽带LC Balun还包括三个端口，分别为端口1、2、3，端口1、2、3均为非平衡端口，为单端端口，端口1由端子1和1′构成，端口2由端子2和2′构成，端口3由端子3和3′构成，端子1′、2′、3′分别是端子1、2、3的参考端子，端子2′和3′均分别与本发明的参考地G相连，端子2和端子3构成本发明的平衡端口，是差分端口，平衡端口与外部的平衡系统电性能连接，端口1与外部的非平衡系统电性能连接；
如图1(a)中，所述非平衡端口1与子网络A的端口1电性能相连，同时，端子1电性能连接外部非平衡系统的信号，端子1′电性能连接外部非平衡系统的参考地，外部非平衡系统呈现在本发明的端口1的非平衡负载阻抗为Z UB，其阻抗值为Z UB＝R UB+jX UB，其中，R UB是非平衡负载阻抗值的实部，X UB是非平衡负载阻抗值的虚部，j是虚数单位，j 2＝-1；
所述端子2电性能连接子网络C端口2的端子2 C，端子3电性能连接子网络D端口1的端子1 D，同时，端子2和端子3分别电性能连接外部的平衡系统的平衡信号，如果外部的平衡系统有参考地，则端子2′和端子3′均与外部平衡系统的参考地电性能连接；如果外部的平衡系统没有参考地，则端子2′和端子3′对外为开路状态，外部平衡系统呈现在本发明平衡端口的平衡负载阻抗为Z B，其阻抗值为Z B＝R B+jX B，R B是平衡负载阻抗值的实部，X B是平衡负载阻抗值的虚部。
所述步骤S2：构建四种拓扑结构，四种拓扑结构分别为π型子网络1、π型子网络2、T型子网络1、T型子网络2，所述子网络A、B、C、D分别选择四种拓扑结构中的任意一种的具体内容为：
所述子网络A、B、C、D可以分别选择图1中(b)、(c)、(d)、(e)四种拓 扑结构中的任意一种；
所述π型子网络1的具体拓扑结构为：如图1(b)所示，构建一个双端口子网络，π型子网络1的端口1由端子1 b和端子1′ b构成，端子1′ b为端子1 b的参考端子；π型子网络1的端口2由端子2 b和端子2′ b构成，端子2′ b为端子2 b的参考端子，端子1′ b和端子2′ b在该子网络内部电性能相连，电感L 1串联于该子网络端子1 b和2 b之间，电容C 1串联于该子网络端子1 b和1′ b之间，电容C 2串联于该子网络端子2 b和2′ b之间，利用电容C 1、电感L 1、电容C 2构成了π型子网络1；
所述π型子网络2的具体拓扑结构为：如图1(c)所示，构建一个双端口子网络，π型子网络2的端口1由端子1 c和端子1′ c构成，端子1′ c为端子1 c的参考端子；π型子网络2的端口2由端子2 c和端子2′ c构成，端子2′ c为端子2 c的参考端子，端子1′ c和端子2′ c在该子网络内部电性能相连，电容C 3串联于该子网络端子1 c和2 c之间，电感L 2串联于该子网络端子1 c和1′ c之间，电感L 3串联于该子网络端子2 c和2′ c之间，利用电感L 2、电容C 3、和电感L 3构成了π型子网络2；
所述T型子网络1的具体拓扑结构为：如图1(d)所示，构建一个双端口子网络，T型子网络1的端口1由端子1 d和端子1′ d构成，端子1′ d为端子1 d的参考端子；T型子网络1的端口2由端子2 d和端子2′ d构成，端子2′ d为端子2 d的参考端子，端子1′ d和端子2′ d在该子网络内部电性能相连，电感L 4和L 5依次串联于该子网络端子1 d和2 d之间，电容C 4串联于电感L 4与电感L 5的串联点和端子1′ d之间，利用电感L 4、电容C 4、电感L 5构成了T型子网络1；
所述T型子网络2的具体拓扑结构为：如图1(e)所示，构建一个双端口子网络，T型子网络2的端口1由端子1 e和端子1′ e构成，端子1′ e为端子1 e的参考端子；T型子网络2的端口2由端子2 e和端子2′ e构成，端子2′ e为端子2 e的参考端子，端子1′ e和端子2′ e在该子网络内部电性能相连，电容C 5和C 6依次串联于该子网络端子1 e和2 e之间，电感L 6串联于电容C 5与电容C 6的串联点和端子1′ e之间，利用电容C 5、电感L 6、电容C 6构成了T型子网络2。
所述步骤S3：进行子网络参数的设定的具体内容为：
S3.1:根据负载条件设定子网络参数：
S3.1.1：设定Balun目标中心工作频率为f 0,则其对应的角频率为ω 0＝ 2×π×f 0，设定非平衡端口的负载阻抗值为Z UN＝R UN+jX UN，平衡端口的平衡负载阻抗值为Z B＝R B+jX B；
S3.1.2：设定子网络A、B、C、D的特性参数分别为Z 0A、Z 0B、Z 0C、Z 0D，其中，Z 0A、Z 0B、Z 0C和Z 0D均为实数，并且Z 0C＝Z 0D；
S3.2：计算Z 0A的值：
S3.2.1：在中心频率点f 0,如果Z UN和Z B均为实数，则确定
Figure PCTCN2022100454-appb-000001
Figure PCTCN2022100454-appb-000002
S3.2.2：在中心频率点f 0,如果Z UN为实数，Z B为复数，在本发明Balun的平衡端口与平衡负载Z B之间增加匹配网络，可以使平衡负载阻抗Z B经过该匹配网络后呈现在本发明Balun的平衡端口的负载阻抗值Z B2在中心频率点f 0为实数，则确定
Figure PCTCN2022100454-appb-000003
S3.2.3：在中心频率点f 0,如果Z UN为复数，Z B为实数，在本发明Balun的非平衡端口与非平衡负载阻抗Z UN之间增加匹配网络，可以使非平衡负载阻抗Z UN经过该匹配网络后呈现在本发明Balun的非平衡端口的负载阻抗值Z UN3在中心频率点f 0为实数，则确定
Figure PCTCN2022100454-appb-000004
S3.2.4：在中心频率点f 0,如果Z UN和Z B均不为实数，在本发明Balun的非平衡端口与非平衡负载阻抗Z UN之间增加一个匹配网络1，可以使非平衡负载阻抗Z UN经过该匹配网络1后呈现在本发明Balun的非平衡端口的负载阻抗值Z UN4在中心频率点f 0为实数，同理，在本发明Balun的平衡端口与平衡负载Z B之间增加另一个匹配网络2，可以使平衡负载阻抗Z B经过该匹配网络2后呈现在本发明Balun的平衡端口的负载阻抗值Z B4在中心频率点f 0为实数，则确定
Figure PCTCN2022100454-appb-000005
S3.3：Z 0B和Z 0C的值的选择只要满足上述S3.1、S3.2的要求，则任意选择；
S3.4：对于工作于中心频率f 0，带有特性参数Z 0X的子网络X，图1(b)、(c)、(d)、(e)四种拓扑结构中，所有电感的电感值是相同的且所有电容的电容值是相同的，即L 1X＝L 2X＝L 3X＝L 4X＝L 5X＝L 6X，C 1X＝C 2X＝C 3X＝C 4X＝C 5X＝C 6X，电感值统一用L X，电容值统一用C X表示，L X和C X的计算公式分别为：L X＝Z 0X/ω 0，C X＝1/ω 0Z 0X；
对于工作于中心频率f 0，带有特性参数Z 0A的子网络A，图1(b)、(c)、(d)、(e)四种拓扑结构中的电感值和电容值分别为：L A＝Z 0A/ω 0，C A＝1/ω 0Z 0A，子网络A选择图1(b)、(c)、(d)、(e)四种拓扑结构中的任意一种；
对于工作于中心频为f 0，带有特性参数Z 0B的子网络B，图1(b)、(c)、(d)、(e)四种拓扑结构中的电感值和电容值分别为：L B＝Z 0B/ω 0，C B＝1/ω 0Z 0B，子网络B选择图1(b)、(c)、(d)、(e)四种拓扑结构中的任意一种；
对于工作于中心频率f 0，带有特性参数Z 0C的子网络C，图1(b)、(c)、(d)、(e)四种拓扑结构中的电感值和电容值分别为：L C＝Z 0C/ω 0，C C＝1/ω 0Z 0C，子网络C选择图1(b)、(c)、(d)、(e)四种拓扑结构中的任意一种；
对于工作于中心频率f 0，带有特性参数Z 0D的子网络D，图1(b)、(c)、(d)、(e)四种拓扑结构中的电感值和电容值分别为：L D＝Z 0D/ω 0，C D＝1/ω 0Z 0D，子网络D选择图1(b)、(c)、(d)、(e)四种拓扑结构中的任意一种；
本发明总计有256种拓扑结构,每种拓扑结构构成的本发明的Balun性能不尽相同，实际设计中，需要根据具体设计要求选择某一个拓扑结构。
进行实例验证：
实施案例一：中心工作频率为15GHz，平衡和非平衡负载阻抗值分别为100Ω和50Ω的Balun；
根据设计方法，各个子网络的集总参数L和C的值分别为：
L A＝0.7503nH，C A＝0.1501pF，L B＝0.0884nH，C B＝1.2732pF，L C＝L D＝6.3662nH，C C＝C D＝0.0177pF；
根据以上参数，如果子网络A、B、C、D均选择图1(b)的拓扑结构，则按照本发明方案，设计的Balun示意图如图2所示，图2中，L A1＝L A，L B1＝L B，L C1＝L D1＝L C,C A1＝C A2＝C A,C B1＝C B2＝C B,C C1＝C C2＝C D1＝C D2＝C C，图3是实施案例一的非平衡端口的回波损耗性能在工作频率范围内的仿真结果，图4是实施案例一的端口1至端口2和端口1至端口3的插入损耗性能在工作频率范围内的仿真结果，图5是实施案例一的平衡信号幅度不平衡度性能在工作频率范围内的仿真结果，图6是实施案例一的平衡信号相位差性能在工作频率范围内的仿真结果；
由图3-6可见，按照本发明的设计方案，本设计的非平衡端口回波损耗大于10dB的频率范围为0.895-18.33GHz,相对带宽为181.4％，在该带宽内，Balun 平衡信号的幅度差为0dB,相位差的绝对值为180°，可见，在高达181.4％的相对带宽内，本发明的Balun提供了优异的Balun性能；
实施案例二：中心工作频率为15GHz，平衡和非平衡负载阻抗值分别为100Ω和50Ω的Balun；
案例二的设计目标与案例一相同，案例一中计算的L、C的值也适用于案例二，案例二子网络A选择图1(e)的拓扑结构，子网络B选择图1(d)的拓扑结构，子网络C和D均选择图1(c)的拓扑结构,则按照本发明的方案，设计的Balun示意图如图7所示,L A2＝L A，L B2＝L B3＝L B，L C2＝L C3＝L D2＝L D3＝L C，C A3＝C A4＝C A，C B3＝C B，C C3＝C D3＝C C，图8是实施案例二的非平衡端口的回波损耗性能在工作频率范围内的仿真结果，图9是实施案例二的端口1至端口2和端口1至端口3的插入损耗性能在工作频率范围内的仿真结果，图10是实施案例二的平衡信号幅度不平衡度性能在工作频率范围内的仿真结果，图11是实施案例二的平衡信号相位差性能在工作频率范围内的仿真结果；
由图8-11可见，按照本发明的方案，本设计的非平衡端口回波损耗大于10dB的频率范围为12.35-170.0GHz,相对带宽为172.9％，在该带宽内，Balun平衡信号的幅度差为0dB,相位差的绝对值为180°，可见，在高达172.9％的相对带宽内，本发明的Balun提供了优异的Balun性能。
本发明提供了一种宽带LC Balun，提供一种小型化、平面型、无需互感、使用完全集总参数的电感L和电容C构成的宽带Balun的网络拓扑结构，基于该拓扑结构可以实现超宽带、小型化、平面型LC Balun。

Claims (5)

  1. 一种宽带LC Balun，其特征在于，所述宽带LC Balun的设计包含三个步骤：
    S1：构建LC Balun的结构，其结构包含子网络A、子网络B、子网络C、子网络D，子网络A、B、C、D都为双端口网络，所述子网络A分别电性能连接子网络B、子网络C，子网络B电性能连接子网络D；
    S2：构建四种拓扑结构，四种拓扑结构分别为π型子网络1、π型子网络2、T型子网络1、T型子网络2，所述子网络A、B、C、D分别选择四种拓扑结构中的任意一种；
    S3：进行子网络参数的设定；
    所述Balun为Balance-Unbalance的缩写，表示平衡非平衡变换器。
  2. 如权利要求1所述的一种宽带LC Balun，其特征在于，所述步骤S1：构建LC Balun的结构，其结构包含子网络A、子网络B、子网络C、子网络D，子网络A、B、C、D都为双端口网络，具体内容为：
    所述子网络A为双端口网络，子网络A的端口1由端子1 A和端子1′ A构成，端子1′ A为端子1 A的参考端子；子网络A的端口2由端子2 A和端子2′ A构成，端子2′ A为端子2 A的参考端子，端子1′ A和端子2′ A在子网络A内部电性能相连；
    所述子网络B为双端口网络，子网络B的端口1由端子1 B和端子1′ B构成，端子1′ B为端子1 B的参考端子；子网络B的端口2由端子2 B和端子2′ B构成，端子2′ B为端子2 B的参考端子，端子1′ B和端子2′ B在子网络B内部电性能相连；
    所述子网络C为双端口网络，子网络C的端口1由端子1 C和端子1′ C构成，端子1′ C为端子1 C的参考端子；子网络C的端口2由端子2 C和端子2′ C构成，端子2′ C为端子2 C的参考端子，端子1′ C和端子2′ C在子网络C内部电性能相连；
    所述子网络D为双端口网络，子网络D的端口1由端子1 D和端子1′ D构成，端子1′ D为端子1 D的参考端子；子网络D的端口2由端子2 D和端子2′ D构成，端子2′ D为端子2 D的参考端子，端子1′ D和端子2′ D在子网络D内部电性能相连；
    所述子网络A端口2的端子2 A与子网络B端口1的端子1 B电性能相连，子网络A端口2的端子2′ A与子网络C端口2的端子2 C电性能相连，子网络B端口1的端子1′ B与子网络D端口1的端子1 D电性能相连；
    所述子网络B端口2为开路状态，子网络C的端子1 C、1′ C、2′ C均分别与本发明的参考地G电性能相连，子网络D的端子1′ D、2 D、2′ D均分别与本发明的参考地G电性能相连。
  3. 如权利要求2所述的一种宽带LC Balun，其特征在于，所述宽带LC Balun还包括三个端口，分别为端口1、2、3，端口1、2、3均为非平衡端口，为单端端口，端口1由端子1和1′构成，端口2由端子2和2′构成，端口3由端子3和3′构成，端子1′、2′、3′分别是端子1、2、3的参考端子，端子2′和3′均分别与本发明的参考地G相连，端子2和端子3构成本发明的平衡端口，是差分端口，平衡端口与外部的平衡系统电性能连接，端口1与外部的非平衡系统电性能连接；
    所述非平衡端口1与子网络A的端口1电性能相连，同时，端子1电性能连接外部非平衡系统的信号，端子1′电性能连接外部非平衡系统的参考地，外部非平衡系统呈现在本发明端口1的非平衡负载阻抗为Z UN，其阻抗值为Z UN＝R UN+jX UN，其中，R UN是非平衡负载阻抗值的实部，X UN是非平衡负载阻抗值的虚部，j是虚数单位，j 2＝-1；
    所述端子2电性能连接子网络C端口2的端子2 C，端子3电性能连接子网络D端口1的端子1 D，同时，端子2和端子3分别电性能连接外部的平衡系统的平衡信号，如果外部的平衡系统有参考地，则端子2′和端子3′均与外部平衡系统的参考地电性能连接；如果外部的平衡系统没有参考地，则端子2′和端子3′对外为开路状态，外部平衡系统呈现在本发明平衡端口的平衡负载阻抗为Z B，其阻抗值为Z B＝R B+jX B，R B是平衡负载阻抗值的实部，X B是平衡负载阻抗值的虚部。
  4. 如权利要求1所述的一种宽带LC Balun，其特征在于，所述步骤S2：构建四种拓扑结构，四种拓扑结构分别为π型子网络1、π型子网络2、T型子网络1、T型子网络2，所述子网络A、B、C、D分别选择四种拓扑结构中的任意一种的具体内容为：
    所述π型子网络1的具体拓扑结构为：构建一个双端口子网络，π型子网络1的端口1由端子1 b和端子1′ b构成，端子1′ b为端子1 b的参考端子；π型子网络1的端口2由端子2 b和端子2′ b构成，端子2′ b为端子2 b的参考端子，端子1′ b和端子2′ b在该子网络内部电性能相连，电感L 1串联于该子网络端子1 b和2 b之间，电容C 1串联于该子网络端子1 b和1′ b之间，电容C 2串联于该子网络端子2 b和2′ b之间，利用电容C 1、电感L 1、电容C 2构成了π型子网络1；
    所述π型子网络2的具体拓扑结构为：构建一个双端口子网络，π型子网络2的端口1由端子1 c和端子1′ c构成，端子1′ c为端子1 c的参考端子；π型子网络 2的端口2由端子2 c和端子2′ c构成，端子2′ c为端子2 c的参考端子，端子1′ c和端子2′ c在该子网络内部电性能相连，电容C 3串联于该子网络端子1 c和2 c之间，电感L 2串联于该子网络端子1 c和1′ c之间，电感L 3串联于该子网络端子2 c和2′ c之间，利用电感L 2、电容C 3、和电感L 3构成了π型子网络2；
    所述T型子网络1的具体拓扑结构为：构建一个双端口子网络，T型子网络1的端口1由端子1 d和端子1′ d构成，端子1′ d为端子1 d的参考端子；T型子网络1的端口2由端子2 d和端子2′ d构成，端子2′ d为端子2 d的参考端子，端子1′ d和端子2′ d在该子网络内部电性能相连，电感L 4和L 5依次串联于该子网络端子1 d和2 d之间，电容C 4串联于电感L 4与电感L 5的串联点和端子1′ d之间，利用电感L 4、电容C 4、电感L 5构成了T型子网络1；
    所述T型子网络2的具体拓扑结构为：构建一个双端口子网络，T型子网络2的端口1由端子1 e和端子1′ e构成，端子1′ e为端子1 e的参考端子；T型子网络2的端口2由端子2 e和端子2′ e构成，端子2′ e为端子2 e的参考端子，端子1′ e和端子2′ e在该子网络内部电性能相连，电容C 5和C 6依次串联于该子网络端子1 e和2 e之间，电感L 6串联于电容C 5与电容C 6的串联点和端子1′ e之间，利用电容C 5、电感L 6、电容C 6构成了T型子网络2。
  5. 如权利要求1所述的一种宽带LC Balun，其特征在于，所述步骤S3：进行子网络参数的设定的具体内容为：
    S3.1:根据负载条件设定子网络参数：
    S3.1.1：设定Balun目标中心工作频率为f 0,则其对应的角频率为ω 0＝2×π×f 0，设定非平衡端口的负载阻抗值为Z UN＝R UN+jX UN，平衡端口的平衡负载阻抗值为Z B＝R B+jX B；
    S3.1.2：设定子网络A、B、C、D的特性参数分别为Z 0A、Z 0B、Z 0C、Z 0D，其中，Z 0A、Z 0B、Z 0C和Z 0D均为实数，并且Z 0C＝Z 0D；
    S3.2：计算Z 0A的值：
    S3.2.1：在中心频率点f 0,如果Z UN和Z B均为实数,则确定
    Figure PCTCN2022100454-appb-100001
    Figure PCTCN2022100454-appb-100002
    S3.2.2：在中心频率点f 0,如果Z UN为实数，Z B为复数，在本发明Balun的平衡端口与平衡负载Z B之间增加匹配网络，可以使平衡负载阻抗Z B经过该匹配 网络后呈现在本发明Balun的平衡端口的负载阻抗值Z B2在中心频率点f 0为实数，则确定
    Figure PCTCN2022100454-appb-100003
    S3.2.3：在中心频率点f 0,如果Z UN为复数，Z B为实数，在本发明Balun的非平衡端口与非平衡负载阻抗Z UN之间增加匹配网络，可以使非平衡负载阻抗Z UN经过该匹配网络后呈现在本发明Balun的非平衡端口的负载阻抗值Z UN3在中心频率点f 0为实数，则确定
    Figure PCTCN2022100454-appb-100004
    S3.2.4：在中心频率点f 0,如果Z UN和Z B均不为实数，在本发明Balun的非平衡端口与非平衡负载阻抗Z UN之间增加一个匹配网络1，可以使非平衡负载阻抗Z UN经过该匹配网络1后呈现在本发明Balun的非平衡端口的负载阻抗值Z UN4在中心频率点f 0为实数，同理，在本发明Balun的平衡端口与平衡负载Z B之间增加另一个匹配网络2，可以使平衡负载阻抗Z B经过该匹配网络2后呈现在本发明Balun的平衡端口的负载阻抗值Z B4在中心频率点f 0为实数，则确定
    Figure PCTCN2022100454-appb-100005
    S3.3：Z 0B和Z 0C的值的选择只要满足上述S3.1、S3.2的要求，则任意选择；
    S3.4：对于工作于中心频率f 0，带有特性参数Z 0X的子网络X，前述四种拓扑结构中，所有电感的电感值是相同的且所有电容的电容值是相同的，即L 1X＝L 2X＝L 3X＝L 4X＝L 5X＝L 6X，C 1X＝C 2X＝C 3X＝C 4X＝C 5X＝C 6X，电感值统一用L X，电容值统一用C X表示，L X和C X的计算公式分别为：L X＝Z 0X/ω 0,C X＝1/ω 0Z 0X；
    对于工作于中心频率f 0，带有特性参数Z 0A的子网络A，前述四种拓扑结构中的电感值和电容值分别为：L A＝Z 0A/ω 0，C A＝1/ω 0Z 0A，子网络A选择前述四种拓扑结构中的任意一种；
    对于工作于中心频率f 0，带有特性参数Z 0B的子网络B，前述四种拓扑结构中的电感值和电容值分别为：L B＝Z 0B/ω 0，C B＝1/ω 0Z 0B，子网络B选择前述四种拓扑结构中的任意一种；
    对于工作于中心频率f 0，带有特性参数Z 0C的子网络C，前述四种拓扑结构中的电感值和电容值分别为：L C＝Z 0C/ω 0，C C＝1/ω 0Z 0C，子网络C选择前述四种拓扑结构中的任意一种；
    对于工作于中心频率f 0，带有特性参数Z 0D的子网络D，前述四种拓扑结构中的电感值和电容值分别为：L D＝Z 0D/ω 0，C D＝1/ω 0Z 0D，子网络D选择前述四种拓扑结构中的任意一种。
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EP3029830A1 (en) * 2014-12-05 2016-06-08 Centre National De La Recherche Scientifique Balun device with GFET transistors
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WO2019216559A1 (ko) * 2018-05-10 2019-11-14 순천향대학교 산학협력단 Lc 발룬
CN113037223A (zh) * 2021-03-31 2021-06-25 广东工业大学 一种具有二次谐波抑制的宽带差分射频功率放大器

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Publication number Priority date Publication date Assignee Title
US20110128088A1 (en) * 2009-10-14 2011-06-02 Yalin Jin Rf switchable balun
EP3029830A1 (en) * 2014-12-05 2016-06-08 Centre National De La Recherche Scientifique Balun device with GFET transistors
CN104535848A (zh) * 2015-01-05 2015-04-22 中国电子科技集团公司第二十二研究所 测量阻抗变换器平衡度及其网络参数的结构及其确定方法
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