WO2023240713A1 - Led chip and display screen provided with led chip - Google Patents

Led chip and display screen provided with led chip Download PDF

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Publication number
WO2023240713A1
WO2023240713A1 PCT/CN2022/103436 CN2022103436W WO2023240713A1 WO 2023240713 A1 WO2023240713 A1 WO 2023240713A1 CN 2022103436 W CN2022103436 W CN 2022103436W WO 2023240713 A1 WO2023240713 A1 WO 2023240713A1
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WO
WIPO (PCT)
Prior art keywords
type
layer
led chip
led
microns
Prior art date
Application number
PCT/CN2022/103436
Other languages
French (fr)
Chinese (zh)
Inventor
顾伟
李文涛
简弘安
胡加辉
Original Assignee
江西兆驰半导体有限公司
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Publication of WO2023240713A1 publication Critical patent/WO2023240713A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present application relates to the technical field of semiconductor devices, and in particular to an LED chip and a display screen carrying the LED chip.
  • the P pad metal and N pad metal often connect to each other, causing the LED chip to short circuit.
  • the above problems are especially obvious in Micro LED chips. Since the distance between the P pad metal and N pad metal of the Micro LED chip is closer, it is easier for the P pad metal to appear after the Micro LED chip is solidified on the substrate. Tin is connected to the N pad metal, causing a short circuit on the Micro LED chip. Therefore, how to solve the risk of tin connection after the LED chip is solidified on the substrate has become an urgent technical problem that needs to be solved.
  • this application provides an LED chip and a display screen carrying the LED chip, aiming to solve the problem that the P pad metal and N pad metal connection of the LED chip when solidified on the substrate is easy to occur in the prior art. Tin technical issues.
  • an LED chip which includes: a substrate, a connecting metal, and several LED sub-chips;
  • each of the P-type pads is individually connected to an anode substrate pad on the substrate through metal tin, and each of the P-type pads is connected to an anode substrate pad on the substrate through metal tin.
  • the N-type pad is individually connected to a cathode substrate pad on the substrate through the metal tin, and the P-type conductive metal layer or N-type conductive metal layer of each LED sub-chip achieves electrical properties through the connection metal. connect.
  • the LED chip also includes a Bragg reflective layer, and the Bragg reflective layer is provided with P-type Bragg reflective layer through holes and N-type Bragg reflective layer through holes;
  • the P-type soldering pad is electrically connected to the P-type conductive metal layer or the connection metal through the P-type Bragg reflective layer through hole, and the N-type soldering pad passes through the N-type Bragg reflective layer through hole. Electrically connect the N-type conductive metal layer or the connection metal.
  • the Bragg reflective layer is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs.
  • the LED sub-chip further includes: a current spreading layer, an active light-emitting layer, a P-type semiconductor and an N-type semiconductor;
  • the active light-emitting layer is disposed between the P-type semiconductor and the N-type semiconductor, the P-type conductive metal layer is electrically connected to the current expansion layer, and the current expansion layer is connected to the P-type conductive metal layer.
  • the N-type semiconductor is electrically connected to excite holes, and the N-type conductive metal layer is electrically connected to the conductive step of the N-type semiconductor to excite electrons.
  • the forward projection of the P-type semiconductor is smaller than the forward projection of the N-type semiconductor, and the exposed portion of the N-type semiconductor serves as the conductive step.
  • the LED sub-chip further includes: an insulating protective layer, with P-type insulating protective layer through holes and N-type insulating protective layer through holes provided on the insulating protective layer;
  • the P-type conductive metal layer is electrically connected to the current expansion layer through the P-type insulating protective layer through hole
  • the N-type conductive metal layer is electrically connected to the N-type insulating protective layer through the N-type insulating protective layer through hole.
  • the conductive steps of the type semiconductor are electrically connected.
  • the material of the insulating protective layer is selected from one or more of SiO2, TiO2, Ti3O5, and SiN.
  • the P-type semiconductor has a length of 1-500 microns and a width of 1-500 microns; the N-type semiconductor has a length of 20-550 microns and a width of 20-550 microns.
  • the length of the anode substrate pad is 10-200 microns and the width is 10-200 microns; the length of the cathode substrate pad is 10-200 microns and the width is 10-200 microns; the metal tin is The length is 10 ⁇ 200 microns, the width is 10 ⁇ 200 microns, and the height is 1 ⁇ 100 microns.
  • the LED sub-chip is any one of a traditional LED chip, a Micro LED chip, and a Mini LED chip.
  • embodiments of the present application provide a display screen carrying an LED chip, which includes:
  • a substrate on which are provided several anode substrate pads and several cathode substrate pads;
  • the LED chips include: a substrate, a connecting metal and several LED sub-chips;
  • each of the anode substrate pads is individually connected to one of the P-type pads through metal tin
  • each of the cathode substrates The soldering pad is individually connected to one of the N-type soldering pads through the metal tin, and the P-type conductive metal layer or N-type conductive metal layer of each LED sub-chip is electrically connected through the connecting metal.
  • the LED chip further includes a Bragg reflective layer, and the Bragg reflective layer is provided with P-type Bragg reflective layer through holes and N-type Bragg reflective layer through holes;
  • the P-type soldering pad is electrically connected to the P-type conductive metal layer or the connection metal through the P-type Bragg reflective layer through hole, and the N-type soldering pad passes through the N-type Bragg reflective layer through hole. Electrically connect the N-type conductive metal layer or the connection metal.
  • the Bragg reflective layer is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs.
  • the LED sub-chip further includes: a current spreading layer, an active light-emitting layer, a P-type semiconductor and an N-type semiconductor;
  • the active light-emitting layer is disposed between the P-type semiconductor and the N-type semiconductor, the P-type conductive metal layer is electrically connected to the current expansion layer, and the current expansion layer is connected to the P-type conductive metal layer.
  • the N-type semiconductor is electrically connected to excite holes, and the N-type conductive metal layer is electrically connected to the conductive step of the N-type semiconductor to excite electrons.
  • the forward projection of the P-type semiconductor is smaller than the forward projection of the N-type semiconductor, and the exposed portion of the N-type semiconductor serves as the conductive step.
  • the LED sub-chip further includes: an insulating protective layer, with P-type insulating protective layer through holes and N-type insulating protective layer through holes provided on the insulating protective layer;
  • the P-type conductive metal layer is electrically connected to the current expansion layer through the P-type insulating protective layer through hole
  • the N-type conductive metal layer is electrically connected to the N-type insulating protective layer through the N-type insulating protective layer through hole.
  • the conductive steps of the type semiconductor are electrically connected.
  • the material of the insulating protective layer is selected from one or more of SiO2, TiO2, Ti3O5, and SiN.
  • the P-type semiconductor has a length of 1-500 microns and a width of 1-500 microns; the N-type semiconductor has a length of 20-550 microns and a width of 20-550 microns.
  • the length of the anode substrate pad is 10-200 microns and the width is 10-200 microns; the length of the cathode substrate pad is 10-200 microns and the width is 10-200 microns; the metal tin is The length is 10 ⁇ 200 microns, the width is 10 ⁇ 200 microns, and the height is 1 ⁇ 100 microns.
  • the LED sub-chip is any one of a traditional LED chip, a Micro LED chip, and a Mini LED chip.
  • the LED chip and the display screen carrying the LED chip provided by the embodiment of the present application are provided with several LED chips on the substrate.
  • Each LED chip is composed of a substrate, a connecting metal and several LED sub-chips, and the LED sub-chips are The P-type pad and N-type pad are set separately on the substrate.
  • each anode substrate pad on the substrate is individually connected to a P-type pad through metal tin
  • each cathode substrate pad is individually connected to a P-type pad through metal tin.
  • the P-type pad, the P-type conductive metal layer or N-type conductive metal layer of each LED sub-chip is electrically connected through the connecting metal, thereby solving the problem caused by the P-type pad and N-type pad being too close in the existing technology
  • Technical problems include tin connection, short circuit, and low yield.
  • Figure 1 is a schematic structural diagram of a display screen carrying an LED chip provided by an embodiment of the present application
  • Figure 2 is a schematic structural diagram of a substrate in a display screen carrying an LED chip provided by an embodiment of the present application
  • Figure 3 is a schematic partial structural diagram of a display screen carrying an LED chip provided by an embodiment of the present application.
  • Figure 4 is a cross-sectional view of a display screen carrying an LED chip provided by an embodiment of the present application
  • Figure 5 is a partial structural schematic diagram of a display screen carrying an LED chip provided by an embodiment of the present application.
  • Figure 6 is a schematic structural diagram of an LED chip provided by an embodiment of the present application.
  • FIG. 7 is another structural schematic diagram of an LED chip provided by an embodiment of the present application.
  • Figure 8 is another structural schematic diagram of an LED chip provided by an embodiment of the present application.
  • Figure 9 is another structural schematic diagram of an LED chip provided by an embodiment of the present application.
  • Figure 10 is another structural schematic diagram of an LED chip provided by an embodiment of the present application.
  • FIG. 11 is a partial structural diagram of a display screen carrying an LED chip provided by an embodiment of the present application.
  • Figure 1 is a schematic structural diagram of a display screen carrying an LED chip provided by an embodiment of the present application
  • Figure 2 is a schematic structural diagram of a substrate in a display screen carrying an LED chip provided by an embodiment of the present application
  • Figure 3 is a schematic diagram of a partial structure of a display screen carrying an LED chip provided by an embodiment of the present application
  • Figure 4 is a cross-sectional view of a display screen equipped with an LED chip provided by an embodiment of the present application
  • Figure 5 is a schematic diagram of a display screen equipped with an LED chip provided by an embodiment of the present application. Schematic diagram of the partial structure of the LED chip display screen.
  • a display screen carrying an LED chip includes:
  • Substrate 10 with several anode substrate pads 111 and several cathode substrate pads 112 provided on the substrate 10;
  • the LED chips 30 include: a substrate 20, a connecting metal 50 and a plurality of LED sub-chips 31;
  • each of the anode substrate bonding pads 111 is individually connected to one of the P-type bonding pads 211 through metal tin 40.
  • Each of the cathode substrate pads 112 is individually connected to one of the N-type pads 212 through the metal tin 40 , and the P-type conductive metal layer 311 or N-type conductive metal layer 312 of each LED sub-chip 31 is connected through the metal tin 40 .
  • the connecting metal 50 realizes electrical connection.
  • the LED chip 30 in the display screen carrying the LED chip provided by the embodiment of the present application is one LED chip 30 or multiple LED chips 30 .
  • the multiple LED chips 30 can be arranged in an array on the substrate 10 or in a non-array arrangement.
  • the specific arrangement method and the number of LED chips 30 in the display screen can be The selection is made according to the actual application and is not specifically limited in this embodiment.
  • an LED chip 30 in this embodiment can be understood as an LED chip unit, and an LED sub-chip 31 can be any one of a traditional LED chip, a Micro LED chip, and a Mini LED chip.
  • the traditional LED chip The size is larger than Micro LED chip, and Mini LED chip is an LED chip with a chip size of 50 ⁇ 200 ⁇ m.
  • the metal tin 40 can be a spherical tin ball or a non-spherical tin block
  • the connecting metal 50 contains a conductive metal material
  • the LED sub-chip 31 is disposed between the substrate 10 and the substrate 20 .
  • One LED sub-chip 31 may be present in one LED chip 30 , or multiple LED sub-chips 31 may be present.
  • the multiple LED sub-chips 31 can be arranged in an array on the substrate 20, or in a non-array arrangement.
  • the specific arrangement method and the LED chip The number of LED sub-chips 31 in 30 can be selected according to actual applications, and is not specifically limited in this embodiment.
  • the number of anode substrate pads 111 and cathode substrate pads 112 provided on the substrate 10 can be one anode substrate pad 111 and one cathode substrate pad 112, or can be one anode substrate pad.
  • An equal number of anode substrate welding pads 111 and cathode substrate welding pads 112 can be provided, and an unequal number of anode substrate welding pads 111 and cathode substrate welding pads 112 can also be provided.
  • the anode substrate welding pads 111 and the cathode are provided on the substrate 10
  • the number of substrate pads 112 can be selected according to actual applications, and is not specifically limited in this embodiment.
  • the LED chip 30 further includes a Bragg reflective layer 220, and the Bragg reflective layer 220 is provided with a P-type Bragg reflective layer through hole 221 and an N-type Bragg reflective layer.
  • the N-type Bragg reflective layer through hole 222 is electrically connected to the N-type conductive metal layer 312 or the connection metal 50 .
  • the Bragg reflective layer 220 is deposited on the substrate 20 and is arranged between the substrate 20 and the substrate 10 , and the LED sub-chips 31 in each LED chip 30 are arranged between the Bragg reflective layer 220 and the substrate 20 .
  • the connection metal 50 is passed through the P-type conductive metal layer 312.
  • the Bragg reflective layer through hole 221 or the N-type Bragg reflective layer through hole 222 can realize the electrical connection between the P-type pad 211 and the P-type conductive metal layer 311, or the N-type pad 212 and the N-type conductive metal.
  • the layers 312 are electrically connected.
  • the P-type Bragg reflective layer through hole 221 has the connecting metal 50, and at the same time, the connecting metal 50 can also pass through
  • the N-type Bragg reflective layer through hole 222 is used to realize the electrical connection between the N-type pad 212 and the connecting metal 50; when the N-type pad 212 is electrically connected to the N-type conductive metal layer 312 through the N-type Bragg reflective layer through hole 222, N
  • the connection metal 50 is provided in the type Bragg reflective layer through hole 222 .
  • the connection metal 50 can also achieve electrical connection between the P type pad 211 and the connection metal 50 through the P type Bragg reflection layer through hole 221 .
  • the Bragg reflective layer 220 is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs.
  • the Bragg reflective layer 220 can also be formed by stacking 1-5 layers or more than 50 layers of SiO2 and Ti3O5 material pairs. In this embodiment, the Bragg reflective layer 220 is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs as Preferred embodiments in this application.
  • the LED sub-chip 31 also includes: a current spreading layer 340, an active light-emitting layer 350, a P-type semiconductor 321 and an N-type semiconductor 322; wherein, the The source light-emitting layer 350 is located between the P-type semiconductor 321 and the N-type semiconductor 322.
  • the P-type conductive metal layer 311 is electrically connected to the current spreading layer 340.
  • the current spreading layer 340 is electrically connected to the P-type semiconductor 321.
  • the N-type conductive metal layer 312 is electrically connected to the conductive step of the N-type semiconductor 322 to excite holes.
  • the current spreading layer 340 is located between the P-type conductive metal layer 311 and the P-type semiconductor 321
  • the N-type semiconductor 322 is located between the N-type conductive metal layer 312 and the substrate 20
  • the N-type semiconductor 322 is also located between the P-type semiconductor 321 and substrate 20.
  • the forward projection of the P-type semiconductor 321 is smaller than the forward projection of the N-type semiconductor 322 , and the exposed part of the N-type semiconductor 322 serves as the conductive steps.
  • the LED sub-chip 31 further includes: an insulating protective layer 330 .
  • the insulating protective layer 330 is provided with a P-type insulating protective layer through hole 331 and an N-type insulating protective layer through hole. Hole 332; wherein, the P-type conductive metal layer 311 is electrically connected to the current expansion layer 340 through the P-type insulating protection layer through hole 331, and the N-type conductive metal layer 312 is protected by the N-type insulating layer.
  • the layer via 332 is electrically connected to the conductive step of the N-type semiconductor 322 .
  • the insulating protective layer 330 is located between the N-type conductive metal layer 312 and the N-type semiconductor 322, and at the same time, the insulating protective layer 330 is also located between the P-type conductive metal layer 311 and the current spreading layer 340.
  • the material of the insulating protective layer 330 is selected from one or more of SiO2, TiO2, Ti3O5, and SiN.
  • the P-type semiconductor has a length of 1-500 microns and a width of 1-500 microns; the N-type semiconductor has a length of 20-550 microns and a width of 20-550 microns.
  • the anode substrate pad 111 has a length of 10-200 microns and a width of 10-200 microns; the cathode substrate pad 112 has a length of 10-200 microns and a width of 10-200 microns;
  • the length of the metal tin 40 is 10-200 microns, the width is 10-200 microns, and the height is 1-100 microns.
  • the LED chip and the display screen carrying the LED chip provided by the embodiment of the present application are provided with several LED chips 30 on the substrate 10.
  • Each LED chip 30 is composed of a substrate 20, a connecting metal 50 and several LED sub-chips 31.
  • the P-type pad 211 and the N-type pad 212 of the LED sub-chip 31 are separately arranged on the substrate 20, and each anode substrate pad 111 on the substrate 10 is individually connected to a P-type pad through the metal tin 40.
  • each cathode substrate pad 112 is individually connected to a P-type pad 211 through metal tin 40, and the P-type conductive metal layer 311 or N-type conductive metal layer 312 of each LED sub-chip 31 realizes electrical properties through the connecting metal 50 connection, thus solving the technical problems in the prior art that the P-type pad 211 and the N-type pad 212 are too close to each other, such as tin connection, short circuit, and low yield.
  • a display screen carrying Micro LED chips includes:
  • the substrate 10 is provided with an anode substrate pad 111 and a cathode substrate pad 112.
  • the anode substrate pad 111 has a length and a width of 80 microns
  • the cathode substrate pad 112 has a length of 160 microns and a width of 160 microns. is 80 microns;
  • each LED chip 30 includes a substrate 20, a connecting metal 50 and three Micro LED chips;
  • each anode substrate pad 111 is individually connected to a P-type pad 211 through metal tin 40, and each cathode substrate pad is connected to a P-type pad 211 through metal tin 40.
  • 112 is individually connected to an N-type pad 212 through a solder ball with a height of 20 microns;
  • the LED chip 30 includes a P-type conductive metal layer 311, an N-type conductive metal layer 312, a Bragg reflective layer 220, a current spreading layer 340, a P-type semiconductor 321, an N-type semiconductor 322, an insulating protective layer 330 and an active light-emitting layer 350;
  • the Bragg reflective layer 220 is provided with a P-type Bragg reflective layer through hole 221 and an N-type Bragg reflective layer through hole 222.
  • the P-type pad 211 is electrically connected to the P-type conductive metal layer 311 through the P-type Bragg reflective layer through hole 221.
  • the N-type pad 212 is electrically connected to the connecting metal 50 through the N-type Bragg reflective layer through hole 222.
  • the Bragg reflective layer 220 is formed by stacking 28 layers of SiO2 and Ti3O5 materials;
  • the P-type semiconductor layer 321 has a length of 80 microns and a width of 50 microns, and the N-type semiconductor layer 322 has a length of 100 microns and a width of 55 microns;
  • the insulating protective layer 330 is provided with a P-type insulating protective layer through hole 331 and an N-type insulating protective layer through hole 332.
  • the P-type conductive metal layer 311 is electrically connected to the current expansion layer 340 through the P-type insulating protective layer through hole 331, and the current
  • the extension layer 340 is electrically connected to the P-type semiconductor 321 to excite holes
  • the N-type conductive metal layer 312 is electrically connected to the steps of the N-type semiconductor 322 through the N-type insulating protective layer through hole 332 to excite electrons;
  • the forward projection is smaller than the forward projection of the N-type semiconductor 322, the exposed part of the N-type semiconductor 322 serves as a conductive step, and the material of the insulating protective layer 330 is selected from SiO2.
  • a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1, and the only difference is:
  • the LED chip 30 includes a Micro LED chip, and a P-type bonding pad 211 and two N-type bonding pads 212 are provided on the substrate 20 .
  • a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1. The only difference is:
  • the LED chip 30 includes five Micro LED chips, and the substrate 20 is provided with five P-type bonding pads 211 and two N-type bonding pads 212 .
  • a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1, and the only difference is:
  • the LED chip 30 includes 7 Micro LED chips, and the substrate 20 is provided with 7 P-type bonding pads 211 and 2 N-type bonding pads 212 .
  • a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1, and the only difference is:
  • the LED chip 30 includes three Micro LED chips, and three P-type bonding pads 211 and one N-type bonding pad 212 are provided on the substrate 20 .
  • a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1, and the only difference is:
  • the LED chip 30 includes three Micro LED chips, and the substrate 20 is provided with two P-type pads 211 and three N-type pads 212;
  • the anode substrate pad 111 is connected to the P-type pad 211 through solder balls, and the P-type pad 211 is electrically connected to the connecting metal 50 through the P-type Bragg reflective layer through hole 221; the connecting metal 50 is connected to the P-type conductive metal layer 311.
  • the P-type conductive metal is electrically connected to the current spreading layer 340 through the P-type insulating protective layer through hole 331; the current spreading layer 340 is electrically connected to the P-type semiconductor 321 layer to excite holes;
  • the cathode substrate pad 112 is connected to the N-type pad 212 through solder balls.
  • the N-type pad 212 is electrically connected to the N-type conductive metal layer 312 through the N-type Bragg reflective layer through hole 222.
  • the N-type conductive metal layer 312 passes through the N-type Bragg reflective layer through hole 222.
  • the insulating protective layer through hole 332 is electrically connected to the conductive step of the N-type semiconductor 322 to excite electrons.
  • each of the above units or structures can be implemented as an independent entity, or can be combined in any way to be implemented as the same or several entities.
  • each of the above units or structures please refer to the previous embodiments and will not be discussed here. Again.

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Abstract

An LED chip (30) and a display screen provided with the LED chip (30). The LED chip (30) comprises: a substrate (20), a connection metal (50), and several LED sub-chips (31), wherein several P-type pads (211) and several N-type pads (212) are provided on the substrate (20); each P-type pad (211) is independently connected to an anode substrate pad (111) on the substrate (10) by means of metal tin (40); each N-type pad (212) is independently connected to a cathode substrate pad (112) on the substrate (10) by means of the metal tin (40); and a P-type conductive metal layer (311) or an N-type conductive metal layer (312) of each LED sub-chip (31) realizes electrical connection by means of the connection metal (50). The P-type pads (211) and the N-type pads (212) are separately arranged on the substrate (20), and the P-type conductive metal layer (311) or the N-type conductive metal layer (312) realizes an electrical connection by means of the connection metal (50), such that the technical problems of tin connection, short circuiting and a low yield in the prior art are solved, which problems are caused by the P-type pads (211) being too close to the N-type pads (212).

Description

LED芯片以及载有LED芯片的显示屏LED chips and display screens containing LED chips 技术领域Technical field
本申请涉及半导体器件技术领域,尤其涉及一种LED芯片以及载有LED芯片的显示屏。The present application relates to the technical field of semiconductor devices, and in particular to an LED chip and a display screen carrying the LED chip.
背景技术Background technique
近年来,随着LED芯片产业快速发展,LED显示屏应用方面逐渐从之前的户外商业显示渐渐发展为户内商业显示、安防系统、AR、VR等领域,同时应用于LED显示屏的LED芯片尺寸也逐渐缩小。In recent years, with the rapid development of the LED chip industry, the application of LED display screens has gradually developed from outdoor commercial displays to indoor commercial displays, security systems, AR, VR and other fields. At the same time, the size of LED chips used in LED displays Also gradually shrinking.
目前,传统的LED芯片在应用于LED显示屏中时,经常会出现P焊盘金属与N焊盘金属连锡,导致LED芯片短路。上述问题尤其在Micro LED芯片中更加明显,由于Micro LED芯片的P焊盘金属与N焊盘金属之间的距离更近,从而更易导致Micro LED芯片固晶在基板上之后容易出现P焊盘金属与N焊盘金属连锡,进而导致Micro LED芯片短路。因此,如何解决LED芯片在基板上固晶后容易出现连锡的风险,已成为目前亟待解决的技术问题。At present, when traditional LED chips are used in LED displays, the P pad metal and N pad metal often connect to each other, causing the LED chip to short circuit. The above problems are especially obvious in Micro LED chips. Since the distance between the P pad metal and N pad metal of the Micro LED chip is closer, it is easier for the P pad metal to appear after the Micro LED chip is solidified on the substrate. Tin is connected to the N pad metal, causing a short circuit on the Micro LED chip. Therefore, how to solve the risk of tin connection after the LED chip is solidified on the substrate has become an urgent technical problem that needs to be solved.
技术问题technical problem
针对现有技术的不足,本申请提供了一种LED芯片以及载有LED芯片的显示屏,旨在解决现有技术中LED芯片晶固在基板上容易出现P焊盘金属与N焊盘金属连锡的技术问题。In view of the shortcomings of the existing technology, this application provides an LED chip and a display screen carrying the LED chip, aiming to solve the problem that the P pad metal and N pad metal connection of the LED chip when solidified on the substrate is easy to occur in the prior art. Tin technical issues.
技术解决方案Technical solutions
第一方面,本申请实施例提供了一种LED芯片,其包括:衬底、连接金属以及若干个LED子芯片;In a first aspect, embodiments of the present application provide an LED chip, which includes: a substrate, a connecting metal, and several LED sub-chips;
其中,所述衬底上设置有若干个P型焊盘、若干个N型焊盘,每个所述P型焊盘单独通过金属锡与基板上的一个阳极基板焊盘连接,每个所述N型焊盘单独通过所述金属锡与所述基板上的一个阴极基板焊盘连接,每个所述LED子芯片的P型导电金属层或N型导电金属层通过所述连接金属实现电性连接。Wherein, several P-type pads and several N-type pads are provided on the substrate, each of the P-type pads is individually connected to an anode substrate pad on the substrate through metal tin, and each of the P-type pads is connected to an anode substrate pad on the substrate through metal tin. The N-type pad is individually connected to a cathode substrate pad on the substrate through the metal tin, and the P-type conductive metal layer or N-type conductive metal layer of each LED sub-chip achieves electrical properties through the connection metal. connect.
优选地, LED芯片还包括布拉格反射层,所述布拉格反射层上设置有P型布拉格反射层通孔和N型布拉格反射层通孔;Preferably, The LED chip also includes a Bragg reflective layer, and the Bragg reflective layer is provided with P-type Bragg reflective layer through holes and N-type Bragg reflective layer through holes;
其中,所述P型焊盘通过所述P型布拉格反射层通孔电性连接所述P型导电金属层或所述连接金属,所述N型焊盘通过所述N型布拉格反射层通孔电性连接所述N型导电金属层或所述连接金属。Wherein, the P-type soldering pad is electrically connected to the P-type conductive metal layer or the connection metal through the P-type Bragg reflective layer through hole, and the N-type soldering pad passes through the N-type Bragg reflective layer through hole. Electrically connect the N-type conductive metal layer or the connection metal.
更优选地,所述布拉格反射层由5-50层SiO2和Ti3O5材料对堆叠形成。More preferably, the Bragg reflective layer is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs.
优选地,所述LED子芯片还包括:电流扩展层、有源发光层、P型半导体以及N型半导体;Preferably, the LED sub-chip further includes: a current spreading layer, an active light-emitting layer, a P-type semiconductor and an N-type semiconductor;
其中,所述有源发光层设置在所述P型半导体与所述N型半导体之间,所述P型导电金属层与所述电流扩展层电性连接,所述电流扩展层与所述P型半导体电性连接以激发空穴,所述N型导电金属层与所述N型半导体的导电台阶电性连接以激发电子。Wherein, the active light-emitting layer is disposed between the P-type semiconductor and the N-type semiconductor, the P-type conductive metal layer is electrically connected to the current expansion layer, and the current expansion layer is connected to the P-type conductive metal layer. The N-type semiconductor is electrically connected to excite holes, and the N-type conductive metal layer is electrically connected to the conductive step of the N-type semiconductor to excite electrons.
更优选地,所所述P型半导体的正向投影小于所述N型半导体的正向投影,所述N型半导体暴露出的部分作为所述导电台阶。More preferably, the forward projection of the P-type semiconductor is smaller than the forward projection of the N-type semiconductor, and the exposed portion of the N-type semiconductor serves as the conductive step.
更优选地,所所述LED子芯片还包括:绝缘保护层,所述绝缘保护层上设置有P型绝缘保护层通孔和N型绝缘保护层通孔;More preferably, the LED sub-chip further includes: an insulating protective layer, with P-type insulating protective layer through holes and N-type insulating protective layer through holes provided on the insulating protective layer;
其中,所述P型导电金属层通过所述P型绝缘保护层通孔与所述电流扩展层电性连接,所述N型导电金属层通过所述N型绝缘保护层通孔与所述N型半导体的导电台阶电性连接。Wherein, the P-type conductive metal layer is electrically connected to the current expansion layer through the P-type insulating protective layer through hole, and the N-type conductive metal layer is electrically connected to the N-type insulating protective layer through the N-type insulating protective layer through hole. The conductive steps of the type semiconductor are electrically connected.
更优选地,所所述绝缘保护层的材料选自SiO2、TiO2、Ti3O5、SiN中的一种或多种。More preferably, the material of the insulating protective layer is selected from one or more of SiO2, TiO2, Ti3O5, and SiN.
更优选地,所所述P型半导体的长度为1~500微米,宽度为1~500微米;所述N型半导体的长度为20~550微米,宽度为20~550微米。More preferably, the P-type semiconductor has a length of 1-500 microns and a width of 1-500 microns; the N-type semiconductor has a length of 20-550 microns and a width of 20-550 microns.
优选地,所述阳极基板焊盘的长度为10~200微米,宽度为10~200微米;所述阴极基板焊盘的长度为10~200微米,宽度为10~200微米;所述金属锡的长度为10~200微米,宽度为10~200微米,高度为1~100微米。Preferably, the length of the anode substrate pad is 10-200 microns and the width is 10-200 microns; the length of the cathode substrate pad is 10-200 microns and the width is 10-200 microns; the metal tin is The length is 10~200 microns, the width is 10~200 microns, and the height is 1~100 microns.
优选地,所述LED子芯片为传统LED芯片、Micro LED芯片、Mini LED芯片中的任意一种。Preferably, the LED sub-chip is any one of a traditional LED chip, a Micro LED chip, and a Mini LED chip.
第二方面,本申请实施例提供了一种载有LED芯片的显示屏,其包括:In a second aspect, embodiments of the present application provide a display screen carrying an LED chip, which includes:
基板,所述基板上设置有若干个阳极基板焊盘、若干个阴极基板焊盘;A substrate, on which are provided several anode substrate pads and several cathode substrate pads;
若干个LED芯片,所述LED芯片包括:衬底、连接金属以及若干个LED子芯片;Several LED chips, the LED chips include: a substrate, a connecting metal and several LED sub-chips;
其中,所述衬底上设置有若干个P型焊盘、若干个N型焊盘,每个所述阳极基板焊盘通过金属锡单独连接一个所述P型焊盘,每个所述阴极基板焊盘通过所述金属锡单独连接一个所述N型焊盘,每个所述LED子芯片的P型导电金属层或N型导电金属层通过所述连接金属实现电性连接。Wherein, several P-type pads and several N-type pads are provided on the substrate, each of the anode substrate pads is individually connected to one of the P-type pads through metal tin, and each of the cathode substrates The soldering pad is individually connected to one of the N-type soldering pads through the metal tin, and the P-type conductive metal layer or N-type conductive metal layer of each LED sub-chip is electrically connected through the connecting metal.
优选地,所述LED芯片还包括布拉格反射层,所述布拉格反射层上设置有P型布拉格反射层通孔和N型布拉格反射层通孔;Preferably, the LED chip further includes a Bragg reflective layer, and the Bragg reflective layer is provided with P-type Bragg reflective layer through holes and N-type Bragg reflective layer through holes;
其中,所述P型焊盘通过所述P型布拉格反射层通孔电性连接所述P型导电金属层或所述连接金属,所述N型焊盘通过所述N型布拉格反射层通孔电性连接所述N型导电金属层或所述连接金属。Wherein, the P-type soldering pad is electrically connected to the P-type conductive metal layer or the connection metal through the P-type Bragg reflective layer through hole, and the N-type soldering pad passes through the N-type Bragg reflective layer through hole. Electrically connect the N-type conductive metal layer or the connection metal.
更优选地,所述布拉格反射层由5-50层SiO2和Ti3O5材料对堆叠形成。More preferably, the Bragg reflective layer is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs.
优选地,所述LED子芯片还包括:电流扩展层、有源发光层、P型半导体以及N型半导体;Preferably, the LED sub-chip further includes: a current spreading layer, an active light-emitting layer, a P-type semiconductor and an N-type semiconductor;
其中,所述有源发光层设置在所述P型半导体与所述N型半导体之间,所述P型导电金属层与所述电流扩展层电性连接,所述电流扩展层与所述P型半导体电性连接以激发空穴,所述N型导电金属层与所述N型半导体的导电台阶电性连接以激发电子。Wherein, the active light-emitting layer is disposed between the P-type semiconductor and the N-type semiconductor, the P-type conductive metal layer is electrically connected to the current expansion layer, and the current expansion layer is connected to the P-type conductive metal layer. The N-type semiconductor is electrically connected to excite holes, and the N-type conductive metal layer is electrically connected to the conductive step of the N-type semiconductor to excite electrons.
更优选地,所述P型半导体的正向投影小于所述N型半导体的正向投影,所述N型半导体暴露出的部分作为所述导电台阶。More preferably, the forward projection of the P-type semiconductor is smaller than the forward projection of the N-type semiconductor, and the exposed portion of the N-type semiconductor serves as the conductive step.
更优选地,所述LED子芯片还包括:绝缘保护层,所述绝缘保护层上设置有P型绝缘保护层通孔和N型绝缘保护层通孔;More preferably, the LED sub-chip further includes: an insulating protective layer, with P-type insulating protective layer through holes and N-type insulating protective layer through holes provided on the insulating protective layer;
其中,所述P型导电金属层通过所述P型绝缘保护层通孔与所述电流扩展层电性连接,所述N型导电金属层通过所述N型绝缘保护层通孔与所述N型半导体的导电台阶电性连接。Wherein, the P-type conductive metal layer is electrically connected to the current expansion layer through the P-type insulating protective layer through hole, and the N-type conductive metal layer is electrically connected to the N-type insulating protective layer through the N-type insulating protective layer through hole. The conductive steps of the type semiconductor are electrically connected.
更优选地,所述绝缘保护层的材料选自SiO2、TiO2、Ti3O5、SiN中的一种或多种。More preferably, the material of the insulating protective layer is selected from one or more of SiO2, TiO2, Ti3O5, and SiN.
更优选地,所述P型半导体的长度为1~500微米,宽度为1~500微米;所述N型半导体的长度为20~550微米,宽度为20~550微米。More preferably, the P-type semiconductor has a length of 1-500 microns and a width of 1-500 microns; the N-type semiconductor has a length of 20-550 microns and a width of 20-550 microns.
优选地,所述阳极基板焊盘的长度为10~200微米,宽度为10~200微米;所述阴极基板焊盘的长度为10~200微米,宽度为10~200微米;所述金属锡的长度为10~200微米,宽度为10~200微米,高度为1~100微米。Preferably, the length of the anode substrate pad is 10-200 microns and the width is 10-200 microns; the length of the cathode substrate pad is 10-200 microns and the width is 10-200 microns; the metal tin is The length is 10~200 microns, the width is 10~200 microns, and the height is 1~100 microns.
优选地,所述LED子芯片为传统LED芯片、Micro LED芯片、Mini LED芯片中的任意一种。Preferably, the LED sub-chip is any one of a traditional LED chip, a Micro LED chip, and a Mini LED chip.
有益效果beneficial effects
本申请实施例提供的LED芯片以及载有LED芯片的显示屏,通过在基板上设置若干个LED芯片,每个LED芯片由衬底、连接金属和若干个LED子芯片组成,并将LED子芯片的P型焊盘和N型焊盘在衬底上单独设置,同时基板上的每个阳极基板焊盘通过金属锡单独连接一个P型焊盘,每个阴极基板焊盘通过金属锡单独连接一个P型焊盘,每个LED子芯片的P型导电金属层或N型导电金属层通过连接金属实现电性连接,从而解决了现有技术中P型焊盘与N型焊盘太近导致的连锡、短路、良率低的技术问题。The LED chip and the display screen carrying the LED chip provided by the embodiment of the present application are provided with several LED chips on the substrate. Each LED chip is composed of a substrate, a connecting metal and several LED sub-chips, and the LED sub-chips are The P-type pad and N-type pad are set separately on the substrate. At the same time, each anode substrate pad on the substrate is individually connected to a P-type pad through metal tin, and each cathode substrate pad is individually connected to a P-type pad through metal tin. P-type pad, the P-type conductive metal layer or N-type conductive metal layer of each LED sub-chip is electrically connected through the connecting metal, thereby solving the problem caused by the P-type pad and N-type pad being too close in the existing technology Technical problems include tin connection, short circuit, and low yield.
附图说明Description of the drawings
为了更清楚地说明本申请实施例技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application, which are of great significance to this field. Ordinary technicians can also obtain other drawings based on these drawings without exerting creative work.
图1为本申请实施例提供的载有LED芯片的显示屏的结构示意图;Figure 1 is a schematic structural diagram of a display screen carrying an LED chip provided by an embodiment of the present application;
图2为本申请实施例提供的载有LED芯片的显示屏中基板的结构示意图;Figure 2 is a schematic structural diagram of a substrate in a display screen carrying an LED chip provided by an embodiment of the present application;
图3为本申请实施例提供的载有LED芯片的显示屏局部结构示意图;Figure 3 is a schematic partial structural diagram of a display screen carrying an LED chip provided by an embodiment of the present application;
图4为本申请实施例提供的载有LED芯片的显示屏的剖视图;Figure 4 is a cross-sectional view of a display screen carrying an LED chip provided by an embodiment of the present application;
图5为本申请实施例提供的载有LED芯片的显示屏的局部结构示意图;Figure 5 is a partial structural schematic diagram of a display screen carrying an LED chip provided by an embodiment of the present application;
图6为本申请实施例提供的LED芯片的结构示意图;Figure 6 is a schematic structural diagram of an LED chip provided by an embodiment of the present application;
图7为本申请实施例提供的LED芯片的另一结构示意图;Figure 7 is another structural schematic diagram of an LED chip provided by an embodiment of the present application;
图8为本申请实施例提供的LED芯片的另一结构示意图;Figure 8 is another structural schematic diagram of an LED chip provided by an embodiment of the present application;
图9为本申请实施例提供的LED芯片的另一结构示意图;Figure 9 is another structural schematic diagram of an LED chip provided by an embodiment of the present application;
图10为本申请实施例提供的LED芯片的另一结构示意图;Figure 10 is another structural schematic diagram of an LED chip provided by an embodiment of the present application;
图11为本申请实施例提供的载有LED芯片的显示屏的局部结构示意图。FIG. 11 is a partial structural diagram of a display screen carrying an LED chip provided by an embodiment of the present application.
本发明的实施方式Embodiments of the invention
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.
在申请的描述中,需要理解的是,术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。In the description of the application, it is to be understood that the terms "center", "horizontal", "upper", "lower", "left", "right", "vertical", "horizontal", "top", " The orientation or positional relationship indicated by "bottom", "inside", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply the device or device referred to. Elements must have a specific orientation, be constructed and operate in a specific orientation and therefore are not to be construed as limitations on the application.
在申请中,“一些实施例”一词用来表示“用作例子、例证或说明”。本申请中被描述为示例性的任何实施例不一定被解释为比其它实施例更优选或更具优势。为使本领域任何技术人员能够实现和使用本申请,给出了以下描述。在以下描述,为了解释的目的而列出了细节。In the application, the term "some embodiments" is used to mean "serving as an example, illustration, or illustration." Any embodiment described herein as exemplary is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the present application. In the following description, details are set forth for the purpose of explanation.
应当明白的是,本领域普通技术人员可以认到,在不使用这些特定细节的情况下也可以实现本申请。在其它实例中,不会对已知的结构和过程进行详细阐述,以避免不必要的细节使本申请的描述变得晦涩。因此,本申请并非旨在限于所示的实施例,而是与符合本申请所公开的原理的最广范围相一致。It will be understood that one of ordinary skill in the art will recognize that the present application may be practiced without these specific details. In other instances, well-known structures and processes have not been described in detail to avoid obscuring the description of the application with unnecessary detail. Thus, this application is not intended to be limited to the embodiments shown but is to be accorded the widest scope consistent with the principles disclosed herein.
请参阅图1-图5,图1为本申请实施例提供的载有LED芯片的显示屏的结构示意图;图2为本申请实施例提供的载有LED芯片的显示屏中基板的结构示意图;图3为本申请实施例提供的载有LED芯片的显示屏局部结构示意图;图4为本申请实施例提供的载有LED芯片的显示屏的剖视图;图5为本申请实施例提供的载有LED芯片的显示屏的局部结构示意图。Please refer to Figures 1-5. Figure 1 is a schematic structural diagram of a display screen carrying an LED chip provided by an embodiment of the present application; Figure 2 is a schematic structural diagram of a substrate in a display screen carrying an LED chip provided by an embodiment of the present application; Figure 3 is a schematic diagram of a partial structure of a display screen carrying an LED chip provided by an embodiment of the present application; Figure 4 is a cross-sectional view of a display screen equipped with an LED chip provided by an embodiment of the present application; Figure 5 is a schematic diagram of a display screen equipped with an LED chip provided by an embodiment of the present application. Schematic diagram of the partial structure of the LED chip display screen.
如图1-图5所示,一种载有LED芯片的显示屏,其包括:As shown in Figures 1 to 5, a display screen carrying an LED chip includes:
基板10,所述基板10上设置有若干个阳极基板焊盘111、若干个阴极基板焊盘112;Substrate 10, with several anode substrate pads 111 and several cathode substrate pads 112 provided on the substrate 10;
若干个LED芯片30,所述LED芯片30包括:衬底20、连接金属50以及若干个LED子芯片31;Several LED chips 30, the LED chips 30 include: a substrate 20, a connecting metal 50 and a plurality of LED sub-chips 31;
其中,所述衬底20上设置有若干个P型焊盘211、若干个N型焊盘212,每个所述阳极基板焊盘111通过金属锡40单独连接一个所述P型焊盘211,每个所述阴极基板焊盘112通过所述金属锡40单独连接一个所述N型焊盘212,每个所述LED子芯片31的P型导电金属层311或N型导电金属层312通过所述连接金属50实现电性连接。Among them, several P-type bonding pads 211 and several N-type bonding pads 212 are provided on the substrate 20, and each of the anode substrate bonding pads 111 is individually connected to one of the P-type bonding pads 211 through metal tin 40. Each of the cathode substrate pads 112 is individually connected to one of the N-type pads 212 through the metal tin 40 , and the P-type conductive metal layer 311 or N-type conductive metal layer 312 of each LED sub-chip 31 is connected through the metal tin 40 . The connecting metal 50 realizes electrical connection.
可以理解,本申请实施例提供的载有LED芯片的显示屏中LED芯片30为一个LED芯片30,也可以为多个LED芯片30。当显示屏存在多个LED芯片30时,多个LED芯片30可以在基板10上呈阵列排布,还可以呈非阵列排布,其具体排布方式以及显示屏中LED芯片30的个数可以根据实际应用进行选择,本实施例中不做具体限定。It can be understood that the LED chip 30 in the display screen carrying the LED chip provided by the embodiment of the present application is one LED chip 30 or multiple LED chips 30 . When there are multiple LED chips 30 in the display screen, the multiple LED chips 30 can be arranged in an array on the substrate 10 or in a non-array arrangement. The specific arrangement method and the number of LED chips 30 in the display screen can be The selection is made according to the actual application and is not specifically limited in this embodiment.
还可以理解,本实施例中的一个LED芯片30可以理解为一个LED芯片单元,一个LED子芯片31可以为传统LED芯片、Micro LED芯片、Mini LED芯片中的任意一种,其中,传统LED芯片的尺寸大于Micro LED芯片,Mini LED芯片为芯片尺寸在50~200μm的LED芯片。It can also be understood that an LED chip 30 in this embodiment can be understood as an LED chip unit, and an LED sub-chip 31 can be any one of a traditional LED chip, a Micro LED chip, and a Mini LED chip. The traditional LED chip The size is larger than Micro LED chip, and Mini LED chip is an LED chip with a chip size of 50~200μm.
另外,金属锡40可以为球形状的锡球,还可以为非球形状锡块,连接金属50含有具有导电性质的金属材料。In addition, the metal tin 40 can be a spherical tin ball or a non-spherical tin block, and the connecting metal 50 contains a conductive metal material.
其中,LED子芯片31设置在基板10与衬底20之间,一个LED芯片30中可以存在一个LED子芯片31,还可以存在多个LED子芯片31。同样,当一个LED芯片30中存在多个LED子芯片31时,多个LED子芯片31可以在衬底20上呈阵列排布,还可以呈非阵列排布,其具体排布方式以及LED芯片30中LED子芯片31的个数可以根据实际应用进行选择,本实施例中不做具体限定。The LED sub-chip 31 is disposed between the substrate 10 and the substrate 20 . One LED sub-chip 31 may be present in one LED chip 30 , or multiple LED sub-chips 31 may be present. Similarly, when there are multiple LED sub-chips 31 in one LED chip 30, the multiple LED sub-chips 31 can be arranged in an array on the substrate 20, or in a non-array arrangement. The specific arrangement method and the LED chip The number of LED sub-chips 31 in 30 can be selected according to actual applications, and is not specifically limited in this embodiment.
还可以理解的是,基板10上设置的阳极基板焊盘111以及阴极基板焊盘112的个数可以均为一个阳极基板焊盘111和一个阴极基板焊盘112,也可以为一个阳极基板焊盘111和多个阴极基板焊盘112,还可以为多个阳极基板焊盘111和一个阴极基板焊盘112,还可以为多个阳极基板焊盘111和多个阴极基板焊盘112,基板10上可以设置个数相等的阳极基板焊盘111和阴极基板焊盘112,还可以设置个数不相等的阳极基板焊盘111和阴极基板焊盘112,基板10上设置的阳极基板焊盘111以及阴极基板焊盘112的个数可以根据实际应用进行选择,本实施例中不做具体限定。It can also be understood that the number of anode substrate pads 111 and cathode substrate pads 112 provided on the substrate 10 can be one anode substrate pad 111 and one cathode substrate pad 112, or can be one anode substrate pad. 111 and multiple cathode substrate pads 112, or multiple anode substrate pads 111 and one cathode substrate pad 112, or multiple anode substrate pads 111 and multiple cathode substrate pads 112, on the substrate 10 An equal number of anode substrate welding pads 111 and cathode substrate welding pads 112 can be provided, and an unequal number of anode substrate welding pads 111 and cathode substrate welding pads 112 can also be provided. The anode substrate welding pads 111 and the cathode are provided on the substrate 10 The number of substrate pads 112 can be selected according to actual applications, and is not specifically limited in this embodiment.
在一些实施例中,如图3至图5所示,所述LED芯片30还包括布拉格反射层220,所述布拉格反射层220上设置有P型布拉格反射层通孔221和N型布拉格反射层通孔222;其中,所述P型焊盘211通过所述P型布拉格反射层通孔221电性连接所述P型导电金属层311或所述连接金属50,所述N型焊盘212通过所述N型布拉格反射层通孔222电性连接所述N型导电金属层312或所述连接金属50。具体的,布拉格反射层220沉积在衬底20上,并设置在衬底20与基板10之间,每个LED芯片30中的LED子芯片31均设置在布拉格反射层220与衬底20之间。当P型焊盘211需要与P型导电金属层311之间进行电性连接,或N型焊盘212与N型导电金属层312之间进行电性连接时,则将连接金属50通过P型布拉格反射层通孔221或N型布拉格反射层通孔222,便可实现P型焊盘211需要与P型导电金属层311之间进行电性连接,或N型焊盘212与N型导电金属层312之间进行电性连接。In some embodiments, as shown in Figures 3 to 5, the LED chip 30 further includes a Bragg reflective layer 220, and the Bragg reflective layer 220 is provided with a P-type Bragg reflective layer through hole 221 and an N-type Bragg reflective layer. Through hole 222; wherein, the P-type bonding pad 211 is electrically connected to the P-type conductive metal layer 311 or the connection metal 50 through the P-type Bragg reflective layer through hole 221, and the N-type bonding pad 212 passes through The N-type Bragg reflective layer through hole 222 is electrically connected to the N-type conductive metal layer 312 or the connection metal 50 . Specifically, the Bragg reflective layer 220 is deposited on the substrate 20 and is arranged between the substrate 20 and the substrate 10 , and the LED sub-chips 31 in each LED chip 30 are arranged between the Bragg reflective layer 220 and the substrate 20 . When the P-type pad 211 needs to be electrically connected to the P-type conductive metal layer 311, or the N-type pad 212 and the N-type conductive metal layer 312 need to be electrically connected, the connection metal 50 is passed through the P-type conductive metal layer 312. The Bragg reflective layer through hole 221 or the N-type Bragg reflective layer through hole 222 can realize the electrical connection between the P-type pad 211 and the P-type conductive metal layer 311, or the N-type pad 212 and the N-type conductive metal. The layers 312 are electrically connected.
可以理解,当P型焊盘211通过P型布拉格反射层通孔221电性连接P型导电金属层311时,P型布拉格反射层通孔221中有连接金属50,同时连接金属50还可通过N型布拉格反射层通孔222以实现N型焊盘212与连接金属50电性连接;当N型焊盘212通过N型布拉格反射层通孔222电性连接N型导电金属层312时,N型布拉格反射层通孔222中设置有连接金属50,同时连接金属50还可通过P型布拉格反射层通孔221以实现P型焊盘211与连接金属50电性连接。It can be understood that when the P-type pad 211 is electrically connected to the P-type conductive metal layer 311 through the P-type Bragg reflective layer through hole 221, the P-type Bragg reflective layer through hole 221 has the connecting metal 50, and at the same time, the connecting metal 50 can also pass through The N-type Bragg reflective layer through hole 222 is used to realize the electrical connection between the N-type pad 212 and the connecting metal 50; when the N-type pad 212 is electrically connected to the N-type conductive metal layer 312 through the N-type Bragg reflective layer through hole 222, N The connection metal 50 is provided in the type Bragg reflective layer through hole 222 . At the same time, the connection metal 50 can also achieve electrical connection between the P type pad 211 and the connection metal 50 through the P type Bragg reflection layer through hole 221 .
在一些具体的实施例中,所述布拉格反射层220由5-50层SiO2和Ti3O5材料对堆叠形成。In some specific embodiments, the Bragg reflective layer 220 is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs.
可以理解,布拉格反射层220还可以由1-5层或50层以上的SiO2和Ti3O5材料对进行堆叠形成,本实施例中布拉格反射层220由5-50层SiO2和Ti3O5材料对进行堆叠形成为本申请中的优选的实施例。It can be understood that the Bragg reflective layer 220 can also be formed by stacking 1-5 layers or more than 50 layers of SiO2 and Ti3O5 material pairs. In this embodiment, the Bragg reflective layer 220 is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs as Preferred embodiments in this application.
在一些实施例中,如图3和图5所示,所述LED子芯片31还包括:电流扩展层340、有源发光层350、P型半导体321以及N型半导体322;其中,所述有源发光层350位于P型半导体321与N型半导体322之间,所述P型导电金属层311与所述电流扩展层340电性连接,所述电流扩展层340与所述P型半导体321电性连接以激发空穴,所述N型导电金属层312与所述N型半导体322的导电台阶电性连接以激发电子。具体的,电流扩展层340位于P型导电金属层311与P型半导体321之间,N型半导体322位于N型导电金属层312与衬底20之间,同时N型半导体322还位于P型半导体321与衬底20之间。In some embodiments, as shown in Figures 3 and 5, the LED sub-chip 31 also includes: a current spreading layer 340, an active light-emitting layer 350, a P-type semiconductor 321 and an N-type semiconductor 322; wherein, the The source light-emitting layer 350 is located between the P-type semiconductor 321 and the N-type semiconductor 322. The P-type conductive metal layer 311 is electrically connected to the current spreading layer 340. The current spreading layer 340 is electrically connected to the P-type semiconductor 321. The N-type conductive metal layer 312 is electrically connected to the conductive step of the N-type semiconductor 322 to excite holes. Specifically, the current spreading layer 340 is located between the P-type conductive metal layer 311 and the P-type semiconductor 321, the N-type semiconductor 322 is located between the N-type conductive metal layer 312 and the substrate 20, and the N-type semiconductor 322 is also located between the P-type semiconductor 321 and substrate 20.
在一些具体的实施例中,如图3所示,所述P型半导体321的正向投影小于所述N型半导体322的正向投影,所述N型半导体322暴露出的部分作为所述导电台阶。In some specific embodiments, as shown in FIG. 3 , the forward projection of the P-type semiconductor 321 is smaller than the forward projection of the N-type semiconductor 322 , and the exposed part of the N-type semiconductor 322 serves as the conductive steps.
在一些实施例中,如图5所示,所述LED子芯片31还包括:绝缘保护层330,所述绝缘保护层330上设置有P型绝缘保护层通孔331和N型绝缘保护层通孔332;其中,所述P型导电金属层311通过所述P型绝缘保护层通孔331与所述电流扩展层340电性连接,所述N型导电金属层312通过所述N型绝缘保护层通孔332与所述N型半导体322的导电台阶电性连接。具体的,绝缘保护层330位于在N型导电金属层312与N型半导体322之间,同时绝缘保护层330还位于P型导电金属层311与电流扩展层340之间。In some embodiments, as shown in FIG. 5 , the LED sub-chip 31 further includes: an insulating protective layer 330 . The insulating protective layer 330 is provided with a P-type insulating protective layer through hole 331 and an N-type insulating protective layer through hole. Hole 332; wherein, the P-type conductive metal layer 311 is electrically connected to the current expansion layer 340 through the P-type insulating protection layer through hole 331, and the N-type conductive metal layer 312 is protected by the N-type insulating layer. The layer via 332 is electrically connected to the conductive step of the N-type semiconductor 322 . Specifically, the insulating protective layer 330 is located between the N-type conductive metal layer 312 and the N-type semiconductor 322, and at the same time, the insulating protective layer 330 is also located between the P-type conductive metal layer 311 and the current spreading layer 340.
在一些具体的实施例中,所述绝缘保护层330的材料选自SiO2、TiO2、Ti3O5、SiN中的一种或多种。In some specific embodiments, the material of the insulating protective layer 330 is selected from one or more of SiO2, TiO2, Ti3O5, and SiN.
在一些实施例中,所述P型半导体的长度为1~500微米,宽度为1~500微米;所述N型半导体的长度为20~550微米,宽度为20~550微米。In some embodiments, the P-type semiconductor has a length of 1-500 microns and a width of 1-500 microns; the N-type semiconductor has a length of 20-550 microns and a width of 20-550 microns.
在一些实施例中,所述阳极基板焊盘111的长度为10~200微米,宽度为10~200微米;所述阴极基板焊盘112的长度为10~200微米,宽度为10~200微米;所述金属锡40的长度为10~200微米,宽度为10~200微米,高度为1~100微米。In some embodiments, the anode substrate pad 111 has a length of 10-200 microns and a width of 10-200 microns; the cathode substrate pad 112 has a length of 10-200 microns and a width of 10-200 microns; The length of the metal tin 40 is 10-200 microns, the width is 10-200 microns, and the height is 1-100 microns.
本申请实施例提供的LED芯片以及载有LED芯片的显示屏,通过在基板10上设置若干个LED芯片30,每个LED芯片30均由衬底20、连接金属50和若干个LED子芯片31组成,并将LED子芯片31的P型焊盘211和N型焊盘212在衬底20上单独设置,同时基板10上的每个阳极基板焊盘111通过金属锡40单独连接一个P型焊盘211,每个阴极基板焊盘112通过金属锡40单独连接一个P型焊盘211,每个LED子芯片31的P型导电金属层311或N型导电金属层312通过连接金属50实现电性连接,从而解决了现有技术中P型焊盘211与N型焊盘212太近导致的连锡、短路、良率低的技术问题。The LED chip and the display screen carrying the LED chip provided by the embodiment of the present application are provided with several LED chips 30 on the substrate 10. Each LED chip 30 is composed of a substrate 20, a connecting metal 50 and several LED sub-chips 31. The P-type pad 211 and the N-type pad 212 of the LED sub-chip 31 are separately arranged on the substrate 20, and each anode substrate pad 111 on the substrate 10 is individually connected to a P-type pad through the metal tin 40. Pad 211, each cathode substrate pad 112 is individually connected to a P-type pad 211 through metal tin 40, and the P-type conductive metal layer 311 or N-type conductive metal layer 312 of each LED sub-chip 31 realizes electrical properties through the connecting metal 50 connection, thus solving the technical problems in the prior art that the P-type pad 211 and the N-type pad 212 are too close to each other, such as tin connection, short circuit, and low yield.
以下为本申请提供的实现载有LED芯片的显示屏的多个实施例。The following are multiple embodiments provided by this application for implementing a display screen carrying an LED chip.
实施例1Example 1
如图1-图5所示,一种载有Micro LED芯片的显示屏,其包括:As shown in Figures 1-5, a display screen carrying Micro LED chips includes:
基板10,所述基板10上设置有阳极基板焊盘111、阴极基板焊盘112,其中,阳极基板焊盘111的长度和宽度均为80微米,阴极基板焊盘112的长度为160微米,宽度为80微米;Substrate 10. The substrate 10 is provided with an anode substrate pad 111 and a cathode substrate pad 112. The anode substrate pad 111 has a length and a width of 80 microns, and the cathode substrate pad 112 has a length of 160 microns and a width of 160 microns. is 80 microns;
若干个LED芯片30,每个LED芯片30包括衬底20、连接金属50以及3个Micro LED芯片;Several LED chips 30, each LED chip 30 includes a substrate 20, a connecting metal 50 and three Micro LED chips;
其中,衬底20上设置有3个P型焊盘211、2个N型焊盘212,每个阳极基板焊盘111通过金属锡40单独连接一个P型焊盘211,每个阴极基板焊盘112通过高度为20微米的锡球单独连接一个N型焊盘212;Among them, three P-type pads 211 and two N-type pads 212 are provided on the substrate 20. Each anode substrate pad 111 is individually connected to a P-type pad 211 through metal tin 40, and each cathode substrate pad is connected to a P-type pad 211 through metal tin 40. 112 is individually connected to an N-type pad 212 through a solder ball with a height of 20 microns;
LED芯片30包括P型导电金属层311、N型导电金属层312、布拉格反射层220、电流扩展层340、P型半导体321、N型半导体322、绝缘保护层330以及有源发光层350;The LED chip 30 includes a P-type conductive metal layer 311, an N-type conductive metal layer 312, a Bragg reflective layer 220, a current spreading layer 340, a P-type semiconductor 321, an N-type semiconductor 322, an insulating protective layer 330 and an active light-emitting layer 350;
布拉格反射层220上设置有P型布拉格反射层通孔221和N型布拉格反射层通孔222,P型焊盘211通过P型布拉格反射层通孔221与P型导电金属层311电性连接,N型焊盘212通过N型布拉格反射层通孔222与连接金属50电性连接,布拉格反射层220由28层SiO2和Ti3O5材料对堆叠形成;The Bragg reflective layer 220 is provided with a P-type Bragg reflective layer through hole 221 and an N-type Bragg reflective layer through hole 222. The P-type pad 211 is electrically connected to the P-type conductive metal layer 311 through the P-type Bragg reflective layer through hole 221. The N-type pad 212 is electrically connected to the connecting metal 50 through the N-type Bragg reflective layer through hole 222. The Bragg reflective layer 220 is formed by stacking 28 layers of SiO2 and Ti3O5 materials;
P型半导体321层的长度为80微米,宽度为50微米,N型半导体322的长度为100微米,宽度为55微米;The P-type semiconductor layer 321 has a length of 80 microns and a width of 50 microns, and the N-type semiconductor layer 322 has a length of 100 microns and a width of 55 microns;
绝缘保护层330上设置有P型绝缘保护层通孔331和N型绝缘保护层通孔332,P型导电金属层311通过P型绝缘保护层通孔331与电流扩展层340电性连接,电流扩展层340与P型半导体321电性连接以激发空穴,N型导电金属层312通过N型绝缘保护层通孔332与N型半导体322的台阶电性连接以激发电子;P型半导体321的正向投影小于N型半导体322的正向投影,N型半导体322暴露出的部分作为导电台阶,绝缘保护层330的材料选自SiO2。The insulating protective layer 330 is provided with a P-type insulating protective layer through hole 331 and an N-type insulating protective layer through hole 332. The P-type conductive metal layer 311 is electrically connected to the current expansion layer 340 through the P-type insulating protective layer through hole 331, and the current The extension layer 340 is electrically connected to the P-type semiconductor 321 to excite holes, and the N-type conductive metal layer 312 is electrically connected to the steps of the N-type semiconductor 322 through the N-type insulating protective layer through hole 332 to excite electrons; The forward projection is smaller than the forward projection of the N-type semiconductor 322, the exposed part of the N-type semiconductor 322 serves as a conductive step, and the material of the insulating protective layer 330 is selected from SiO2.
实施例2Example 2
如图6所示,一种载有Micro LED芯片的显示屏,其与实施例1中的载有Micro LED芯片的显示屏相似,区别仅在于:As shown in Figure 6, a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1, and the only difference is:
LED芯片30包括1个Micro LED芯片,衬底20上设置有1个P型焊盘211,2个N型焊盘212。The LED chip 30 includes a Micro LED chip, and a P-type bonding pad 211 and two N-type bonding pads 212 are provided on the substrate 20 .
实施例3Example 3
如图7所示,一种载有Micro LED芯片的显示屏,其与实施例1中的载有Micro LED芯片的显示屏相似,区别仅在于:As shown in Figure 7, a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1. The only difference is:
LED芯片30包括5个Micro LED芯片,衬底20上设置有5个P型焊盘211,2个N型焊盘212。The LED chip 30 includes five Micro LED chips, and the substrate 20 is provided with five P-type bonding pads 211 and two N-type bonding pads 212 .
实施例4Example 4
如图8所示,一种载有Micro LED芯片的显示屏,其与实施例1中的载有Micro LED芯片的显示屏相似,区别仅在于:As shown in Figure 8, a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1, and the only difference is:
LED芯片30包括7个Micro LED芯片,衬底20上设置有7个P型焊盘211,2个N型焊盘212。The LED chip 30 includes 7 Micro LED chips, and the substrate 20 is provided with 7 P-type bonding pads 211 and 2 N-type bonding pads 212 .
实施例5Example 5
如图9所示,一种载有Micro LED芯片的显示屏,其与实施例1中的载有Micro LED芯片的显示屏相似,区别仅在于:As shown in Figure 9, a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1, and the only difference is:
LED芯片30包括3个Micro LED芯片,衬底20上设置有3个P型焊盘211,1个N型焊盘212。The LED chip 30 includes three Micro LED chips, and three P-type bonding pads 211 and one N-type bonding pad 212 are provided on the substrate 20 .
实施例6Example 6
如图10-图11所示,一种载有Micro LED芯片的显示屏,其与实施例1中的载有Micro LED芯片的显示屏相似,区别仅在于:As shown in Figures 10 and 11, a display screen carrying a Micro LED chip is similar to the display screen carrying a Micro LED chip in Embodiment 1, and the only difference is:
LED芯片30包括3个Micro LED芯片,衬底20上设置有2个P型焊盘211,3个N型焊盘212;The LED chip 30 includes three Micro LED chips, and the substrate 20 is provided with two P-type pads 211 and three N-type pads 212;
阳极基板焊盘111通过锡球与P型焊盘211连接,P型焊盘211通过P型布拉格反射层通孔221与连接金属50电性连接;连接金属50与P型导电金属层311相连,P型导电金属通过P型绝缘保护层通孔331与电流扩展层340电性连接;电流扩展层340与P型半导体321层电性连接以激发空穴;The anode substrate pad 111 is connected to the P-type pad 211 through solder balls, and the P-type pad 211 is electrically connected to the connecting metal 50 through the P-type Bragg reflective layer through hole 221; the connecting metal 50 is connected to the P-type conductive metal layer 311. The P-type conductive metal is electrically connected to the current spreading layer 340 through the P-type insulating protective layer through hole 331; the current spreading layer 340 is electrically connected to the P-type semiconductor 321 layer to excite holes;
阴极基板焊盘112通过锡球与N型焊盘212连接,N型焊盘212通过N型布拉格反射层通孔222与N型导电金属层312电性连接,N型导电金属层312通过N型绝缘保护层通孔332与N型半导体322的导电台阶电性连接以激发电子。The cathode substrate pad 112 is connected to the N-type pad 212 through solder balls. The N-type pad 212 is electrically connected to the N-type conductive metal layer 312 through the N-type Bragg reflective layer through hole 222. The N-type conductive metal layer 312 passes through the N-type Bragg reflective layer through hole 222. The insulating protective layer through hole 332 is electrically connected to the conductive step of the N-type semiconductor 322 to excite electrons.
具体实施时,以上各个单元或结构可以作为独立的实体来实现,也可以进行任意组合,作为同一或若干个实体来实现,以上各个单元或结构的具体实施可参见前面的实施例,在此不再赘述。During specific implementation, each of the above units or structures can be implemented as an independent entity, or can be combined in any way to be implemented as the same or several entities. For the specific implementation of each of the above units or structures, please refer to the previous embodiments and will not be discussed here. Again.
以上对本申请实施例所提供的一种LED芯片以及载有LED芯片的显示屏进行了详细介绍,本文中应用了具体个例对本申请的原理及实施例进行了阐述,以上实施例的说明只是用于帮助理解本申请的方法及其核心思想;同时,对于本领域的技术人员,依据本申请的思想,在具体实施例及应用范围上均会有改变之处,综上,本说明书内容不应理解为对本申请的限制。The above is a detailed introduction to an LED chip and a display screen carrying an LED chip provided by the embodiments of the present application. Specific examples are used in this article to illustrate the principles and embodiments of the present application. The description of the above embodiments is only for To help understand the methods and core ideas of this application; at the same time, for those skilled in the art, there will be changes in the specific embodiments and application scope based on the ideas of this application. In summary, the content of this specification should not understood as a limitation on this application.

Claims (20)

  1. 一种LED芯片,包括:衬底、连接金属以及若干个LED子芯片;An LED chip, including: a substrate, connecting metal and several LED sub-chips;
    其中,所述衬底上设置有若干个P型焊盘、若干个N型焊盘,每个所述P型焊盘单独通过金属锡与基板上的一个阳极基板焊盘连接,每个所述N型焊盘单独通过所述金属锡与所述基板上的一个阴极基板焊盘连接,每个所述LED子芯片的P型导电金属层或N型导电金属层通过所述连接金属实现电性连接。Wherein, several P-type pads and several N-type pads are provided on the substrate, each of the P-type pads is individually connected to an anode substrate pad on the substrate through metal tin, and each of the P-type pads is connected to an anode substrate pad on the substrate through metal tin. The N-type pad is individually connected to a cathode substrate pad on the substrate through the metal tin, and the P-type conductive metal layer or N-type conductive metal layer of each LED sub-chip achieves electrical properties through the connection metal. connect.
  2. 根据权利要求1所述的LED芯片,还包括布拉格反射层,所述布拉格反射层上设置有P型布拉格反射层通孔和N型布拉格反射层通孔;The LED chip according to claim 1, further comprising a Bragg reflective layer, the Bragg reflective layer is provided with P-type Bragg reflective layer through holes and N-type Bragg reflective layer through holes;
    其中,所述P型焊盘通过所述P型布拉格反射层通孔电性连接所述P型导电金属层或所述连接金属,所述N型焊盘通过所述N型布拉格反射层通孔电性连接所述N型导电金属层或所述连接金属。Wherein, the P-type soldering pad is electrically connected to the P-type conductive metal layer or the connection metal through the P-type Bragg reflective layer through hole, and the N-type soldering pad passes through the N-type Bragg reflective layer through hole. Electrically connect the N-type conductive metal layer or the connection metal.
  3. 根据权利要求2所述的LED芯片,其中,所述布拉格反射层由5-50层SiO2和Ti3O5材料对堆叠形成。The LED chip according to claim 2, wherein the Bragg reflective layer is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs.
  4. 根据权利要求1所述的LED芯片,其中,所述LED子芯片还包括:电流扩展层、有源发光层、P型半导体以及N型半导体;The LED chip according to claim 1, wherein the LED sub-chip further includes: a current spreading layer, an active light-emitting layer, a P-type semiconductor and an N-type semiconductor;
    其中,所述有源发光层设置在所述P型半导体与所述N型半导体之间,所述P型导电金属层与所述电流扩展层电性连接,所述电流扩展层与所述P型半导体电性连接以激发空穴,所述N型导电金属层与所述N型半导体的导电台阶电性连接以激发电子。Wherein, the active light-emitting layer is disposed between the P-type semiconductor and the N-type semiconductor, the P-type conductive metal layer is electrically connected to the current expansion layer, and the current expansion layer is connected to the P-type conductive metal layer. The N-type semiconductor is electrically connected to excite holes, and the N-type conductive metal layer is electrically connected to the conductive step of the N-type semiconductor to excite electrons.
  5. 根据权利要求4所述的LED芯片,其中,所述P型半导体的正向投影小于所述N型半导体的正向投影,所述N型半导体暴露出的部分作为所述导电台阶。The LED chip of claim 4, wherein the forward projection of the P-type semiconductor is smaller than the forward projection of the N-type semiconductor, and the exposed portion of the N-type semiconductor serves as the conductive step.
  6. 根据权利要求4所述的LED芯片,其中,所述LED子芯片还包括:绝缘保护层,所述绝缘保护层上设置有P型绝缘保护层通孔和N型绝缘保护层通孔;The LED chip according to claim 4, wherein the LED sub-chip further includes: an insulating protective layer, and the insulating protective layer is provided with P-type insulating protective layer through holes and N-type insulating protective layer through holes;
    其中,所述P型导电金属层通过所述P型绝缘保护层通孔与所述电流扩展层电性连接,所述N型导电金属层通过所述N型绝缘保护层通孔与所述N型半导体的导电台阶电性连接。Wherein, the P-type conductive metal layer is electrically connected to the current expansion layer through the P-type insulating protective layer through hole, and the N-type conductive metal layer is electrically connected to the N-type insulating protective layer through the N-type insulating protective layer through hole. The conductive steps of the type semiconductor are electrically connected.
  7. 根据权利要求6所述的LED芯片,其中,所述绝缘保护层的材料选自SiO2、TiO2、Ti3O5、SiN中的一种或多种。The LED chip according to claim 6, wherein the material of the insulating protective layer is selected from one or more of SiO2, TiO2, Ti3O5, and SiN.
  8. 根据权利要求4所述的LED芯片,其中,所述P型半导体的长度为1~500微米,宽度为1~500微米;所述N型半导体的长度为20~550微米,宽度为20~550微米。The LED chip according to claim 4, wherein the P-type semiconductor has a length of 1-500 microns and a width of 1-500 microns; the N-type semiconductor has a length of 20-550 microns and a width of 20-550 microns. Micron.
  9. 根据权利要求1所述的LED芯片,其中,所述阳极基板焊盘的长度为10~200微米,宽度为10~200微米;所述阴极基板焊盘的长度为10~200微米,宽度为10~200微米;所述金属锡的长度为10~200微米,宽度为10~200微米,高度为1~100微米。The LED chip according to claim 1, wherein the anode substrate pad has a length of 10-200 microns and a width of 10-200 microns; the cathode substrate pad has a length of 10-200 microns and a width of 10 ~200 microns; the length of the metal tin is 10-200 microns, the width is 10-200 microns, and the height is 1-100 microns.
  10. 根据权利要求1所述的LED芯片,其中,所述LED子芯片为传统LED芯片、Micro LED芯片、Mini LED芯片中的任意一种。The LED chip according to claim 1, wherein the LED sub-chip is a traditional LED chip, Micro Any one of LED chips and Mini LED chips.
  11. 一种载有LED芯片的显示屏,包括:A display screen containing LED chips, including:
    基板,所述基板上设置有若干个阳极基板焊盘、若干个阴极基板焊盘;A substrate, on which are provided several anode substrate pads and several cathode substrate pads;
    若干个LED芯片,所述LED芯片包括:衬底、连接金属以及若干个LED子芯片;Several LED chips, the LED chips include: a substrate, a connecting metal and several LED sub-chips;
    其中,所述衬底上设置有若干个P型焊盘、若干个N型焊盘,每个所述阳极基板焊盘通过金属锡单独连接一个所述P型焊盘,每个所述阴极基板焊盘通过所述金属锡单独连接一个所述N型焊盘,每个所述LED子芯片的P型导电金属层或N型导电金属层通过所述连接金属实现电性连接。Wherein, several P-type pads and several N-type pads are provided on the substrate, each of the anode substrate pads is individually connected to one of the P-type pads through metal tin, and each of the cathode substrates The soldering pad is individually connected to one of the N-type soldering pads through the metal tin, and the P-type conductive metal layer or N-type conductive metal layer of each LED sub-chip is electrically connected through the connecting metal.
  12. 根据权利要求11所述的载有LED芯片的显示屏,其中,所述LED芯片还包括布拉格反射层,所述布拉格反射层上设置有P型布拉格反射层通孔和N型布拉格反射层通孔;The display screen carrying an LED chip according to claim 11, wherein the LED chip further includes a Bragg reflective layer, and the Bragg reflective layer is provided with P-type Bragg reflective layer through holes and N-type Bragg reflective layer through holes. ;
    其中,所述P型焊盘通过所述P型布拉格反射层通孔电性连接所述P型导电金属层或所述连接金属,所述N型焊盘通过所述N型布拉格反射层通孔电性连接所述N型导电金属层或所述连接金属。Wherein, the P-type soldering pad is electrically connected to the P-type conductive metal layer or the connection metal through the P-type Bragg reflective layer through hole, and the N-type soldering pad passes through the N-type Bragg reflective layer through hole. Electrically connect the N-type conductive metal layer or the connection metal.
  13. 根据权利要求12所述的载有LED芯片的显示屏,其中,所述布拉格反射层由5-50层SiO2和Ti3O5材料对堆叠形成。The display screen carrying an LED chip according to claim 12, wherein the Bragg reflective layer is formed by stacking 5-50 layers of SiO2 and Ti3O5 material pairs.
  14. 根据权利要求11所述的载有LED芯片的显示屏,其中,所述LED子芯片还包括:电流扩展层、有源发光层、P型半导体以及N型半导体;The display screen carrying an LED chip according to claim 11, wherein the LED sub-chip further includes: a current spreading layer, an active light-emitting layer, a P-type semiconductor and an N-type semiconductor;
    其中,所述有源发光层设置在所述P型半导体与所述N型半导体之间,所述P型导电金属层与所述电流扩展层电性连接,所述电流扩展层与所述P型半导体电性连接以激发空穴,所述N型导电金属层与所述N型半导体的导电台阶电性连接以激发电子。Wherein, the active light-emitting layer is disposed between the P-type semiconductor and the N-type semiconductor, the P-type conductive metal layer is electrically connected to the current expansion layer, and the current expansion layer is connected to the P-type conductive metal layer. The N-type semiconductor is electrically connected to excite holes, and the N-type conductive metal layer is electrically connected to the conductive step of the N-type semiconductor to excite electrons.
  15. 根据权利要求14所述的载有LED芯片的显示屏,其中,所述P型半导体的正向投影小于所述N型半导体的正向投影,所述N型半导体暴露出的部分作为所述导电台阶。The display screen carrying an LED chip according to claim 14, wherein the forward projection of the P-type semiconductor is smaller than the forward projection of the N-type semiconductor, and the exposed portion of the N-type semiconductor serves as the conductive steps.
  16. 根据权利要求14所述的载有LED芯片的显示屏,其中,所述LED子芯片还包括:绝缘保护层,所述绝缘保护层上设置有P型绝缘保护层通孔和N型绝缘保护层通孔;The display screen carrying an LED chip according to claim 14, wherein the LED sub-chip further includes: an insulating protective layer, and a P-type insulating protective layer through hole and an N-type insulating protective layer are provided on the insulating protective layer through hole;
    其中,所述P型导电金属层通过所述P型绝缘保护层通孔与所述电流扩展层电性连接,所述N型导电金属层通过所述N型绝缘保护层通孔与所述N型半导体的导电台阶电性连接。Wherein, the P-type conductive metal layer is electrically connected to the current expansion layer through the P-type insulating protective layer through hole, and the N-type conductive metal layer is electrically connected to the N-type insulating protective layer through the N-type insulating protective layer through hole. The conductive steps of the type semiconductor are electrically connected.
  17. 根据权利要求16所述的载有LED芯片的显示屏,其中,所述绝缘保护层的材料选自SiO2、TiO2、Ti3O5、SiN中的一种或多种。The display screen carrying an LED chip according to claim 16, wherein the material of the insulating protective layer is selected from one or more of SiO2, TiO2, Ti3O5, and SiN.
  18. 根据权利要求14所述的载有LED芯片的显示屏,其中,所述P型半导体的长度为1~500微米,宽度为1~500微米;所述N型半导体的长度为20~550微米,宽度为20~550微米。The display screen carrying an LED chip according to claim 14, wherein the length of the P-type semiconductor is 1 to 500 microns and the width is 1 to 500 microns; the length of the N-type semiconductor is 20 to 550 microns, The width is 20~550 microns.
  19. 根据权利要求11所述的载有LED芯片的显示屏,其中,所述阳极基板焊盘的长度为10~200微米,宽度为10~200微米;所述阴极基板焊盘的长度为10~200微米,宽度为10~200微米;所述金属锡的长度为10~200微米,宽度为10~200微米,高度为1~100微米。The display screen carrying LED chips according to claim 11, wherein the length of the anode substrate pad is 10~200 microns and the width is 10~200 microns; the length of the cathode substrate pad is 10~200 microns. Micron, the width is 10~200 micron; the length of the metal tin is 10~200 micron, the width is 10~200 micron, and the height is 1~100 micron.
  20. 根据权利要求11所述的载有LED芯片的显示屏,其中,所述LED子芯片为传统LED芯片、Micro LED芯片、Mini LED芯片中的任意一种。The display screen carrying LED chips according to claim 11, wherein the LED sub-chips are traditional LED chips, Micro Any one of LED chips and Mini LED chips.
PCT/CN2022/103436 2022-06-14 2022-07-01 Led chip and display screen provided with led chip WO2023240713A1 (en)

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