WO2023238429A1 - Vertical cavity surface emitting laser - Google Patents

Abstract

In the present invention, a lower distributed Bragg reflection layer is disposed on a first surface of a semiconductor layer. An active layer is disposed on the lower distributed Bragg reflection layer. An upper distributed Bragg reflection layer is disposed on the active layer. A heat-transfer member, which includes a material with thermal conductivity higher than the thermal conductivity of the semiconductor layer, is disposed on a second surface of the semiconductor which is on the side opposite the first surface. A mesa structure is formed from the upper distributed Bragg reflection layer to at least an upper surface of the lower distributed Bragg reflection. Furthermore, the mesa structure includes a current-confining layer that concentrates current in a partial region in a planar view. A dimension in a height direction from the second surface of the semiconductor layer to the current-confining layer is one-half or less of the diameter of a minimum bounding circle that encompasses the mesa structure in a planar view.

Description

Vertical cavity surface emitting laser

The present invention relates to a vertical cavity surface emitting laser.

A vertical cavity surface emitting laser (VCSEL) outputs a laser beam from one or more light emitting parts formed on a substrate in a direction perpendicular to the device formation surface of the substrate. . A VCSEL can output a laser beam with a wavelength of 850 nm or more with less current than an edge-emitting laser, and since the beam cross section of the laser beam is approximately circular, it is easy to couple the VCSEL with an optical fiber. Furthermore, since it is possible to perform pass/fail tests in the on-wafer state, it is excellent in mass production. For these reasons, VCSELs are often used in the transmitting section of optical transceiver modules.

However, compared to an edge-emitting laser, a VCSEL has a large element thermal resistance and poor heat dissipation. When the element becomes high temperature, the characteristics of the VCSEL deteriorate and the output decreases. Furthermore, if the operation at high temperatures is continued, the deterioration of the element over time becomes noticeable. In order to solve these problems, a VCSEL with high heat dissipation efficiency is desired.

Patent Document 1 below discloses a VCSEL with improved heat dissipation efficiency. In the VCSEL disclosed in Patent Document 1, a groove is formed in the semiconductor substrate directly under the mesa structure serving as the light emitting part, and the groove is filled with a highly thermally conductive member. The high thermal conductivity member within the groove functions as a heat radiation path from the light emitting section. Alternatively, a through hole is formed in a portion of the semiconductor substrate where the mesa structure is not arranged, and the through hole is filled with a highly thermally conductive member. The high thermal conductivity member in the through hole functions as a heat transfer path from the device forming surface of the semiconductor substrate to the opposite back surface.

Japanese Patent Application Publication No. 2005-86054

As in the VCSEL described in Patent Document 1, when a groove is formed in a semiconductor substrate and a highly thermally conductive member is filled in the groove, heat is transferred to the semiconductor substrate due to the difference in linear expansion coefficient between the semiconductor substrate and the highly thermally conductive member. Stress occurs. Thermal stress tends to concentrate particularly at the bottom of the groove. Cracks may occur in the semiconductor substrate due to the concentration of thermal stress at the bottom of the groove. Cracks generated in the semiconductor substrate cause malfunction of the VCSEL.

In a VCSEL that has a structure in which a through hole is formed in the semiconductor substrate, the through hole is not provided directly below the light emitting part, so the heat generated in the light emitting part is transferred in the in-plane direction of the semiconductor substrate to the high heat conductive member in the through hole. must be conducted. Therefore, the thermal resistance of the heat conduction path becomes large.

An object of the present invention is to provide a VCSEL that is less prone to cracks and can improve heat dissipation efficiency.

According to one aspect of the invention:
a semiconductor layer;
a lower distributed Bragg reflection layer disposed on the first surface of the semiconductor layer;
an active layer disposed on the lower distributed Bragg reflective layer;
an upper distributed Bragg reflection layer disposed on the active layer;
a heat transfer member that is bonded to a second surface of the semiconductor layer opposite to the first surface and includes a material having a thermal conductivity higher than that of the semiconductor layer;
A mesa structure is formed from the upper distributed Bragg reflective layer to at least the upper surface of the lower distributed Bragg reflective layer,
Furthermore, the mesa structure includes a current confinement layer that concentrates current in a certain region in a plan view,
A vertical cavity surface emitting laser in which a height dimension from the second surface of the semiconductor layer to the current confinement layer is 1/2 or less of the diameter of a minimum enclosing circle that includes the mesa structure in plan view. is provided.

The heat generated in the region where the current is concentrated by the current confinement layer spreads in the in-plane direction through the mesa structure and is conducted toward the heat transfer member. Since the thermal conductivity of the heat transfer member is higher than that of the semiconductor layer, the heat transfer member functions as a good heat dissipation path. Heat dissipation efficiency can be improved by setting the height dimension from the second surface of the semiconductor layer to the current confinement layer to be 1/2 or less of the diameter of the minimum enclosing circle that includes the mesa structure in plan view.

FIG. 1 is a plan view of a VCSEL 10 according to a first embodiment. FIG. 2 is a sectional view taken along the dashed-dotted line 2-2 in FIG. FIG. 3 is a sectional view of a laser device in which a VCSEL according to the first embodiment is mounted on a module substrate. FIG. 4 is a schematic cross-sectional view of the mesa structure of the VCSEL according to the first embodiment. FIGS. 5A and 5B are schematic diagrams showing the shape of a mesa structure having a shape other than a circle in a plan view. FIG. 6 is a schematic cross-sectional view showing an example of a mesa structure with inclined sides. FIG. 7 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 8 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 9 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 10 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 11 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 12 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 13 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 14 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 15 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 16 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 17 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 18 is a cross-sectional view of the VCSEL according to the first embodiment at an intermediate stage of manufacture. FIG. 19 is a cross-sectional view of the VCSEL according to the first example. 20A and 20B are schematic diagrams showing the shape of a mesa structure of a VCSEL in a plan view according to another modification of the first embodiment. FIG. 21 is a cross-sectional view of a VCSEL according to the second embodiment. FIG. 22 is a cross-sectional view of the VCSEL according to the third example at an intermediate stage of manufacture. FIG. 23 is a cross-sectional view of the VCSEL according to the third example at an intermediate stage of manufacture. FIG. 24 is a cross-sectional view of a VCSEL according to a fourth example. FIG. 25A is a diagram showing the distribution of the penetration portion of the heat transfer member and the mesa structure, and FIG. 25B is a cross-sectional view of the heat transfer member taken along the dashed line 25B-25B in FIG. 25A, and a graph showing the coefficient of linear expansion. be. FIG. 26 is a cross-sectional view of a VCSEL heat transfer member according to the fourth example at an intermediate stage of manufacture. FIG. 27 is a cross-sectional view of a VCSEL heat transfer member according to the fourth example at an intermediate stage of manufacture. FIG. 28 is a cross-sectional view of a VCSEL heat transfer member according to the fourth example at an intermediate stage of manufacture. FIG. 29 is a cross-sectional view of a heat transfer member of a VCSEL according to a fourth embodiment. FIG. 30 is a cross-sectional view of the heat transfer member and adhesive layer of the VCSEL according to the fourth example. FIG. 31 is a cross-sectional view of a VCSEL according to the fourth example. FIG. 32 is a diagram showing the distribution of the penetration portion of the heat transfer member and the mesa structure of a VCSEL according to a modification of the fourth embodiment. FIG. 33A is a diagram showing the positional relationship in a plan view between the penetrating portion of the heat transfer member of the VCSEL and the mesa structure according to the fifth embodiment, and FIG. FIG. FIG. 34A is a diagram showing the positional relationship in plan view between the penetrating portion of the heat transfer member of the VCSEL and the mesa structure according to the sixth example, and FIG. 34B is a graph showing the distribution density of the penetrating portion. FIG. 35 is a plan view schematically showing the positional relationship in plan view between the mesa structure and the penetrating portion of the VCSEL according to the seventh embodiment. FIG. 36 is a cross-sectional view of the VCSEL taken along the dashed-dotted line 36-36 in FIG. FIG. 37 is a plan view schematically showing the positional relationship in plan view between the enlarged circle and the penetrating portion in the VCSEL according to the seventh embodiment. FIG. 38 is a plane diagram schematically showing one mesa structure of the VCSEL according to the seventh embodiment, another mesa structure located in the immediate vicinity, enlarged circles of each of these mesa structures, and the positional relationship of the penetrating portion. It is a diagram.

[First example]
A VCSEL according to a first embodiment will be described with reference to the drawings from FIG. 1 to FIG. 19.

FIG. 1 is a plan view of the VCSEL 10 according to the first embodiment, and FIG. 2 is a cross-sectional view taken along the dashed-dotted line 2-2 in FIG. The semiconductor layer 28 is bonded to one surface of the heat transfer member 80 via an adhesive layer 81 made of metal. In this specification, the direction in which the surface of the heat transfer member 80 to which the semiconductor layer 28 is bonded faces is defined as the upward direction. The bonding surface where the semiconductor layer 28 and the heat transfer member 80 are bonded to each other is substantially flat.

The semiconductor layer 28 includes two layers: a semi-insulating semiconductor layer 21 on the heat transfer member 80 side and a semiconductor layer 22 having n-type conductivity disposed thereon. The semiconductor layer 21 is made of, for example, non-doped GaAs, and the semiconductor layer 22 thereon is made of, for example, n-type GaAs. The heat transfer member 80 is formed of a material having a higher thermal conductivity than that of the semiconductor layer 28.

As the material of the heat transfer member 80, metals such as Cu, Ag, and Au are used. For example, the thermal conductivity of GaAs is about 55 W/mK, while the thermal conductivity of Cu, Ag, and Au are about 398 W/mK, about 418 W/mK, and about 320 W/mK, respectively. From the viewpoint of ease of processing and material cost, it is more preferable to use Cu as the heat transfer member 80. The heat transfer member 80 may be made of a semiconductor or insulating material such as Si, SiC, SiN, or AlN, which has a higher thermal conductivity than GaAs or the like. Note that at least a portion of the heat transfer member 80 may be formed of a material having a higher thermal conductivity than that of the semiconductor layer 28.

The surface of the semiconductor layer 28 on the heat transfer member 80 side (the surface facing downward) is referred to as a second surface 28B, and the surface opposite thereto (the surface facing upward) is referred to as a first surface 28A. A plurality of mesa structures 30 including light emitting parts are arranged on the first surface 28A of the semiconductor layer 28. The plurality of mesa structures 30 are arranged in a line in an array, and each of the plurality of mesa structures 30 has a circular shape in plan view. Note that the plurality of mesa structures 30 may be arranged so as to be two-dimensionally distributed on the upper surface of the semiconductor layer 28.

Each of the mesa structures 30 includes a lower distributed Bragg reflection layer (hereinafter referred to as the lower DBR layer 23) laminated in order from the semiconductor layer 28, an active layer 24, a spacer layer 25, a current confinement layer 26, and an upper distributed Bragg reflection layer. (hereinafter referred to as upper DBR layer 27). A portion of the lower side of the lower DBR layer 23 extends to the outside of the mesa structure 30 in plan view. For example, a portion of the lower side of the lower DBR layer 23 extends in one direction (leftward in FIG. 1) orthogonal to the arrangement direction of the plurality of mesa structures 30. In this way, the mesa structure 30 is formed by each layer from the upper DBR layer 27 to the middle of the lower DBR layer 23 in the thickness direction.

Each of the lower DBR layer 23 and the upper DBR layer 27 has a periodic structure in which, for example, high refractive index layers and low refractive index layers are alternately stacked. For example, AlGaAs having different Al composition ratios is used for the high refractive index layer and the low refractive index layer. Note that GaAs may be used for the high refractive index layer. The lower DBR layer 23 is doped with an n-type dopant, and the upper DBR layer 27 is doped with a p-type dopant.

The active layer 24 has, for example, a multiple quantum well structure in which quantum well layers and barrier layers are alternately stacked. For example, AlGaAs having different Al compositions is used for the quantum well layer and the barrier layer. The spacer layer 25 is made of the same material as the low refractive index layer of the upper DBR layer 27. The current confinement layer 26 is formed of AlGaAs or AlAs with an Al composition ratio of 0.95 or more. The current confinement layer 26 includes an oxidized region 26A that is oxidized inward from the side surface of the mesa structure 30, and a circular unoxidized region 26B surrounded by the oxidized region 26A in plan view.

The current confinement layer 26 has a function of concentrating the current flowing from the upper DBR layer 27 through the active layer 24 to the lower DBR layer 23 in the central unoxidized region 26B. The unoxidized region 26B is arranged at a position encompassing the geometric center of the mesa structure 30 in plan view. The current density is maximum in the unoxidized region 26B of the current confinement layer 26, and the amount of heat generated is maximum in the unoxidized region 26B. The unoxidized region 26B of the current confinement layer 26 can be considered as the main heat source of the VCSEL 10.

An anode electrode 41 is arranged on the upper surface of the upper DBR layer 27. The anode electrode 41 has, for example, a shape in which a cut is provided in a part of an annular pattern when viewed from above. The anode electrode 41 has, for example, a two-layer structure of a Ti layer and an Au layer, or a three-layer structure of a Ti layer, a Pt layer, and an Au layer, and is in ohmic contact with the upper DBR layer 27 .

A cathode electrode 42 is arranged for each mesa structure 30 on the upper surface of the semiconductor layer 22 having n-type conductivity. The cathode electrode 42 is electrically connected to the lower DBR layer 23 via the semiconductor layer 22 having n-type conductivity. The cathode electrode 42 is made of, for example, Au or AuGe. The lower portion of the lower DBR layer 23, which extends to the outside of the mesa structure 30 in plan view, reaches from the mesa structure 30 to the cathode electrode 42.

A passivation film 50 is formed to cover the mesa structure 30, the lower part of the lower DBR layer 23, the anode electrode 41, the cathode electrode 42, and the semiconductor layer 28. The passivation film 50 is made of an inorganic insulating material such as SiN or SiO ₂ . The passivation film 50 covering the upper surface of the mesa structure 30 may have a function as an antireflection film.

A protective film 51 is arranged on the passivation film 50 around the mesa structure 30. The protective film 51 is formed of a resin material such as polyimide (PI), polybenzoxazole (PBO), benzocyclobutene (BCB), or the like. The protective film 51 has the function of suppressing mechanical damage from the outside and the function of a buffer material that relieves thermal stress.

A via hole is formed in the passivation film 50 to expose a part of the upper surface of the anode electrode 41. Anode wiring 45 is connected to anode electrode 41 through this via hole. The anode wiring 45 extends in one direction (rightward in FIG. 1) from the mesa structure 30 in plan view, and its tip forms a bonding pad 45P.

A via hole is formed in the protective film 51 and the passivation film 50 to expose a part of the upper surface of the cathode electrode 42. A cathode wiring 46 extends from the cathode electrode 42 exposed in the via hole toward a part of the upper surface of the protective film 51 via the side surface of the via hole. The tip of the cathode wiring 46 constitutes a bonding pad 46P.

FIG. 3 is a cross-sectional view of the laser device in which the VCSEL 10 according to the first embodiment is mounted on the module substrate 88. The downward facing surface (hereinafter referred to as the lower surface) of the heat transfer member 80 is mounted on the mounting surface of the module substrate 88 with solder or the like. As the module substrate 88, for example, a printed wiring board, a ceramic board, etc. are used. A control circuit component 85 in which a control circuit is integrated is mounted on a module substrate 88 . Furthermore, a land 86 is provided on the mounting surface of the module substrate 88.

A pad 45P connected to the anode electrode 41 (FIG. 2) of the VCSEL 10 is connected to the control circuit component 85 via a bonding wire 83. A pad 46P connected to the cathode electrode 42 (FIG. 2) of the VCSEL 10 is connected to a land 86 via a bonding wire 84. Note that the pad 46P may be connected to the control circuit component 85 via a bonding wire. A drive current is supplied from the control circuit component 85 to the VCSEL 10. When a drive current is supplied to the VCSEL 10, a laser beam is output from the mesa structure 30 in a direction perpendicular to the first surface 28A (FIG. 2) of the semiconductor layer 28.

The heat generated in the heat source in the mesa structure 30, that is, the unoxidized region 26B of the current confinement layer 26 (FIG. 2), is transferred through the active layer 24, the lower DBR layer 23, the semiconductor layer 28, and the adhesive layer 81. conducts to member 80. The heat conducted to the heat transfer member 80 further diffuses within the heat transfer member 80 and is conducted to the module substrate 88. In order to increase the efficiency of heat radiation from the heat source of the VCSEL 10, it is desirable to reduce the thermal resistance of this heat radiation path.

Next, with reference to FIG. 4, preferred dimensions of the components of the VCSEL 10 to ensure sufficient heat dissipation efficiency will be described. FIG. 4 is a schematic cross-sectional view of the mesa structure 30 of the VCSEL 10 according to the first embodiment.

The unoxidized region 26B of the current confinement layer 26 can be considered as the heat source HS of the VCSEL 10. The direction perpendicular to the second surface 28B of the semiconductor layer 28 is defined as the height direction. The dimension in the height direction from the second surface 28B to the current confinement layer 26 is marked as H. The diameter of the minimum enclosing circle that includes the mesa structure 30 in plan view is denoted as D. In the first embodiment, since the mesa structure 30 has a circular shape in plan view, the diameter of the mesa structure 30 is equal to the diameter D of the minimum enclosing circle.

The heat generated by the heat source HS is conducted toward the heat transfer member 80 and spreads in the in-plane direction, as shown by the arrow in FIG. Since the thermal conductivity of the heat transfer member 80 is higher than that of the semiconductor material constituting the mesa structure 30 and the semiconductor layer 28, in order to increase the heat dissipation efficiency, the height direction of the portion with relatively low thermal conductivity is It is preferable to make the dimension H as small as possible. Furthermore, since the thermal conductivity of the protective film 51 is lower than that of the semiconductor material constituting the mesa structure 30, when the diameter D of the minimum enclosing circle of the mesa structure 30 becomes smaller, the protective film 51 As a result, the heat dissipation efficiency decreases.

As the diameter D becomes smaller, it is preferable to make the dimension H in the height direction smaller in order to ensure sufficient heat dissipation efficiency. For example, it is preferable that the dimension H in the height direction is 1/2 or less of the diameter D of the minimum enclosing circle of the mesa structure 30. When the dimension H in the height direction is 1/2 or less of the diameter D of the minimum enclosing circle of the mesa structure 30, most of the heat generated by the heat source HS is inhibited by the protective film 51 with low thermal conductivity. The heat is transmitted to the heat transfer member 80 while spreading in the in-plane direction without any heat transfer.

The ratio of the vertical dimension to the horizontal dimension in FIG. 4 is different from the actual dimension ratio. As an example, the diameter D of the minimum enclosing circle of the mesa structure 30 is 30 μm, and the dimension H in the height direction is 8 μm. The diameter of the unoxidized region 26B (heat source HS) of the current confinement layer 26 in plan view is about 5 μm.

Next, with reference to FIGS. 5A and 5B, an example in which the shape of the mesa structure 30 in plan view is other than circular will be described. 5A and 5B are schematic diagrams showing the shape of a mesa structure 30 having a shape other than circular in plan view. The mesa structure 30 (FIG. 1) of the VCSEL 10 according to the first embodiment has a circular shape in plan view. On the other hand, in the example shown in FIG. 5A, the shape of the mesa structure 30 in plan view is a square with rounded corners. At this time, the minimum enclosing circle 31 touches four rounded corners of the rounded square.

In the example shown in FIG. 5B, the shape of the mesa structure 30 in plan view is composed of a circular portion and a protrusion 30A that protrudes outward from one location of the circular portion. The minimum enclosing circle 31 in this case includes not only the circular portion but also the protrusion 30A. Therefore, the diameter D of the minimum enclosing circle 31 is larger than the diameter of the circular portion of the mesa structure 30 in plan view.

As shown in FIGS. 5A and 5B, even if the shape of the mesa structure 30 in plan view is not circular, the dimension H in the height direction (FIG. 4) is set to 1 of the diameter D of the minimum enclosing circle 31. /2 or less is preferable.

Next, with reference to FIG. 6, an example in which the side surface of the mesa structure 30 is inclined with respect to the second surface 28B of the semiconductor layer 28 will be described. FIG. 6 is a schematic cross-sectional view showing an example of a mesa structure 30 with inclined sides. The side surface of the mesa structure 30 is inclined with respect to the second surface 28B of the semiconductor layer 28. That is, the mesa structure 30 has a truncated cone shape.

In the example shown in FIG. 6, it is preferable to adopt the minimum enclosing circle of the mesa structure 30 at the position of the current confinement layer 26 as the minimum enclosing circle of the mesa structure 30. It is preferable that the dimension H in the height direction is set to 1/2 or less of the diameter D of the minimum enclosing circle of the mesa structure 30 at the position of the current confinement layer 26.

Next, a method for manufacturing the VCSEL 10 according to the first embodiment will be described with reference to the drawings from FIG. 7 to FIG. 19. The drawings from FIG. 7 to FIG. 18 are cross-sectional views of the VCSEL 10 according to the first example at an intermediate stage of manufacture, and FIG. 19 is a cross-sectional view of the VCSEL 10 according to the first example. In the drawings from FIG. 7 to FIG. 19, the spacer layer 25 (FIG. 2) is omitted.

As shown in FIG. 7, on a substrate 21A made of semi-insulating GaAs, a semiconductor layer 22 made of n-type GaAs, a lower DBR layer 23, an active layer 24, a spacer layer 25 (FIG. 2), and a current confinement layer 26 are provided. , and the upper DBR layer 27 are epitaxially grown in this order. For epitaxial growth of these layers, for example, chemical vapor deposition (CVD), molecular beam epitaxy (MBE), etc. can be used. An anode electrode 41 is formed in a part of the upper surface of the upper DBR layer 27 . For forming the anode electrode 41, for example, a vacuum evaporation method and a lift-off method can be used.

As shown in FIG. 8, a mesa structure 30 is formed by etching from the upper DBR layer 27 to the middle of the lower DBR layer 23 in the thickness direction. For example, a dry etching method is used to etch each layer from the upper DBR layer 27 to the lower DBR layer 23.

As shown in FIG. 9, by oxidizing the current confinement layer 26 from its end face in a water vapor atmosphere, an insulating oxidized region 26A made of AlO or the like is formed, leaving the central portion of the current confinement layer 26 in plan view. An unoxidized region 26B remains in the central portion of the current confinement layer 26. Other layers having a lower Al composition ratio than the current confinement layer 26 are hardly oxidized.

As shown in FIG. 10, by etching a portion of the lower DBR layer 23 that extends outside the mesa structure 30 in plan view, the semiconductor layer 22 is exposed. In this etching, the lower DBR layer 23 in the region where the cathode electrode 42 (FIG. 2) is arranged is also removed to expose the semiconductor layer 22. Wet etching or dry etching is used for etching the lower DBR layer 23. The lower portion of the lower DBR layer 23 remains around the mesa structure 30 in plan view.

As shown in FIG. 11, a cathode electrode 42 is formed in a part of the exposed upper surface of the semiconductor layer 22. For forming the cathode electrode 42, for example, a vacuum evaporation method and a lift-off method are used. The resist pattern used as an etching mask when removing a part of the lower DBR layer 23 is used as part of a lift-off resist pattern.

As shown in FIG. 12, the exposed surfaces of the mesa structure 30, the anode electrode 41, the lower DBR layer 23 remaining outside the mesa structure 30, the cathode electrode 42, and the semiconductor layer 22 are covered with a passivation film 50. For example, chemical vapor deposition (CVD) is used to form the passivation film 50.

As shown in FIG. 13, a via hole 50A that exposes a portion of the upper surface of the cathode electrode 42 and a via hole 50B that exposes a portion of the upper surface of the anode electrode 41 are formed in the passivation film 50. Wet etching or dry etching is used to form via holes 50A and 50B.

As shown in FIG. 14, a protective film 51 is formed by coating the exposed surface with a photosensitive resin. Thereafter, via holes 51A and 51B are formed in the protective film 51 by a photolithography process. The via hole 51A substantially overlaps with the via hole 50A formed in the passivation film 50 in plan view. The via hole 51B includes the via hole 50B formed in the passivation film 50 in plan view.

As shown in FIG. 15, an anode wiring 45 and a cathode wiring 46 are formed on the protective film 51. For forming the anode wiring 45 and the cathode wiring 46, for example, a sputtering method, a vacuum evaporation method, a plating method, etc. are used.

As shown in FIG. 16, the substrate 21A is made thinner, leaving the semiconductor layer 21 consisting of a part of the substrate 21A. For example, mechanical methods such as grinding and polishing, and chemical methods such as dry etching and wet etching can be used to reduce the thickness of the substrate 21A. Note that a mechanical method and a chemical method may be combined. By thinning the substrate 21A, a semiconductor layer 28 consisting of two layers, a semi-insulating semiconductor layer 21 and an n-type conductive semiconductor layer 22, is formed.

As shown in FIG. 17, an adhesive layer 81B is formed on the second surface 28B of the semiconductor layer 28. The adhesive layer 81B is formed by, for example, vacuum-depositing Au or the like. After forming the adhesive layer 81B, the semiconductor layer 28, the protective film 51, etc. are diced to separate the intermediate product including a plurality of chips into pieces.

As shown in FIG. 18, an adhesive layer 81A is formed on one surface of the heat transfer member 80. The adhesive layer 81A is formed by, for example, vacuum-depositing Au or the like.

As shown in FIG. 19, the adhesive layer 81B on the device side in which the mesa structure 30 is formed and the adhesive layer 81A on the heat transfer member 80 side are brought into close contact with each other, and the adhesive layer 81A and the adhesive layer 81A are bonded by applying pressure while heating. The layer 81B is bonded to the layer 81B. Note that in FIG. 2, the adhesive layers 81A and 81B are represented as one adhesive layer 81.

Next, the excellent effects of the first embodiment will be explained.
In the first embodiment, as shown in FIG. 16, the substrate 21A is made thinner, so the distance from the heat source HS (FIG. 4) to the heat transfer member 80 is shorter than in a configuration where the substrate 21A is not made thinner. . Since the thermal conductivity of the heat transfer member 80 is higher than that of the semiconductor layer 21, the substrate 21A (FIG. 15) is bonded to the module substrate 88 (FIG. 3) without thinning the substrate 21A (FIG. 15). The thermal resistance from the heat source HS to the module substrate 88 is reduced compared to the above. Thereby, the efficiency of heat radiation from the heat source HS can be increased.

By increasing the heat dissipation efficiency, it is possible to improve the optical output of the VCSEL 10 and to suppress deterioration of the characteristics of the VCSEL 10 over time due to high-temperature operation. In order to sufficiently reduce the thermal resistance, it is preferable that the height dimension H (FIG. 4) from the second surface 28B of the semiconductor layer 28 to the current confinement layer 26 is 10 μm or less, for example.

In particular, in the first embodiment, the height dimension H (FIG. 4) from the second surface 28B of the semiconductor layer 28 to the current confinement layer 26 is the diameter D of the minimum enclosing circle that includes the mesa structure 30 in plan view. (FIG. 4), the heat generated by the heat source HS spreads in the in-plane direction within the mesa structure 30 without being inhibited by the protective film 51, and reaches the heat transfer member 80. . Therefore, a decrease in heat dissipation efficiency due to the protective film 51 having low thermal conductivity is suppressed.

Note that if the diameter D (FIG. 4) of the minimum enclosing circle that includes the mesa structure 30 in plan view is increased, the spread of the heat generated by the heat source HS in the in-plane direction will not be inhibited by the protective film 51. , the frequency characteristics deteriorate due to an increase in the parasitic capacitance component of the VCSEL 10, a decrease in the current density injected into the active layer 24, and the like. In order to suppress deterioration of the operating frequency characteristics, it is preferable that the diameter D of the minimum enclosing circle that includes the mesa structure 30 in plan view is 50 μm or less.

Furthermore, in the first embodiment, since the semiconductor layer 28 does not have grooves, recesses, etc., and the bonding surface between the semiconductor layer 28 and the heat transfer member 80 is flat, the semiconductor layer 28 and the heat transfer member 80 are Thermal stress generated due to the difference in linear expansion coefficients is difficult to concentrate in a specific location. Therefore, damage to the VCSEL due to local concentration of thermal stress can be suppressed.

Further, in the first embodiment, the lower DBR layer 23, the semiconductor layer 22, and the cathode electrode 42 are electrically isolated from the heat transfer member 80 by the semi-insulating semiconductor layer 21. Therefore, the operation of the VCSEL 10 is less susceptible to the electrical signal applied to the heat transfer member 80.

Furthermore, in the first embodiment, even if the semiconductor substrate 21A (FIG. 16) is made thinner, the thickness of the lower DBR layer 23 remains unchanged. Therefore, the light confinement effect does not decrease due to the lower DBR layer 23 becoming thinner, and the luminous efficiency does not decrease.

Next, a VCSEL according to a modification of the first embodiment will be described with reference to FIGS. 20A and 20B. 20A and 20B are schematic diagrams showing the shape of the mesa structure 30 of the VCSEL 10 in a plan view according to a modification of the first embodiment.

In the first embodiment (FIGS. 5A and 5B), as a comparison target with the dimension H in the height direction from the second surface 28B of the semiconductor layer 28 to the current confinement layer 26, the minimum The diameter D of the encompassing circle 31 is adopted. On the other hand, in this modification, the diameter D of the maximum inscribed circle 32 of the shape of the mesa structure 30 in plan view is employed as a comparison target with the dimension H.

As shown in FIG. 20A, when the shape of the mesa structure 30 in plan view is a rounded square, the diameter D of the maximum inscribed circle is equal to the length of one side of the rounded square. As shown in FIG. 20B, when the mesa structure 30 has a shape in which an inward cut 30B is provided in a part of the circular outer periphery in a plan view, the diameter D of the maximum inscribed circle 32 is the same as that of the original circular shape. smaller than the diameter of

If the dimension H in the height direction from the second surface 28B of the semiconductor layer 28 to the current confinement layer 26 (FIG. 4) is set to 1/2 the diameter D of the maximum inscribed circle 32 of the shape of the mesa structure 30 in a plan view. In plan view, heat diffused in any direction from the heat generating source HS reaches the heat transfer member 80 without being hindered by the protective film 51 (FIG. 4). Therefore, the effect of suppressing the reduction in heat dissipation efficiency by the protective film 51 can be enhanced.

Next, various other modifications of the first embodiment will be described. In the first embodiment, the semiconductor layer 28 is bonded to the heat transfer member 80 by closely adhering the adhesive layers 81A and 81B made of Au, but the two may be bonded by other methods. For example, van der Waals bonds or hydrogen bonds may be used to bond the semiconductor layer 28 and the adhesive layer 81A of the heat transfer member 80. In addition, the semiconductor layer 28 may be bonded to the adhesive layer 81A by electrostatic force, covalent bonding, eutectic alloy bonding, or the like.

In the first embodiment (FIG. 2), the mesa structure 30 is formed from the upper DBR layer 27 to at least the upper surface of the lower DBR layer 23. Each layer may constitute the mesa structure 30. For example, the mesa structure 30 may be formed by the upper DBR layer 27, the current confinement layer 26, the spacer layer 25, and the active layer 24. Further, the entire area up to the bottom surface of the lower DBR layer 23 may be included in the mesa structure 30.

In the first example, an AlGaAs/GaAs-based VCSEL (emission wavelength of 700 nm or more) is explained, and non-doped GaAs is used for the semi-insulating semiconductor layer 21 (FIG. 2), but a VCSEL made of other compound semiconductor materials A structure similar to that of the VCSEL according to the first embodiment may be applied. For example, a structure similar to the VCSEL according to the first embodiment may be applied to an InGaAsP/InP-based VCSEL (emission wavelength of 1600 nm or less). The thermal conductivity of InP is approximately 68 W/mK, which is lower than the thermal conductivity of the heat transfer member 80, so similar to the first embodiment, excellent effects can be obtained by making the semiconductor layer made of InP thinner. It will be done.

[Second example]
Next, a VCSEL according to a second embodiment will be described with reference to FIG. 21. Hereinafter, a description of the configuration common to the VCSEL 10 according to the first embodiment described with reference to the drawings from FIG. 1 to FIG. 19 will be omitted.

FIG. 21 is a cross-sectional view of the VCSEL 10 according to the second example. In the first embodiment (FIG. 2), the semiconductor layer 28 includes two layers: a semi-insulating semiconductor layer 21 and a semiconductor layer 22 having n-type conductivity disposed thereon. In contrast, in the second embodiment, the semiconductor layer 28 is composed of a single layer of the semiconductor layer 22 having n-type conductivity.

Next, a method for manufacturing the VCSEL 10 according to the second example will be described. In the first example, in the step of thinning the substrate 21A shown in FIG. 16, the semiconductor layer 21, which is a part of the substrate 21A, is left. On the other hand, in the second embodiment, the substrate 21A is completely removed and the semiconductor layer 22 is exposed. The subsequent steps are the same as those of the method for manufacturing the VCSEL 10 according to the first embodiment.

Next, the excellent effects of the second embodiment will be explained.
As in the second embodiment, the semiconductor layer 28 may be composed of a single layer of the semiconductor layer 22 having n-type conductivity. In the second embodiment, as in the first embodiment, the efficiency of heat radiation from the heat source of the VCSEL 10 can be improved.

Furthermore, in the second embodiment, it is possible to electrically connect the lower DBR layer 23 to the heat transfer member 80 via the semiconductor layer 22 having n-type conductivity and the adhesive layer 81. For example, when metal such as Cu is used as the heat transfer member 80, the heat transfer member 80 can be used as a cathode electrode. When adopting this configuration, the cathode electrode 42 and the cathode wiring 46 may be deleted.

[Third example]
Next, a VCSEL according to a third embodiment will be described with reference to FIGS. 22 and 23. Hereinafter, a description of the configuration common to the VCSEL 10 according to the first embodiment described with reference to the drawings from FIG. 1 to FIG. 19 will be omitted.

22 and 23 are cross-sectional views of the VCSEL 10 according to the third example at an intermediate stage of manufacture. In the first embodiment (FIG. 7), a single substrate made of semi-insulating GaAs or the like is used as the substrate 21A. In contrast, in the third embodiment, as shown in FIG. 22, the substrate 21A includes a temporary substrate 21A1, an etching control layer 21A2 and a semiconductor layer 21 stacked thereon. The temporary substrate 21A1 is, for example, a substrate made of semi-insulating GaAs. The etching control layer 21A2 is a semiconductor layer epitaxially grown on the temporary substrate 21A1, and a compound semiconductor such as InGaAs, which has a different etching resistance than the temporary substrate 21A1, is used for the etching control layer 21A2.

The semiconductor layer 21 is a layer epitaxially grown on the etching control layer 21A2, and is made of a compound semiconductor having n-type conductivity, such as n-type GaAs, similarly to the semiconductor layer 21 of the first embodiment (FIG. 2). be done.

In the first embodiment, in the step of thinning the substrate 21A (FIG. 16), the thin semiconductor layer 21 is left by controlling the processing time of polishing, grinding, etching, etc. of the substrate 21A. On the other hand, in the third embodiment, the temporary substrate 21A1 is etched under conditions where the etching rate of the temporary substrate 21A1 is faster than the etching rate of the etching control layer 21A2. As shown in FIG. 23, since the etching rate decreases when the etching control layer 21A2 is exposed, the etching can be stopped at the lower surface of the etching control layer 21A2 with good reproducibility.

In the third embodiment, the semiconductor layer 28 (FIG. 2) disposed between the mesa structure 30 and the adhesive layer 81 includes three layers: an etching control layer 21A2, a semiconductor layer 21, and a semiconductor layer 22. . Note that after exposing the etching control layer 21A2, the etching control layer 21A2 may be removed by etching to expose the semiconductor layer 21. In this case, the semiconductor layer 28 includes two semiconductor layers 21 and 22, as in the first embodiment.

Next, the excellent effects of the third embodiment will be explained. In the third embodiment, as in the first embodiment, the efficiency of heat radiation from the heat source of the VCSEL 10 can be improved. Furthermore, the controllability of the thickness of the semiconductor layer 28 can be improved.

[Fourth example]
Next, a VCSEL according to a fourth embodiment will be described with reference to the drawings from FIG. 24 to FIG. 31. Hereinafter, a description of the configuration common to the VCSEL 10 according to the first embodiment described with reference to the drawings from FIG. 1 to FIG. 19 will be omitted.

FIG. 24 is a cross-sectional view of the VCSEL according to the fourth example. The configuration from the semiconductor layer 28 to the anode wiring 45 and cathode wiring 46 is the same as the configuration of the VCSEL (FIG. 2) according to the first embodiment. In the first embodiment, the heat transfer member 80 is made of a single material such as metal. In contrast, in the fourth embodiment, a composite material is used for the heat transfer member 80.

The structure of the heat transfer member 80 will be described below.
The heat transfer member 80 is composed of a high heat conduction portion 80A and a restraining portion 80B. The thermal conductivity of the high thermal conductivity portion 80A is higher than the thermal conductivity of the semiconductor layer 28 and the thermal conductivity of the constraint portion 80B. The linear expansion coefficient of the high thermal conductivity portion 80A is larger than that of the semiconductor layer 28. The coefficient of linear expansion of the constrained portion 80B is smaller than that of the high thermal conductivity portion 80A.

The restraint part 80B is a plate-shaped member provided with a plurality of through holes, and the high thermal conductivity part 80A is filled in the through holes of the restraint part 80B and covers both sides of the restraint part 80B. That is, the high thermal conductivity portion 80A is exposed throughout the upper surface 80T and the lower surface 80L on the opposite side of the heat transfer member 80, and the restraining portion 80B is not exposed on either the upper surface 80T or the lower surface 80L.

The high thermal conductivity portion 80A includes a plurality of penetrating portions 80A1. Each of the plurality of penetrating portions 80A1 extends from the upper surface 80T of the heat transfer member 80 in a direction perpendicular to the upper surface 80T, and reaches the lower surface 80L. When the upper surface 80T of the heat transfer member 80 is viewed from above, the plurality of penetrating portions 80A1 are two-dimensionally and discretely distributed.

Metals such as Cu, Au, and Ag are used as the material for the high thermal conductivity portion 80A. The thermal conductivities of Cu, Au, and Ag are approximately 398 W/mK, approximately 320 W/mK, and approximately 418 W/mK, respectively, and the linear expansion coefficients are approximately 16.5 ppm/°C, approximately 14.3 ppm/°C, and approximately It is 18.9 ppm/°C. On the other hand, GaAs used for the semiconductor layer 28 has a thermal conductivity of about 55 W/mK and a coefficient of linear expansion of about 5.4 ppm/°C. Thus, the thermal conductivity of the high thermal conductivity portion 80A is higher than that of the semiconductor layer 28. Further, the linear expansion coefficient of the high thermal conductivity portion 80A is larger than that of the semiconductor layer 28. From the viewpoint of ease of processing and material cost, it is more preferable to use Cu as the high heat conductive portion 80A.

As a material for the restraining portion 80B, glass whose main component is silicon oxide, a single semiconductor, ceramics, etc. are used. Examples of glass containing silicon oxide as a main component used as the restraining portion 80B include borosilicate glass, quartz glass, alkali-free glass, and the like. The linear expansion coefficient of borosilicate glass is about 3 ppm/°C or more and about 12 ppm/°C or less, the linear expansion coefficient of quartz glass is about 0.5 ppm/°C, and the linear expansion coefficient of alkali-free glass is about 3 ppm/°C. It is about 8 ppm/°C or less. The thermal conductivity of quartz glass is approximately 1.5 W/mK.

Examples of ceramics used as the restraining portion 80B include SiC, SiN, AlN, and the like. The thermal conductivity of both SiC and SiN is about 200 W/mK. The thermal conductivity of AlN is about 170 W/mK or more and about 230 W/mK or less. The linear expansion coefficients of SiC, SiN, and AlN are approximately 4.0 ppm/°C, approximately 2.8 ppm/°C, and approximately 4.6 ppm/°C, respectively. An example of a single semiconductor used as the constraint portion 80B is Si. The thermal conductivity of Si is about 162 W/mK, and the coefficient of linear expansion is about 4.15 ppm/°C. The linear expansion coefficients of these materials are smaller than that of GaAs used for the semiconductor layer 28.

FIG. 25A is a diagram showing the distribution of the penetrating portion 80A1 of the heat transfer member 80 and the mesa structure 30. In plan view, each of the plurality of penetrating portions 80A1 has a circular shape, and the plurality of penetrating portions 80A1 are two-dimensionally and discretely distributed. For example, the plurality of penetrating portions 80A1 are arranged in a regular triangular lattice shape. The plurality of mesa structures 30 are arranged in a single row array, as described with reference to FIG. The mesa structure 30 at least partially overlaps any of the penetrating portions 80A1 in plan view. The mesa structure 30 may include the penetrating portion 80A1, or conversely, the penetrating portion 80A1 may include the mesa structure 30, or a portion of the mesa structure 30 and a portion of the penetrating portion 80A1 overlap. You can do it like this.

FIG. 25B is a cross-sectional view of the heat transfer member 80 taken along the dashed line 25B-25B in FIG. 25A and a graph showing the coefficient of linear expansion. The graph showing the coefficient of linear expansion represents the coefficient of linear expansion at the position where the restraining portion 80B is arranged in the thickness direction of the heat transfer member 80. The horizontal axis of the graph showing the coefficient of linear expansion represents the position along the dashed line 25B-25B in FIG. 25A. The linear expansion coefficient α _A of the high thermal conductivity portion 80A is larger than the linear expansion coefficient α _B of the restraint portion 80B. The linear expansion coefficient α _S of the semiconductor layer 28 (FIG. 2) is smaller than the linear expansion coefficient α _A of the high thermal conductivity portion 80A, and larger than the linear expansion coefficient α _B of the constrained portion 80B.

The total area of the plurality of penetrating portions 80A1 in a plan view is denoted as S _A , and the area of the restraint portion 80B is denoted as S _B. The magnitude relationship between the total area S _A of the penetrating portion 80A1 and the area S _B of the restraining portion 80B is the difference α A − _{α S} between the linear expansion coefficient α _A of the penetrating portion 80 A1 and the linear expansion coefficient α _S of the semiconductor layer 28. This is opposite to the magnitude relationship α S −α _B between the linear expansion coefficient α _S of the semiconductor layer and the linear expansion coefficient _{α B} of the constrained portion 80B. That is, when S _A < S _B , (α _A - α _S )> (α _S - α _B ) holds true, and when S _A > S _B , (α A - _{α S} ) < (α _S - α _B ) holds true.

Next, a method for manufacturing a VCSEL according to the fourth embodiment will be described with reference to the drawings from FIG. 26 to FIG. 31. The drawings from FIG. 26 to FIG. 28 are cross-sectional views of the heat transfer member 80 at an intermediate stage of manufacture, FIG. 29 is a cross-sectional view of the heat transfer member 80, and FIG. 30 is a cross-sectional view of the heat transfer member 80 and the adhesive layer 81A. FIG. 31 is a cross-sectional view of a VCSEL according to a fourth embodiment.

In the fourth example, as in the first example, intermediate products from the adhesive layer 81B to the anode wiring 45 and the cathode wiring 46 are produced by the same steps as shown in the drawings from FIGS. 7 to 17. do.

As shown in FIG. 26, an original plate 80B1 of the restrained portion 80B (FIG. 24) is prepared. As shown in FIG. 27, a plurality of through holes 80BH are formed in the original plate 80B1. This completes the restraint portion 80B. The through hole 80BH can be formed by forming a mask pattern on the original plate 80B1 by photolithography, and then using a dry etching method, a wet etching method, a sandblasting method, a laser drilling method, or the like.

As shown in FIG. 28, a power supply coating 80F such as Cu is formed on both sides of the restraining portion 80B and the side surface of the through hole 80BH. For example, a sputtering method can be used to form the coating 80F.

As shown in FIG. 29, the high thermal conductivity portion 80A is formed by electrolytically plating Cu using the coating 80F as an electrode. The Cu filled in the through hole 80BH constitutes a part of the through portion 80A1 of the high heat conductive portion 80A. The surface to which the semiconductor layer 28 (FIG. 24) is to be bonded is smoothed by wet etching, polishing, chemical mechanical polishing (CMP), or the like. Thereby, the heat transfer member 80 is completed. Note that if the surface after electrolytic plating is sufficiently smooth, smoothing treatment may not be performed.

As shown in FIG. 30, an adhesive layer 81A is formed on the upper surface 80T, which is one surface of the heat transfer member 80. The adhesive layer 81A is formed by, for example, vacuum-depositing Au or the like.

As shown in FIG. 31, the adhesive layer 81B of the intermediate product on which the mesa structure 30 is formed is brought into close contact with the adhesive layer 81A on the heat transfer member 80 side, and the adhesive layer 81A is heated and pressed. The adhesive layer 81B is bonded to the adhesive layer 81B. Note that in FIG. 24, the adhesive layers 81A and 81B are represented as one adhesive layer 81.

Next, the excellent effects of the fourth embodiment will be explained.
In the fourth embodiment, as in the first embodiment, the substrate 21A (FIG. 16) is made thinner, so that the efficiency of heat radiation from the heat source HS (FIG. 4) can be increased.

Next, the excellent effects of constructing the heat transfer member 80 from a composite material will be explained. Generally, the linear expansion coefficient of the high thermal conductivity portion 80A made of metal is about three times the linear expansion coefficient of the semiconductor layer 28 made of a compound semiconductor such as GaAs. In the fourth embodiment, the heat transfer member 80 includes a high heat conduction portion 80A and a constraint portion 80B having a smaller coefficient of linear expansion than the high heat conduction portion 80A. Therefore, the expansion of the heat transfer member 80 when the temperature rises is suppressed compared to the case where the heat transfer member 80 is made of a single metal. Thereby, thermal stress generated in the semiconductor layer 28 and the heat transfer member 80 can be reduced. When the coefficient of linear expansion of the restraining portion 80B approaches that of the high thermal conductivity portion 80A, the effect of reducing thermal stress is weakened. In order to obtain a sufficient effect of reducing thermal stress, the linear expansion coefficient of the restraint portion 80B is preferably 50% or less, more preferably 35% or less, of the linear expansion coefficient of the high thermal conductivity portion 80A. Furthermore, since the penetrating portions 80A1 of the high thermal conductivity portion 80A are two-dimensionally arranged discretely, local concentration of thermal stress is suppressed in the in-plane direction.

The heat transfer member 80 includes a high thermal conductivity portion 80A having a relatively high thermal conductivity compared to the semiconductor layer 28, so that heat flowing from the semiconductor layer 28 is conducted to the module substrate 88 (FIG. 3). The thermal resistance of the thermal path is lowered. Furthermore, as shown in FIG. 25A, since the mesa structure 30 and the penetration portion 80A1 of the high heat conduction portion 80A at least partially overlap in plan view, the module is The heat transfer path to the substrate 88 becomes shorter. Thereby, good heat dissipation efficiency can be obtained. By increasing the heat dissipation efficiency, it is possible to improve the optical output of the VCSEL 10 and to suppress deterioration of the characteristics of the VCSEL 10 over time due to high-temperature operation.

In order to reduce the thermal stress generated in the semiconductor layer 28 and the heat transfer member 80, as shown in FIG. 25B, the restraining portion 80B has a linear expansion coefficient α _B smaller than the linear expansion coefficient α _S of the semiconductor layer 28. Preferably, the material is used.

As explained with reference to FIGS. 25A and 25B, the total area of the penetrating portion 80A1 is S _A , the area of the restraining portion 80B is S _B , the linear expansion coefficient of the penetrating portion 80A1 is α _A , and the line of the restraining portion 80B is When the expansion coefficient is denoted by α _B and the linear expansion coefficient of the semiconductor layer 28 is denoted by α _S , it is most preferable that the following formula is satisfied in order to reduce the thermal stress generated in the semiconductor layer 28 and the heat transfer member 80. .

Note that even if the right side and the left side of equation (1) do not completely match, if the difference between them is small, a sufficient effect of reducing thermal stress can be obtained. In order to reduce thermal stress, it is preferable that the following formula (2) is satisfied, and it is more preferable that the formula (3) is satisfied.

Next, preferred dimensions of each component of the heat transfer member 80 will be described with reference to FIGS. 25A and 25B. The thickness T _B of the restraining portion 80B is preferably 100 μm or more in order to ensure sufficient mechanical strength. Further, if the restraining portion 80B is made thicker than necessary, the thermal resistance of the heat transfer member 80 increases, so it is preferable that the thickness T _B of the restraining portion 80B be 300 μm or less.

In order to diffuse the heat flowing into the heat transfer member 80 from the semiconductor layer 28 (FIG. 24) in the in-plane direction, the thickness T _A1 of the high heat conduction portion 80A covering the upper surface of the restraining portion 80B, and the high heat conduction portion covering the lower surface. It is preferable that the thickness T _A2 of each 80A is 10 μm or more. If the high thermal conductivity portion 80A is made thicker than necessary, the thermal resistance of the heat transfer member 80 increases, so it is preferable that each of the thicknesses T _A1 and T _A2 be 100 μm or less.

Furthermore, in order to equalize the thermal stress in the in-plane direction, the dimensions of the penetrating portion 80A1 in plan view, for example, the diameter D _A of the minimum enclosing circle of the penetrating portion 80A1, and the interval G between adjacent penetrating portions 80A1 are both set. The thickness is preferably 30 μm or more and 100 μm or less.

Next, a VCSEL according to a modification of the fourth embodiment will be described with reference to FIG. 32. FIG. 32 is a diagram showing the distribution of the mesa structure 30 and the penetrating portion 80A1 of the heat transfer member 80 of the VCSEL 10 according to this modification. In the fourth embodiment (FIG. 25A), a plurality of penetrating portions 80A1 are arranged in a regular triangular lattice shape. In contrast, in this modification, the plurality of penetrating portions 80A1 are arranged in a square grid. Also in this modification, the mesa structure 30 partially overlaps with any one of the penetrating portions 80A1 in plan view.

As in this modification, the plurality of penetrating portions 80A1 may be arranged in a square grid. Further, the plurality of penetrating portions 80A1 may be distributed discretely within the two-dimensional plane in other patterns.

[Fifth example]
Next, a VCSEL according to a fifth embodiment will be described with reference to FIGS. 33A and 33B. Hereinafter, a description of the configuration common to the VCSEL 10 according to the fourth embodiment described with reference to the drawings from FIG. 24 to FIG. 31 will be omitted.

FIG. 33A is a diagram showing the positional relationship in plan view between the penetrating portion 80A1 of the heat transfer member 80 of the VCSEL 10 according to the fifth embodiment and the mesa structure 30, and FIG. 8 is a cross-sectional view of a heat transfer member 80. FIG. In the fourth embodiment (FIG. 25A), the plurality of penetrating portions 80A1 are two-dimensionally distributed. On the other hand, in the fifth embodiment, one large penetrating portion 80A1 is arranged. In plan view, an annular restraining portion 80B is arranged around the periphery of the heat transfer member 80, and the penetrating portion 80A1 is surrounded by the restraining portion 80B. The plurality of mesa structures 30 are included in the penetrating portion 80A1 in plan view. The distance in the height direction from the lower end of the mesa structure 30, that is, the lower end of the side surface of the mesa structure 30, to the restraining portion 80B is denoted as H1.

Next, the excellent effects of the fifth embodiment will be explained. In the fifth embodiment, in plan view, the entire interior of the heat transfer member 80 except for the peripheral portion is a penetrating portion 80A1. Therefore, the thermal resistance of the heat transfer member 80 is reduced compared to the first embodiment. As a result, higher heat radiation efficiency can be obtained.

Expansion in the in-plane direction due to the penetration portion 80A1 becoming high temperature is suppressed by the restraining portion 80B. Therefore, the thermal stress applied to the semiconductor layer 28 (FIG. 24) joined to the heat transfer member 80 can be reduced. However, since the high thermal conductivity portion 80A occupies a relatively large volume within the heat transfer member 80, the effect of reducing thermal stress is lower than that of the fourth embodiment (FIG. 25A). Depending on the heat dissipation efficiency required for the mesa structure 30, the fracture toughness of the semiconductor portion constituting the mesa structure 30, etc., it is preferable to select whether to adopt the configuration of the fourth embodiment or the configuration of the fifth embodiment. .

[Sixth Example]
Next, a VCSEL according to a sixth embodiment will be described with reference to FIGS. 34A and 34B. Hereinafter, a description of the configuration common to the VCSEL 10 according to the fourth embodiment described with reference to the drawings from FIG. 24 to FIG. 31 will be omitted. FIG. 34A is a diagram showing the positional relationship in plan view between the penetrating portion 80A1 of the heat transfer member 80 of the VCSEL 10 and the mesa structure 30 according to the sixth embodiment.

In the fourth embodiment (FIG. 25A), the plurality of penetrating portions 80A1 are distributed almost uniformly within the plane. On the other hand, in the sixth embodiment, the distribution density of the plurality of penetrating portions 80A1 in the in-plane direction is not uniform. In the plane of the heat transfer member 80, a direction parallel to the direction in which the plurality of mesa structures 30 are lined up is defined as a column direction, and a direction perpendicular thereto is defined as a row direction. The interval G _y of the plurality of penetrating portions 80A1 in the column direction is approximately constant. The interval G _x between the plurality of through parts 80A1 in the row direction increases as the distance from the mesa structure 30 in the row direction increases.

FIG. 34B is a graph showing the distribution density of the penetrating portion 80A1. The horizontal axis represents the position in the row direction, and the vertical axis represents the distribution density of the penetrating portions 80A1. As the distance from the mesa structure 30 in the row direction increases, the distribution density of the penetrating portions 80A1 decreases.

Next, the excellent effects of the sixth embodiment will be explained.
By relatively increasing the distribution density of the penetrating portions 80A1 in the vicinity of the mesa structure 30, the thermal resistance from the mesa structure 30 to the module substrate 88 (FIG. 3) can be reduced. When the distribution density of the penetrating portions 80A1 is reduced at a position far from the mesa structure 30, the volume ratio occupied by the restraining portions 80B (FIG. 2) increases. Therefore, the function of suppressing thermal expansion of the high thermal conductivity portion 80A (FIG. 24) is enhanced. Thereby, thermal stress applied to the semiconductor layer 28 (FIG. 24) can be suppressed.

[Seventh Example]
Next, a VCSEL according to a seventh embodiment will be described with reference to the drawings from FIG. 35 to FIG. 38. Hereinafter, a description of the configuration common to the VCSEL 10 according to the fourth embodiment described with reference to the drawings from FIG. 24 to FIG. 31 will be omitted.

FIG. 35 is a plan view schematically showing the positional relationship between the mesa structure 30 and the penetrating portion 80A1 in plan view, and FIG. 36 is a cross-sectional view of the VCSEL 10 taken along the dashed-dotted line 36-36 in FIG. In the fourth example, the mesa structure 30 (FIG. 25A) has a circular shape in plan view, but in the seventh example, the mesa structure 30 has a square shape in plan view. Note that the vertices of the square may be rounded to form a square with rounded corners. In the fourth embodiment (FIG. 25A), the mesa structure 30 and the penetrating portion 80A1 have an overlapping region in plan view. In contrast, in the seventh embodiment, the mesa structure 30 and the penetrating portion 80A1 do not overlap in plan view, and the mesa structure 30 and the restraint portion 80B at least partially overlap.

The distance in the height direction from the lower end of the mesa structure 30, that is, the lower end of the side surface of the mesa structure 30, to the restraining portion 80B that overlaps with the mesa structure 30 in plan view is denoted as H1. Consider the minimum enclosing circle 31 that includes the mesa structure 30 in plan view. When the mesa structure 30 has a square shape in plan view, the four vertices of this square are located on the minimum enclosing circle 31. Note that when the mesa structure 30 has a circular shape in planar view as in the fourth embodiment (FIG. 25A), the outer shape of the mesa structure 30 and the minimum enclosing circle 31 match.

A circle that is concentric with the minimum enclosing circle 31 and has a radius larger than the radius of the minimum enclosing circle 31 by a distance H1 is referred to as an expanded circle 33. The heat generated within the mesa structure 30 is conducted from the lower end toward the lower surface 80L of the heat transfer member 80, and also spreads in the in-plane direction. More specifically, the inner region of a truncated cone whose upper surface is the minimum enclosing circle 31 at the lower end of the mesa structure 30 and whose side surfaces have an inclination angle of 45 degrees functions as a main heat transfer path. The outer periphery of the enlarged circle 33 is determined by the line of intersection between the side surface of this truncated cone and the virtual plane including the upper surface of the restraining portion 80B. That is, it can be considered that the heat generated within the mesa structure 30 is mainly conducted within the range of the enlarged circle 33 at the position of the upper surface of the restraining portion 80B.

In plan view, the enlarged circle 33 and one or more penetrating portions 80A1 have an overlapping region. The heat conducted within the range of the enlarged circle 33 is conducted to the lower surface 80L of the heat transfer member 80 via the penetrating portion 80A1 overlapping the enlarged circle 33.

Next, the excellent effects of the seventh embodiment will be explained.
In the seventh embodiment, the mesa structure 30 and the penetrating portion 80A1 do not have an overlapping region in plan view, and the enlarged circle 33 and the penetrating portion 80A1 at least partially overlap. The heat generated in the mesa structure 30 and conducted within the range of the enlarged circle 33 is conducted to the lower surface 80L of the heat transfer member 80 via the penetrating portion 80A1. Therefore, sufficient heat radiation efficiency from the mesa structure 30 can be ensured. When focusing on each of the mesa structures 30, in order to ensure sufficient heat dissipation efficiency, the total area of the area where the enlarged circle 33 and the penetration portion 80A1 overlap in plan view is 3% or more of the area of the enlarged circle 33. It is preferable to have the following configuration.

Note that in the fourth embodiment (FIG. 25A), since the mesa structure 30 and the penetrating portion 80A1 overlap in plan view, the enlarged circle 33 and It can be said that the penetrating portion 80A1 overlaps with the penetrating portion 80A1.

In the fifth embodiment (FIGS. 33A and 33B), the restraining portion 80B is not arranged directly under the mesa structure 30 in plan view. In this case as well, the enlarged circle 33 can be defined using the distance H1 (FIG. 33B) in the height direction from the lower end of the mesa structure 30, that is, the lower end of the side surface of the mesa structure 30 to the restraining portion 80B.

Next, with reference to FIG. 37, the relationship between the area of the region where the enlarged circle 33 and the penetrating portion 80A1 overlap in plan view and the area of the penetrating portion 80A1 in plan view will be described. FIG. 37 is a plan view schematically showing the positional relationship between the enlarged circle 33 and the penetrating portion 80A1 in plan view. One enlarged circle 33 overlaps one penetrating portion 80A1. The area of the overlapping region is designated as S _in , and the area of the region outside the enlarged circle 33 (non-overlapping region) of the penetrating portion 80A1 is designated as S _out . As the area S _out of the non-overlapping region increases, the proportion occupied by the constrained portion 80B (FIG. 36) in the vicinity of the mesa structure 30 decreases. In order to reduce the thermal stress generated in the semiconductor layer 28 in the vicinity of the mesa structure 30, it is preferable to increase the proportion of the restrained portion 80B in the vicinity of the mesa structure 30.

Further, since the heat generated in the mesa structure 30 is mainly conducted inside the enlarged circle 33, even if the area S _out of the non-overlapping region is increased, the contribution to improving the heat dissipation efficiency is not large. In order to improve heat dissipation efficiency, it is desirable to increase the area S _in of the overlapping region. Therefore, in order to maintain sufficient heat dissipation efficiency and reduce thermal stress in the vicinity of the mesa structure 30, it is preferable to configure the area S _in of the overlapping region to be larger than the area S _out of the non-overlapping region. preferable.

When one enlarged circle 33 overlaps the plurality of penetrating portions 80A1 in a plan view, the sum of the areas S _{in of} the respective overlapping regions of the plurality of penetrating portions 80A1 is equal to the non-overlapping region of the plurality of penetrating portions 80A1. It is preferable to configure the area S _out to be larger than the total area S out.

Next, with reference to FIG. 38, the positional relationship in plan view between the enlarged circle 33 and the penetrating portion 80A1 when a plurality of mesa structures 30 are arranged will be described. FIG. 38 is a plan view schematically showing the positional relationship between one mesa structure 30, another mesa structure 30 located immediately next to it, each enlarged circle 33 of these mesa structures 30, and the penetrating portion 80A1. be.

A line segment connecting the center of the minimum enclosing circle 31 of one mesa structure 30 and the center of the minimum enclosing circle 31 of the mesa structure 30 located immediately therebetween is denoted as a line segment LS. A plurality of penetrating portions 80A1 overlap each of the enlarged circles 33 of the two mesa structures 30. There is no penetrating portion 80A1 that overlaps both of the two enlarged circles 33. Furthermore, no penetrating portion 80A1 that does not overlap either of the two enlarged circles 33 is arranged on the line segment LS.

Since the penetrating portion 80A1 that does not overlap either of the two enlarged circles 33 is not arranged on the line segment LS, the proportion occupied by the restraining portion 80B (FIG. 36) in the vicinity of the mesa structure 30 becomes large. Therefore, the effect of reducing thermal stress generated in the semiconductor layer 28 is enhanced. Furthermore, since the penetrating portion 80A1 that overlaps both of the two enlarged circles 33 is not arranged, thermal interference between the two mesa structures 30 is reduced, and heat is efficiently transferred in the thickness direction of the heat transfer member 80. It can be conducted.

It goes without saying that each of the above-mentioned embodiments is merely an illustration, and that the configurations shown in the different embodiments can be partially replaced or combined. Similar effects due to similar configurations in a plurality of embodiments will not be mentioned for each embodiment. Furthermore, the invention is not limited to the embodiments described above. For example, it will be obvious to those skilled in the art that various changes, improvements, combinations, etc. are possible.

10 Vertical cavity surface emitting laser (VCSEL)
21 Semi-insulating semiconductor layer 21A Substrate 21A1 Temporary substrate 21A2 Etching control layer 22 N-type conductive semiconductor layer 23 Lower DBR layer 24 Active layer 25 Spacer layer 26 Current confinement layer 26A Oxidized region 26B Unoxidized region 27 Upper DBR layer 28 Semiconductor layer 28A First surface 28B of semiconductor layer Second surface 30 of semiconductor layer Mesa structure 30A Projection 30B Cut 31 Minimum enclosing circle 32 Maximum inscribed circle 33 Expanded circle 41 Anode electrode 42 Cathode electrode 45 Anode wiring 45P Pad 46 Cathode wiring 46P Pad 50 Passivation film 50A, 50B Via hole 51 Protective film 51A, 51B Via hole 80 Heat transfer member 80A High thermal conductivity portion 80A1 Penetrating portion 80B Restraining portion 80B1 Original plate 80BH Through hole 80F Coating 80L Bottom surface 80T Top surface 81, 81A, 81B Adhesive layer 83, 84 Bonding wire 85 Control circuit component 86 Land 88 Module substrate

Claims (3)

1. a semiconductor layer;
   a lower distributed Bragg reflection layer disposed on the first surface of the semiconductor layer;
   an active layer disposed on the lower distributed Bragg reflective layer;
   an upper distributed Bragg reflection layer disposed on the active layer;
   a heat transfer member that is bonded to a second surface of the semiconductor layer opposite to the first surface and includes a material having a thermal conductivity higher than that of the semiconductor layer;
   A mesa structure is formed from the upper distributed Bragg reflective layer to at least the upper surface of the lower distributed Bragg reflective layer,
   Furthermore, the mesa structure includes a current confinement layer that concentrates current in a certain region in a plan view,
   A vertical cavity surface emitting laser in which a height dimension from the second surface of the semiconductor layer to the current confinement layer is 1/2 or less of the diameter of a minimum enclosing circle that includes the mesa structure in plan view. .
2. 2. The vertical cavity surface emitting laser according to claim 1, wherein the region where current is concentrated by the current confinement layer includes the geometric center of the mesa structure in plan view.
3. 3. The vertical cavity surface emitting laser according to claim 1, wherein the second surface of the semiconductor layer and the heat transfer member are bonded to each other via an adhesive layer made of metal.
   

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