WO2023231828A1 - Bandgap reference voltage circuit, integrated circuit, and electronic device - Google Patents

Bandgap reference voltage circuit, integrated circuit, and electronic device Download PDF

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Publication number
WO2023231828A1
WO2023231828A1 PCT/CN2023/095725 CN2023095725W WO2023231828A1 WO 2023231828 A1 WO2023231828 A1 WO 2023231828A1 CN 2023095725 W CN2023095725 W CN 2023095725W WO 2023231828 A1 WO2023231828 A1 WO 2023231828A1
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WIPO (PCT)
Prior art keywords
voltage
capacitor
circuit
switch
reference voltage
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PCT/CN2023/095725
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French (fr)
Chinese (zh)
Inventor
欧阳振华
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芯海科技(深圳)股份有限公司
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Publication of WO2023231828A1 publication Critical patent/WO2023231828A1/en

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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices

Definitions

  • the present application relates to the field of electronic technology, and more specifically, to a bandgap reference voltage circuit, an integrated circuit and an electronic device.
  • the bandgap reference voltage source can provide a stable reference voltage within a wide voltage range and a wide temperature range. It is an indispensable part of various analog and mixed-signal circuit systems and is widely used in communications, medical testing, image and audio and other fields. .
  • the bandgap reference voltage source usually includes a current mirror and a resistor. Due to a certain mismatch in the current mirror layout and resistor, an offset voltage will be introduced into the output reference voltage and the temperature coefficient will be increased.
  • the present invention proposes a bandgap reference voltage circuit, an integrated circuit and an electronic device to improve the above problems.
  • embodiments of the present application provide a bandgap reference voltage circuit, wherein the bandgap reference voltage circuit includes: a voltage generation circuit for generating a first voltage; wherein the first voltage has a temperature coefficient a characteristic voltage; a switched capacitor circuit connected to the voltage generating circuit, the switched capacitor circuit including a capacitor unit, the switched capacitor circuit being used to control the state of the capacitor unit state to generate a capacitor voltage; a voltage output circuit configured to output a reference voltage according to the first voltage and the capacitor voltage.
  • embodiments of the present application further provide an integrated circuit, which includes the bandgap reference voltage circuit described in the first aspect.
  • inventions of the present application also provide an electronic device.
  • the electronic device includes a device body and an integrated circuit as described in the second aspect provided in the device body.
  • the bandgap reference voltage circuit includes a voltage generation circuit for generating a first voltage; wherein the first voltage is a voltage with temperature coefficient characteristics; a switched capacitor circuit is connected to the voltage generation circuit , the switched capacitor circuit includes a capacitor unit, the switched capacitor circuit is used to generate a capacitor voltage by controlling the state of the capacitor unit; a voltage output circuit is used to output a reference voltage according to the first voltage and the capacitor voltage. Therefore, the bandgap reference voltage circuit can be less affected by the manufacturing process based on the capacitance, thereby reducing the offset voltage introduced in the output reference voltage.
  • Figure 1 shows a schematic structural diagram of a traditional structure band gap reference voltage circuit.
  • FIG. 2 shows a schematic structural diagram of a bandgap reference voltage circuit provided by an embodiment of the present application.
  • FIG. 3 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application.
  • Figure 4 shows a schematic structural diagram of another bandgap reference voltage circuit provided by an embodiment of the present application.
  • FIG. 5 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application.
  • Figure 6 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application.
  • Figure 7 shows a waveform diagram of a clock signal provided by an embodiment of the present application.
  • Figure 8 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application. picture.
  • FIG. 9 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application.
  • FIG. 10 shows an example structural diagram of a bandgap reference voltage circuit provided by an embodiment of the present application.
  • Figure 11 shows a circuit equivalent diagram provided by an embodiment of the present application.
  • Figure 12 shows another circuit equivalent diagram provided by the embodiment of the present application.
  • Figure 13 shows a schematic structural diagram of an integrated circuit provided by an embodiment of the present application.
  • Figure 14 shows a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • connection can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between two electrical components.
  • a and B may be connected directly, or A and B may be connected indirectly through one or more other electrical components.
  • the bandgap reference voltage source can provide a stable reference voltage within a wide voltage range and a wide temperature range. It is an indispensable part of various analog and mixed-signal circuit systems and is widely used in communications, medical Testing, image audio and other fields.
  • the traditional bandgap reference voltage source usually adopts the circuit structure shown in Figure 1.
  • the negative feedback terminal of the operational amplifier OP1 makes the voltages of the positive and negative input terminals of the operational amplifier OP1 equal.
  • the base-emitter voltage difference of bipolar transistors PNP1 and PNP2 has a negative temperature coefficient, which acts on resistor R1.
  • the generated current is mirrored to resistor R2 through current mirrors MP1 and MP3, and has a positive temperature coefficient.
  • the base-emitter voltages of the coefficient bipolar transistor PNP3 compensate each other to form a reference voltage that changes little with temperature.
  • the CMOS process there will be a certain mismatch in the ratio of resistors R1 and R2, which will also introduce offset voltage into the output voltage, thus increasing the temperature coefficient.
  • the bandgap reference voltage circuit includes a voltage generation circuit for generating a first voltage; wherein, The first voltage is a voltage with temperature coefficient characteristics; a switched capacitor circuit is connected to the voltage generating circuit, the switched capacitor circuit includes a capacitor unit, and the switched capacitor circuit is used to generate electricity by controlling the state of the capacitor unit. capacitor voltage; a voltage output circuit configured to output a reference voltage according to the first voltage and the capacitor voltage.
  • This application uses a capacitor to output the reference voltage, which can reduce the offset voltage introduced in the output reference voltage compared to the traditional circuit structure that outputs the reference voltage through a resistor.
  • FIG. 2 shows a bandgap reference voltage circuit 100 provided by an embodiment of the present application.
  • the bandgap reference voltage circuit 100 includes a voltage generating circuit 110 , a switched capacitor circuit 120 and a voltage output circuit 130 .
  • the voltage generation circuit 110 is used to generate a first voltage.
  • the first voltage is a voltage with temperature coefficient characteristics, that is, the first voltage can be a voltage with a positive temperature coefficient or a voltage with a negative temperature coefficient.
  • the switched capacitor circuit 120 is connected to the voltage.
  • the generating circuit 110 and the switched capacitor circuit 120 include a capacitor unit 121, and the switched capacitor circuit 120 is used to generate a capacitor voltage by controlling the state of the capacitor unit 121.
  • the voltage output circuit 130 is used to output a reference voltage according to the first voltage and the capacitor voltage.
  • the bandgap reference voltage circuit 100 of the embodiment of the present invention outputs a reference voltage using the design of a resistor-free switched capacitor circuit, so that the output reference voltage is less affected by the device process, thereby reducing the introduction of offset voltage into the output reference voltage. .
  • the voltage generation circuit 110 is also used to generate a second voltage
  • the second voltage is a voltage with temperature coefficient characteristics, that is, the second voltage may be a voltage with a positive temperature coefficient or a voltage with a negative temperature coefficient.
  • the first voltage and the second voltage have the same temperature coefficient.
  • the difference between the first voltage and the second voltage is a voltage having an opposite temperature coefficient to the first voltage or the second voltage.
  • the switched capacitor circuit may generate a capacitor voltage based on the first voltage and the second voltage.
  • the switched capacitor circuit 120 includes a switch unit 122, and the switch unit 122 is used to control the state of the capacitor unit 121.
  • the switch unit 122 may include a first switch branch 1221 and a second switch branch 1222 .
  • the capacitor unit 121 discharges so that the charge amount of the capacitor unit 121 reaches the preset range; when the first switch branch 1221 is turned off and the second switch branch is turned off,
  • the switch branch 1222 is turned on, the capacitor unit 121 is connected to the voltage generation circuit 110 and the voltage output circuit 130 respectively, and the capacitor unit 121 is charged to generate a capacitor voltage.
  • the state of the capacitor unit 121 can be controlled by controlling the connection state of the first switch branch 1221 and the second switch branch 1222.
  • the capacitor unit 121 may be in a discharge state, and the amount of charge existing on the capacitor unit 121 will gradually decrease until it reaches a preset range.
  • the preset range may be approximately equal to or equal to zero. In this state, the capacitor unit 121 will continue to discharge until its charge amount is approximately equal to or equal to zero.
  • the capacitor unit 121 can be connected to the voltage generation circuit 110 and the voltage output circuit 130 respectively, so that the capacitor unit 121 is in a charging state.
  • the corresponding capacitor voltage can be generated by charging.
  • the capacitor unit 121 may include a first capacitor C1 and a second capacitor C2. Then, the capacitor voltage includes the first capacitor voltage and the second capacitor voltage.
  • the switched capacitor circuit 120 controls the discharge of the first capacitor C1 and the second capacitor C2 so that the charges of the first capacitor C1 and the second capacitor C2 respectively reach the preset range.
  • the switched capacitor circuit 120 controls the first capacitor C1 and the second capacitor C2.
  • the capacitor C2 is charged to generate a first capacitor voltage corresponding to the first capacitor C1 and a second capacitor voltage corresponding to the second capacitor C2 according to the first voltage and the second voltage.
  • the voltage output circuit 130 may be based on the charge of the first capacitor C1 and the charge amount of the second capacitor C2, and output a reference voltage according to the first capacitor voltage and the second capacitor voltage.
  • the bandgap reference voltage circuit 100 can control the states of the first capacitor C1 and the second capacitor C2 by controlling the connection state of the first switch branch 1221 and the second switch branch 1222 .
  • first switch branch 1221 When the first switch branch 1221 is turned on and the second switch branch 1222 is turned off, both the first capacitor C1 and the second capacitor C2 are in a discharge state. The amount of charge will gradually decrease until its amount of charge is approximately equal to or equal to zero.
  • both the first capacitor C1 and the second capacitor C2 are at least connected to the voltage output circuit 130, and both the first capacitor C1 and the second capacitor C2 are charging.
  • the voltage output circuit 130 can be based on the first capacitor C1 and the second capacitor C2 before and after charging and discharging. The sum of the charges, and the reference voltage is output according to the first capacitor voltage and the second capacitor voltage.
  • the first switch branch 1221 may include a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4.
  • the first switch S1 is connected to the output end of the voltage output circuit 130
  • one end of the second switch S2 is connected to the second switch branch 1222 and the first capacitor C1 respectively
  • the other end of the second switch S2 is grounded
  • the third switch S3 One end of the third switch S3 is connected to the first capacitor C1 and the second capacitor C2 respectively
  • the other end of the third switch S3 is connected to the ground
  • one end of the fourth switch S4 is connected to the second switch branch 1222 and the second capacitor C2 respectively. The other end is connected to ground.
  • the second switch branch 1222 may include a fifth switch S5, a sixth switch S6, and a seventh switch S7.
  • one end of the fifth switch S5 is connected to the input end of the voltage output circuit 130
  • the other end of the fifth switch S5 is connected to one end of the third switch S3
  • one end of the sixth switch S6 is connected to the voltage generating circuit 110
  • the sixth switch S5 is connected to the input end of the voltage output circuit 130.
  • the other end of S6 is connected to the first capacitor C1 and one end of the second switch S2 respectively.
  • One end of the seventh switch S7 is connected to the output end of the voltage output circuit 130 .
  • the other end of the seventh switch S7 is connected to the second capacitor C2 and the second switch S2 respectively.
  • Four terminals of switch S4 are connected.
  • the first switch S1 and the second capacitor C2 When the charge amounts on the first capacitor C1 and the second capacitor C2 reach the preset range, for example, when the charge amounts on the first capacitor C1 and the second capacitor C2 are both discharged to zero, the first switch S1, The second switch S2, the third switch S3, and the fourth switch S4 are turned off, and the fifth switch S5, the sixth switch S6, and the seventh switch S7 are turned on. That is, the first switch branch 1221 is turned off and the second switch branch 1222 is connected.
  • the first capacitor C1 and the second capacitor C2 are reconnected to the bandgap reference voltage circuit 100, thereby entering the charging state, and generating the first capacitor voltage corresponding to the first capacitor C1 and the second capacitor C2
  • the corresponding second capacitor voltage according to the principle of charge conservation, the sum of the charges of the first capacitor C1 and the second capacitor C2 before and after charging and discharging remains unchanged.
  • the voltage output circuit 130 It can be based on the charge amount of the first capacitor C1 and the charge amount of the second capacitor C2, and according to the first capacitance voltage and the second capacitor voltage output reference voltage.
  • bandgap reference voltage circuit 100 there is still another bandgap reference voltage circuit 100 , wherein the bandgap reference voltage circuit 100 may also include a clock generation circuit 140 , the clock generation circuit 140 is used to provide the switch unit 122 with The clock signal is used to enable the switch unit 122 to control the state of the capacitor unit 121 through the clock signal.
  • the clock signal may include a first clock signal and a second clock signal.
  • the first clock signal can be used to control the switch unit 122 to discharge the capacitor unit 121, that is, to control the first switch branch 1221 to turn on and the second switch branch 1222 to turn off, so as to discharge the capacitor unit 121;
  • the second clock signal It can be used to control the switch unit to charge the capacitor unit 121, that is, to control the first switch branch 1221 to turn off and the second switch branch 1222 to turn on, so as to charge the capacitor unit 121; where the first clock signal and the second clock
  • the signals have opposite phases.
  • the waveform diagrams of the first clock signal and the second clock signal are as shown in Figure 7.
  • the first clock signal CLK1 is high level
  • the second clock signal CLK2 is low level
  • the capacitor unit 121 begins to discharge.
  • the charge amount of the capacitor unit 121 reaches the preset range
  • the first clock signal CLK1 becomes low level
  • the second clock signal CLK2 becomes high level
  • the capacitor unit 121 starts charging and generates a capacitor voltage
  • the voltage output circuit is sufficient
  • a stable reference voltage is output according to the first voltage generated by the voltage generating circuit and the capacitor voltage.
  • the clock generating circuit 140 can also be arranged inside the switched capacitor circuit, which is not limited here.
  • the voltage output circuit 130 may include an operational amplifier OP1.
  • a first input terminal D1 of the operational amplifier OP1 is connected to the voltage generating circuit 110.
  • a second input terminal D2 and an output terminal of the operational amplifier OP1 Terminal D3 is connected to the switched capacitor circuit 120 .
  • the output terminal D3 of the operational amplifier OP1 is connected to the second input terminal D2; when the capacitor unit 121 is charging, the output terminal D3 and the second input terminal D2 of the operational amplifier OP1 are connected to the capacitor unit 121 respectively. to the output reference voltage.
  • the voltage generation circuit 110 may also include a current mirror circuit 111 and a temperature compensation circuit 112 .
  • the current mirror circuit 111 is used to generate an input current
  • the temperature compensation circuit 112 is used to generate a first voltage and a second voltage according to the input current provided by the current mirror circuit 111 .
  • the current mirror circuit 111 may include a first current branch, a second current branch and a third current branch.
  • the input terminals of the first current branch, the second current branch and the third current branch are connected to the power supply voltage
  • the first current branch generates an input current according to the power supply voltage
  • the second current branch The output ends of the circuit and the third current branch are respectively connected to the temperature compensation circuit 112 and the second input current and the third input current are respectively input to the temperature compensation circuit 112, wherein the second current branch and the third current branch are respectively The second input current and the third input current to the temperature compensation circuit 112 are both mirrored from the input current
  • the first current branch includes at least a first transistor
  • the second current branch includes at least a first transistor
  • the first transistor includes at least a third transistor.
  • the source electrode of the first transistor, the source electrode of the second transistor, and the source electrode of the third transistor are all connected to the power supply voltage, and the gate electrodes of the first transistor, the gate electrode of the second transistor, and the gate electrode of the third transistor are connected to each other, and Commonly connected to the drain of the first transistor, the drain of the first transistor is grounded, and the drain of the second transistor is connected to the temperature compensation circuit 112 and the voltage output circuit 130 respectively.
  • the gate of the third transistor is connected to the gate of the second transistor, and the drain of the third transistor is connected to the temperature compensation circuit 112 and the switched capacitor circuit 120 respectively.
  • the bandgap reference voltage circuit 100 generates an input current through the first transistor, mirrors the input current through the second transistor and the third transistor respectively, and inputs the mirrored second input current and the third input current into the temperature compensation circuit 112 respectively.
  • the structure of the above-mentioned current mirror circuit 111 is only an example.
  • the current mirror circuit 111 may also include current mirrors with other structures, which are not limited here.
  • the temperature compensation circuit 112 at least includes a first triode unit and a second triode unit, wherein the ratio of the number of triodes in the first triode unit and the second triode unit is 1: N, N is a positive integer.
  • the emitter of the first triode unit is connected to the current mirror circuit 111 and the voltage output circuit 130 respectively, and the base and collector of the first triode unit are grounded.
  • the emitter of the second transistor unit is connected to the current mirror circuit 111 and the switched capacitor circuit 120 respectively, and the base and collector of the second transistor unit are grounded.
  • the voltage drop between the emitter and base of the PN junction of the triode has a negative temperature coefficient
  • the voltage difference between the first triode unit and the second triode unit has a positive temperature coefficient. coefficient, then, by adding the voltages of the positive and negative temperature coefficients, the voltage that changes little with temperature can be obtained.
  • This application utilizes the above characteristics of the triode tube and cooperates with the switched capacitor circuit to output a reference voltage that changes little with temperature.
  • the bandgap reference voltage circuit 100 may include a current mirror circuit 111, a temperature compensation circuit 112, a switched capacitor circuit 120, a voltage output circuit 130 and a clock generation circuit. 140.
  • the current mirror circuit 111 includes a first transistor MP1, a second transistor MP2, and a third transistor MP3. The number of MP2 and MP3 is the same.
  • Voltage output circuit 130 includes operational amplifier OP1.
  • the temperature compensation circuit 112 includes a first transistor unit PNP1 and a second transistor unit PNP2. The number ratio of PNP1 and PNP2 is 1:N.
  • the switched capacitor circuit 120 may include a first capacitor C1, a second capacitor C2, a first switch S1, a second switch Switch S2, third switch S3, fourth switch S4, fifth switch S5, sixth switch S6 and seventh switch S7.
  • the clock generation circuit 140 may include a first clock signal CLK1 and a second clock signal CLK2.
  • the waveform diagrams of the first clock signal CLK1 and the second clock signal CLK2 are as shown in the above-mentioned FIG. 7 and have the same period but opposite phases.
  • the second input terminal of the operational amplifier OP1 is connected to the input terminal to form a unit gain output mode, and the output voltage of the operational amplifier OP1 is V be1 .
  • the first input current is I 0 . Since the number ratio of PNP1 and PNP2 is 1:N, the emitter-base voltage of PNP1 (i.e. the first voltage) is:
  • the emitter-base voltage (i.e. the second voltage) of PNP2 is:
  • I 0 is the current flowing through the collector of PNP1
  • IS is the saturation current of the bipolar transistor
  • V T kT/q
  • k is Boltzmann's constant
  • q is the electron charge
  • T is the temperature.
  • V out is the reference voltage output by the band gap reference voltage 100.
  • the output voltage of the operational amplifier OP1 that is, the reference voltage V out output by the band gap reference voltage 100 is:
  • ⁇ V be has a positive temperature coefficient under different current densities, so adding the voltages of the positive and negative temperature coefficients can give a random
  • the temperature change of the reference voltage is small, and the reference voltage is different from the structure of the traditional band gap reference voltage circuit.
  • the capacitor structure is used instead of the resistor structure. Since the capacitor ratio accuracy is higher than the resistor ratio accuracy in the CMOS process, it can be reduced. The voltage in the output reference introduces an offset voltage.
  • FIG. 13 shows an integrated circuit 200 provided by an embodiment of the present application.
  • the integrated circuit 200 includes the above-mentioned bandgap reference voltage circuit 100 .
  • FIG. 14 shows an electronic device 300 provided by an embodiment of the present application.
  • the electronic device 300 includes a device body and the above-mentioned integrated circuit 200 .
  • the integrated circuit 200 is provided in the main body of the device.
  • the electronic device 300 may be a mobile phone or a smart phone (eg, iPhone TM-based, Android TM-based phone), a portable game device (eg, Nintendo DS TM, PlayStation Portable TM, Gameboy Advance TM, iPhone TM), laptop, PDA (Personal Digital Assistant, personal handheld computer), portable Internet devices, music players and data storage devices, other handheld devices such as watches, headphones, pendants, etc.
  • the electronic device 300 can also be other wearable devices (for example, such as Electronic glasses, electronic clothes, electronic bracelets, electronic necklaces, electronic tattoos or head-mounted devices (HMD) for smart watches).
  • HMD head-mounted devices
  • the electronic device 300 may also be any one of a plurality of electronic devices 300 including, but not limited to, cellular phones, smart phones, other wireless communication devices, personal digital assistants, audio players, other media players, music Recorders, video recorders, cameras, other media recorders, radios, medical equipment, vehicle transportation equipment, calculators, programmable remote controls, pagers, laptop computers, desktop computers, printers, netbooks, personal digital assistants (PDAs) , portable multimedia players (PMP), Moving Picture Experts Group (MPEG-1 or MPEG-2) audio layer 3 (MP3) players, portable medical devices, and digital cameras and combinations thereof.
  • PDAs personal digital assistants
  • PMP portable multimedia players
  • MPEG-1 or MPEG-2 Moving Picture Experts Group
  • MP3 audio layer 3
  • the bandgap reference voltage circuit includes a voltage generation circuit for generating a first voltage; wherein the first voltage has a temperature a voltage with coefficient characteristics; a switched capacitor circuit connected to the voltage generating circuit, the switched capacitor circuit including a capacitor unit, the switched capacitor circuit is used to generate a capacitor voltage by controlling the state of the capacitor unit; a voltage output circuit with A reference voltage is output according to the first voltage and the capacitor voltage. Therefore, the bandgap reference voltage circuit of the present application can reduce the offset voltage introduced into the output reference voltage and output a relatively stable reference voltage.

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Abstract

The present application discloses a bandgap reference voltage circuit, an integrated circuit, and an electronic device. The bandgap reference voltage circuit comprises: a voltage generation circuit, used for generating a first voltage, wherein the first voltage is a voltage having a temperature coefficient characteristic; a switched capacitor circuit, connected to the voltage generation circuit, the switched capacitor circuit comprising a capacitor unit and the switched capacitor circuit being used for generating a capacitance voltage by controlling the state of the capacitor unit; and a voltage output circuit, used for outputting a reference voltage according to the first voltage and the capacitance voltage. Therefore, the bandgap reference voltage circuit of the present application can reduce an offset voltage introduced into the outputted reference voltage, and reduce the influence of the offset voltage.

Description

带隙基准电压电路、集成电路以及电子设备Bandgap reference voltage circuits, integrated circuits and electronic equipment
相关申请的交叉引用Cross-references to related applications
本申请要求于2022年06月02日提交的申请号为202210626139.1的中国申请的优先权,其在此处于所有目的通过引用将其全部内容并入本文。This application claims priority from the Chinese application No. 202210626139.1 filed on June 2, 2022, the entire content of which is hereby incorporated by reference for all purposes.
技术领域Technical field
本申请涉及电子技术领域,更具体地,涉及一种带隙基准电压电路、集成电路以及电子设备。The present application relates to the field of electronic technology, and more specifically, to a bandgap reference voltage circuit, an integrated circuit and an electronic device.
背景技术Background technique
带隙基准电压源能提供一个宽电压范围、宽温度范围内的稳定基准电压,是各种模拟和混合信号电路系统中不可或缺的部分,被广泛应用在通信、医疗测试、图像音频等领域。The bandgap reference voltage source can provide a stable reference voltage within a wide voltage range and a wide temperature range. It is an indispensable part of various analog and mixed-signal circuit systems and is widely used in communications, medical testing, image and audio and other fields. .
目前,带隙基准电压源通常包括电流镜和电阻,由于电流镜版图及电阻存在一定失配,会在输出的基准电压中引入失调电压,增大温度系数。At present, the bandgap reference voltage source usually includes a current mirror and a resistor. Due to a certain mismatch in the current mirror layout and resistor, an offset voltage will be introduced into the output reference voltage and the temperature coefficient will be increased.
发明内容Contents of the invention
鉴于上述问题,本发明提出了一种带隙基准电压电路、集成电路以及电子设备,以改善上述问题。In view of the above problems, the present invention proposes a bandgap reference voltage circuit, an integrated circuit and an electronic device to improve the above problems.
第一方面,本申请实施例提供了一种带隙基准电压电路,其中,该带隙基准电压电路包括:电压产生电路,用于生成第一电压;其中,所述第一电压为具有温度系数特性的电压;开关电容电路,连接于所述电压产生电路,所述开关电容电路包括电容单元,所述开关电容电路用于通过控制所述电容单元的状 态生成电容电压;电压输出电路,用于根据所述第一电压和所述电容电压输出基准电压。In a first aspect, embodiments of the present application provide a bandgap reference voltage circuit, wherein the bandgap reference voltage circuit includes: a voltage generation circuit for generating a first voltage; wherein the first voltage has a temperature coefficient a characteristic voltage; a switched capacitor circuit connected to the voltage generating circuit, the switched capacitor circuit including a capacitor unit, the switched capacitor circuit being used to control the state of the capacitor unit state to generate a capacitor voltage; a voltage output circuit configured to output a reference voltage according to the first voltage and the capacitor voltage.
第二方面,本申请实施例还提供了一种集成电路,该集成电路包括上述第一方面所述的带隙基准电压电路。In a second aspect, embodiments of the present application further provide an integrated circuit, which includes the bandgap reference voltage circuit described in the first aspect.
第三方面,本申请实施例还提供了一种电子设备。该电子设备包括设备主体以及设于设备主体内的如上述第二方面所述的集成电路。In a third aspect, embodiments of the present application also provide an electronic device. The electronic device includes a device body and an integrated circuit as described in the second aspect provided in the device body.
本发明提供的技术方案,带隙基准电压电路包括电压产生电路,用于生成第一电压;其中,所述第一电压为具有温度系数特性的电压;开关电容电路,连接于所述电压产生电路,所述开关电容电路包括电容单元,所述开关电容电路用于通过控制所述电容单元的状态生成电容电压;电压输出电路,用于根据所述第一电压和所述电容电压输出基准电压。从而带隙基准电压电路可以基于电容受制作工艺影响较小,从而可以减小在输出的基准电压引入的失调电压大小。In the technical solution provided by the present invention, the bandgap reference voltage circuit includes a voltage generation circuit for generating a first voltage; wherein the first voltage is a voltage with temperature coefficient characteristics; a switched capacitor circuit is connected to the voltage generation circuit , the switched capacitor circuit includes a capacitor unit, the switched capacitor circuit is used to generate a capacitor voltage by controlling the state of the capacitor unit; a voltage output circuit is used to output a reference voltage according to the first voltage and the capacitor voltage. Therefore, the bandgap reference voltage circuit can be less affected by the manufacturing process based on the capacitance, thereby reducing the offset voltage introduced in the output reference voltage.
附图说明Description of the drawings
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,而不是全部的实施例。基于本申请实施例,本领域普通技术人员在没有付出创造性劳动前提下所获得的所有其他实施例及附图,都属于本发明保护的范围。In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. Not all examples. Based on the embodiments of the present application, all other embodiments and drawings obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.
图1示出了传统结构带隙带隙基准电压电路的结构示意图。Figure 1 shows a schematic structural diagram of a traditional structure band gap reference voltage circuit.
图2示出了本申请实施例提供的一种带隙基准电压电路的结构示意图。FIG. 2 shows a schematic structural diagram of a bandgap reference voltage circuit provided by an embodiment of the present application.
图3示出了本申请实施例提供的又一种带隙基准电压电路的结构示意图。FIG. 3 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application.
图4示出了本申请实施例提供的另一种带隙基准电压电路的结构示意图Figure 4 shows a schematic structural diagram of another bandgap reference voltage circuit provided by an embodiment of the present application.
图5示出了本申请实施例提供的还一种带隙基准电压电路的结构示意图。FIG. 5 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application.
图6示出了本申请实施例提供的再一种带隙基准电压电路的结构示意图Figure 6 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application.
图7示出了本申请实施例提供的时钟信号的波形图。Figure 7 shows a waveform diagram of a clock signal provided by an embodiment of the present application.
图8示出了本申请实施例提供的又另一种带隙基准电压电路的结构示意 图。Figure 8 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application. picture.
图9示出了本申请实施例提供的又再一种带隙基准电压电路的结构示意图。FIG. 9 shows a schematic structural diagram of yet another bandgap reference voltage circuit provided by an embodiment of the present application.
图10示出了本申请实施例提供的一种带隙基准电压电路的结构示例图。FIG. 10 shows an example structural diagram of a bandgap reference voltage circuit provided by an embodiment of the present application.
图11示出了本申请实施例提供的一种电路等效图。Figure 11 shows a circuit equivalent diagram provided by an embodiment of the present application.
图12示出了本申请实施例提供的又一种电路等效图。Figure 12 shows another circuit equivalent diagram provided by the embodiment of the present application.
图13示出了本申请一实施例提供的一种集成电路的结构示意图。Figure 13 shows a schematic structural diagram of an integrated circuit provided by an embodiment of the present application.
图14示出了本申请一实施例提供的一种电子设备的结构示意图。Figure 14 shows a schematic structural diagram of an electronic device provided by an embodiment of the present application.
具体实施方式Detailed ways
下面详细描述本申请的实施方式,实施方式的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性地,仅用于解释本申请,而不能理解为对本申请的限制。The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and cannot be understood as limiting the present application.
为了使本技术领域的人员更好地理解本申请的方案,下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整的描述。显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。In order to enable those in the technical field to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the scope of protection of this application.
在本说明书中描述的参考“一种实施方式”或“一些实施方式”等意味着在本申请的一个或多个实施方式中包括结合该实施例描述的特定特征、结构或特点。由此,在本说明书中术语“包括”、“包含”、“具有”及它们的变形都意味着“包括但不限于”,除非是以其他方式另外特别强调。需要指出的是,Reference in this specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Therefore, in this specification, the terms "including", "includes", "having" and their variations all mean "including but not limited to" unless otherwise specifically emphasized. It should be pointed out that
本申请实施例中“连接”可以理解为电连接,两个电学元件连接可以是两个电学元件之间的直接或间接连接。例如,A与B连接,既可以是A与B直接连接,也可以是A与B之间通过一个或多个其它电学元件间接连接。In the embodiment of this application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between two electrical components. For example, A and B may be connected directly, or A and B may be connected indirectly through one or more other electrical components.
带隙基准电压源能提供一个宽电压范围、宽温度范围内的稳定基准电压,是各种模拟和混合信号电路系统中不可或缺的部分,被广泛应用在通信、医疗 测试、图像音频等领域。The bandgap reference voltage source can provide a stable reference voltage within a wide voltage range and a wide temperature range. It is an indispensable part of various analog and mixed-signal circuit systems and is widely used in communications, medical Testing, image audio and other fields.
传统的带隙基准电压源通常采用如图1所示的电路结构,运算放大器OP1的负反馈端使运算放大器OP1的正负两个输入端电压相等。不同电流密度下,双极晶体管PNP1、PNP2的基极-发射极电压差具有负的温度系数,作用在电阻R1上,产生的电流通过电流镜MP1、MP3镜像到电阻R2上,与具有正温度系数的双极晶体管PNP3的基极-发射极电压互相补偿,形成随温度变化小的基准电压。但是,在该电路结构中,由于电流镜MP1、MP3的版图存在失配,会使得输出电压中存在失调电压。而在CMOS工艺下,电阻R1、R2的比例会存在一定失配,也会在输出电压中引入失调电压,从而增大温度系数。The traditional bandgap reference voltage source usually adopts the circuit structure shown in Figure 1. The negative feedback terminal of the operational amplifier OP1 makes the voltages of the positive and negative input terminals of the operational amplifier OP1 equal. Under different current densities, the base-emitter voltage difference of bipolar transistors PNP1 and PNP2 has a negative temperature coefficient, which acts on resistor R1. The generated current is mirrored to resistor R2 through current mirrors MP1 and MP3, and has a positive temperature coefficient. The base-emitter voltages of the coefficient bipolar transistor PNP3 compensate each other to form a reference voltage that changes little with temperature. However, in this circuit structure, due to the layout mismatch of current mirrors MP1 and MP3, there will be an offset voltage in the output voltage. Under the CMOS process, there will be a certain mismatch in the ratio of resistors R1 and R2, which will also introduce offset voltage into the output voltage, thus increasing the temperature coefficient.
为了解决上述问题,发明人经过长期研究,提出了本申请实施例中的带隙基准电压电路、集成电路以及电子设备,带隙基准电压电路包括电压产生电路,用于生成第一电压;其中,所述第一电压为具有温度系数特性的电压;开关电容电路,连接于所述电压产生电路,所述开关电容电路包括电容单元,所述开关电容电路用于通过控制所述电容单元的状态生成电容电压;电压输出电路,用于根据所述第一电压和所述电容电压输出基准电压。本申请通过利用电容输出基准电压,相比传统的通过电阻输出基准电压的电路结构,可以减小在输出的基准电压引入的失调电压。In order to solve the above problems, the inventor has proposed the bandgap reference voltage circuit, integrated circuit and electronic device in the embodiment of the present application after long-term research. The bandgap reference voltage circuit includes a voltage generation circuit for generating a first voltage; wherein, The first voltage is a voltage with temperature coefficient characteristics; a switched capacitor circuit is connected to the voltage generating circuit, the switched capacitor circuit includes a capacitor unit, and the switched capacitor circuit is used to generate electricity by controlling the state of the capacitor unit. capacitor voltage; a voltage output circuit configured to output a reference voltage according to the first voltage and the capacitor voltage. This application uses a capacitor to output the reference voltage, which can reduce the offset voltage introduced in the output reference voltage compared to the traditional circuit structure that outputs the reference voltage through a resistor.
参照图2所示,图2示出了本申请实施例提供的一种带隙基准电压电路100。该带隙基准电压电路100包括电压产生电路110、开关电容电路120以及电压输出电路130。其中,电压产生电路110用于生成第一电压,第一电压为具有温度系数特性的电压,即第一电压可以是具有正温度系数的电压或具有负温度系数的电压开关电容电路120连接于电压产生电路110,开关电容电路120包括电容单元121,开关电容电路120用于通过控制电容单元121的状态生成电容电压。电压输出电路130用于根据第一电压和电容电压输出基准电压。Referring to FIG. 2 , FIG. 2 shows a bandgap reference voltage circuit 100 provided by an embodiment of the present application. The bandgap reference voltage circuit 100 includes a voltage generating circuit 110 , a switched capacitor circuit 120 and a voltage output circuit 130 . The voltage generation circuit 110 is used to generate a first voltage. The first voltage is a voltage with temperature coefficient characteristics, that is, the first voltage can be a voltage with a positive temperature coefficient or a voltage with a negative temperature coefficient. The switched capacitor circuit 120 is connected to the voltage. The generating circuit 110 and the switched capacitor circuit 120 include a capacitor unit 121, and the switched capacitor circuit 120 is used to generate a capacitor voltage by controlling the state of the capacitor unit 121. The voltage output circuit 130 is used to output a reference voltage according to the first voltage and the capacitor voltage.
本发明实施例的带隙基准电压电路100利用无电阻的开关电容电路的设计输出基准电压,使得输出受器件工艺的影响较少的基准电压,从而可以减小在输出的基准电压中引入失调电压。The bandgap reference voltage circuit 100 of the embodiment of the present invention outputs a reference voltage using the design of a resistor-free switched capacitor circuit, so that the output reference voltage is less affected by the device process, thereby reducing the introduction of offset voltage into the output reference voltage. .
在一些实施例中,电压产生电路110还用于生成第二电压,第二电压为具有温度系数特性的电压,即第二电压可以是具有正温度系数的电压或具有负温度系数的电压。在本实施例中,第一电压和第二电压为温度系数相同的电压。第一电压与第二电压之差为具有与第一电压或者第二电压相反的温度系数的 电压。开关电容电路可以根据第一电压和第二电压生成电容电压。In some embodiments, the voltage generation circuit 110 is also used to generate a second voltage, and the second voltage is a voltage with temperature coefficient characteristics, that is, the second voltage may be a voltage with a positive temperature coefficient or a voltage with a negative temperature coefficient. In this embodiment, the first voltage and the second voltage have the same temperature coefficient. The difference between the first voltage and the second voltage is a voltage having an opposite temperature coefficient to the first voltage or the second voltage. Voltage. The switched capacitor circuit may generate a capacitor voltage based on the first voltage and the second voltage.
在一些实施例中,请参照图3,图3示出了本申请实施例提供的又一种带隙基准电压电路100。其中,开关电容电路120包括开关单元122,开关单元122用于控制电容单元121的状态。In some embodiments, please refer to FIG. 3 , which shows yet another bandgap reference voltage circuit 100 provided by an embodiment of the present application. Among them, the switched capacitor circuit 120 includes a switch unit 122, and the switch unit 122 is used to control the state of the capacitor unit 121.
如图4所示的另一种带隙基准电压电路100,开关单元122可以包括第一开关支路1221和第二开关支路1222。其中,第一开关支路1221导通、第二开关支路1222关断时,电容单元121放电以使该电容单元121的电荷量达到预设范围;第一开关支路1221关断、第二开关支路1222导通时,电容单元121分别连接于电压产生电路110和电压输出电路130,电容单元121充电以生成电容电压。As shown in another bandgap reference voltage circuit 100 in FIG. 4 , the switch unit 122 may include a first switch branch 1221 and a second switch branch 1222 . When the first switch branch 1221 is turned on and the second switch branch 1222 is turned off, the capacitor unit 121 discharges so that the charge amount of the capacitor unit 121 reaches the preset range; when the first switch branch 1221 is turned off and the second switch branch is turned off, When the switch branch 1222 is turned on, the capacitor unit 121 is connected to the voltage generation circuit 110 and the voltage output circuit 130 respectively, and the capacitor unit 121 is charged to generate a capacitor voltage.
在本实施例中,可以通过控制第一开关支路1221和第二开关支路1222的连接状态,来控制电容单元121的状态。在第一开关支路1221导通、第二开关支路1222关断时,电容单元121可以处于放电状态,电容单元121上已存在的电荷量会逐渐减小,直至达到预设范围,作为一种实施方式,该预设范围可以约等于或等于零,此种状态下,电容单元121会一直放电,直至其电荷量约等于或等于零。在第一开关支路1221关断、第二开关支路1222导通时,电容单元121可以分别连接于电压产生电路110和电压输出电路130,从而使得电容单元121处于充电状态,让电容单元121能够通过充电生成相应的电容电压。In this embodiment, the state of the capacitor unit 121 can be controlled by controlling the connection state of the first switch branch 1221 and the second switch branch 1222. When the first switch branch 1221 is turned on and the second switch branch 1222 is turned off, the capacitor unit 121 may be in a discharge state, and the amount of charge existing on the capacitor unit 121 will gradually decrease until it reaches a preset range. As a In this implementation, the preset range may be approximately equal to or equal to zero. In this state, the capacitor unit 121 will continue to discharge until its charge amount is approximately equal to or equal to zero. When the first switch branch 1221 is turned off and the second switch branch 1222 is turned on, the capacitor unit 121 can be connected to the voltage generation circuit 110 and the voltage output circuit 130 respectively, so that the capacitor unit 121 is in a charging state. The corresponding capacitor voltage can be generated by charging.
在一些实施例中,如图5所示的另一种带隙基准电压电路100,电容单元121可以包括第一电容C1和第二电容C2。则,电容电压包括第一电容电压和第二电容电压。其中,开关电容电路120控制第一电容C1和第二电容C2放电,以使第一电容C1和第二电容C2的电荷量分别达到预设范围,开关电容电路120控制第一电容C1和第二电容C2充电,以根据第一电压和第二电压生成与第一电容C1对应的第一电容电压和与第二电容C2对应的第二电容电压,电压输出电路130可以基于第一电容C1的电荷量和第二电容C2的电荷量,并根据第一电容电压和第二电容电压输出基准电压。In some embodiments, such as another bandgap reference voltage circuit 100 shown in FIG. 5 , the capacitor unit 121 may include a first capacitor C1 and a second capacitor C2. Then, the capacitor voltage includes the first capacitor voltage and the second capacitor voltage. Among them, the switched capacitor circuit 120 controls the discharge of the first capacitor C1 and the second capacitor C2 so that the charges of the first capacitor C1 and the second capacitor C2 respectively reach the preset range. The switched capacitor circuit 120 controls the first capacitor C1 and the second capacitor C2. The capacitor C2 is charged to generate a first capacitor voltage corresponding to the first capacitor C1 and a second capacitor voltage corresponding to the second capacitor C2 according to the first voltage and the second voltage. The voltage output circuit 130 may be based on the charge of the first capacitor C1 and the charge amount of the second capacitor C2, and output a reference voltage according to the first capacitor voltage and the second capacitor voltage.
作为一种实施方式,带隙基准电压电路100可以通过控制第一开关支路1221和第二开关支路1222的连接状态,来控制第一电容C1和第二电容C2的状态。在第一开关支路1221导通、第二开关支路1222关断时,第一电容C1和第二电容C2均处于放电状态,第一电容C1和第二电容C2上已存在的 电荷量会逐渐减小,直至其电荷量约等于或等于零。在第一开关支路1221关断、第二开关支路1222导通时,第一电容C1和第二电容C2均至少连接于电压输出电路130,第一电容C1和第二电容C2均处于充电状态,使得第一电容C1具有对应的第一电容电压,第二电容C2具有对应的第二电容电压,根据电荷守恒原理,电压输出电路130可以基于第一电容C1和第二电容C2充放电前后的电荷量之和,并根据第一电容电压和第二电容电压输出基准电压。As an implementation manner, the bandgap reference voltage circuit 100 can control the states of the first capacitor C1 and the second capacitor C2 by controlling the connection state of the first switch branch 1221 and the second switch branch 1222 . When the first switch branch 1221 is turned on and the second switch branch 1222 is turned off, both the first capacitor C1 and the second capacitor C2 are in a discharge state. The amount of charge will gradually decrease until its amount of charge is approximately equal to or equal to zero. When the first switch branch 1221 is turned off and the second switch branch 1222 is turned on, both the first capacitor C1 and the second capacitor C2 are at least connected to the voltage output circuit 130, and both the first capacitor C1 and the second capacitor C2 are charging. state, so that the first capacitor C1 has a corresponding first capacitor voltage, and the second capacitor C2 has a corresponding second capacitor voltage. According to the principle of conservation of charge, the voltage output circuit 130 can be based on the first capacitor C1 and the second capacitor C2 before and after charging and discharging. The sum of the charges, and the reference voltage is output according to the first capacitor voltage and the second capacitor voltage.
作为一种具体的示例,第一开关支路1221可以包括第一开关S1、第二开关S2、第三开关S3、第四开关S4。其中,第一开关S1与电压输出电路130的输出端连接,第二开关S2的一端分别与第二开关支路1222、第一电容C1连接,第二开关S2的另一端接地,第三开关S3的一端分别与第一电容C1、第二电容C2连接,第三开关S3的另一端接地,第四开关S4的一端分别与第二开关支路1222、第二电容C2连接,第四开关S4的另一端接地。第二开关支路1222可以包括第五开关S5、第六开关S6以及第七开关S7。其中,第五开关S5的一端与电压输出电路130的输入端连接,第五开关S5的另一端与第三开关S3的一端连接,第六开关S6的一端与电压产生电路110连接,第六开关S6的另一端分别与第一电容C1、第二开关S2的一端连接,第七开关S7的一端与电压输出电路130的输出端连接,第七开关S7的另一端分别与第二电容C2、第四开关S4的一端连接。As a specific example, the first switch branch 1221 may include a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4. Among them, the first switch S1 is connected to the output end of the voltage output circuit 130, one end of the second switch S2 is connected to the second switch branch 1222 and the first capacitor C1 respectively, the other end of the second switch S2 is grounded, and the third switch S3 One end of the third switch S3 is connected to the first capacitor C1 and the second capacitor C2 respectively, the other end of the third switch S3 is connected to the ground, and one end of the fourth switch S4 is connected to the second switch branch 1222 and the second capacitor C2 respectively. The other end is connected to ground. The second switch branch 1222 may include a fifth switch S5, a sixth switch S6, and a seventh switch S7. Among them, one end of the fifth switch S5 is connected to the input end of the voltage output circuit 130, the other end of the fifth switch S5 is connected to one end of the third switch S3, one end of the sixth switch S6 is connected to the voltage generating circuit 110, and the sixth switch S5 is connected to the input end of the voltage output circuit 130. The other end of S6 is connected to the first capacitor C1 and one end of the second switch S2 respectively. One end of the seventh switch S7 is connected to the output end of the voltage output circuit 130 . The other end of the seventh switch S7 is connected to the second capacitor C2 and the second switch S2 respectively. Four terminals of switch S4 are connected.
当第一开关S1、第二开关S2、第三开关S3、第四开关S4闭合,第五开关S5、第六开关S6、第七开关S7断开时,即第一开关支路1221接通,且第二开关支路1222关断时,第一电容C1和第二电容C2并联,且并未与电压产生电路110和电压输出电路130连接,即并未接入带隙基准电压电路100。此时,第一电容C1和第二电容C2均处于放电状态。When the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 are closed, and the fifth switch S5, the sixth switch S6, and the seventh switch S7 are opened, that is, the first switch branch 1221 is connected, When the second switch branch 1222 is turned off, the first capacitor C1 and the second capacitor C2 are connected in parallel and are not connected to the voltage generation circuit 110 and the voltage output circuit 130 , that is, they are not connected to the bandgap reference voltage circuit 100 . At this time, both the first capacitor C1 and the second capacitor C2 are in a discharge state.
当第一电容C1和第二电容C2上的电荷量达到预设范围时,示例性的,当第一电容C1和第二电容C2上的电荷量均泄放至零时,第一开关S1、第二开关S2、第三开关S3、第四开关S4断开,第五开关S5、第六开关S6、第七开关S7闭合,即第一开关支路1221关断,第二开关支路1222接通,此时,第一电容C1和第二电容C2重新接入接入带隙基准电压电路100,从而进入充电状态,并生成与第一电容C1对应的第一电容电压和与第二电容C2对应的第二电容电压,根据电荷守恒原理,第一电容C1和第二电容C2在充放电前后的电荷量之和不变,待第一电容电压和第二电容电压稳定后,电压输出电路130可以基于第一电容C1的电荷量和第二电容C2的电荷量,并根据第一电容 电压和第二电容电压输出基准电压。When the charge amounts on the first capacitor C1 and the second capacitor C2 reach the preset range, for example, when the charge amounts on the first capacitor C1 and the second capacitor C2 are both discharged to zero, the first switch S1, The second switch S2, the third switch S3, and the fourth switch S4 are turned off, and the fifth switch S5, the sixth switch S6, and the seventh switch S7 are turned on. That is, the first switch branch 1221 is turned off and the second switch branch 1222 is connected. At this time, the first capacitor C1 and the second capacitor C2 are reconnected to the bandgap reference voltage circuit 100, thereby entering the charging state, and generating the first capacitor voltage corresponding to the first capacitor C1 and the second capacitor C2 The corresponding second capacitor voltage, according to the principle of charge conservation, the sum of the charges of the first capacitor C1 and the second capacitor C2 before and after charging and discharging remains unchanged. After the first capacitor voltage and the second capacitor voltage stabilize, the voltage output circuit 130 It can be based on the charge amount of the first capacitor C1 and the charge amount of the second capacitor C2, and according to the first capacitance voltage and the second capacitor voltage output reference voltage.
在一些实施例中,如图6所示的还一种带隙基准电压电路100,其中,带隙基准电压电路100还可以包括时钟发生电路140,该时钟发生电路140用于向开关单元122提供时钟信号,以使开关单元122通过时钟信号控制电容单元121的状态。In some embodiments, as shown in FIG. 6 , there is still another bandgap reference voltage circuit 100 , wherein the bandgap reference voltage circuit 100 may also include a clock generation circuit 140 , the clock generation circuit 140 is used to provide the switch unit 122 with The clock signal is used to enable the switch unit 122 to control the state of the capacitor unit 121 through the clock signal.
作为一种实施方式,时钟信号可以包括第一时钟信号和第二时钟信号。其中,第一时钟信号可以用于控制开关单元122使电容单元121放电,即控制第一开关支路1221导通、第二开关支路1222关断,以使电容单元121放电;第二时钟信号可以用于控制开关单元以使电容单元121充电,即控制第一开关支路1221关断、第二开关支路1222导通,以使电容单元121充电;其中,第一时钟信号和第二时钟信号具有相反相位。例如,第一时钟信号、第二时钟信号的波形图如图7所示,初始阶段,第一时钟信号CLK1为高电平,第二时钟信号CLK2为低电平,电容单元121开始放电,当电容单元121的电荷量达到预设范围时,第一时钟信号CLK1变为低电平,第二时钟信号CLK2变为高电平,电容单元121开始充电,并产生电容电压,电压输出电路即可根据电压产生电路生成的第一电压以及电容电压,输出稳定的基准电压。As an implementation manner, the clock signal may include a first clock signal and a second clock signal. Among them, the first clock signal can be used to control the switch unit 122 to discharge the capacitor unit 121, that is, to control the first switch branch 1221 to turn on and the second switch branch 1222 to turn off, so as to discharge the capacitor unit 121; the second clock signal It can be used to control the switch unit to charge the capacitor unit 121, that is, to control the first switch branch 1221 to turn off and the second switch branch 1222 to turn on, so as to charge the capacitor unit 121; where the first clock signal and the second clock The signals have opposite phases. For example, the waveform diagrams of the first clock signal and the second clock signal are as shown in Figure 7. In the initial stage, the first clock signal CLK1 is high level, the second clock signal CLK2 is low level, and the capacitor unit 121 begins to discharge. When the charge amount of the capacitor unit 121 reaches the preset range, the first clock signal CLK1 becomes low level, the second clock signal CLK2 becomes high level, the capacitor unit 121 starts charging and generates a capacitor voltage, and the voltage output circuit is sufficient A stable reference voltage is output according to the first voltage generated by the voltage generating circuit and the capacitor voltage.
时钟发生电路140还可以设置在开关电容电路内部,在此不作限定。The clock generating circuit 140 can also be arranged inside the switched capacitor circuit, which is not limited here.
在一些实施例中,如图8所示,电压输出电路130可以包括运算放大器OP1,该运算放大器OP1的第一输入端D1与电压产生电路110连接,运算放大器OP1的第二输入端D2、输出端D3与开关电容电路120连接。其中,电容单元121放电时,运算放大器OP1的输出端D3与第二输入端D2连接;电容单元121充电时,运算放大器OP1的输出端D3与第二输入端D2分别连接于电容单元121,用于输出基准电压。In some embodiments, as shown in FIG. 8 , the voltage output circuit 130 may include an operational amplifier OP1. A first input terminal D1 of the operational amplifier OP1 is connected to the voltage generating circuit 110. A second input terminal D2 and an output terminal of the operational amplifier OP1 Terminal D3 is connected to the switched capacitor circuit 120 . When the capacitor unit 121 is discharging, the output terminal D3 of the operational amplifier OP1 is connected to the second input terminal D2; when the capacitor unit 121 is charging, the output terminal D3 and the second input terminal D2 of the operational amplifier OP1 are connected to the capacitor unit 121 respectively. to the output reference voltage.
在一些实施例中,如图9所示,电压产生电路110还可以包括电流镜电路111和温度补偿电路112。其中,电流镜电路111用于生成输入电流,温度补偿电路112用于根据电流镜电路111提供的输入电流生成第一电压以及第二电压。In some embodiments, as shown in FIG. 9 , the voltage generation circuit 110 may also include a current mirror circuit 111 and a temperature compensation circuit 112 . The current mirror circuit 111 is used to generate an input current, and the temperature compensation circuit 112 is used to generate a first voltage and a second voltage according to the input current provided by the current mirror circuit 111 .
作为一种实施方式,电流镜电路111可以包括第一电流支路、第二电流支路和第三电流支路。其中,第一电流支路、第二电流支路和第三电流支路的输入端连接于电源电压,第一电流支路根据电源电压生成输入电流,第二电流支 路和第三电流支路的输出端分别与温度补偿电路112连接,并分别向温度补偿电路112输入第二输入电流和第三输入电流,其中,第二电流支路和第三电流支路分别向温度补偿电路112输入的第二输入电流和第三输入电流均镜像自输入电流As an implementation manner, the current mirror circuit 111 may include a first current branch, a second current branch and a third current branch. Wherein, the input terminals of the first current branch, the second current branch and the third current branch are connected to the power supply voltage, the first current branch generates an input current according to the power supply voltage, and the second current branch The output ends of the circuit and the third current branch are respectively connected to the temperature compensation circuit 112, and the second input current and the third input current are respectively input to the temperature compensation circuit 112, wherein the second current branch and the third current branch are respectively The second input current and the third input current to the temperature compensation circuit 112 are both mirrored from the input current
示例性的,第一电流支路至少包括第一晶体管,第二电流支路至少包括第一晶体管,第一晶体管至少包括第三晶体管。第一晶体管的源极、第二晶体管的源极、第三晶体管的源极均与电源电压连接,第一晶体管的栅极、第二晶体管的栅极与第三晶体管的栅极相互连接,并共接于第一晶体管的漏极,第一晶体管的漏极接地,第二晶体管的漏极分别与温度补偿电路112、电压输出电路130连接。第三晶体管的栅极与第二晶体管的栅极连接,第三晶体管的漏极分别与温度补偿电路112、开关电容电路120连接。带隙基准电压电路100通过第一晶体管生成输入电流,并由第二晶体管和第三晶体管分别镜像输入电流,并将镜像后的第二输入电流和第三输入电流分别输入至温度补偿电路112中。上述电流镜电路111的结构仅为示例,电流镜电路111还可以包括其他结构的电流镜,在此不作限定。Exemplarily, the first current branch includes at least a first transistor, the second current branch includes at least a first transistor, and the first transistor includes at least a third transistor. The source electrode of the first transistor, the source electrode of the second transistor, and the source electrode of the third transistor are all connected to the power supply voltage, and the gate electrodes of the first transistor, the gate electrode of the second transistor, and the gate electrode of the third transistor are connected to each other, and Commonly connected to the drain of the first transistor, the drain of the first transistor is grounded, and the drain of the second transistor is connected to the temperature compensation circuit 112 and the voltage output circuit 130 respectively. The gate of the third transistor is connected to the gate of the second transistor, and the drain of the third transistor is connected to the temperature compensation circuit 112 and the switched capacitor circuit 120 respectively. The bandgap reference voltage circuit 100 generates an input current through the first transistor, mirrors the input current through the second transistor and the third transistor respectively, and inputs the mirrored second input current and the third input current into the temperature compensation circuit 112 respectively. . The structure of the above-mentioned current mirror circuit 111 is only an example. The current mirror circuit 111 may also include current mirrors with other structures, which are not limited here.
在一些实施例中,温度补偿电路112至少包括第一三极管单元和第二三极管单元,其中,第一三极管单元和第二三极管单元中的三级管个数比为1:N,N为正整数。第一三极管单元的发射极分别与电流镜电路111、电压输出电路130连接,第一三极管单元的基极、集电极接地。第二三极管单元的发射极分别与电流镜电路111、开关电容电路120连接,第二三极管单元的基极、集电极接地。其中,三极管的PN结发射极和基极的电压降具有负温度系数,而在不相等的电流密度下,第一三极管单元和第二三极管单元之间的电压差值具有正温度系数,那么,将正负两个温度系数的电压相加即可以得到随温度变化小的电压。本申请利用三级管的上述特性,配合开关电容电路,从而输出随温度变化小的基准电压。In some embodiments, the temperature compensation circuit 112 at least includes a first triode unit and a second triode unit, wherein the ratio of the number of triodes in the first triode unit and the second triode unit is 1: N, N is a positive integer. The emitter of the first triode unit is connected to the current mirror circuit 111 and the voltage output circuit 130 respectively, and the base and collector of the first triode unit are grounded. The emitter of the second transistor unit is connected to the current mirror circuit 111 and the switched capacitor circuit 120 respectively, and the base and collector of the second transistor unit are grounded. Among them, the voltage drop between the emitter and base of the PN junction of the triode has a negative temperature coefficient, and under unequal current densities, the voltage difference between the first triode unit and the second triode unit has a positive temperature coefficient. coefficient, then, by adding the voltages of the positive and negative temperature coefficients, the voltage that changes little with temperature can be obtained. This application utilizes the above characteristics of the triode tube and cooperates with the switched capacitor circuit to output a reference voltage that changes little with temperature.
为了更好了理解本申请,作为一种示例,请参照图10,该带隙基准电压电路100可以包括电流镜像电路111、温度补偿电路112、开关电容电路120、电压输出电路130以及时钟发生电路140。其中,电流镜电路111包括第一晶体管MP1、第二晶体管MP2以及第三晶体管MP3,MP2与MP3的个数相同。电压输出电路130包括运算放大器OP1。温度补偿电路112包括第一三极管单元PNP1以及第二三极管单元PNP2。PNP1与PNP2的个数比例为1:N。开关电容电路120可以包括第一电容C1、第二电容C2、第一开关S1、第二开 关S2、第三开关S3、第四开关S4、第五开关S5、第六开关S6以及第七开关S7。其中,时钟发生电路140可以包括第一时钟信号CLK1以及第二时钟信号CLK2,第一时钟信号CLK1和第二时钟信号CLK2的波形图如上述图7所示,具有相同的周期,相反的相位。In order to better understand the present application, as an example, please refer to Figure 10. The bandgap reference voltage circuit 100 may include a current mirror circuit 111, a temperature compensation circuit 112, a switched capacitor circuit 120, a voltage output circuit 130 and a clock generation circuit. 140. The current mirror circuit 111 includes a first transistor MP1, a second transistor MP2, and a third transistor MP3. The number of MP2 and MP3 is the same. Voltage output circuit 130 includes operational amplifier OP1. The temperature compensation circuit 112 includes a first transistor unit PNP1 and a second transistor unit PNP2. The number ratio of PNP1 and PNP2 is 1:N. The switched capacitor circuit 120 may include a first capacitor C1, a second capacitor C2, a first switch S1, a second switch Switch S2, third switch S3, fourth switch S4, fifth switch S5, sixth switch S6 and seventh switch S7. The clock generation circuit 140 may include a first clock signal CLK1 and a second clock signal CLK2. The waveform diagrams of the first clock signal CLK1 and the second clock signal CLK2 are as shown in the above-mentioned FIG. 7 and have the same period but opposite phases.
当开关S1、S2、S3、S4闭合,开关S5、S6、S7断开时,带隙基准电压100的电路等效图如图11所示。此时,第一电容C1和第二电容C2并联,且未与带隙基准电压电路100连接,第一电容C1和第二电容C2开始放电,直至第一电容C1和第二电容C2上存储的电荷被清零。此时,第一电容C1的电荷量Q1和第二电容C2的电荷量Q2之和为零,即Q1+Q2=0。When the switches S1, S2, S3, and S4 are closed and the switches S5, S6, and S7 are open, the circuit equivalent diagram of the bandgap reference voltage 100 is shown in Figure 11. At this time, the first capacitor C1 and the second capacitor C2 are connected in parallel and are not connected to the bandgap reference voltage circuit 100. The first capacitor C1 and the second capacitor C2 begin to discharge until the first capacitor C1 and the second capacitor C2 are stored. The charge is cleared. At this time, the sum of the charge Q 1 of the first capacitor C1 and the charge Q 2 of the second capacitor C2 is zero, that is, Q 1 + Q 2 =0.
运算放大器OP1的第二输入端与输入端连接,形成单位增益输出模式,运算放大器OP1输出电压为Vbe1The second input terminal of the operational amplifier OP1 is connected to the input terminal to form a unit gain output mode, and the output voltage of the operational amplifier OP1 is V be1 .
当开关S5、S6、S7闭合,开关S1、S2、S3、S4断开时,带隙基准电压100的电路等效图如图12所示。此时,第一电容C1和第二电容C2均接入隙基准电压100,第一电容C1的一端连接于运算放大器OP1的输出端,另一端分别连接于运算放大器OP1的第二输入端和第二电容C2的一端,第二电容的另一端连接于第二三极管单元PNP2的发射极,第一电容C1和第二电容C2处于充电状态。When switches S5, S6, and S7 are closed and switches S1, S2, S3, and S4 are opened, the circuit equivalent diagram of the bandgap reference voltage 100 is shown in Figure 12. At this time, both the first capacitor C1 and the second capacitor C2 are connected to the gap reference voltage 100. One end of the first capacitor C1 is connected to the output end of the operational amplifier OP1, and the other end is connected to the second input end and the second input end of the operational amplifier OP1 respectively. One end of the second capacitor C2 and the other end of the second capacitor are connected to the emitter of the second transistor unit PNP2, and the first capacitor C1 and the second capacitor C2 are in a charging state.
其中,第一输入电流为I0,由于PNP1与PNP2个数比为1:N,所以PNP1的发射极-基极电压(即第一电压)为:
Among them, the first input current is I 0 . Since the number ratio of PNP1 and PNP2 is 1:N, the emitter-base voltage of PNP1 (i.e. the first voltage) is:
PNP2的发射极-基极电压(即第二电压)为:
The emitter-base voltage (i.e. the second voltage) of PNP2 is:
其中,I0是流经PNP1集电极的电流,IS是双极型晶体管的饱和电流,VT=kT/q,k是玻尔兹曼常数,q是电子电荷,T是温度。Among them, I 0 is the current flowing through the collector of PNP1, IS is the saturation current of the bipolar transistor, V T =kT/q, k is Boltzmann's constant, q is the electron charge, and T is the temperature.
因此,PNP1与PNP2发射极-基极之间的电压差△Vbe为:
ΔVbe=Vbe1-Vbe2=VTln N
Therefore, the voltage difference ΔV be between the emitter-base of PNP1 and PNP2 is:
ΔV be =V be1 -V be2 =V T ln N
因为,运算放大器OP1的第一输入端、第二输入端电压相同,都为Vbe1, 所以第一电容C1两端的电压(即第一电容电压)为:
U1=Vbe2-Vbe1
Because the voltage at the first input terminal and the second input terminal of the operational amplifier OP1 is the same, both are V be1 , Therefore, the voltage across the first capacitor C1 (i.e., the voltage of the first capacitor) is:
U1=V be2 -V be1
第二电容C2两端的电压(即第二电容电压)为:
U2=Vout-Vbe1
The voltage across the second capacitor C2 (i.e., the voltage of the second capacitor) is:
U2=V out -V be1
其中,Vout为带隙基准电压100输出的基准电压。Among them, V out is the reference voltage output by the band gap reference voltage 100.
根据电荷守恒原理,第一电容C1和第二电容C2充放电前后的电荷量之和不变,且放电后Q1+Q2=0,设第一电容C1和第二电容C2在充电后稳定状态下,其电容分别为C1和C2,则充电后,第一电容C1和第二电容C2的电荷量之和为:
Q1+Q2=U1·C1+U2·C2=0
According to the principle of conservation of charge, the sum of the charges of the first capacitor C1 and the second capacitor C2 before and after charging and discharging remains unchanged, and Q 1 + Q 2 = 0 after discharge. It is assumed that the first capacitor C1 and the second capacitor C2 are stable after charging. In the state, the capacitances are C1 and C2 respectively. After charging, the sum of the charges of the first capacitor C1 and the second capacitor C2 is:
Q1+Q2=U1·C1+U2·C2=0
即,
Q1+Q2=(Vbe2-Vbe1)·C1+(Vout-Vbe)·C2=0
Right now,
Q1+Q2=(V be2 -V be1 )·C1+(V out -V be )·C2=0
所以,运算放大器OP1的输出电压,即带隙基准电压100输出的基准电压Vout为:
Therefore, the output voltage of the operational amplifier OP1, that is, the reference voltage V out output by the band gap reference voltage 100 is:
因为三级管的发射极-基极之间的电压差具有负的温度系数,在不同电流密度下△Vbe具有正的温度系数,所以正负两个温度系数的电压相加就可以得到随温度变化小的基准电压,且该基准电压不同于传统的带隙基准电压电路的结构,用电容结构代替了电阻的结构,由于在CMOS工艺中电容比例精度较电阻比例精度高,可以减小在输出的基准中电压引入失调电压。Because the voltage difference between the emitter-base of the triode has a negative temperature coefficient, △V be has a positive temperature coefficient under different current densities, so adding the voltages of the positive and negative temperature coefficients can give a random The temperature change of the reference voltage is small, and the reference voltage is different from the structure of the traditional band gap reference voltage circuit. The capacitor structure is used instead of the resistor structure. Since the capacitor ratio accuracy is higher than the resistor ratio accuracy in the CMOS process, it can be reduced. The voltage in the output reference introduces an offset voltage.
参照图13所示,图13示出了本申请一实施例提供的一种集成电路200,该集成电路200包括上述的带隙基准电压电路100。Referring to FIG. 13 , FIG. 13 shows an integrated circuit 200 provided by an embodiment of the present application. The integrated circuit 200 includes the above-mentioned bandgap reference voltage circuit 100 .
参照图14所示,图14示出了本申请一实施例提供的一种电子设备300,该电子设备300包括设备主体以及上述的集成电路200。其中,集成电路200设于设备主体内。Referring to FIG. 14 , FIG. 14 shows an electronic device 300 provided by an embodiment of the present application. The electronic device 300 includes a device body and the above-mentioned integrated circuit 200 . Among them, the integrated circuit 200 is provided in the main body of the device.
本实施例中,电子设备300可以为移动电话或智能电话(例如,基于iPhone TM,基于Android TM的电话),便携式游戏设备(例如Nintendo DS TM,PlayStation Portable TM,Gameboy Advance TM,iPhone TM)、膝上型电脑、 PDA(Personal Digital Assistant,个人掌上电脑)、便携式互联网设备、音乐播放器以及数据存储设备,其他手持设备以及诸如手表、耳机、吊坠等,电子设备300还可以为其他的可穿戴设备(例如,诸如电子眼镜、电子衣服、电子手镯、电子项链、电子纹身或智能手表的头戴式设备(HMD))。In this embodiment, the electronic device 300 may be a mobile phone or a smart phone (eg, iPhone TM-based, Android TM-based phone), a portable game device (eg, Nintendo DS TM, PlayStation Portable TM, Gameboy Advance TM, iPhone TM), laptop, PDA (Personal Digital Assistant, personal handheld computer), portable Internet devices, music players and data storage devices, other handheld devices such as watches, headphones, pendants, etc., the electronic device 300 can also be other wearable devices (for example, such as Electronic glasses, electronic clothes, electronic bracelets, electronic necklaces, electronic tattoos or head-mounted devices (HMD) for smart watches).
电子设备300还可以是多个电子设备300中的任何一个,多个电子设备300包括但不限于蜂窝电话、智能电话、其他无线通信设备、个人数字助理、音频播放器、其他媒体播放器、音乐记录器、录像机、照相机、其他媒体记录器、收音机、医疗设备、车辆运输仪器、计算器、可编程遥控器、寻呼机、膝上型计算机、台式计算机、打印机、上网本电脑、个人数字助理(PDA)、便携式多媒体播放器(PMP)、运动图像专家组(MPEG-1或MPEG-2)音频层3(MP3)播放器,便携式医疗设备以及数码相机及其组合。The electronic device 300 may also be any one of a plurality of electronic devices 300 including, but not limited to, cellular phones, smart phones, other wireless communication devices, personal digital assistants, audio players, other media players, music Recorders, video recorders, cameras, other media recorders, radios, medical equipment, vehicle transportation equipment, calculators, programmable remote controls, pagers, laptop computers, desktop computers, printers, netbooks, personal digital assistants (PDAs) , portable multimedia players (PMP), Moving Picture Experts Group (MPEG-1 or MPEG-2) audio layer 3 (MP3) players, portable medical devices, and digital cameras and combinations thereof.
综上所述,本申请提供的一种带隙基准电压电路、集成电路以及电子设备,带隙基准电压电路包括电压产生电路,用于生成第一电压;其中,所述第一电压为具有温度系数特性的电压;开关电容电路,连接于所述电压产生电路,所述开关电容电路包括电容单元,所述开关电容电路用于通过控制所述电容单元的状态生成电容电压;电压输出电路,用于根据所述第一电压和所述电容电压输出基准电压。从而本申请的带隙基准电压电路可以减小在输出的基准电压引入失调电压,输出较为稳定的基准电压。To sum up, this application provides a bandgap reference voltage circuit, an integrated circuit and an electronic device. The bandgap reference voltage circuit includes a voltage generation circuit for generating a first voltage; wherein the first voltage has a temperature a voltage with coefficient characteristics; a switched capacitor circuit connected to the voltage generating circuit, the switched capacitor circuit including a capacitor unit, the switched capacitor circuit is used to generate a capacitor voltage by controlling the state of the capacitor unit; a voltage output circuit with A reference voltage is output according to the first voltage and the capacitor voltage. Therefore, the bandgap reference voltage circuit of the present application can reduce the offset voltage introduced into the output reference voltage and output a relatively stable reference voltage.
最后应说明的是:以上实施例仅用以说明本申请的技术方案,而非对其限制;尽管参照前述实施例对本申请进行了详细的说明,本领域的普通技术人员当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不驱使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围。 Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present application, but not to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art will understand that: it can still Modifications are made to the technical solutions described in the foregoing embodiments, or equivalent substitutions are made to some of the technical features; however, these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions in the embodiments of the present application.

Claims (12)

  1. 一种带隙基准电压电路,其特征在于,所述带隙基准电压电路包括:A bandgap reference voltage circuit, characterized in that the bandgap reference voltage circuit includes:
    电压产生电路,用于生成第一电压;其中,所述第一电压为具有温度系数特性的电压;A voltage generation circuit, configured to generate a first voltage; wherein the first voltage is a voltage with temperature coefficient characteristics;
    开关电容电路,连接于所述电压产生电路,所述开关电容电路包括电容单元,所述开关电容电路用于通过控制所述电容单元的状态生成电容电压;a switched capacitor circuit, connected to the voltage generating circuit, the switched capacitor circuit including a capacitor unit, the switched capacitor circuit being used to generate a capacitor voltage by controlling the state of the capacitor unit;
    电压输出电路,用于根据所述第一电压和所述电容电压输出基准电压。A voltage output circuit, configured to output a reference voltage according to the first voltage and the capacitor voltage.
  2. 根据权利要求1所述的带隙基准电压电路,其特征在于,所述电压产生电路还用于生成第二电压;其中,所述第二电压为具有温度系数特性的电压;The bandgap reference voltage circuit according to claim 1, wherein the voltage generation circuit is also used to generate a second voltage; wherein the second voltage is a voltage with temperature coefficient characteristics;
    所述开关电容电路根据所述第一电压和所述第二电压生成所述电容电压。The switched capacitor circuit generates the capacitor voltage based on the first voltage and the second voltage.
  3. 根据权利要求2所述的带隙基准电压电路,其特征在于,所述电容单元包括第一电容和第二电容;所述电容电压包括第一电容电压和第二电容电压;The bandgap reference voltage circuit according to claim 2, wherein the capacitor unit includes a first capacitor and a second capacitor; the capacitor voltage includes a first capacitor voltage and a second capacitor voltage;
    所述开关电容电路控制所述第一电容和所述第二电容放电,以使所述第一电容和所述第二电容的电荷量分别达到所述预设范围;The switched capacitor circuit controls the discharge of the first capacitor and the second capacitor so that the charge amounts of the first capacitor and the second capacitor respectively reach the preset range;
    所述开关电容电路控制所述第一电容和所述第二电容充电,以根据所述第一电压和所述第二电压生成与所述第一电容对应的第一电容电压和与所述第二电容对应的第二电容电压;The switched capacitor circuit controls the charging of the first capacitor and the second capacitor to generate a first capacitor voltage corresponding to the first capacitor and a first capacitor voltage corresponding to the first capacitor according to the first voltage and the second voltage. The voltage of the second capacitor corresponding to the two capacitors;
    所述电压输出电路基于所述第一电容的电荷量和所述第二电容的电荷量,并根据所述第一电容电压和所述第二电容电压输出所述基准电压。The voltage output circuit is based on the charge amount of the first capacitor and the charge amount of the second capacitor, and outputs the reference voltage according to the first capacitor voltage and the second capacitor voltage.
  4. 根据权利要求1所述的带隙基准电压电路,其特征在于,所述开关电容电路还包括开关单元,所述开关单元用于控制所述电容单元的状态。The bandgap reference voltage circuit according to claim 1, wherein the switched capacitor circuit further includes a switch unit, and the switch unit is used to control the state of the capacitor unit.
  5. 根据权利要求4所述的带隙基准电压电路,其特征在于,所述开关单元包括第一开关支路和第二开关支路;The bandgap reference voltage circuit according to claim 4, wherein the switch unit includes a first switch branch and a second switch branch;
    所述第一开关支路导通、所述第二开关支路关断时,所述电容单元放电以使所述电容单元的电荷量达到预设范围;When the first switch branch is turned on and the second switch branch is turned off, the capacitor unit discharges so that the charge amount of the capacitor unit reaches a preset range;
    所述第一开关支路关断、所述第二开关支路导通时,所述电容单元分别连 接于所述电压产生电路和所述电压输出电路,所述电容单元充电以生成所述电容电压。When the first switch branch is turned off and the second switch branch is turned on, the capacitor units are respectively connected to Connected to the voltage generating circuit and the voltage output circuit, the capacitor unit is charged to generate the capacitor voltage.
  6. 根据权利要求5所述的带隙基准电压电路,其特征在于,所述第一开关支路包括第一开关、第二开关、第三开关、第四开关,所述第一开关与所述电压输出电路的输出端连接,所述第二开关的一端分别与所述第二开关支路、所述第一电容连接,所述第二开关的另一端接地,所述第三开关的一端分别与所述第一电容、所述第二电容连接,所述第三开关的另一端接地,所述第四开关的一端分别与所述第二开关支路、所述第二电容连接,所述第四开关的另一端接地;The bandgap reference voltage circuit according to claim 5, characterized in that the first switch branch includes a first switch, a second switch, a third switch and a fourth switch, and the first switch and the voltage The output end of the output circuit is connected, one end of the second switch is connected to the second switch branch and the first capacitor respectively, the other end of the second switch is connected to ground, and one end of the third switch is connected to The first capacitor and the second capacitor are connected, the other end of the third switch is connected to ground, and one end of the fourth switch is connected to the second switch branch and the second capacitor respectively. The other end of the four-switch is connected to ground;
    所述第二开关支路包括第五开关、第六开关以及第七开关,所述第五开关的一端与所述电压输出电路的输入端连接,所述第五开关的另一端与所述第三开关的一端连接,所述第六开关的一端与所述电压产生电路连接,所述第六开关的另一端分别与所述第一电容、所述第二开关的一端连接,所述第七开关的一端与所述电压输出电路的输出端连接,所述第七开关的另一端分别与所述第二电容、所述第四开关的一端连接。The second switch branch includes a fifth switch, a sixth switch and a seventh switch. One end of the fifth switch is connected to the input end of the voltage output circuit, and the other end of the fifth switch is connected to the third switch. One end of the three switches is connected, one end of the sixth switch is connected to the voltage generating circuit, the other end of the sixth switch is connected to one end of the first capacitor and the second switch respectively, and the seventh switch One end of the switch is connected to the output end of the voltage output circuit, and the other end of the seventh switch is connected to one end of the second capacitor and the fourth switch respectively.
  7. 根据权利要求4-6任一项所述的带隙基准电压电路,其特征在于,所述带隙基准电压电路还包括时钟发生电路,所述时钟发生电路用于向所述开关单元提供时钟信号,以使所述开关单元通过所述时钟信号控制所述电容单元的状态。The bandgap reference voltage circuit according to any one of claims 4 to 6, characterized in that the bandgap reference voltage circuit further includes a clock generation circuit, the clock generation circuit is used to provide a clock signal to the switch unit , so that the switch unit controls the state of the capacitor unit through the clock signal.
  8. 根据权利要求7所述的带隙基准电压电路,其特征在于,所述时钟信号包括第一时钟信号和第二时钟信号,所述第一时钟信号用于控制所述第一开关支路导通、所述第二开关支路关断,以使所述电容单元放电;所述第二时钟信号用于控制所述第一开关支路关断、所述第二开关支路导通,以使所述电容单元充电,其中,所述第一时钟信号和所述第二时钟信号具有相反相位。The bandgap reference voltage circuit according to claim 7, wherein the clock signal includes a first clock signal and a second clock signal, and the first clock signal is used to control the conduction of the first switch branch. , the second switch branch is turned off to discharge the capacitor unit; the second clock signal is used to control the first switch branch to be turned off and the second switch branch to be turned on, so that the capacitor unit is discharged. The capacitive unit is charged, wherein the first clock signal and the second clock signal have opposite phases.
  9. 根据权利要求1所述的带隙基准电压电路,其特征在于,所述电压输出电路包括运算放大器,所述运算放大器的第一输入端与所述电压产生电路连接, 所述运算放大器的第二输入端、输出端分别与所述开关电容电路连接;The bandgap reference voltage circuit according to claim 1, wherein the voltage output circuit includes an operational amplifier, and the first input end of the operational amplifier is connected to the voltage generating circuit, The second input terminal and output terminal of the operational amplifier are respectively connected to the switched capacitor circuit;
    所述电容单元充电时,所述远算放大器的输出端与所述第二输入端分别连接于所述电容单元,用于输出所述基准电压。When the capacitor unit is charging, the output terminal and the second input terminal of the remote amplifier are respectively connected to the capacitor unit for outputting the reference voltage.
  10. 根据权利要求1所述的带隙基准电压电路,其特征在于,所述电压产生电路包括电流镜电路和温度补偿电路;The bandgap reference voltage circuit according to claim 1, wherein the voltage generation circuit includes a current mirror circuit and a temperature compensation circuit;
    所述电流镜电路用于生成输入电流;The current mirror circuit is used to generate input current;
    所述温度补偿电路用于根据所述输入电流生成第一电压以及第二电压。The temperature compensation circuit is used to generate a first voltage and a second voltage according to the input current.
  11. 一种集成电路,其特征在于,包括权利要求1至10任一项所述的带隙基准电压电路。An integrated circuit, characterized by comprising the bandgap reference voltage circuit according to any one of claims 1 to 10.
  12. 一种电子设备,其特征在于,包括设备主体以及设于所述设备主体内的如上述权利要求11所述的集成电路。 An electronic device, characterized in that it includes a device main body and an integrated circuit as claimed in claim 11 provided in the device main body.
PCT/CN2023/095725 2022-06-02 2023-05-23 Bandgap reference voltage circuit, integrated circuit, and electronic device WO2023231828A1 (en)

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115145340B (en) * 2022-06-02 2023-12-19 芯海科技(深圳)股份有限公司 Bandgap reference voltage circuit, integrated circuit, and electronic device

Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04295911A (en) * 1991-03-25 1992-10-20 Matsushita Electric Ind Co Ltd Power unit
JP2005078141A (en) * 2003-08-28 2005-03-24 Seiko Epson Corp Power supply device
CN102176188A (en) * 2011-03-30 2011-09-07 上海北京大学微电子研究院 Band-gap reference voltage producing circuit
CN103399611A (en) * 2013-07-10 2013-11-20 电子科技大学 High-precision resistance-free band-gap reference voltage source
CN103412606A (en) * 2013-07-18 2013-11-27 电子科技大学 Band gap reference voltage source
CN103412596A (en) * 2013-07-18 2013-11-27 电子科技大学 Reference voltage source
CN103440014A (en) * 2013-08-27 2013-12-11 电子科技大学 Continuous-output full-integration switched capacitor band-gap reference circuit
CN103970173A (en) * 2014-05-15 2014-08-06 无锡中星微电子有限公司 Bandgap reference voltage circuit
CN107368140A (en) * 2017-09-01 2017-11-21 无锡泽太微电子有限公司 Reduce the band-gap reference circuit of offset voltage using switching capacity
CN110794914A (en) * 2019-08-30 2020-02-14 南京中感微电子有限公司 Band-gap reference voltage generating circuit
CN111026222A (en) * 2019-12-19 2020-04-17 西安航天民芯科技有限公司 Voltage reference source circuit based on switched capacitor
CN113126687A (en) * 2019-12-30 2021-07-16 海安集成电路技术创新中心 Bandgap reference voltage generating circuit
CN114185390A (en) * 2021-12-08 2022-03-15 杭州海康威视数字技术股份有限公司 Band-gap reference voltage source circuit, integrated circuit and electronic equipment
CN115145340A (en) * 2022-06-02 2022-10-04 芯海科技(深圳)股份有限公司 Bandgap reference voltage circuit, integrated circuit, and electronic device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8461912B1 (en) * 2011-12-20 2013-06-11 Atmel Corporation Switched-capacitor, curvature-compensated bandgap voltage reference
CN104242925B (en) * 2013-06-18 2017-05-17 中芯国际集成电路制造(上海)有限公司 Frequency generating device, method and equipment
CN210983126U (en) * 2019-12-19 2020-07-10 西安航天民芯科技有限公司 Voltage reference source circuit based on switched capacitor

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04295911A (en) * 1991-03-25 1992-10-20 Matsushita Electric Ind Co Ltd Power unit
JP2005078141A (en) * 2003-08-28 2005-03-24 Seiko Epson Corp Power supply device
CN102176188A (en) * 2011-03-30 2011-09-07 上海北京大学微电子研究院 Band-gap reference voltage producing circuit
CN103399611A (en) * 2013-07-10 2013-11-20 电子科技大学 High-precision resistance-free band-gap reference voltage source
CN103412606A (en) * 2013-07-18 2013-11-27 电子科技大学 Band gap reference voltage source
CN103412596A (en) * 2013-07-18 2013-11-27 电子科技大学 Reference voltage source
CN103440014A (en) * 2013-08-27 2013-12-11 电子科技大学 Continuous-output full-integration switched capacitor band-gap reference circuit
CN103970173A (en) * 2014-05-15 2014-08-06 无锡中星微电子有限公司 Bandgap reference voltage circuit
CN107368140A (en) * 2017-09-01 2017-11-21 无锡泽太微电子有限公司 Reduce the band-gap reference circuit of offset voltage using switching capacity
CN110794914A (en) * 2019-08-30 2020-02-14 南京中感微电子有限公司 Band-gap reference voltage generating circuit
CN111026222A (en) * 2019-12-19 2020-04-17 西安航天民芯科技有限公司 Voltage reference source circuit based on switched capacitor
CN113126687A (en) * 2019-12-30 2021-07-16 海安集成电路技术创新中心 Bandgap reference voltage generating circuit
CN114185390A (en) * 2021-12-08 2022-03-15 杭州海康威视数字技术股份有限公司 Band-gap reference voltage source circuit, integrated circuit and electronic equipment
CN115145340A (en) * 2022-06-02 2022-10-04 芯海科技(深圳)股份有限公司 Bandgap reference voltage circuit, integrated circuit, and electronic device

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