TWI361343B - Voltage reference circuit - Google Patents
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1361343 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種電壓參考源電路’且特別是有關 於一種具低溫度依存性之CMOS電壓參考源電路》 【先前技術】 電壓參考源(Voltage Reference)電路在許多類比與 混合訊號電路中扮演著重要的角色,例如振盪器 (Oscillator)、類比轉數位(ADC)、數位轉類比(DAC) 以及鎖相迴路(PLLs)等。 一般來說,電壓參考源是產生一不隨溫度、供應電壓 與製程漂移(Manufacture Drift)變化之穩定電壓,作為 電路中固疋之參考電壓值。因此,電壓參考源的主要目 標疋希望有很好的溫度穩定度(g〇〇d temperature stability)、製程穩定度及對供應電壓變化的穩定度,也就 是要獨立於一切外界環境因素可能造成的影響。 目前最常見的是採用能隙參考電壓(Bandgap v〇ltage Reference )電路’係利用一個正比於絕對溫度的電路 (PTAT)來補償雙載子電晶體(BJTs)基射極(VBE)的 負溫度係數,但如此的能隙參考電壓電路因基射極電壓的 狐度係數一是近似於線性並不是真的線性,故不能精確的 消除/皿度係數的影響1此要得到一個精確的不受溫度影 響的參考電壓,需要更高次項的補償。 加上純雙载子電晶體(BJT)的製程較為昂貴,因此一般 5 1361343 常使用c臓製程(製程便宜)來製作雙載子電晶體,所以 只能用CMOS的寄生效應來實現,而做出來的寄生雙載子 電晶體特性較為低劣,進錢組成之電路特性不佳。 雙載子電晶體师)在使用時’其基極必須接地,而使得輸 出電壓的範圍受到限制。1361343 IX. Description of the Invention: [Technical Field] The present invention relates to a voltage reference source circuit 'and in particular to a CMOS voltage reference source circuit having low temperature dependence" [Prior Art] Voltage Reference Source ( Voltage Reference) circuits play an important role in many analog and mixed-signal circuits, such as oscillators, analog-to-digital (ADC), digital-to-digital analog (DAC), and phase-locked loops (PLLs). In general, the voltage reference source produces a stable voltage that does not vary with temperature, supply voltage, and Manufacture Drift as a reference voltage value in the circuit. Therefore, the main goal of the voltage reference source is to have good temperature stability (g〇〇d temperature stability), process stability, and stability to supply voltage changes, that is, independent of all external environmental factors. influences. At present, the most common is to use the Bandgap v〇ltage Reference circuit to compensate the negative temperature of the bipolar transistor (BJTs) base emitter (VBE) by a circuit proportional to absolute temperature (PTAT). Coefficient, but such a bandgap reference voltage circuit due to the base-emitter voltage of the Foxness coefficient is approximately linear and not really linear, so it cannot accurately eliminate the influence of the /-degree coefficient. The reference voltage affected by temperature requires compensation for higher order terms. In addition, the process of pure bipolar transistor (BJT) is relatively expensive. Therefore, generally 5 1361343 often uses a c臓 process (cheap process) to make a bipolar transistor, so it can only be realized by the parasitic effect of CMOS. The characteristics of the parasitic bipolar transistor that came out were inferior, and the circuit characteristics of the money composition were not good. The bipolar transistor crystallizer's base must be grounded during use, so that the range of the output voltage is limited.
此外,-般的能隙參考電麼電路往往使用大電阻盘運 异放大器(QP Amp)以及高比例的雙載子電晶體,皆會造 成面積的增加以及誤差產生,同時無法達到低供應電壓、 低功率消耗跟低成本的要求。對於目前攜帶式電子產品, 如:行動電話、個人數位助理(PDA)'筆記型電腦等,都 以輕薄短小為訴求,—般的能隙參考電墨電路已經無法滿 此如何有效延長攜帶式產品電池的使用時間,使得 更換電池或充電的頻率降低是必要的,所以近年來低屋操 作與低功率消耗的設計更顯得重要。 【發明内容】 本發明的目的是在提供-種電屢參考源電路,其不使 用任何一極體(Di°des)與雙載子電晶體(BJTs),用以克 服上述之問題,並提供—獨立於供應電I,且不易受溫度 影響之參考電壓。 本發明—較佳實施例,一種電壓參考源電路包含一溫 心疋 f 電屡參考源(Temperature-stable Voltage ) ’其係電性連接於一維勒電流源(Widlar Current 6 1361343In addition, the general-purpose bandgap reference circuit often uses a large resistive disk amplifier (QP Amp) and a high proportion of double-carrier transistors, which will cause an increase in area and error, and at the same time, a low supply voltage cannot be achieved. Low power consumption and low cost requirements. For the current portable electronic products, such as mobile phones, personal digital assistants (PDAs), notebook computers, etc., all of which are demanding light and short, the general energy gap reference ink circuit is no longer able to effectively extend the portable products. The use time of the battery makes it necessary to replace the battery or reduce the frequency of charging, so in recent years, the design of low-rise operation and low power consumption is more important. SUMMARY OF THE INVENTION It is an object of the present invention to provide an electrical reference source circuit that does not use any one of a dipole (Di°des) and a bipolar transistor (BJTs) to overcome the above problems and provide — A reference voltage that is independent of the supply of electricity I and is not susceptible to temperature. In a preferred embodiment of the invention, a voltage reference source circuit includes a temperature-dependent voltage source (Temperature-stable Voltage), which is electrically connected to a one-dimensional current source (Widlar Current 6 1361343
Source )»其中維勒電流源係用以供應溫度穩定型電壓參考 源一獨立於供應電壓之穩定偏壓電流(Bias Current)。 溫度穩定型電壓參考源包含一第一電晶體、一第二電 晶體、一第三電晶體以及一第四電晶體,第一電晶體具有 一第一源極、一第一汲極以及一第一閘極;第二電晶體, 具有一第二源極、一第二汲極以及一第二閘極;第三電晶 體’具有一第三源極、一第三汲極以及一第三閘極;以及 第四電晶體’具有一第四源極、一第四汲極以及一第四閘 極。 其中第一源極與第二源極接至一電壓源,第一閘極與 第二閘極相連接並接至一端點,第一汲極與第三汲極相連 接,第二汲極、第三閘極以及第四源極相連接形成一參考 電壓端,第三源極與第四閘極相連接至一參考訊號端,第 四汲極接至參考訊號端, 維勒電流源包含一第五電晶體、一第六電晶體、一第 七電晶體、一第八電晶體以及一電阻器,第五電晶體具有 一第五源極、一第五汲極以及一第五閘極;第六電晶體, 具有一第六源極、一第六汲極以及一第六閘極;第七電晶 體’具有一第七源極、一第七汲極以及一第七閘極;以及 第八電晶體’具有一第八源極、一第八汲極以及一第八閘 極。 其中第五源極接至參考訊號端,第五閘極、第五汲極 以及第六閘極相連接,第六源極與電阻器之一端相連接, 電阻器之另-端接至參考訊號端,第七源極與第八源極接 7 1361343 至電麼源,第七沒極與第五汲極相連接,第七閉極、第八 閘極第八’及極以及第六汲極相連接至端點。Source )» The Ville source is used to supply a temperature-stabilized voltage reference source - a constant bias current independent of the supply voltage (Bias Current). The temperature-stabilized voltage reference source includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first transistor has a first source, a first drain, and a first a gate; a second transistor having a second source, a second drain, and a second gate; the third transistor 'having a third source, a third drain, and a third gate And the fourth transistor ' has a fourth source, a fourth drain, and a fourth gate. The first source and the second source are connected to a voltage source, the first gate is connected to the second gate and connected to an end point, the first drain is connected to the third drain, and the second drain is connected to the second drain. The third gate and the fourth source are connected to form a reference voltage terminal, the third source and the fourth gate are connected to a reference signal terminal, the fourth drain is connected to the reference signal terminal, and the Weiler current source includes a a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, and a resistor, the fifth transistor having a fifth source, a fifth drain, and a fifth gate; a sixth transistor having a sixth source, a sixth drain, and a sixth gate; the seventh transistor 'having a seventh source, a seventh drain, and a seventh gate; and The eight-electrode 'has an eighth source, an eighth drain, and an eighth gate. The fifth source is connected to the reference signal terminal, the fifth gate, the fifth drain and the sixth gate are connected, the sixth source is connected to one end of the resistor, and the other end of the resistor is connected to the reference signal. The seventh source is connected to the eighth source 7 1361343 to the power source, the seventh pole is connected to the fifth pole, the seventh closed pole, the eighth gate is the eighth 'and the pole and the sixth pole Connect to the endpoint.
本發明另一較佳實施例一種電壓參考源電路,包含: -第-電晶體、一第二電晶體、一第三電晶體、一第四電 晶體、一第五電晶體、一第六電晶體以及一電阻器,其中 第一電晶體具有一第一源極、一第一汲極以及一第一閘 極;第二電晶體’具有一第二源極、—第二及極以及一第 二閘極;第三電晶體’具有一第三源極、一第三沒極以及 一第二閘極,第四電晶體,具有一第四源極、一第四汲極 以及一第四閘極;第五電晶體具有一第五源極'一第五汲 極以及-第五閘極;以及第六電晶體,具有—第六源極、 一第六汲極以及一第六閘極。 其中第-源極與第二閘極相連接至一參考訊號端’第 一閘極、第三閘極、第四閘極、第五閘極、第六閘極、第 二源極以及第五汲極相連接,形成一參考電壓端,第二汲 極端連接至參考訊號端,第一汲極與第四汲極相連接第 二汲極與第六汲極相連接,第四源極、第五源極以及第六 源極接至一電壓源,第三源極與電阻器之一端電性連接了 電阻器之另一端接至該參考訊號端。 由上述本發明較佳實施例可知,採用CM〇s電晶體的 電壓參考源,藉由提供電晶體的閘極不同的偏壓,進而得 到不同需求的輸出電壓,使得應用的電路範圍較大,並減 y電aa體的使用3:,可以降低成本和面積,也可以減少電 路的功率消耗》 1361343 【實施方式】 一般來說’影響互補式金乳半導體(Complementary Metal-Oxide-Semi conductor, CMOS )之溫度依存性 (temperature-dependent)的主要參數為移動率(m〇bili.ty ) 和臨界電壓(Threshold Voltage ),因此在CMOS電路中, 移動率和臨界電壓為兩個主要的溫度敏感性According to another preferred embodiment of the present invention, a voltage reference source circuit includes: - a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth a crystal and a resistor, wherein the first transistor has a first source, a first drain, and a first gate; the second transistor has a second source, a second and a pole, and a first a second gate; the third transistor 'haves a third source, a third step, and a second gate, and the fourth transistor has a fourth source, a fourth drain, and a fourth gate The fifth transistor has a fifth source 'a fifth drain and a fifth gate; and a sixth transistor having a sixth source, a sixth drain and a sixth gate. The first source and the second gate are connected to a reference signal terminal, a first gate, a third gate, a fourth gate, a fifth gate, a sixth gate, a second source, and a fifth The drain pole is connected to form a reference voltage terminal, the second drain terminal is connected to the reference signal terminal, the first drain pole is connected to the fourth drain pole, the second drain pole is connected to the sixth drain pole, and the fourth source pole is The fifth source and the sixth source are connected to a voltage source, and the third source and one end of the resistor are electrically connected to the other end of the resistor to the reference signal terminal. According to the preferred embodiment of the present invention, the voltage reference source of the CM〇s transistor is used to provide different output voltages of the transistors by providing different bias voltages of the gates of the transistors, so that the circuit range of the application is large. And reduce the use of y electric aa body 3:, can reduce the cost and area, can also reduce the power consumption of the circuit" 1361343 [Embodiment] Generally, the "Complementary Metal-Oxide-Semi Conductor" (CMOS) The main parameters of temperature-dependent are mobility (m〇bili.ty) and threshold voltage (Threshold Voltage), so in CMOS circuits, the mobility and threshold voltage are the two main temperature sensitivities.
(temperature-sensitivity)因子。臨界電壓(ντ)的溫度 依存性可以表示如式(1): VT{T) = VT(T 0) + a(T ~ T0) (1) 其中’ 7; =3〇0尺,〇:為臨界電壓的溫度係數。而移動率 (Μ)的溫度依存性可以如式(2): KT) = ^〇(—)m (2) 其中,m為移動率溫度指數,一般根據製程的不同, 大約介於-1.5〜-2之間》(temperature-sensitivity) factor. The temperature dependence of the threshold voltage (ντ) can be expressed as equation (1): VT{T) = VT(T 0) + a(T ~ T0) (1) where ' 7; =3 〇 0 ft, 〇: The temperature coefficient of the threshold voltage. The temperature dependence of the mobility (Μ) can be as shown in equation (2): KT) = ^〇(—)m (2) where m is the mobility rate temperature index, which is generally between -1.5~ depending on the process. Between -2
請參照第1圖,其繪示為一種電壓參考源原理之示意 圖。N通道電晶體(NM〇s )與p通道電晶體(pM〇s )的 臨界電壓具有相反的溫度依存性(〇pp〇site temperature dependence),利用這個特性,可設計出一溫度補償電路, 其觀念類似於第1圖中所示之電壓參考源原理。p通道電 晶體(PMOS )與N通道電晶體(NM〇s )的臨界電壓(、Please refer to FIG. 1 , which is a schematic diagram of a voltage reference source principle. The N-channel transistor (NM〇s) has a temperature dependence dependence on the threshold voltage of the p-channel transistor (pM〇s). With this characteristic, a temperature compensation circuit can be designed. The concept is similar to the voltage reference source principle shown in Figure 1. The threshold voltage of the p-channel transistor (PMOS) and the N-channel transistor (NM〇s) (,
Vtn) 110’ 120分別經由調整係數&、κ2調整後,其溫度 係數可以互相消除’並來取得一想要的輸出參考電壓 (Vref) 130。 9 1361343 %Vtn) 110' 120 is adjusted by adjusting coefficients &, κ2, respectively, and their temperature coefficients can be canceled each other' to obtain a desired output reference voltage (Vref) 130. 9 1361343 %
請參照第2圖’其繪示為本發明一較佳實施例的一種 電壓參考源電路之電路圖。電壓參考源電路包含一維勒電 流源(Widlar Current Source ) 200以及一溫度穩定型電壓 參考源(Temperature-stable Voltage Reference) 300。維勒 電流源200與溫度穩定型電壓參考源3〇〇電性連接,其中 Q 維勒電流源200係用以供應一獨立於供應電壓之穩定偏壓 電流(Bias Current)給該溫度穩定型電壓參考源3〇〇。 維勒電流源200包含四個電晶體(μ丨、M2、M3、M4) 211〜214以及一電阻器(R) 215。每一電晶體211〜214分 別包含一源極、一汲極以及一閘極。在本實施例中,第一、 第二電晶體(Μ〗、M?〇,:2:1.1,2丨2分別為N通道電晶體 (NM0S ).’第二、箄:勢零':曰⑤韓(m3、m4 ) 213,214分別為 P通道電晶體:(乂 :Please refer to FIG. 2, which is a circuit diagram of a voltage reference source circuit according to a preferred embodiment of the present invention. The voltage reference source circuit includes a Widlar Current Source 200 and a Temperature-Stable Voltage Reference 300. The Ville source 200 is electrically connected to a temperature-stabilized voltage reference source 3, wherein the Q-Wuler current source 200 is used to supply a stable bias current (Bias Current) independent of the supply voltage. Reference source 3〇〇. The Weiler current source 200 includes four transistors (μ丨, M2, M3, M4) 211 to 214 and a resistor (R) 215. Each of the transistors 211 to 214 includes a source, a drain, and a gate, respectively. In this embodiment, the first and second transistors (Μ, M?〇, 2:1.1, 2丨2 are respectively N-channel transistors (NM0S). 'Second, 箄: potential zero': 曰5 Han (m3, m4) 213, 214 are P-channel transistors: (乂:
第一電晶、气.^|_學L1之源極端接至一參考訊號端 (如·接地,V〗s襄:閘極鳴與没極端相連接並與第二 電晶體(M2) .212之閘極端電性連接。第二電晶體(Μ」 2i2之源極端與電阻器(R)215之一端電性連接,電阻器 ⑻215之另一端接至一參考訊號端(如:接地端或I)。 第三、第四電晶體(m3'M4)213,214之源極端接至 -電壓源(vdd)’第三電晶體(μ。213之汲極端與第一 電晶體(M丨)211之汲極端電性連接。第三、第四電晶體 ^3、河4)213’214之閘極端、第四電晶體(队)214之 汲極端以及第二電晶體(m2) 212之汲極端相連接形成 -端點A。其中第三 '第四電晶體(%、213,214形 10 1361343 成一電流鏡(Current Mirror)架構,產生兩電流值相同之 電流(I丨、12) 221,222,其以數學式表示如下: /2 =-----L(1_ 丄 μ^^Ψ/L) RlK 4I} (3) 其中,Κ為第一電晶體(Μ, ) 211之W/L和第二電晶 體(M2) 212之W/L的比值,且忽略基板電屋效應(β〇Ζ Effect)。其中W和L分別為各電晶體的閘極寬度與長度^ 為單位面積的氧化層電容。a為電子的移動率 (mobility)。R為電阻器215之電阻值。由式(3)中可看 出電流(h) 222獨立於供應電壓,因此,維勒電流源2〇〇 電路架構為一供應穩定參考電壓之電壓參考源電路。. &度穩定型電壓參考源3〇〇包含四個電晶體(M^、 M6、M7 ' M8) 31卜314。每一電晶體311〜314分別包含一 源極 '一汲極以及一閘極。在本實施例中,第五、第六以 及第八電晶體(厘5、]\16、河8)311,312,314分別為1>通道 電晶體(PMOS)’第七電晶體(Μ?) 313為N通道電晶體 (NMOS)。 第五、第六電晶體(m5、m6) 311,312之源極端接至 電壓源(Vdd ),其閘極端相連接並接至端點A,用以接 收維勒電流源200所提供之獨立於供應電壓之偏壓電流 (BiaSCurrent)e第五電晶體(M5)311之汲極端與第七電 晶體(Μ?) 313之汲極端相連接。第六電晶體(m6) 312 之汲極端、第七電晶體(Μ?) 313之閘極端與第八電晶體 (Ms) 314之源極端相連接,形成一參考電壓(Vref)端。 第七電晶體(M7) 313之源極端與第八電晶體(M8) 314 之間極端相連接至參考訊號端(如:接地端或Vss)。第八 電晶體(M8) 314之汲極端接至參考訊號端(如:接地端 或 Vss) » 在本實施例中,由於第七、第八電晶體(M7、M8) 313, 314之閘極與源極為並聯形態,因此兩者的閘-源極電壓 (Gate-Source Voltage, VGS)相同,用以提供了臨界電壓 (Threshold Voltage)與移動率(mobility)隨溫度變動的 一溫度補償機制β當第七、第八電晶體(M7、M8) 313, 314 工作於飽和區時’由於相同大小的偏壓電流(Bias current) ’因此第七、第八電晶體(m7 ' M8) 313,314之 汲極電流(1〇7、Ids )之大小亦相同,如式(4 )和式(5 ) 所示: I〇7=~2 ^nC〇x~l^GS7 ~ Vtn^2 = \0^57 - vtn)2 (4) 1〇8 = j ^Pcoxj(yCS8 - = -2^(VCS8 - v^f ⑸ 其中’ 和召p分別為N通道電晶體與p通道電晶體的 增益因數(gain factor)。 第七電晶體(Μ?) 313的閘-源極電壓(VGS)與第八 電晶體(Ms) 314的源-閘極電壓(vSG)大小相同,因此 讓第七、第八電晶體(、Ms ) 313,314之没極電流相等 (Id7=Ids ),進而可以得到一參考電壓(Vref )如式(6 ) 所示: 12 (6)1361343The first electric crystal, gas. ^|_ learning L1 source is connected to a reference signal end (such as · grounding, V〗 s: the gate is connected to the terminal and the second transistor (M2) .212 The gate is extremely electrically connected. The source of the second transistor (Μ) 2i2 is electrically connected to one end of the resistor (R) 215, and the other end of the resistor (8) 215 is connected to a reference signal terminal (eg, ground terminal or I The source of the third and fourth transistors (m3'M4) 213, 214 is connected to the - voltage source (vdd) 'the third transistor (the 汲 terminal of μ. 213 and the first transistor (M丨) 211) Extremely electrical connection. The third, fourth transistor ^3, the river 4) 213'214 gate extreme, the fourth transistor (team) 214 汲 extreme and the second transistor (m2) 212 汲 extreme connection Forming - Endpoint A. The third 'fourth transistor (%, 213, 214, 10 1361343 into a Current Mirror architecture, produces two currents of the same current value (I 丨, 12) 221, 222, which are mathematically The expression is as follows: /2 =-----L(1_ 丄μ^^Ψ/L) RlK 4I} (3) where Κ is the first transistor (Μ, ) 211 W/L and the second Crystal (M2) 212 W/L The ratio is negligible, and the gate width and length of each transistor are the oxide capacitance per unit area. a is the mobility of electrons. R is the resistance value of the resistor 215. It can be seen from the equation (3) that the current (h) 222 is independent of the supply voltage, and therefore, the Ville source current source circuit structure is a voltage reference source circuit that supplies a stable reference voltage. The & stable voltage reference source 3〇〇 contains four transistors (M^, M6, M7 'M8) 31 314. Each of the transistors 311 to 314 includes a source 'one bungee and one In the present embodiment, the fifth, sixth, and eighth transistors (PCT 5, ]\16, and River 8) 311, 312, and 314 are respectively 1 > channel transistor (PMOS) 'seventh transistor (Μ ?) 313 is an N-channel transistor (NMOS). The fifth and sixth transistors (m5, m6) 311, 312 are connected to a voltage source (Vdd), and their gate terminals are connected and connected to terminal A. It is used to receive the bias current (BiaSCurrent) e of the fifth transistor (M5) 311 which is independent of the supply voltage provided by the Villet current source 200. Connected to the 汲 terminal of the seventh transistor (Μ?) 313. The 汲 extreme of the sixth transistor (m6) 312, the gate terminal of the seventh transistor (Μ?) 313, and the eighth transistor (Ms) 314 The source terminals are connected to each other to form a reference voltage (Vref) terminal. The source terminal of the seventh transistor (M7) 313 and the eighth transistor (M8) 314 are connected to the reference signal terminal (eg, ground terminal or Vss). The eighth transistor (M8) 314 is connected to the reference signal terminal (such as ground terminal or Vss). In this embodiment, the gates of the seventh and eighth transistors (M7, M8) 313, 314 are It is in parallel with the source, so the gate-source voltage (VGS) is the same, which provides a temperature compensation mechanism for the threshold voltage and mobility to change with temperature. When the seventh and eighth transistors (M7, M8) 313, 314 operate in the saturation region, 'because of the same magnitude of bias current (Bias current)', therefore the seventh and eighth transistors (m7 'M8) 313, 314 The magnitude of the zeta current (1〇7, Ids) is also the same, as shown by equations (4) and (5): I〇7=~2 ^nC〇x~l^GS7 ~ Vtn^2 = \0 ^57 - vtn)2 (4) 1〇8 = j ^Pcoxj(yCS8 - = -2^(VCS8 - v^f (5) where ' and call p are the gain factors of the N-channel transistor and the p-channel transistor, respectively ( Gain factor. The gate-source voltage (VGS) of the seventh transistor (??) 313 is the same as the source-gate voltage (vSG) of the eighth transistor (Ms) 314, so let the seventh and eighth Transistor (, Ms) The immersion currents of 313, 314 are equal (Id7=Ids), and a reference voltage (Vref) can be obtained as shown in equation (6): 12 (6) 1136343
從式(6)中可看出每一個變數皆為溫度的函數,換 句話說可以把移動率依存性完全排除掉。臨#電壓 vTP)的變動與溫度的變化為一線性關係,1^河〇3與1>河〇3 料率分別為·〇 13niV/t_2mVrc。這意謂著式⑷的 分子中’第一項與第二項為反號(〇pp〇sitesign),也就是 一個為正號、一個為負號,藉由適當地選擇在溫度範圍内 式(6)中的增益因數可把溫度漂移所造成的變動最小化。 。月參照第3圖,其繪示為本發明另一較佳實施例的一 種電壓參考源電路之電路圖。電壓參考源電路包含六個電 晶體(Μ,、M2、M3、M4 ' M5、M6) 411 〜416 ' — 電阻器 (R) 417以及一電容器418。每一電晶體411〜410分別包It can be seen from equation (6) that each variable is a function of temperature, in other words, the mobility dependency can be completely eliminated. The change of the voltage #voltage vTP is linear with the change of temperature, and the rate of 1^河〇3 and 1> River 〇3 is 〇13niV/t_2mVrc. This means that in the numerator of equation (4), the first term and the second term are inverse numbers (〇pp〇sitesign), that is, one is a positive sign and one is a negative sign, by appropriately selecting the formula in the temperature range ( The gain factor in 6) minimizes variations in temperature drift. . Referring to Figure 3, there is shown a circuit diagram of a voltage reference source circuit in accordance with another embodiment of the present invention. The voltage reference source circuit includes six transistors (Μ, M2, M3, M4 'M5, M6) 411 to 416' - a resistor (R) 417 and a capacitor 418. Each of the transistors 411 to 410 is separately packaged
含一源極、一汲極以及一閘極。在本實施例中,第一、第 二電晶體(Μ!、Μ3 ) 411,413分別為Ν通道電晶體 (NMOS ) ’第二、第四、第五、第六電晶體(μ2、μ4、 Μ5'Μ6)412,414,415,416 分別為 ρ 通道電晶體(pm〇s)。 第一電晶體(Μ, ) 411之源極端與第二電晶體(m2 ) 412之閘極端相連接至一參考訊號端(如:接地端或Vss), 第一、第三、第四、第五、.第六電晶體(Μ丨、M3、M4、 M5、M6)411,413, 414, 415, 416 之閘極端、第二電晶體(m2) 412之源極端以及第五電晶體(m5) 413之汲極端相連接, 形成一參考電壓(VREF)端》第二電晶體(m2) 412之汲 13 極端連接至一參考訊號端(如:接地端或vss)。第一電晶 體(411之汲極端與第四電晶體(m4) 414之汲極端 相連接。 第三電晶體(M3) 413之汲極端與第六電晶體(M6) 416之汲極端相連接。第四、第五、第六電晶體(m4、M5、 M6) 414, 415, 416之源極端接至一電壓源(vdd)。第三電 晶體(Ms) 413之源極端與電阻器(r) 417之一端電性連 接,電阻器(R) 417之另一端接至一參考訊號端(如:接 地端或Vss)。電容器418之一端接至參考電壓(vREF)端, 其另一端接至一參考訊號端(如:接地端或%〇。 在本實施例中,第一、第三、第四、第六電晶體(Μι、 Μ3、Μ4、Μδ) 411,413, 414, 416 以及電阻器(R) 417 組 成維勒電流源(Widlar Current Source )電路架構,第一、 第一第四、第五電晶體 415以及電容器418組成一溫度穩定型電壓參考源 (Temperature-stable Voltage Reference)電路架構,其中 維勒電流㈣用以供應溫度穩定型電Μ參考源-獨立於 供應電壓之穩定偏壓電流(Bias Current )。 同樣地,根據式⑴、式⑷以及式(6)可知,維 勒電机源電路架構提供—獨立於供應電壓之電流(U, 上第一電晶體(Ml) 411與第二電晶體(M2) 412背對 背並聯連接,使得源·閉極電壓(VSG)大小相同,因此讓 所有的電流皆相同’用以平衡受溫度影響產生的變動,進 而可提供—獨立於供應電壓與不受溫度影響的穩定參考 14 1361343 電麼(Vref )。 請參照第4圖’其繪示為第3圖的電壓參考源電路之 模擬曲線圖。第4圖中為在不同的製程邊界(pr〇cess Corners )中溫度變化對輸出電壓的模擬曲線。製程邊界包 含 TT ( Typical-Typical Model) 410、FF ( Fast-Fast Model) 420、SS ( Slow-Slow Model) 430。在本實施例中,電壓參 考源電路之供應電壓0.9V、靜態電流,可產生大 約557mV之平均參考電壓, 請參照第5a圖和第5b圖’其繪示為第3圖的電壓參 考源電路之模擬曲線圖。第5a圖為在最大供應電壓(ι.4ν) 之情況下’在不同的製程邊界(Process Corners )中溫度 變化對輸出電壓的模擬曲線。製程邊界包含ττ (Typical-Typical Model) 511 ' FF ( Fast-Fast Model) 521 ^ SS( Slow-Slow Model)53l。等外圖為在最小供應電壓(0.7) 之情況下’在不同的製程邊界(Process Corners )中溫度 變化對輸出電壓的模擬曲線。製程邊界包含ττ (Typical-Typical Model) 512、FF( Fast-Fast Model) 522、 SS ( Slow-Slow Model) 532 ® 溫度變化範圍在-70°C〜15(TC之間之輸出電壓的變動 量為±115"V或(Χδρρπι/Ι。隨著供應電壓從0.7V到 1.4V,其最大的溫度係數只有2 25ppm/〇c。 雖然本發明已以數較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍内,當可作各種之更動與潤飾,因此本發明之保 15 1361343 濩範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 為讓本發明之上述和其他目的、特徵'優點與實施例 能更明顯易懂’所附圖式之詳細說明如下: 第1圖係繪示為一種電壓參考源觀念之示意圖。 第2圖係繪示依繪示為本發明一較佳實施例的一種電 壓參考源電路之電路圖。 第3圖係繪示為本發明另一較佳實施例的—種電塵參 考源電路之電路圖。 第4圖係繪示為第3圖的電壓參考源電路之模擬曲線 圖。 第5a圖和第5b圖係繪示分別為第3圖的電壓參考源 電路之模擬曲線圖。 【主要元件符號說明】 110 :臨界電壓 120 :臨界電壓 111 :係數 121 ·係數 130 :輸出參考電壓 200 :維勒電流源 211〜214 :電晶體 215 :電阻器 221〜222 :電流 311〜314 :電晶體 300 :溫度穩定型電壓參考源 411〜416 :電晶體 417 :電阻器 418 :電容器 41CT:製程邊界 420 :製程邊界 1361343 430:製程邊界 511〜512:製程邊界 521〜522:製程邊界 531〜532:製程邊界It contains a source, a drain and a gate. In this embodiment, the first and second transistors (Μ!, Μ3) 411, 413 are respectively Ν channel transistors (NMOS) 'second, fourth, fifth, sixth transistors (μ2, μ4, Μ5'Μ6) 412, 414, 415, 416 are ρ channel transistors (pm〇s), respectively. The source terminal of the first transistor (Μ, ) 411 is connected to the gate terminal of the second transistor (m2) 412 to a reference signal terminal (eg, ground terminal or Vss), first, third, fourth, 5. The sixth transistor (Μ丨, M3, M4, M5, M6) 411, 413, 414, 415, 416 gate terminal, the second transistor (m2) 412 source terminal and the fifth transistor (m5) 413 is extremely connected to form a reference voltage (VREF) terminal. The second transistor (m2) 412 is connected to a reference signal terminal (such as ground terminal or vss). The first transistor (the 汲 terminal of 411 is connected to the 汲 terminal of the fourth transistor (m4) 414. The 汲 terminal of the third transistor (M3) 413 is connected to the 汲 terminal of the sixth transistor (M6) 416. The fourth, fifth, sixth transistor (m4, M5, M6) 414, 415, 416 source terminal is connected to a voltage source (vdd). The third transistor (Ms) 413 source terminal and resistor (r One end of the resistor 417 is electrically connected, and the other end of the resistor (R) 417 is connected to a reference signal terminal (such as ground terminal or Vss). One of the capacitors 418 is terminated to the reference voltage (vREF) terminal, and the other end thereof is connected to a reference signal terminal (eg, ground terminal or %〇. In this embodiment, the first, third, fourth, and sixth transistors (Μι, Μ3, Μ4, Μδ) 411, 413, 414, 416 and the resistor The (R) 417 constitutes a Widlar Current Source circuit structure, and the first, first, fourth, and fifth transistors 415 and the capacitor 418 form a temperature-stabilized voltage reference circuit. Architecture, where Villeer current (4) is used to supply a temperature-stable electrical reference source - independent of The steady-state bias current (Bias Current) should be the same. According to equations (1), (4) and (6), the Viller motor source circuit architecture provides a current independent of the supply voltage (U, the first The crystal (Ml) 411 and the second transistor (M2) 412 are connected back-to-back in parallel, so that the source and the closing voltage (VSG) are the same in size, so that all the currents are the same 'to balance the fluctuation caused by the temperature, and then Provides - a stable reference to the supply voltage and temperature-independent 14 1361343 (Vref). Refer to Figure 4, which is a simulation of the voltage reference source circuit shown in Figure 3. Figure 4 Simulation curve of temperature change versus output voltage at different process boundaries (pr〇cess Corners). Process boundaries include TT (Typical-Typical Model) 410, FF (Fast-Fast Model) 420, SS (Slow-Slow Model) 430 In this embodiment, the supply voltage of the voltage reference source circuit is 0.9V, and the quiescent current can generate an average reference voltage of about 557mV. Please refer to FIG. 5a and FIG. 5b, which are shown as the voltage reference source of FIG. Circuit The simulation curve. Figure 5a is the simulation curve of the temperature change to the output voltage at different process corners in the case of the maximum supply voltage (ι.4ν). The process boundary contains ττ (Typical-Typical Model) 511 'FF (Fast-Fast Model) 521 ^ SS (Slow-Slow Model) 53l. The external plot is a simulated curve of temperature change versus output voltage at different process corners in the case of a minimum supply voltage (0.7). The process boundary includes ττ (Typical-Typical Model) 512, FF (Fast-Fast Model) 522, SS (Slow-Slow Model) 532 ® temperature variation range from -70 ° C to 15 (the variation of the output voltage between TC) Is ±115"V or (Χδρρπι/Ι. As the supply voltage is from 0.7V to 1.4V, its maximum temperature coefficient is only 2 25ppm/〇c. Although the invention has been disclosed above by several preferred embodiments, it is not The present invention is intended to be limited to the scope of the present invention, and the scope of the invention is as described in the appended claims. The above description of the above and other objects, features, advantages and embodiments of the present invention will be more clearly understood. The detailed description of the drawings is as follows: Figure 1 is a 2 is a circuit diagram of a voltage reference source circuit according to a preferred embodiment of the present invention. FIG. 3 is a diagram showing another preferred embodiment of the present invention. Electric dust reference source circuit Fig. 4 is a simulation diagram of the voltage reference source circuit of Fig. 3. Fig. 5a and Fig. 5b are diagrams showing the simulation of the voltage reference source circuit of Fig. 3, respectively. DESCRIPTION OF SYMBOLS] 110: threshold voltage 120: threshold voltage 111: coefficient 121 · coefficient 130: output reference voltage 200: Weiler current source 211 to 214: transistor 215: resistors 221 to 222: currents 311 to 314: transistor 300 : Temperature Stabilized Voltage Reference Sources 411 to 416: Transistor 417: Resistor 418: Capacitor 41CT: Process Boundary 420: Process Boundary 1613343 430: Process Boundary 511 to 512: Process Boundaries 521 to 522: Process Boundaries 531 to 532: Process boundary
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TWI361343B true TWI361343B (en) | 2012-04-01 |
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TW97113853A TWI361343B (en) | 2008-04-16 | 2008-04-16 | Voltage reference circuit |
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TWI605325B (en) * | 2016-11-21 | 2017-11-11 | 新唐科技股份有限公司 | Current source circuit |
TWI789671B (en) * | 2021-01-04 | 2023-01-11 | 紘康科技股份有限公司 | Reference circuit with temperature compensation |
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