WO2023226640A1 - 用于制造Mini-LED背光模组中单线链式通信链路的LED驱动芯片 - Google Patents

用于制造Mini-LED背光模组中单线链式通信链路的LED驱动芯片 Download PDF

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WO2023226640A1
WO2023226640A1 PCT/CN2023/089620 CN2023089620W WO2023226640A1 WO 2023226640 A1 WO2023226640 A1 WO 2023226640A1 CN 2023089620 W CN2023089620 W CN 2023089620W WO 2023226640 A1 WO2023226640 A1 WO 2023226640A1
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input
output port
port
communication link
output
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PCT/CN2023/089620
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English (en)
French (fr)
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孔令新
王乃龙
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北京芯格诺微电子有限公司
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Publication of WO2023226640A1 publication Critical patent/WO2023226640A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection

Definitions

  • the present invention relates to the field of integrated circuits and communication technology, and in particular to an LED driver chip used for manufacturing a single-line chain communication link in a Mini-LED backlight module.
  • Mini-LED backlight modules need to be equipped with a large number of driver chips to control the working status of LED lamp beads.
  • FIG. 1 a single-wire chain communication link mode of a driver chip of a Mini-LED backlight module in the prior art is shown.
  • the above link form has greatly simplified the wiring complexity, it still has defects. That is, when connecting according to the above method, since the input port and output port of each driver chip are located at fixed positions on the chip, chips in different rows A certain angle of rotation is required, which adds cost to chip placement. Secondly, if one chip in the link is damaged, subsequent chips will not be able to communicate normally.
  • the technical purpose to be achieved by the present invention is to provide an LED driver chip for manufacturing a single-line chain communication link of a Mini-LED backlight module.
  • the LED driver chip can simplify the production of Mini-LED backlight modules.
  • the LED lamp bead driver chip is configured during the module manufacturing process.
  • the present invention provides an LED driver chip for manufacturing a single-line chain communication link in a Mini-LED backlight module.
  • the LED driver chip includes a main controller 1, a first input and output port 2, a third A port detection circuit 3, a second input/output port 4 and a second port detection circuit 5; the first input/output port 2 and the second input/output port 4 are in a high impedance state when idle.
  • the first input/output port 2 or the second input/output port 4 When one of the input/output port 2 and the second input/output port 4 detects a change in level, the first input/output port 2 or the second input/output port 4 whose level changes is controlled by the main controller 1 Set as an input port and start receiving data; at the same time, the other one of the first input and output port 2 and the second input and output port 4 is set as an output port by the main controller 1, and the main controller 1 will need to send Data is sent to the output port and transmitted to the next LED driver chip on the single wire chain communication link.
  • the first port detection circuit 3 and the second port detection circuit 5 have the same circuit structure;
  • the circuit structure includes a data input detection terminal 10, an enable signal terminal 20, and an operation logic Gate 30, first inverter 40, second inverter 50, MOS transistor 60 and pull-up resistor 70;
  • the data input detection terminal 10 is connected to the output terminal of the AND logic gate 30 .
  • One output terminal of the AND logic gate 30 is connected to the output terminal of the first inverter 40 .
  • the AND logic gate 30 The other output terminal is connected to the enable signal terminal 20, the input terminal of the second inverter 50 is connected to the enable signal terminal 20, and the output terminal of the second inverter 50 is connected to the enable signal terminal 20.
  • the gate of the MOS transistor 60 and the source of the MOS transistor 60 are connected to ground.
  • the drain of the MOS transistor 60 is connected to the input terminal of the first inverter 40.
  • One end of the pull-up resistor 70 is connected to the ground.
  • the drain of the MOS transistor 60 is connected, and the other end is connected to an external pull-up high level; the drain of the MOS transistor 60 is also connected to the input and output ports, that is, the MOS transistor in the first port detection circuit 3
  • the drain of the MOS transistor 60 is connected to the first input and output port 2
  • the drain of the MOS transistor 60 in the second port detection circuit 5 is connected to the second input and output port 4 .
  • the first input and output port 2 and the second input and output port 4 are arranged at two rotationally symmetrical pin positions of the LED driver chip.
  • Another aspect of the present invention is to provide a single-wire chain communication link for manufacturing Mini-LED backlight modules.
  • the single-wire chain communication link includes a host and multiple slaves.
  • the slaves It is composed of the aforementioned LED driver chip.
  • the host uses its data receiving end to reversely transmit the data to be transmitted to the single-wire chain communication link. road.
  • one or more embodiments of the present invention may have the following inventive points and advantages:
  • the input port and output port of the LED driver chip of the present invention can be adaptively configured according to actual communication conditions, thereby simplifying the workload of placing and configuring the LED driver chip during the manufacturing process of the Mini-LED backlight module.
  • Figure 1 is a schematic diagram of a single-line chain communication link in a Mini-LED backlight matrix in the prior art
  • Figure 2 is a schematic diagram of the single-line chain communication link in the Mini-LED backlight matrix of the present invention
  • Figure 3 is a schematic structural diagram of the LED driver chip in the Mini-LED backlight matrix of the present invention.
  • Figure 4 is a schematic structural diagram of the port detection circuit in the LED driver chip of the present invention.
  • Figure 5 is a schematic structural diagram of a single-line chain communication link according to another embodiment of the present invention.
  • Figure 6 is a schematic diagram of data transmission when a damaged chip occurs in the single-wire chain communication link of the present invention.
  • the single-wire chain communication link and LED driver chip of this embodiment include a main controller 1, a first input and output port 2, a first port detection circuit 3, and a third Two input and output ports 4 and a second port detection circuit 5.
  • the first input and output port 2 and the second input and output port 4 are not designated as fixed input ports or output ports, but based on the detected Changes to the level of the signal adaptively configure it as an input port or an output port. That is, the two ports of each driver chip are bidirectional IO ports and wait for input signals. When one port detects an input signal, it receives data on that port and outputs it on the other port.
  • the first input and output port 2 and the second input and output port 4 of the LED driver chip are in a high-impedance output state when idle, and are externally pulled up to a high level (or pulled down to a low level).
  • the input and output port is defined as an input port.
  • the other one of the first input and output port 2 and the second input and output port 4 is defined as an output port, and the data that needs to be sent is sent to the other input and output port, It is output to the next LED driver chip.
  • the first port detection circuit 3 and the second port detection circuit 5 in this embodiment have the same circuit structure.
  • the circuit structure includes a data input detection terminal 10, an enable signal terminal 20, an AND logic gate 30, a first inverter 40, a second inverter 50, a MOS transistor 60 and a pull-up Resistor 70.
  • the data input detection terminal 10 is connected to the output terminal of the AND logic gate 30
  • one output terminal of the AND logic gate 30 is connected to the output terminal of the first inverter 40 .
  • the AND logic gate The other output terminal of 30 is connected to the enable signal terminal 20, the input terminal of the second inverter 50 is connected to the enable signal terminal 20, and the output terminal of the second inverter 50 is connected to The gate of the MOS transistor 60 and the source of the MOS transistor 60 are connected to ground.
  • the drain of the MOS transistor 60 is connected to the input terminal of the first inverter 40 .
  • One end of the pull-up resistor 70 The drain of the MOS transistor 60 is connected, and the other end is connected to the pull-up high level VDD.
  • the drain of the MOS transistor 60 is also connected to the input and output port, that is, the drain of the MOS transistor 60 in the first port detection circuit 3 is connected to the first input and output port 2, and the second port detection circuit 5 The drain of the MOS transistor 60 in is connected to the second input-output port 4 .
  • the enable signal terminal 20 remains in a high level state, whereby the The MOS transistor 60 is in the off state because the gate is in a low level state.
  • the first input and output port 2 or the second input and output port 4 are in a high level due to the pull-up resistor 70 and the external pull-up high level VDD. flat state.
  • the data input detection terminal 10 when the first input and output port 2 or the second input and output port 4 are in a low level state, the data input detection terminal 10 will output a high level signal, and this signal is input to the host
  • the controller 1 sets the input and output port connected to the port detection circuit where the data input detection terminal 10 outputting the high-level signal is located as an input port by the main controller, and keeps the port detection circuit enabled.
  • the signal terminal 20 remains in a high level state to ensure that the accuracy of the input data is not affected.
  • the main controller 1 since the communication chip in the present invention is only provided with two input and output ports, the main controller 1 sets the other input and output port as an output port.
  • the data signal processed by the main controller 1 is output by the enable signal terminal 20 in the port detection circuit set as the output port side, that is, when the enable signal terminal 20 is high level, the output port is pulled up to high level, when the enable signal terminal 20 is low level, the output port is pulled down to low level. In this way, the signal to be output by the main controller 1 can be output to the output port.
  • the LED driver chip in the present invention does not specifically specify the first input and output port 2 or the second input and output port 4 as an input port or an output port, when When the first input and output port 2 and the second input and output port 4 on the LED driver chip of the present invention are arranged at rotationally symmetrical pin positions on the chip, the communication chip is undergoing a welding and configuration process on the LED backlight board. can be placed arbitrarily regardless of the chip direction, as shown in Figure 5. This will greatly reduce the construction costs consumed in the manufacturing process of LED backlight panels.
  • the communication host can use its original data receiving end to reversely transmit the data to be transmitted.
  • the data ports of the communication host become data output ports, and data is output to the first two directions of the communication link. This ensures that other LED driver chips except the damaged LED driver chip can receive the signal sent by the communication host.
  • the communication host will be unable to receive data from the slave. But in special circumstances, the above communication method can play a certain role, such as when detecting LED backlight panels.

Abstract

一种用于制造Mini-LED背光模组中单线链式通信链路的LED驱动芯片，LED驱动芯片包括主控制器（1）、第一输入输出端口（2）、第一端口侦测电路（3）、第二输入输出端口（4）以及第二端口侦测电路（5）；第一输入输出端口（2）与第二输入输出端口（4）在空闲时为高阻状态，当第一输入输出端口（2）与第二输入输出端口（4）中的一个被检测到电平发生变化时，则电平发生变化的第一输入输出端口（2）或第二输入输出端口（4）被主控制器（1）设置为输入端口，并开始接收数据；同时，第一输入输出端口（2）与第二输入输出端口（4）中的另一个则被主控制器（1）设置为输出端口，主控制器（1）将需要发送的数据发送到输出端口，并传输至单线链式通信链路上的下一个LED驱动芯片。

Description

用于制造Mini-LED背光模组中单线链式通信链路的LED驱动芯片 技术领域
本发明涉及集成电路与通讯技术领域，尤其涉及一种用于制造Mini-LED背光模组中单线链式通信链路的LED驱动芯片。
背景技术
随着LCD显示技术的发展，使用Mini-LED背光矩阵作为显示面板背光源的显示技术已经成为当前重要技术发展方向之一。目前主流的显示设备厂商采用的Mini-LED背光模组相对于传统LED背光模组方案，具有尺寸更小，可控分区数量更多，混光距离更短的优点，故显示效果更佳。Mini-LED背光模组中需要配置数量较多的驱动芯片对LED灯珠的工作状态进行控制，现有技术中有使用一颗驱动芯片来控制邻近的四颗LED灯珠的实施方式。而对于数量众多的驱动芯片而言，采用单线链式通信方式会极大降低布线复杂程度。如图1所示的现有技术中的一种Mini-LED背光模组的驱动芯片的单线链式通信链路方式。上述链路形式虽然已经大大简化了连线复杂度但仍有缺陷，即按照以上方式连线时，由于每个驱动芯片的输入端口和输出端口是位于芯片上固定位置的，因此不同行的芯片需要旋转一定的角度，这给芯片摆放增加了成本。其次如果链路中有一颗芯片损坏了，那么其后的芯片将无法正常通信。
由此可见，现有技术中需要一种能够克服上述缺陷，能够简化在Mini-LED背光模组在制造过程中对LED灯珠驱动芯片进行配置所需工作的一种新的单线链式通讯芯片。
发明内容
本发明所要实现的技术目的在于提供一种用于制造Mini-LED背光模组的单线链式通信链路的LED驱动芯片，该LED驱动芯片能够简化在Mini-LED背光 模组在制造过程中对LED灯珠驱动芯片进行配置。
基于上述技术目的，本发明提供一种用于制造Mini-LED背光模组中单线链式通信链路的LED驱动芯片，所述LED驱动芯片包括主控制器1、第一输入输出端口2、第一端口侦测电路3、第二输入输出端口4以及第二端口侦测电路5；所述第一输入输出端口2与第二输入输出端口4在空闲时为高阻状态，当所述第一输入输出端口2与第二输入输出端口4中的一个被检测到电平发生变化时，则该电平发生变化的所述第一输入输出端口2或第二输入输出端口4被主控制器1设置为输入端口，并开始接收数据；同时，所述第一输入输出端口2与第二输入输出端口4中的另一个则被主控制器1设置为输出端口，主控制器1将需要发送的数据发送到所述输出端口，并传输至单线链式通信链路上的下一个LED驱动芯片。
在一个实施例中，所述第一端口侦测电路3及第二端口侦测电路5具有相同的电路结构；该电路结构包括有数据输入侦测端10、使能信号端20、与运算逻辑门30、第一反相器40、第二反相器50、MOS晶体管60和上拉电阻70；
所述数据输入侦测端10连接与运算逻辑门30的输出端，所述与运算逻辑门30的一个输出端连接于所述第一反相器40的输出端，所述与运算逻辑门30的另一个输出端连接于所述使能信号端20，所述第二反相器50的输入端连接所述所述使能信号端20，所述第二反相器50的输出端连接所述MOS晶体管60的栅极，所述MOS晶体管60的源极接地连接，所述所述MOS晶体管60的漏极与第一反相器40的输入端连接，所述上拉电阻70的一端与所述MOS晶体管60的漏极连接，另一端与外部上拉高电平连接；所述MOS晶体管60的漏极还与输入输出端口连接，即第一端口侦测电路3中的所述MOS晶体管60的漏极与第一输入输出端口2连接，第二端口侦测电路5中的所述MOS晶体管60的漏极与第二输入输出端口4连接。
在一个实施例中，所述第一输入输出端口2和第二输入输出端口4设置在LED驱动芯片的旋转对称的两个管脚位置。
本发明的另一方面还在于提供一种用于制造Mini-LED背光模组的单线链式通信链路，所述单线链式通信链路中包括一个主机与多个从机，所述从机由前述的LED驱动芯片构成。
在一个实施例中，当所述单线链式通信链路中的一个从机损坏且无法接收或发送数据时，所述主机使用其数据接收端将要传输的数据反向传输向单线链式通信链路。
与现有技术相比，本发明的一个或多个实施例可以具有如下发明点及优势：
本发明的LED驱动芯片的输入端口和输出端口可以根据实际通信情况进行自适应配置，从而简化了Mini-LED背光模组在制造过程中对LED驱动芯片进行摆放配置的工作量。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例共同用于解释本发明，并不构成对本发明的限制。在附图中：
图1是现有技术中的Mini-LED背光矩阵中的单线链式通信链路示意图；
图2是本发明的Mini-LED背光矩阵中的单线链式通信链路示意图；
图3是本发明的Mini-LED背光矩阵中的LED驱动芯片结构示意图；
图4是本发明的LED驱动芯片中端口侦测电路的结构示意图；
图5是本发明的另一实施方式的单线链式通信链路结构示意图；
图6是本发明的单线链式通信链路中出现损坏芯片时的数据传输示意图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，以下结合附图对本发明作进一步地详细说明。
实施例
如图2和3所示的本实施例的单线链式通信链路及LED驱动芯片，所述LED驱动芯片包括主控制器1、第一输入输出端口2、第一端口侦测电路3、第二输入输出端口4以及第二端口侦测电路5。本实施例中，所述第一输入输出端口2与第二输入输出端口4并不指定为固定输入端口或输出端口，而是根据端口所检测 到的电平信号的变化自适应地将其配置为输入端口或输出端口。即每个驱动芯片的两个端口均为双向IO端口，并等待输入信号，当一个端口检测到输入信号后，即在该端口接收数据，并在另外一端口输出。
本实施例中LED驱动芯片的所述第一输入输出端口2与第二输入输出端口4在空闲时为高阻输出状态，其被外部上拉为高电平(或下拉为低电平)，当所述第一输入输出端口2与第二输入输出端口4中的一个被检测到电平变低(或变高)时，即认为有输入信号，则该输入输出端口被定义为输入端口，并由该端口开始接收数据；同时，所述第一输入输出端口2与第二输入输出端口4中的另一个则被定义为输出端口，并将需要发送的数据发送到另一个输入输出端口，由其向下一个LED驱动芯片输出。
本实施例中的第一端口侦测电路3及第二端口侦测电路5具有相同的电路结构。如图4所示，该电路结构包括有数据输入侦测端10、使能信号端20、与运算逻辑门30、第一反相器40、第二反相器50、MOS晶体管60和上拉电阻70。其中所述数据输入侦测端10连接与运算逻辑门30的输出端，所述与运算逻辑门30的一个输出端连接于所述第一反相器40的输出端，所述与运算逻辑门30的另一个输出端连接于所述使能信号端20，所述第二反相器50的输入端连接所述所述使能信号端20，所述第二反相器50的输出端连接所述MOS晶体管60的栅极，所述MOS晶体管60的源极接地连接，所述所述MOS晶体管60的漏极与第一反相器40的输入端连接，所述上拉电阻70的一端与所述MOS晶体管60的漏极连接，另一端与上拉高电平VDD连接。同时所述MOS晶体管60的漏极还与输入输出端口连接，即第一端口侦测电路3中的所述MOS晶体管60的漏极与第一输入输出端口2连接，第二端口侦测电路5中的所述MOS晶体管60的漏极与第二输入输出端口4连接。
本实施例中，当所述第一输入输出端口2与第二输入输出端口4处于空闲状态时，即没有输入输出信号时，所述使能信号端20保持高电平状态，由此所述MOS晶体管60由于栅极处于低电平状态而处于关断状态，此时的第一输入输出端口2或第二输入输出端口4由上拉电阻70和外部上拉高电平VDD作用处于高电平状态。
在所述使能信号端20保持高电平状态下时，一旦所述第一输入输出端口2或 第二输入输出端口4处于低电平状态，则表明该输入输出端口一定是被其他外部信号下拉造成的。结合本实施中的单线链式通讯链路的结构，可以判定一定是通信链路的上游方向的其他通信节点向当前通信节点的所述第一输入输出端口2或第二输入输出端口4输入了信号。根据上述电路结构可知，当所述第一输入输出端口2或第二输入输出端口4处于低电平状态时，则所述数据输入侦测端10将输出高电平信号，该信号输入给主控制器1后由主控制器将该输出高电平信号的所述数据输入侦测端10所在的端口侦测电路连接的输入输出端口设置为输入端口，并保持该端口侦测电路的使能信号端20保持为高电平状态，以保证不影响输入数据的准确性。同时，由于本发明中的通信芯片只设置有两个输入输出端口，因此由主控制器1将另一个输入输出端口设置为输出端口。由所述主控制器1处理后的数据信号由设置为输出端口侧的端口侦测电路中的使能信号端20进行输出，即当使能信号端20为高电平时，输出端口被上拉至高电平，当使能信号端20为低电平时，输出端口被下拉至低电平。由此可以将主控制器1要输输出的信号输出至输出端口。
由图2所示的单线链式通信链路可知，由于本发明中的LED驱动芯片并未固定的指定第一输入输出端口2或第二输入输出端口4具体为输入端口或输出端口，因此当本发明中的LED驱动芯片上的第一输入输出端口2和第二输入输出端口4设置在芯片上旋转对称的管脚位置上时，所述通信芯片在向在LED背光板上进行焊接配置过程中是可以不考虑芯片方向进行随意摆放的，如图5所示。这将大大减少LED背光板在制造过程中所消耗的施工成本。
如图6所示，由本实施例中的LED驱动芯片所构成的单线链式通信链路，在其通信链路上出现某一通信节点的LED驱动芯片出现损坏而导致通信数据数据传输中断时，通信主机可以利用其原本的数据接收端将要传输的数据反向传输出去。这种情况下，所述通信主机的数据端口均变为数据输出端口，向通信链路的首位两个方向输出数据。从而保证除损坏的LED驱动芯片之外的其他LED驱动芯片能接收到通信主机发出的信号。当然在这种状态下，将使得通信主机无法在接收到从机发出的数据。但在特殊情况下，上述通信方式能够起到某种作用，例如LED背光板检测时。
以上所述，仅为本发明的具体实施案例，本发明的保护范围并不局限于此， 任何熟悉本技术的技术人员在本发明所述的技术规范内，对本发明的修改或替换，都应在本发明的保护范围之内。

Claims (7)

  1. 一种用于制造Mini-LED背光模组中单线链式通信链路的LED驱动芯片，其特征在于，所述LED驱动芯片包括主控制器1、第一输入输出端口2、第一端口侦测电路3、第二输入输出端口4以及第二端口侦测电路5；所述第一输入输出端口2与第二输入输出端口4在空闲时为高阻状态，当所述第一输入输出端口2与第二输入输出端口4中的一个被检测到电平发生变化时，则该电平发生变化的所述第一输入输出端口2或第二输入输出端口4被主控制器1设置为输入端口，并开始接收数据；同时，所述第一输入输出端口2与第二输入输出端口4中的另一个则被主控制器1设置为输出端口，主控制器1将需要发送的数据发送到所述输出端口，并传输至单线链式通信链路上的下一个LED驱动芯片。
  2. 根据权利要求1所述的LED驱动芯片，其特征在于，所述第一端口侦测电路3及第二端口侦测电路5具有相同的电路结构；该电路结构包括有数据输入侦测端10、使能信号端20、与运算逻辑门30、第一反相器40、第二反相器50、MOS晶体管60和上拉电阻70；
    所述数据输入侦测端10连接与运算逻辑门30的输出端，所述与运算逻辑门30的一个输出端连接于所述第一反相器40的输出端，所述与运算逻辑门30的另一个输出端连接于所述使能信号端20，所述第二反相器50的输入端连接所述所述使能信号端20，所述第二反相器50的输出端连接所述MOS晶体管60的栅极，所述MOS晶体管60的源极接地连接，所述所述MOS晶体管60的漏极与第一反相器40的输入端连接，所述上拉电阻70的一端与所述MOS晶体管60的漏极连接，另一端与外部上拉高电平连接；所述MOS晶体管60的漏极还与输入输出端口连接，即第一端口侦测电路3中的所述MOS晶体管60的漏极与第一输入输出端口2连接，第二端口侦测电路5中的所述MOS晶体管60的漏极与第二输入输出端口4连接。
  3. 根据权利要求1所述的LED驱动芯片，其特征在于，所述第一输入输出端口2和第二输入输出端口4设置在LED驱动芯片的旋转对称的两个管脚位置。
  4. 一种用于制造Mini-LED背光模组的单线链式通信链路，所述单线链式通 信链路中包括一个主机与多个从机，所述从机由权利要求1-3之一所述的LED驱动芯片构成。
  5. 根据权利要求4所述的单线链式通信链路，其特征在于，当所述单线链式通信链路中的一个从机损坏且无法接收或发送数据时，所述主机使用其数据接收端将要传输的数据反向传输向单线链式通信链路。
  6. 一种Mini-LED背光模组，其特征在于，所述造Mini-LED背光模组包括权利要求4-5之一所述的单线链式通信链路。
  7. 一种显示装置，其特征在于，所述显示装置中包括了权利要求6所述的Mini-LED背光模组。
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