WO2023225772A9 - Fully automatic method and system for testing read and write functions of dram storage cell - Google Patents

Fully automatic method and system for testing read and write functions of dram storage cell Download PDF

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Publication number
WO2023225772A9
WO2023225772A9 PCT/CN2022/094352 CN2022094352W WO2023225772A9 WO 2023225772 A9 WO2023225772 A9 WO 2023225772A9 CN 2022094352 W CN2022094352 W CN 2022094352W WO 2023225772 A9 WO2023225772 A9 WO 2023225772A9
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WO
WIPO (PCT)
Prior art keywords
read
function test
write function
silk screen
storage cell
Prior art date
Application number
PCT/CN2022/094352
Other languages
French (fr)
Chinese (zh)
Other versions
WO2023225772A1 (en
Inventor
陈焕君
牟炳叡
王自鑫
胡炳翔
杨锐佳
Original Assignee
中山大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 中山大学 filed Critical 中山大学
Priority to PCT/CN2022/094352 priority Critical patent/WO2023225772A1/en
Publication of WO2023225772A1 publication Critical patent/WO2023225772A1/en
Publication of WO2023225772A9 publication Critical patent/WO2023225772A9/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Health & Medical Sciences (AREA)
  • General Engineering & Computer Science (AREA)
  • Biophysics (AREA)
  • Computational Linguistics (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Artificial Intelligence (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • Biomedical Technology (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Health & Medical Sciences (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The present invention relates to the technical field of integrated circuit testing. Provided are a fully automatic method and system for testing read and write functions of a DRAM storage cell. The method comprises the following steps: acquiring a silk screen image of a chip to be tested, and performing recognition on the silk screen image using a ResNet, so as to obtain silk screen information; reading, according to the silk screen information and from a preset database, a read and write function test method that matches the silk screen information, and transmitting the read and write function test method to an ATE; and electrically connecting the ATE to said chip, and the ATE performing a read and write function test on said chip according to the received read and write function test method. In the present invention, the automation of the read and write function test work for a DRAM storage cell is realized, the efficiency of the read and write function test work is effectively increased, and a relatively high accuracy rate of the read and write function test is also ensured.
PCT/CN2022/094352 2022-05-23 2022-05-23 Fully automatic method and system for testing read and write functions of dram storage cell WO2023225772A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2022/094352 WO2023225772A1 (en) 2022-05-23 2022-05-23 Fully automatic method and system for testing read and write functions of dram storage cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2022/094352 WO2023225772A1 (en) 2022-05-23 2022-05-23 Fully automatic method and system for testing read and write functions of dram storage cell

Publications (2)

Publication Number Publication Date
WO2023225772A1 WO2023225772A1 (en) 2023-11-30
WO2023225772A9 true WO2023225772A9 (en) 2024-01-04

Family

ID=88918091

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/094352 WO2023225772A1 (en) 2022-05-23 2022-05-23 Fully automatic method and system for testing read and write functions of dram storage cell

Country Status (1)

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WO (1) WO2023225772A1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004012279B3 (en) * 2004-03-12 2005-06-09 Infineon Technologies Ag Self-testing method for memories embedded in semicomnductor chip using memory self-testing control with memory self-testing register for storing memory test configuration data
CN106847343A (en) * 2016-12-08 2017-06-13 上海精密计量测试研究所 The method of testing of the mram memory based on ATE
CN110961364B (en) * 2019-12-18 2022-06-17 浪潮(北京)电子信息产业有限公司 Chip full-function self-test system based on FPGA platform and method thereof

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Publication number Publication date
WO2023225772A1 (en) 2023-11-30

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