WO2023219982A1 - Dose mapping using substrate curvature to compensate for out-of-plane distortion - Google Patents
Dose mapping using substrate curvature to compensate for out-of-plane distortion Download PDFInfo
- Publication number
- WO2023219982A1 WO2023219982A1 PCT/US2023/021423 US2023021423W WO2023219982A1 WO 2023219982 A1 WO2023219982 A1 WO 2023219982A1 US 2023021423 W US2023021423 W US 2023021423W WO 2023219982 A1 WO2023219982 A1 WO 2023219982A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- map
- substrate
- curvature
- residual
- dose
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
- H10P14/6536—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light
- H10P14/6539—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light by exposure to corpuscular radiation, e.g. exposure to electrons, alpha-particles, protons or ions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
- H10P14/6536—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light
- H10P14/6542—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light by using coherent radiation, e.g. using a laser
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H10P14/6927—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
- H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/18—Manufacturability analysis or optimisation for manufacturability
Definitions
- the present embodiments relate to stress control in substrates, and more particularly to stress compensation to reduce out-of- plane distortion in substrates.
- Devices such as integrated circuits, memory devices, and logic devices may be fabricated on a substrate such as a semiconductor wafer by a combination of deposition processes, etching, ion implantation, annealing, and other processes.
- a substrate such as a semiconductor wafer by a combination of deposition processes, etching, ion implantation, annealing, and other processes.
- complete fabrication of devices and related circuitry may entail many hundreds of operations, including dozens of lithography operations.
- lithographic operations may require that a given mask to fabricate structures in a given region or level is to be aligned to preexisting structures.
- IPD in-plane distortion
- OPD out-of-plane distortion
- device processing may generate complex patterns of OPD across a wafer after at any given stage of processing that may tend to affect subsequent processing operations.
- the complex patterns of OPD may generate overlay errors in a subsequent lithographic masking operation.
- FIGs. 1A-1C illustrate principles of operation of embodiments of the disclosure
- FIGs. 2A-2F depict different representations of the OPD for a wafer at different stages of processing according to embodiments of the disclosure
- FIG 2G is the resulting IPD assuming a HOW A3 alignment scheme on a scanner.
- FIGs. 3A-5D depict a sequence of operations to determine a dose map for processing a substrate in order to compensate for substrate OPD, according to embodiments of the disclosure
- FIGs. 6A-6B depict different representations of an ion implanter, consistent with various embodiments of the disclosure.
- FIG. 7 depicts an exemplary process flow
- FIG. 8 depicts another exemplary process flow
- FIG. 9 depicts a further exemplary process flow.
- the embodiments described herein relate to techniques and apparatus for improved control of out- of-plane distortion in a substrate, and the related control of the effects of OPD on substrate processing operations, such as device fabrication.
- the present embodiments may employ novel techniques to determine dose maps to be applied to a compensation layer of a substrate by a patterning energy source, in order to better correct OPD, and thus to reduce or minimize in-plane-distortion (IPD) that affects device fabrication and other patterning procedures.
- patterning energy sources include an ion beam or a laser beam that are scannable with respect to a main plane of a substrate.
- a substrate (also referred to frequently as a “wafer”) may be measured to determine a substrate OPD map.
- This OPD map can then be used to extract the global OPD, which entity is defined as the best fit paraboloid to the measured OPD.
- Computations are also performed to extract a global substrate curvature component corresponding to the paraboloid while the residual OPD is used to extract the localized or residual substrate curvature.
- FIGs. 1A-1C illustrate principles of operation of embodiments of the disclosure.
- FIG. 1A there is shown a three dimensional graph depicting a wafer surface with reference to the Cartesian coordinate system shown.
- the graph of FIG. 1 A depicts the shape of a nominally circular and flat wafer, where the X- Y plane may represent the nominal main plane of the wafer, or equivalently the ideal plane of a flat platen that supports the wafer.
- the units shown in the X-Y plane may be in millimeters, in one example.
- the z-axis is dimensionless and is normalized to 1.
- the buildup of stress during fabrication of layers, devices and the like may result in stresses that tend to impart a global curvature of the substrate, such as a paraboloid shape, shown in FIG. IB.
- This shape may be associated with biaxial tensile stress or compressive stress.
- the level of OPD may reach a maximum value in the range of hundreds of micrometers, such as 100 pm, 200 pm, 300 pm, 400 pm, etc.
- the OPD as represented by the wafer shape of FIG. 1A may be compensated for in a series of operations. In a first operation, represented in FIG.
- the bulk of the OPD may be compensated for using a uniform stress compensation layer that is applied to the back surface of a substrate, opposite a front surface of the substrate, where devices are fabricated.
- the graph of FIG. IB represents the spatial distribution in the X-Y plane of the amount of strain or deformation (represented along the Z-axis) of the wafer that may be generated by the uniform stress compensation layer. Again, the relative amount of deformation along the Z-axis is normalized, so that in the graph of FIG. 1, the maximum deformation is at the wafer center.
- the operation of FIG. IB may be useful to compensate for relatively large global OPD that develops across the wafer, as represented by the paraboloid shape in FIG. IB.
- the shape of such OPD may be axisymmetric about the z-axis, and the operation of FIG. IB may generally reduce the stress in an axisymmetric fashion. As such, after the application of the operation represented by FIG. IB, the global curvature of a wafer may be largely removed.
- FIG. 1C there is a graph representing an example of a residual pattern of OPD, which patern may be superimposed upon the patern of FIG. IB.
- a paterning energy source such as a scannable ion beam, electron beam, or laser beam.
- the paterning energy source may be applied in a non- uniform manner to a substrate, such as into a preexisting compensation layer, in order to remove the residual OPD patterns.
- FIGs. 2A-2F depict different representations of the OPD for a wafer at different stages of processing according to embodiments of the disclosure.
- the units of the x- and y- axes for FIGs. 2A, 2C, and 2E are illustrated in millimeters, representative of a 300 mm wafer, for example.
- the units along the z-axis are in nm.
- These graphs accordingly present a three dimensional depiction of a wafer surface, where the z-axis coordinate for an ideally flat wafer would be constant, for example, 0, over the entire x- y plane.
- a wafer surface is represented by a three dimensional array of points.
- the wafer surface may be characterized as a somewhat paraboloid shape, characterized by z-axis coordinates ranging from -150,000 nm to + 150,000 nm, equivalent to a maximum OPD of 300,000 nm or 300 jam.
- a side cross- sectional view of an infinitesimal portion of the substrate (which substrate may be silicon in some embodiments) of FIG. 2A is shown in FIG. 2B in very general form.
- a front surface in this example is represented by the top surface in the figure, where additional device layers may or may not be present, but are omitted for simplicity.
- the surface shown in FIG. 2A may represent a wafer surface before processing to reduce OPD in accordance with embodiments of the disclosure.
- FIG. 2C the wafer surface corresponding to the wafer of FIG. 2B is shown after processing to deposit a stress compensation layer on the backside of the wafer, as shown in FIG. 2D.
- the stress compensation layer may be deposited by a known apparatus, such as a physical vapor deposition (PVD) apparatus, a chemical vapor deposition (CVD) apparatus, or other film deposition system according to different nonlimiting embodiments.
- PVD physical vapor deposition
- CVD chemical vapor deposition
- suitable materials for the stress compensation layer include silicon nitride, silicon oxide, silicon oxynitride, layers containing any combinations of Si-O-N-C, or other known materials.
- the wafer surface may be characterized as an irregular shape, where the absolute value of OPD is greatly reduced, such that the maximum value of OPD is on the order of j ust several micrometers.
- the deposition of the stress compensation layer may be said to have removed the global signature of the stress state across the entire wafer that generates the generally regular paraboloid shape to the wafer on the vertical scale of several hundred micrometers.
- the deposition of a uniform stress compensation layer over a surface of the wafer can be expected to modify the average shape of the wafer according to the well-known Stoney equation, relating substrate curvature changes to the stress properties of a layer in contact with the substrate.
- the layer thickness and stress state of the stress compensation layer may be chosen to reduce global curvature of a wafer in accordance with the initial level of curvature, as depicted in FIG. 2A.
- the global curvature may be modeled using different possible models, in order to provide a basis to determine the suitable stress compensation layer properties needed to remove the global curvature.
- a stress compensation layer having suitable thickness, suitable elastic modulus, and suitable stress state may be chosen in order to remove nearly all of the global curvature component that generates the 300 mm maximum OPD in FIG. 2A.
- FIG. 2C what remains is a somewhat irregular pattern of OPD, representing residual curvature that may result from artifacts such as die arrangement, certain device or circuit structures, etc., that are present on the front surface of the wafer. This irregular pattern of OPD may lead to unwanted IPD at different regions of the substrate, causing problems such as increased overlay misalignment for subsequent substrate patterning.
- the residual curvature exhibited by the substrate of FIG. 2C may be removed, reduced, or modified by performing an exposure to a patterning energy source, as discussed previously.
- an implant procedure has been performed to generate an implant layer in the stress compensation layer, where the implant procedure may involve a non-uniform, direct write, implant process.
- a ‘direct write’ process including a direct write implant process, may refer to a process that employs relative movement of an ion beam without the use of a mask in order to produce a non- uniform pattern of ion dose across a substrate surface.
- the non-uniform implant process may locally adjust the curvature of the wafer in a manner reducing the OPD, as shown in FIG. 2F.
- a direct write process involving an exposure to electrons or photons, such as a laser beam, may be used to locally adjust curvature of a wafer.
- the paterning process to locally adjust substrate curvature may be performed using a dose map that is calculated based upon measured values of the initial surface of a wafer before stress compensation layer deposition.
- the correction of OPD that is applied using a suitable dose map to modify the residual curvature of FIG. 2C may translate into a correction of IPD over the wafer, as represented in FIG. 2G.
- This figure shows a 2-dimensional map in the x-y plane illustrating the magnitude and direction of IPD correction as a function of x,y coordinate in the wafer, for a 300 mm wafer.
- FIGs. 3A-5C depict a sequence of operations to be applied to determine a dose map for processing a substrate in order to compensate for substrate OPD in accordance with embodiments of the disclosure.
- the progression illustrated in FIGs. 3A-5C illustrates an approach to eliminate residual curvature in a substrate surface.
- FIGs. 3A-3C there are shown details for determining global curvature of a substrate in order to generate a global curvature map.
- FIG. 3A depicts a three dimensional representations of a wafer surface, before extraction of a global curvature component, as generally discussed above, with respect to FIGs. 2A-2E.
- FIG. 3B illustrates a two-dimensional representation of the surface of FIG.
- FIG. 3C depicts a global curvature map representing the values of curvature as a function of x,y coordinate over the wafer surface.
- the units k are in inverse km.
- the global curvature may be modeled based upon a Gaussian curvature model or a mean curvature model.
- the modeling may be based upon the use of two mutually orthogonal principle planes of curvature, that extend perpendicularly to a tangent plane of the surface, as shown in FIG. 3D.
- a Gaussian model a product of the maximal and minimal curvatures is taken, where K is given by
- FIG. 4A depicts a three dimensional representations of the residual wafer surface corresponding to the same wafer whose global surface is shown in FIG. 3 A, after extraction of the parabolic term of the OPD.
- FIG 4B illustrates a two dimensional representation of the surface of FIG. 4A, where the pattern of OPD is rather complex.
- FIG. 4C depicts a residual curvature map representing the values of curvature as a function of x,y coordinate over the wafer surface for the surface of FIGs. 4A and 4B.
- the procedures as generally outlined above to model global curvature may be employed to generate the residual curvature map of FIG. 4C, based upon the OPD map of FIG. 4B.
- the pattern of residual curvature shows a complex set of features.
- the curvature values over most of the wafer are relatively low, while a donut shaped region of negative curvature exists towards the center of the wafer.
- the curvature has a positive value, such as around the wafer periphery, and along the donut shaped region the curvature has a negative curvature value.
- the residual curvature map of FIG. 4C may be considered to be a raw residual curvature map that is further processed to generate a final curvature map that is used to produce a dose map.
- the dose map may be used in order to process the wafer of FIG. 3 A to remove residual curvature features and thus eliminate or reduce IPD resulting from such features.
- FIG. 5A shows an ion-beam profile that may be used for the actual wafer implantation. This profile is used in a blur kernel operation to create a blur kernel to be applied to the residual curvature map of FIG. 4C to attenuate the effect of high spatial frequencies on the implanter. The profile may then be used to generate a blurred residual curvature map, shown in FIG. 5B.
- the blurred residual curvature map of FIG. 5B presents the same qualitative pattern of positive curvature and negative curvature regions, while the width of the regions is broader and the curvature values within the regions differ somewhat from their unblurred counterparts.
- This blurred curvature map may be more suitable for implementation by a patterning energy source, such as a scanning ion beam, taking into account the finite size of the ion beam.
- FIG. 5C there is shown a filtered residual curvature map that is generated by filtering the blurred residual curvature map of FIG. 5B to remove all positive terms of curvature, since the positive terms cannot be influenced by the ion beam.
- This map may then be converted into a dose map, such as for a scannable ion beam, where the total ion dose to be applied over the two dimensional surface of the wafer (x-y plane) is based upon the curvature map features of FIG. 5C.
- the pattern of ion dose for a suitable dose map may exhibit features having the same shapes as the features of the curvature map.
- FIG. 5D provides an exemplary ion dose map, based upon the curvature map of FIG. 5C, where the dose map exhibits qualitatively similar pattern as the curvature map of FIG. 5C.
- the two parallel linear regions of the dose map, corresponding to the high curvature linear regions of the filtered curvature map are to receive substantially higher dose than the general ‘background’ regions.
- the background regions, over most of the surface of the wafer, are to receive a relative ion dose in the range of 15%, while the linear regions are to receive a relative ion dose ranging between approximately 50% and 85%.
- FIG. 6A depicts a schematic top view of an ion implantation system for controlling substrate OPD in accordance with embodiments of the disclosure.
- the ion implantation system referred to as ion implanter 300, represents a process chamber containing, among other components, an ion source 304 for producing an ion beam 308, and a series of beam-line components.
- the ion source 304 may comprise a chamber for receiving a flow of gas and generating ions.
- the ion source 304 may also comprise a power source and an extraction electrode assembly (not shown) disposed near the chamber.
- the beam-line components may include, for example, an analyzer magnet 320, a mass resolving slit (MRS) 324, a steenng/focusing component 326, and end station 330, including substrate holder 331.
- MRS mass resolving slit
- the ion implanter 300 further includes a beam scanner 336 positioned along a beamline 338 between the MRS 324 and the end station 330.
- the beam scanner 336 may be arranged to receive the ion beam 308 as a spot beam and to scan the ion beam 308 along a fast scan direction, such as parallel to the X-Axis in the Cartesian coordinate system shown.
- the substrate 332 may be scanned along the Y-axis, so a given ion treatment may be applied to a given region of the substrate 332 as the ion beam 308 is simultaneously scanned back and forth along the X-axis.
- the ion implanter 300 may have further components, such as a collimator as known in the art (not shown for clarity), to direct ions of the ion beam 308, after scanning, along a series of mutually parallel trajectories to the substrate 332, as suggested in FIG. 6A.
- the ion beam may be scanned at a frequency of several Hz, 10 Hz, 100 Hz, up to several thousand Hz, or greater.
- the beam scanner 336 may scan the ion beam 308 using magnetic or electrostatic scan elements, as known in the art.
- Suitable ions for ion beam 308 may include any ion species capable of inducing a stress change at a suitable ion energy, including ions such as phosphorous, boron, argon, indium BF2, according to some non-limiting embodiments, with ion energy being tailored according to the exact ion species used.
- the scan speed of the ion beam along the x-axis may be modulated at different locations of the substrate 332 so as to deliver a different ion dose at the different locations, in accordance with the dose map.
- the ion beam 308 may be scanned back and forth across a substrate for any suitable number of scans, with an accompanying scanning of the substrate in an orthogonal direction to the beam scan direction, until the targeted dose as specified by a dose map is received at reach region across the substrate 332.
- the ion implanter 300 may further include a controller 340, coupled to the beam scanner 336, to coordinate operation of the beam scanner 336, as well as substrate holder 331.
- the ion implanter 300 may include a user interface 342, also coupled to the controller 340.
- the user interface 342 may be embodied as a display, and may include user selection devices, including touch screens, displayed menus, buttons, knobs, and other devices as known in the art.
- the user interface 342 may send instructions to the controller 340 to generate an appropriate implant patern, which patern may implement an appropriate dose map for the substrate 332.
- the controller 340 may include a processor 352, such as a known type of microprocessor, dedicated processor chip, general purpose processor chip, or similar device.
- the controller 340 may further include a memory or memory unit 354, coupled to the processor 352, where the memory unit 354 contains a dose map routine 356.
- the dose map routine 356 may be operative on the processor 352 to manage scanning of the ion beam 308 and substrate 332 in order to impart a calculated dose map into the substrate 332.
- the memory unit 354 may comprise an article of manufacture.
- the memory unit 354 may comprise any non-transitory computer readable medium or machine readable medium, such as an optical, magnetic or semiconductor storage.
- the storage medium may store various ty pes of computer executable instructions to implement one or more of logic flows described herein.
- Examples of a computer readable or machine-readable storage medium may include any tangible media capable of storing electronic data, including volatile memory or nonvolatile memory, removable or non-removable memory. erasable or non-erasable memory, writeable or re-writeable memory, and so forth.
- Examples of computer executable instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, object- oriented code, visual code, and the like. The embodiments are not limited in this context.
- the substrate surface map may represent three dimensional coordinates of a set of points on the substrate surface, and may represent a map of OPD as a function of x, y coordinate, where the OPD is represented by the z-coordinate of a given surface point with respect to a reference x,y plane.
- a global curvature map is generated from the initial substrate surface map using a model.
- the global curvature map may correspond to a surface that is modeled as a paraboloid using a mean model or Gaussian model, as detailed hereinabove.
- a residual surface is extracted based upon the initial substrate surface map and the global curvature map.
- the residual surface may include residual or local regions of OPD in different x,y portions of the substrate.
- a residual curvature map is generated based upon the residual surface.
- the residual curvature map may plot curvature in inverse length as a function of x,y location across the substrate in question.
- a blurred residual curvature map is generated from the residual curvature map, using a blur kernel.
- the blurred residual curvature map may present the same qualitative pattern of curvature regions as the residual curvature map, while the width the regions may be broader and the curvature values different from their unblurred counterparts. This blurring may be used to account for size effects, such as beam size for a scanning energy source used to implement a dose map based upon the residual curvature map.
- any positive curvature components from the blurred residual curvature map are subtracted to generate a filtered residual curvature map.
- a dose map is generated for processing the substrate based upon the filtered residual curvature map.
- the dose map may present a qualitatively similar pattern as the filtered residual curvature map where relative dose is increased in x,y regions of relative higher curvature.
- a stress compensation layer deposition recipe is generated based upon the global curvature map for the given substrate.
- the recipe may specify layer type, deposition conditions, and layer thickness, to name a few parameters.
- a backside layer is deposited on the given substrate based upon the stress compensation layer deposition recipe.
- FIG. 9 there is shown a process flow 900, according to some embodiments of the disclosure.
- the flow proceeds from block 714, where a dose map as detailed in process flow 700 is received in a patterning energy tool, such as an ion implanter.
- a patterning energy tool such as an ion implanter.
- the flow proceeds from block 804, where the substrate having the backside layer based upon stress compensation layer deposition recipe is received in the patterning energy tool.
- the dose map is applied to the backside layer using a patterning energy source of the patterning energy tool, such as a scanning ion beam.
- a patterning energy source of the patterning energy tool such as a scanning ion beam.
- the present approach allows subsequent device to proceed with more accuracy, such as subsequent lithography steps requiring low in plane distortion.
- the present approach more accurately reduces regions of greater in plane distortion by targeting residual areas of greater substrate curvature for greater energetic treatment.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physical Vapour Deposition (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Optics & Photonics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Formation Of Insulating Films (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
Abstract
Description
Claims
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2024565956A JP2025516535A (en) | 2022-05-13 | 2023-05-08 | Dose mapping to compensate for out-of-plane distortion using substrate curvature |
| KR1020247035162A KR20240156433A (en) | 2022-05-13 | 2023-05-08 | Dose mapping to compensate for out-of-plane distortion using substrate curvature |
| CN202380038858.4A CN119156686A (en) | 2022-05-13 | 2023-05-08 | Dose mapping using substrate curvature to compensate for out-of-plane distortion |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US202263341797P | 2022-05-13 | 2022-05-13 | |
| US63/341,797 | 2022-05-13 | ||
| US202263425060P | 2022-11-14 | 2022-11-14 | |
| US63/425,060 | 2022-11-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2023219982A1 true WO2023219982A1 (en) | 2023-11-16 |
Family
ID=88699016
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2023/021423 Ceased WO2023219982A1 (en) | 2022-05-13 | 2023-05-08 | Dose mapping using substrate curvature to compensate for out-of-plane distortion |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20230367941A1 (en) |
| JP (1) | JP2025516535A (en) |
| KR (1) | KR20240156433A (en) |
| CN (1) | CN119156686A (en) |
| TW (2) | TWI853566B (en) |
| WO (1) | WO2023219982A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20220344282A1 (en) * | 2021-04-27 | 2022-10-27 | Applied Materials, Inc. | Stress and overlay management for semiconductor processing |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20250008925A (en) * | 2022-05-13 | 2025-01-16 | 어플라이드 머티어리얼스, 인코포레이티드 | Dose mapping and substrate rotation for substrate curvature control with improved resolution |
| TW202431354A (en) * | 2022-09-28 | 2024-08-01 | 美商應用材料股份有限公司 | Correction of global curvature during stress management |
| US20250298321A1 (en) * | 2024-03-20 | 2025-09-25 | Applied Materials, Inc. | Multiscale control of substrate deformation in device manufacturing |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20170136569A (en) * | 2015-04-06 | 2017-12-11 | 케이엘에이-텐코 코포레이션 | Method and system for determining in-plane distortion of a substrate |
| US20180204707A1 (en) * | 2015-07-20 | 2018-07-19 | Aselta Nanographics | Method of performing dose modulation, in particular for electron beam lithography |
| US20180342410A1 (en) * | 2016-09-05 | 2018-11-29 | Tokyo Electron Limited | Amelioration of global wafer distortion based on determination of localized distortions of a semiconductor wafer |
| EP3438749A1 (en) * | 2017-08-01 | 2019-02-06 | ASML Netherlands B.V. | Methods of determining a mechanical property of a layer applied to a substrate, control system for a lithographic apparatus and lithographic apparatus |
| US20210175048A1 (en) * | 2019-12-06 | 2021-06-10 | Applied Materials, Inc. | Techniques for determining and correcting for expected dose variation during implantation of photoresist-coated substrates |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080055581A1 (en) * | 2004-04-27 | 2008-03-06 | Rogers John A | Devices and methods for pattern generation by ink lithography |
| US7695876B2 (en) * | 2005-08-31 | 2010-04-13 | Brion Technologies, Inc. | Method for identifying and using process window signature patterns for lithography process control |
| JP5335351B2 (en) * | 2008-10-01 | 2013-11-06 | Hoya株式会社 | Mask blank substrate set, mask blank set, photomask set, and semiconductor device manufacturing method |
| JP6892214B2 (en) * | 2014-07-10 | 2021-06-23 | アイエムエス ナノファブリケーション ゲーエムベーハー | Customization of particle beam lithography system using convolution kernel |
| KR101996492B1 (en) * | 2014-12-01 | 2019-07-04 | 에이에스엠엘 네델란즈 비.브이. | Methods & apparatus for obtaining diagnostic information relating to a lithographic manufacturing process, lithographic processing system including diagnostic apparatus |
| JP7164289B2 (en) * | 2016-09-05 | 2022-11-01 | 東京エレクトロン株式会社 | Position-Specific Tuning of Bow-Controlling Stress to Control Overlay During Semiconductor Processing |
| EP3299889A1 (en) * | 2016-09-27 | 2018-03-28 | ASML Netherlands B.V. | A substrate, a substrate holder, a substrate coating apparatus, a method for coating the substrate and a method for removing the coating |
| DE102017202945B4 (en) * | 2017-02-23 | 2024-06-13 | Carl Zeiss Smt Gmbh | Method for transforming measurement data of a photolithographic mask for the EUV range from a first environment to a second environment, computer program and evaluation unit |
| EP3846123B1 (en) * | 2019-12-31 | 2024-05-29 | Dassault Systèmes | 3d reconstruction with smooth maps |
| KR20230131715A (en) * | 2022-03-07 | 2023-09-14 | 삼성전자주식회사 | Corner rounding method of OPC pattern based on deep learning, and OPC method and mask manufacturing method comprising the corner rounding method |
-
2023
- 2023-05-08 CN CN202380038858.4A patent/CN119156686A/en active Pending
- 2023-05-08 WO PCT/US2023/021423 patent/WO2023219982A1/en not_active Ceased
- 2023-05-08 KR KR1020247035162A patent/KR20240156433A/en active Pending
- 2023-05-08 JP JP2024565956A patent/JP2025516535A/en active Pending
- 2023-05-08 US US18/144,832 patent/US20230367941A1/en active Pending
- 2023-05-11 TW TW112117458A patent/TWI853566B/en active
- 2023-05-11 TW TW113127719A patent/TW202445286A/en unknown
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20170136569A (en) * | 2015-04-06 | 2017-12-11 | 케이엘에이-텐코 코포레이션 | Method and system for determining in-plane distortion of a substrate |
| US20180204707A1 (en) * | 2015-07-20 | 2018-07-19 | Aselta Nanographics | Method of performing dose modulation, in particular for electron beam lithography |
| US20180342410A1 (en) * | 2016-09-05 | 2018-11-29 | Tokyo Electron Limited | Amelioration of global wafer distortion based on determination of localized distortions of a semiconductor wafer |
| EP3438749A1 (en) * | 2017-08-01 | 2019-02-06 | ASML Netherlands B.V. | Methods of determining a mechanical property of a layer applied to a substrate, control system for a lithographic apparatus and lithographic apparatus |
| US20210175048A1 (en) * | 2019-12-06 | 2021-06-10 | Applied Materials, Inc. | Techniques for determining and correcting for expected dose variation during implantation of photoresist-coated substrates |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20220344282A1 (en) * | 2021-04-27 | 2022-10-27 | Applied Materials, Inc. | Stress and overlay management for semiconductor processing |
| US12354973B2 (en) * | 2021-04-27 | 2025-07-08 | Applied Materials, Inc. | Stress and overlay management for semiconductor processing |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202409752A (en) | 2024-03-01 |
| TW202445286A (en) | 2024-11-16 |
| JP2025516535A (en) | 2025-05-30 |
| TWI853566B (en) | 2024-08-21 |
| KR20240156433A (en) | 2024-10-29 |
| CN119156686A (en) | 2024-12-17 |
| US20230367941A1 (en) | 2023-11-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11875995B2 (en) | Techniques and apparatus for anisotropic stress compensation in substrates using ion implantation | |
| US20230367941A1 (en) | Dose mapping using substrate curvature to compensate for out-of-plane distortion | |
| TWI882335B (en) | Method for improving substrate distortion | |
| JP6001040B2 (en) | Method for reticle design and fabrication using two-dimensional dose map and charged particle beam lithography | |
| JP5116996B2 (en) | Charged particle beam drawing method, exposure apparatus, and device manufacturing method | |
| US12217974B2 (en) | Localized stress modulation by implant to back of wafer | |
| WO2015157507A1 (en) | Method for correcting wafer bow from overlay | |
| CN111381436B (en) | Method for manufacturing photomask with pattern | |
| CN1735959A (en) | Exposure device, exposure method, and semiconductor device manufacturing method | |
| KR20050004830A (en) | Mask pattern correction method, semiconductor device manufacturing method, mask manufacturing method, and mask | |
| JP2004287321A (en) | Photomask defect repair method | |
| US20250216786A1 (en) | Stress layer modification using energetic beam processing through photoresist mask | |
| JP2008004596A (en) | Charged particle beam drawing method, exposure apparatus, and device manufacturing method | |
| JP2007220937A (en) | Substrate overdrawing method | |
| JP2001023880A (en) | Pattern forming method, electron beam writing apparatus using this method, and optical component manufactured using the method | |
| JP2796121B2 (en) | Electron beam drawing method and electron beam drawing apparatus | |
| SUZUKI et al. | Nikon Corporation, 201-9 Miizugahara, Kumagaya, Saitama, 360-8559, Japan |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 23804089 Country of ref document: EP Kind code of ref document: A1 |
|
| ENP | Entry into the national phase |
Ref document number: 20247035162 Country of ref document: KR Kind code of ref document: A |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 1020247035162 Country of ref document: KR |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 202380038858.4 Country of ref document: CN |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 2024565956 Country of ref document: JP |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 23804089 Country of ref document: EP Kind code of ref document: A1 |