WO2023203915A1 - Carrier for double-sided polishing, and silicon wafer double-sided polishing method and device employing same - Google Patents

Carrier for double-sided polishing, and silicon wafer double-sided polishing method and device employing same Download PDF

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Publication number
WO2023203915A1
WO2023203915A1 PCT/JP2023/009225 JP2023009225W WO2023203915A1 WO 2023203915 A1 WO2023203915 A1 WO 2023203915A1 JP 2023009225 W JP2023009225 W JP 2023009225W WO 2023203915 A1 WO2023203915 A1 WO 2023203915A1
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Prior art keywords
carrier
double
polishing
sided polishing
silicon wafer
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PCT/JP2023/009225
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French (fr)
Japanese (ja)
Inventor
伸弥 田久保
俊介 御厨
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株式会社Sumco
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Publication of WO2023203915A1 publication Critical patent/WO2023203915A1/en

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/08—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/27—Work carriers
    • B24B37/28—Work carriers for double side lapping of plane surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting

Definitions

  • the present invention relates to a carrier for double-sided polishing, and a method and apparatus for double-sided polishing of silicon wafers using the same.
  • Silicon wafers are widely used as substrate materials for semiconductor devices.
  • a silicon wafer is manufactured by sequentially performing steps such as peripheral grinding, slicing, lapping, etching, double-sided polishing, single-sided polishing, and cleaning on a silicon single crystal ingot.
  • the double-sided polishing step is a necessary step for processing the wafer to a predetermined thickness and increasing the flatness of the wafer, and is performed using a double-sided polishing apparatus that simultaneously polishes both sides of the wafer.
  • Double-sided polishing equipment uses a double-sided polishing carrier that holds the wafer during polishing.
  • Materials for double-sided polishing carriers include metal carriers and resin carriers.
  • Metal carriers have a long lifespan due to their high wear resistance, but they have problems such as scratches on the wafer edge and melting of metal components. Resin carriers do not cause scratches on the wafer edge or melt metal components, but they have a problem of low wear resistance and short life.
  • Patent Document 1 describes a method of polishing both sides of a silicon wafer while holding it using a carrier for double-sided polishing made of resin.
  • the carrier for double-sided polishing is made of a resin laminate in which a hydrophilic fiber base material is impregnated with resin, and the average contact angle with respect to pure water on the front and back surfaces in contact with the polishing cloth is 45° or more and 60° or less. . Further, the surface exposure rate of the fiber base material is 50% or more. According to the resin carrier described in Patent Document 1, the polishing rate of silicon wafers can be improved.
  • Patent Document 2 discloses that before a carrier is put into a double-sided polishing machine and the wafer is actually processed, primary polishing is performed using a slurry containing abrasive grains using a device separate from the wafer polishing device. It is described that two-stage carrier polishing (pretreatment) is performed, which consists of secondary polishing using a slurry that does not contain abrasive grains.
  • the surface exposure rate of the fiber base material is as high as 50% or more, so even if the polishing rate increases, the carrier wears quickly and the carrier has to be replaced frequently. There is a problem in that this increases production costs. Further, generally, the variation in the flatness quality of wafers is greatest immediately after carrier replacement, so the higher the frequency of carrier replacement, the more the number of wafers that do not satisfy the desired flatness quality increases. Furthermore, in a resin carrier containing a glass fiber base material, there is a high probability that scratches will occur on the surface of the wafer due to worn pieces of the glass fiber.
  • an object of the present invention is to provide a carrier for double-sided polishing that can extend the service life by improving wear resistance, and a method and apparatus for double-sided polishing of silicon wafers using the same.
  • a carrier for double-sided polishing is a carrier for double-sided polishing that holds a silicon wafer when double-sided polishing the silicon wafer, and is a substantially circular disk made of a resin laminate containing a fiber base material.
  • the carrier body is characterized in that it comprises a carrier body having a shape and a wafer holding hole formed in the carrier body, and a fiber exposure rate on the main surface of the carrier body is less than 50%.
  • wear resistance can be improved by making the fiber exposure ratio on the main surface of the carrier body less than 50%. Therefore, productivity can be improved by reducing the frequency of carrier replacement, and the yield of silicon wafers satisfying the desired flatness quality can be improved.
  • the flatness of the carrier body is preferably 5 ⁇ m or less. In this way, by using a carrier with a flatness of 5 ⁇ m or less and a fiber exposure rate of less than 50%, it is possible to improve the flatness quality of the wafer while ensuring the wear resistance of the carrier.
  • the thickness of the carrier body is preferably thinner than the thickness of the silicon wafer before polishing, and the difference in thickness is preferably 5 to 20 ⁇ m.
  • the resin laminate has a multilayer structure in which a plurality of composite sheet materials in which the fiber base material is impregnated with resin are stacked, the resin is epoxy, phenol, or aramid, and the fiber base material is glass. It is preferable that the fabric is a woven fiber fabric or a woven carbon fiber fabric, and that the multilayer structure has three or more layers.
  • the double-sided polishing method for silicon wafers also includes the step of preparing a double-sided polishing carrier, and the double-sided polishing carrier disposed between an upper surface plate and a lower surface plate each having a polishing cloth attached thereto. After loading the silicon wafer, polishing both sides of the silicon wafer by rotating the upper surface plate and the lower surface plate while supplying slurry between the upper surface plate and the lower surface plate,
  • the carrier for double-sided polishing includes a substantially disc-shaped carrier body made of a resin laminate including a fiber base material, and a wafer holding hole formed in the carrier body, and has a fiber exposure ratio of 50 on the main surface of the carrier body. %.
  • the present invention it is possible to prevent a rapid increase in the wear rate of the carrier due to an increase in the fiber exposure rate, thereby extending the life of the carrier. Therefore, productivity can be improved by reducing the frequency of carrier replacement, and the yield of silicon wafers satisfying the desired flatness quality can be improved.
  • the double-sided polishing carrier is polished so that the flatness of the carrier body is 5 ⁇ m or less and the fiber exposure rate is less than 50%. It is preferable to further include a step of pre-polishing. In this way, by using a carrier with a flatness of 5 ⁇ m or less and a fiber exposure rate of less than 50%, it is possible to improve the flatness quality of the wafer while ensuring the wear resistance of the carrier.
  • the thickness of the carrier body is adjusted so that it is thinner than the thickness of the silicon wafer before polishing and the difference in thickness is 5 to 10 ⁇ m. Further, in the step of polishing both sides of the silicon wafer, it is preferable that the carrier for double-sided polishing is used so that the difference in thickness between the silicon wafer and the thickness before polishing is 20 ⁇ m or less.
  • the double-sided polishing apparatus includes an upper surface plate and a lower surface plate to which polishing cloths are respectively attached, and a double-sided polishing carrier that holds a silicon wafer and is disposed between the upper surface plate and the lower surface plate.
  • the double-sided polishing carrier includes a substantially disc-shaped carrier body made of a resin laminate including a fiber base material, and a wafer holding hole formed in the carrier body, and a wafer holding hole formed in the carrier body. It is characterized by a fiber exposure rate of less than 50%.
  • the present invention it is possible to prevent a rapid increase in the wear rate of the carrier due to an increase in the fiber exposure rate, thereby extending the life of the carrier. Therefore, productivity can be improved by reducing the frequency of carrier replacement, and the yield of silicon wafers satisfying the desired flatness quality can be improved.
  • the present invention it is possible to provide a carrier for double-sided polishing that can extend the service life by improving wear resistance, and a method and apparatus for double-sided polishing of silicon wafers using the same.
  • FIG. 1 is a schematic cross-sectional view showing the configuration of a single crystal manufacturing apparatus according to an embodiment of the present invention.
  • FIG. 2 is a schematic plan view showing the configuration of a single crystal manufacturing apparatus according to an embodiment of the present invention.
  • FIG. 3 is a schematic plan view showing the configuration of the carrier.
  • FIG. 4 is a cross-sectional view showing the cross-sectional structure of a resin laminate forming the carrier.
  • FIG. 5 is a schematic diagram for explaining preliminary polishing (pretreatment) of the carrier.
  • FIG. 6 is a flowchart for explaining a method for polishing both sides of a silicon wafer according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram for explaining a method of calculating the flatness of a carrier.
  • FIG. 1 is a schematic cross-sectional view showing the configuration of a single crystal manufacturing apparatus according to an embodiment of the present invention.
  • FIG. 3 is a schematic plan view showing the configuration of the carrier.
  • FIG. 4 is a cross
  • FIG. 8 is a graph showing the relationship between carrier flatness and wafer outer peripheral flatness (ESFQR).
  • Figures 9(a) and (b) are CCD microscope images of the carrier surface, with Figure 9(a) being the image before the binarization process, and Figure 9(b) being the image after the binarization process. It shows.
  • FIG. 10 is a graph showing the relationship between the fiber exposure rate of the carrier and the wear rate.
  • FIG. 11 is a graph showing the relationship between the carrier fiber exposure rate and the number of wafers processed.
  • FIG. 1 and 2 are diagrams showing the configuration of a double-sided polishing apparatus according to an embodiment of the present invention, with FIG. 1 being a schematic cross-sectional view and FIG. 2 being a schematic plan view.
  • the double-sided polishing device 1 includes an upper surface plate 2 and a lower surface plate 3 that are provided facing each other in the vertical direction, and the polishing surfaces of the upper surface plate 2 and the lower surface plate 3 are A polishing cloth 4 is attached to each.
  • the polishing cloth 4 a nonwoven fabric impregnated with urethane resin or a foamed polyurethane pad can be used.
  • a slurry supply device 5 is provided above the upper surface plate 2 to supply slurry between the upper surface plate 2 and the lower surface plate 3.
  • the slurry supply device 5 supplies slurry from a nozzle 6 inserted into the through hole 2a of the upper surface plate 2.
  • an inorganic alkaline aqueous solution containing colloidal silica can be used as the slurry.
  • a sun gear 7 is provided at the center between the upper surface plate 2 and the lower surface plate 3, and an internal gear 8 is provided at the outer periphery, forming a planetary gear type double-sided polishing device.
  • the upper surface plate 2, the lower surface plate 3, the sun gear 7, and the internal gear 8 have the same rotation center axis and can rotate independently of each other.
  • a plurality (here, three) double-sided polishing carriers 10 are arranged between the upper surface plate 2 and the lower surface plate 3.
  • Each carrier 10 is disposed between the sun gear 7 and the internal gear 8, and the outer teeth of the carrier 10 mesh with both the sun gear 7 and the internal gear 8.
  • the carrier 10 revolves around the sun gear 7 while rotating between the upper surface plate 2 and the lower surface plate 3.
  • both surfaces are simultaneously polished by the upper and lower polishing cloths 4. Further, during the polishing process, slurry is supplied from the nozzle 6 through the through hole 2a.
  • FIG. 3 is a schematic plan view showing the configuration of the carrier 10.
  • the carrier 10 includes a carrier body 11 having a substantially disk-shaped outer shape, a wafer holding hole 12 (hereinafter simply referred to as a holding hole) for holding a silicon wafer W, and an outer periphery of the carrier body 11. It is provided with outer peripheral teeth 13 provided at the portion.
  • the holding hole 12 is a circular opening formed to penetrate from one main surface (front surface or top surface) to the other main surface (back surface or bottom surface) of the carrier body 11, and the diameter of the holding hole 12 is equal to that of the silicon wafer. It is approximately equal to the diameter of W. Since the center position of the holding hole 12 is shifted from the center position of the carrier 10, the silicon wafer W inside the holding hole 12 rotates eccentrically when the carrier 10 rotates.
  • the number of holding holes 12 formed in the carrier 10 is one, but a plurality of holding holes 12 may be provided.
  • FIG. 4 is a cross-sectional view showing the cross-sectional structure of the resin laminate that constitutes the carrier 10.
  • the carrier main body 11 of the double-sided polishing carrier 10 has a multilayered resin lamination structure in which a plurality of composite sheet materials 20 (FRP sheets) made by impregnating a fiber base material 21 with a resin 22 are laminated. Consists of boards.
  • the fiber base material 21 it is preferable to use glass fiber woven fabric, carbon fiber woven fabric, or the like.
  • the resin 22 it is preferable to use epoxy, phenol, aramid, or the like.
  • the resin laminate is preferably one in which three or more layers of the composite sheet material 20 are laminated, and it is particularly preferable to have a five-layer structure as shown in the figure.
  • the fiber exposure rate on the main surface of the carrier 10 is less than 50%. That is, in the double-sided polishing step, a carrier 10 with a fiber exposure rate of less than 50 is used, and a carrier 10 with a fiber exposure rate of 50% or more is not used. This is because when the fiber exposure rate becomes 50% or more, the wear resistance of the carrier decreases rapidly and the life of the carrier becomes short.
  • the fiber exposure rate of the carrier 10 used in the double-sided polishing process is ideally 0%. However, it is extremely difficult to always use a carrier 10 with a fiber exposure rate of 0%.
  • a resin laminate is produced by heat-pressing and integrating a plurality of composite sheet materials 20. During hot pressing, the resin on the outermost surface runs off, so even if the amount of resin impregnated into the fiber base material is increased, the thickness of the resin on the outermost surface does not increase.
  • preliminary polishing is performed on the new carrier before it is actually used (see FIG. 5). Specifically, preliminary polishing is performed so that the difference from the pre-polishing thickness of the silicon wafer to be processed is 5 to 10 ⁇ m, and the flatness of the carrier is 5 ⁇ m or less. If such pretreatment is performed, the fiber base material 21 will definitely be exposed on the main surface of the carrier 10, and depending on the machining allowance, the fiber exposure rate may be 50% or more. When the fiber exposure rate exceeds 50%, the wear rate of the carrier increases rapidly and the life of the carrier becomes short.
  • the fiber exposure rate on the main surface of the carrier used in the double-sided polishing step is maintained at less than 50%, and when pre-polishing an unused carrier that has never been used, The machining allowance is adjusted to maintain less than 50% fiber exposure even when the carrier is used repeatedly and reaches the lower limit of thickness, which improves the wear resistance of the carrier. Longer life can be achieved.
  • FIG. 6 is a flowchart showing a method for polishing both sides of a silicon wafer according to an embodiment of the present invention.
  • an unused carrier 10 is first prepared (step S1).
  • the carrier 10 is made by heat-pressing a plurality of composite sheet materials 20 (for example, five sheets) to form a resin laminate, and then punching it into a predetermined shape including the holding holes 12 and the outer peripheral teeth 13. It is made by
  • step S2 preliminary polishing (pretreatment) of the carrier is performed (step S2).
  • carrier polishing is performed using a slurry containing abrasive grains using a separate device from the wafer polishing device.
  • the polishing allowance is set so that the fiber exposure rate is less than 50%.
  • the polishing process is performed by setting the polishing allowance so that the wafer has a predetermined thickness (thickness upper limit) that is 5 to 10 ⁇ m thinner than the pre-polishing thickness of the wafer (for example, 785 ⁇ m).
  • the flatness of the carrier in one set is adjusted to 5 ⁇ m or less, and a carrier with a fiber exposure rate of less than 50% is obtained.
  • the flatness of each individual carrier in order for the flatness of the carriers within one set to be 5 ⁇ m or less, the flatness of each individual carrier must also be 5 ⁇ m or less.
  • a double-sided polishing process of the silicon wafer W is actually performed using the carrier 10 after preliminary polishing (step S3). Both sides of the silicon wafer to be processed are polished to a target thickness and flatness. When the polishing process is completed, the silicon wafer W is taken out from the carrier and sent to the next process (single-sided polishing process).
  • the carrier 10 is reusable and is used repeatedly until a predetermined lower limit thickness is reached (steps S4N, S5, S6, S3).
  • a carrier is used in a double-sided polishing process, the thickness of the carrier decreases, and the carrier itself wears out as wafers are repeatedly polished.
  • resin carriers are subject to more wear than metal carriers, so they can be used less frequently, leading to a decrease in productivity.
  • the lower limit of the carrier thickness that can be used in the double-sided polishing process is defined near the target thickness of the wafer, and carriers that are thinner than the lower limit are excluded from use (discarded) (steps S4Y, S7).
  • the lower limit of the carrier thickness is set to, for example, the thickness of the wafer before polishing (for example, 785 ⁇ m) minus 20 ⁇ m.
  • carriers with a fiber exposure rate of 50% or more on the main surface of the carrier are also excluded from continued use (steps S5Y, S7).
  • the fiber exposure rate of a carrier increases with the number of times of use, and the wear rate of a carrier with a fiber exposure rate of 50% or more becomes extremely rapid.
  • the probability of scratches occurring on the wafer surface increases significantly due to the increase in glass fiber wear debris.
  • the carrier according to the present embodiment is formed so that the fiber exposure rate is always less than 50% even if it is repeatedly used from a predetermined upper thickness limit to a lower thickness limit, so the wear rate of the carrier is reduced. It is possible to suppress the increase and extend the lifespan. Furthermore, the probability of scratches occurring on the surface of the wafer can be reduced.
  • both sides of the silicon wafer are polished using a double-sided polishing carrier made of a resin laminate, and the fiber exposure rate on the main surface of the carrier is 50%. Therefore, it is possible to extend the life of the carrier by improving wear resistance.
  • a double-sided polishing device capable of loading three resin carriers was used as an example, but the configuration of the double-sided polishing device is not particularly limited, and various devices capable of using resin carriers can be used. Can be used. Further, the number of wafers that can be loaded into the carrier and the shape of the carrier are not particularly limited.
  • a double-sided polishing device one capable of loading five carriers each having a diameter of 500 mm was used.
  • the carrier has a single wafer holding hole and can load one wafer with a diameter of 300 mm.
  • a p-type silicon single crystal wafer with a diameter of 300 mm was used as the wafer.
  • a urethane polishing pad containing no abrasive grains was used as the polishing pad.
  • As the slurry an inorganic alkaline aqueous solution containing silica abrasive grains with a particle size of 60 to 110 nm and having a pH of 11 to 12 was used.
  • the thickness of the carriers was measured using a laser displacement meter to determine the flatness of the carriers within one batch.
  • the flatness of the carrier within one batch was measured at positions 1.01 r (mm) away from the center of the carrier's holding hole in four directions, up, down, left, and right from the center of the carrier's holding hole.
  • FIG. 7 shows a method for calculating carrier flatness.
  • X 1 , X 2 , X 3 , and X 4 were determined, respectively.
  • the distance from the center C of the holding hole 12 to the thickness measurement point was 1.01 r (mm). r is the radius of the wafer holding hole.
  • the difference between the maximum value X max and the minimum value X min among the measurement values of a total of 20 points, 4 points each obtained from each of the 5 carriers, is calculated as the flatness of the carriers within one batch. degree ( ⁇ m).
  • the ESFQR Erge Site flatness Front reference least sQuare Range
  • This is a flatness evaluation index (site flatness) that focuses on the edges of the wafer, where flatness tends to deteriorate, and indicates the magnitude of edge roll-off.
  • the flatness of the edge of the wafer is determined by unit areas (sites) obtained by dividing a ring-shaped outer circumferential area evenly in the circumferential direction, for example, within a range of 2 to 32 mm (sector length 30 mm) from the outermost circumference of the wafer. required for each.
  • a wafer flatness measuring device (Wafer Sight manufactured by KLA-Tencor) was used to measure ESFQR.
  • the measurement range was 296 mm (excluding the outermost 2 mm)
  • the number of sectors (sites) was 72 in the edge site measurement
  • the sector length was 30 mm.
  • the graph of FIG. 8 shows the relationship between the flatness of the carrier and the ESFQR of the wafer after polishing. Note that ESFQR is the average value of the measured values of five wafers within one batch.
  • the fiber exposure rate on the main surface of the carrier was determined by observing 10 points randomly selected from the outer circumferential area within 50 mm from the outer edge of the wafer holding hole of the carrier, and taking a CCD microscope image at each observation point. The image was binarized and the area ratio of the fiber portion was calculated.
  • An example of a CCD microscope image of the carrier surface is shown in FIGS. 9(a) and 9(b).
  • FIG. 9(a) shows the image before the binarization process
  • FIG. 9(b) shows the image after the binarization process.
  • the image size of each measurement location is 2.8 ⁇ 2.1 (mm).
  • the fiber exposure rate on the carrier surface was adjusted by adjusting the machining allowance in the step of preliminary polishing the carrier in order to adjust the thickness and flatness of the carrier.
  • the carrier wear rate is calculated by loading a dummy silicon wafer that is slightly thinner than the carrier thickness and polishing both sides of the carrier using a slurry for polishing silicon wafers containing colloidal silica, and calculating the amount of decrease in carrier thickness per unit time. (Difference in thickness before and after polishing) The results are shown in FIG. In the graph of FIG. 10, the carrier wear rate on the vertical axis is a relative value when the value when the fiber exposure rate is 90% is set as the reference value 100.
  • the carrier wear rate when the fiber exposure rate is 42% or less, the carrier wear rate is low at 27 or less, but when the fiber exposure rate is around 50%, the carrier wear rate increases rapidly and the fiber exposure rate increases. It can be seen that when the ratio is 60% or more, the carrier wear rate approaches about 100. Conversely, the carrier wear rate decreases rapidly when the fiber exposure rate is less than 60%, and the carrier wear rate when the fiber exposure rate is 50% is less than half of the carrier wear rate when the fiber exposure rate is 90%. It turns out that The reason why the carrier is easily worn out when the fiber exposure rate is 50% or more is thought to be that the highly alkaline polishing slurry progresses corrosion of the glass fiber portion exposed on the surface of the carrier.
  • the number of wafers processed is around 400, but when the fiber exposure rate is 48%, the number of wafers processed drops to 250. Further, when the fiber exposure rate was 60% or more, the number of processed wafers decreased to about 100.
  • the fiber exposure rate of the carrier affects the wear rate of the carrier as described above, it is desirable to maintain the fiber exposure rate below 50%, and it was confirmed that this can extend the life of the carrier.
  • Double-sided polishing device 1 Double-sided polishing device 2 Upper surface plate 2a Through hole 3 Lower surface plate 4 Polishing cloth 5 Slurry supply device 6 Nozzle 7 Sun gear 8 Internal gear 10 Double-sided polishing carrier 11 Carrier body 12 Wafer holding hole 13 Peripheral teeth 20 Composite sheet material 20a Composite Sheet material 20b Composite sheet material 21 Fiber base material 22 Resin W Silicon wafer

Abstract

[Problem] To provide a carrier for double-sided polishing, with which an increase in service life can be achieved by improving wear resistance, and a silicon wafer double-sided polishing method and device employing the same. [Solution] A carrier 10 for double-sided polishing according to the present invention is a member for holding a silicon wafer when performing double-sided polishing of the silicon wafer, and comprises a substantially disk-shaped carrier body comprising a resin laminated plate containing a fiber substrate, and a wafer holding hole 12 formed in the carrier body 11. A fiber exposure rate of a main surface of the carrier body 11 is less than 50%.

Description

両面研磨用キャリア及びこれを用いたシリコンウェーハの両面研磨方法及び装置Double-sided polishing carrier and method and device for double-sided polishing of silicon wafers using the carrier
　本発明は、両面研磨用キャリア及びこれを用いたシリコンウェーハの両面研磨方法及び装置に関する。 The present invention relates to a carrier for double-sided polishing, and a method and apparatus for double-sided polishing of silicon wafers using the same.
　半導体デバイスの基板材料としてシリコンウェーハが広く用いられている。シリコンウェーハは、シリコン単結晶インゴットに外周研削、スライス、ラッピング、エッチング、両面研磨、片面研磨、洗浄等の工程を順次行うことにより製造される。このうち、両面研磨工程は、ウェーハを所定の厚みに加工すると共にウェーハの平坦度を高めるために必要な工程であり、ウェーハの両面を同時に研磨する両面研磨装置を用いて行われる。 Silicon wafers are widely used as substrate materials for semiconductor devices. A silicon wafer is manufactured by sequentially performing steps such as peripheral grinding, slicing, lapping, etching, double-sided polishing, single-sided polishing, and cleaning on a silicon single crystal ingot. Among these, the double-sided polishing step is a necessary step for processing the wafer to a predetermined thickness and increasing the flatness of the wafer, and is performed using a double-sided polishing apparatus that simultaneously polishes both sides of the wafer.
　両面研磨装置では研磨中にウェーハを保持する両面研磨用キャリアが使用される。両面研磨用キャリアの素材としては、金属製キャリアと樹脂製キャリアがある。金属製キャリアは耐摩耗性が高いため寿命が長いが、ウェーハ端面の傷や金属成分の溶融といった問題がある。樹脂製キャリアはウェーハ端面の傷や金属成分の溶融はないが、耐摩耗性が低く寿命が短いという問題がある。 Double-sided polishing equipment uses a double-sided polishing carrier that holds the wafer during polishing. Materials for double-sided polishing carriers include metal carriers and resin carriers. Metal carriers have a long lifespan due to their high wear resistance, but they have problems such as scratches on the wafer edge and melting of metal components. Resin carriers do not cause scratches on the wafer edge or melt metal components, but they have a problem of low wear resistance and short life.
　特許文献１には、樹脂製の両面研磨用キャリアを用いてシリコンウェーハを保持しながら両面研磨する方法が記載されている。両面研磨用キャリアは、親水性の繊維基材に樹脂を含侵させた樹脂積層板からなり、研磨布と接触する表裏面の純水に対する接触角の平均値が４５°以上６０°以下である。また繊維基材の表面露出率は５０％以上である。特許文献１に記載の樹脂製キャリアによれば、シリコンウェーハの研磨レートを向上させることができる。 Patent Document 1 describes a method of polishing both sides of a silicon wafer while holding it using a carrier for double-sided polishing made of resin. The carrier for double-sided polishing is made of a resin laminate in which a hydrophilic fiber base material is impregnated with resin, and the average contact angle with respect to pure water on the front and back surfaces in contact with the polishing cloth is 45° or more and 60° or less. . Further, the surface exposure rate of the fiber base material is 50% or more. According to the resin carrier described in Patent Document 1, the polishing rate of silicon wafers can be improved.
　また特許文献２には、両面研磨機にキャリアを投入してウェーハを実際に加工する前に、ウェーハ研磨用の装置とは別装置を用いて、砥粒入りのスラリーを用いた一次研磨と、砥粒を含まないスラリーを用いた二次研磨からなる２段階のキャリア研磨（前処理）を実施することが記載されている。 Further, Patent Document 2 discloses that before a carrier is put into a double-sided polishing machine and the wafer is actually processed, primary polishing is performed using a slurry containing abrasive grains using a device separate from the wafer polishing device. It is described that two-stage carrier polishing (pretreatment) is performed, which consists of secondary polishing using a slurry that does not contain abrasive grains.
国際公開第２０１８／１０５３０６号パンフレットInternational Publication No. 2018/105306 pamphlet 特開２０１７－１０４９５８号公報JP2017-104958A
　しかしながら、特許文献１に記載された従来の両面研磨用キャリアは、繊維基材の表面露出率が５０％以上と高いため、研磨レートは上がったとしてもキャリアの摩耗が早く、キャリアを交換する頻度が増加して生産コストが高くなるという問題がある。また、一般的に、ウェーハの平坦度品質のバラつきはキャリア交換直後が最も大きくなるため、キャリアの交換頻度が高いほど所望の平坦度品質を満たさないウェーハの枚数が増加する。さらに、ガラス繊維基材を含む樹脂製キャリアにおいては、ガラス繊維の摩耗片によってウェーハの表面にスクラッチが発生する確率が高くなる。 However, in the conventional double-sided polishing carrier described in Patent Document 1, the surface exposure rate of the fiber base material is as high as 50% or more, so even if the polishing rate increases, the carrier wears quickly and the carrier has to be replaced frequently. There is a problem in that this increases production costs. Further, generally, the variation in the flatness quality of wafers is greatest immediately after carrier replacement, so the higher the frequency of carrier replacement, the more the number of wafers that do not satisfy the desired flatness quality increases. Furthermore, in a resin carrier containing a glass fiber base material, there is a high probability that scratches will occur on the surface of the wafer due to worn pieces of the glass fiber.
　したがって、本発明の目的は、耐摩耗性の向上により長寿命化を図ることが可能な両面研磨用キャリア及びこれを用いたシリコンウェーハの両面研磨方法及び装置を提供することにある。 Therefore, an object of the present invention is to provide a carrier for double-sided polishing that can extend the service life by improving wear resistance, and a method and apparatus for double-sided polishing of silicon wafers using the same.
　上記課題を解決するため、本発明による両面研磨用キャリアは、シリコンウェーハを両面研磨する際に前記シリコンウェーハを保持する両面研磨用キャリアであって、繊維基材を含む樹脂積層板からなる略円盤状のキャリア本体と、前記キャリア本体に形成されたウェーハ保持孔とを備え、前記キャリア本体の主面の繊維露出率が５０％未満であることを特徴とする。 In order to solve the above problems, a carrier for double-sided polishing according to the present invention is a carrier for double-sided polishing that holds a silicon wafer when double-sided polishing the silicon wafer, and is a substantially circular disk made of a resin laminate containing a fiber base material. The carrier body is characterized in that it comprises a carrier body having a shape and a wafer holding hole formed in the carrier body, and a fiber exposure rate on the main surface of the carrier body is less than 50%.
　本発明によれば、キャリア本体の主面の繊維露出率を５０％未満にすることで耐摩耗性の向上を図ることができる。したがって、キャリアの交換頻度の減少による生産性の向上並びに所望の平坦度品質を満足するシリコンウェーハの歩留まりの向上を図ることができる。 According to the present invention, wear resistance can be improved by making the fiber exposure ratio on the main surface of the carrier body less than 50%. Therefore, productivity can be improved by reducing the frequency of carrier replacement, and the yield of silicon wafers satisfying the desired flatness quality can be improved.
　本発明において、前記キャリア本体の平坦度は５μｍ以下であることが好ましい。このように、平坦度が５μｍ以下且つ繊維露出率が５０％未満のキャリアを用いることにより、キャリアの耐摩耗性を確保しながらウェーハの平坦度品質を高めることができる。 In the present invention, the flatness of the carrier body is preferably 5 μm or less. In this way, by using a carrier with a flatness of 5 μm or less and a fiber exposure rate of less than 50%, it is possible to improve the flatness quality of the wafer while ensuring the wear resistance of the carrier.
　本発明において、前記キャリア本体の厚みは前記シリコンウェーハの研磨前厚みよりも薄く且つ厚み差が５～２０μｍであることが好ましい。両面研磨工程でキャリアを繰り返し使用することにより、キャリアの厚みが徐々に減少し、シリコンウェーハの研磨前厚みとキャリアの厚みとの差が５～２０μｍの範囲内で変化した場合でも、キャリアの繊維露出率は５０％未満に維持されているので、キャリアの摩耗速度の急激な増加を防止することができる。 In the present invention, the thickness of the carrier body is preferably thinner than the thickness of the silicon wafer before polishing, and the difference in thickness is preferably 5 to 20 μm. By repeatedly using the carrier in the double-sided polishing process, the thickness of the carrier gradually decreases, and even if the difference between the thickness of the silicon wafer before polishing and the thickness of the carrier changes within the range of 5 to 20 μm, the fibers of the carrier Since the exposure rate is maintained below 50%, a rapid increase in the wear rate of the carrier can be prevented.
　前記樹脂積層板は、前記繊維基材に樹脂を含侵させた複合シート材を複数枚重ねた多層構造を有し、前記樹脂は、エポキシ、フェノール又はアラミドであり、前記繊維基材は、ガラス繊維織布又はカーボン繊維織布であり、前記多層構造は３層以上であることが好ましい。 The resin laminate has a multilayer structure in which a plurality of composite sheet materials in which the fiber base material is impregnated with resin are stacked, the resin is epoxy, phenol, or aramid, and the fiber base material is glass. It is preferable that the fabric is a woven fiber fabric or a woven carbon fiber fabric, and that the multilayer structure has three or more layers.
　また、本発明によるシリコンウェーハの両面研磨方法は、両面研磨用キャリアを用意するステップと、研磨布がそれぞれ貼付された上定盤と下定盤との間に配設された前記両面研磨用キャリアにシリコンウェーハを装填した後、前記上定盤と前記下定盤との間にスラリーを供給しながら前記上定盤と前記下定盤をそれぞれ回転させて前記シリコンウェーハを両面研磨するステップとを備え、前記両面研磨用キャリアは、繊維基材を含む樹脂積層板からなる略円盤状のキャリア本体と、前記キャリア本体に形成されたウェーハ保持孔とを備え、前記キャリア本体の主面の繊維露出率が５０％未満であることを特徴とする。 The double-sided polishing method for silicon wafers according to the present invention also includes the step of preparing a double-sided polishing carrier, and the double-sided polishing carrier disposed between an upper surface plate and a lower surface plate each having a polishing cloth attached thereto. After loading the silicon wafer, polishing both sides of the silicon wafer by rotating the upper surface plate and the lower surface plate while supplying slurry between the upper surface plate and the lower surface plate, The carrier for double-sided polishing includes a substantially disc-shaped carrier body made of a resin laminate including a fiber base material, and a wafer holding hole formed in the carrier body, and has a fiber exposure ratio of 50 on the main surface of the carrier body. %.
　本発明によれば、繊維露出率の増加によるキャリアの摩耗速度の急激な増加を防止してキャリアの長寿命化を図ることができる。したがって、キャリアの交換頻度の減少による生産性の向上並びに所望の平坦度品質を満足するシリコンウェーハの歩留まりの向上を図ることができる。 According to the present invention, it is possible to prevent a rapid increase in the wear rate of the carrier due to an increase in the fiber exposure rate, thereby extending the life of the carrier. Therefore, productivity can be improved by reducing the frequency of carrier replacement, and the yield of silicon wafers satisfying the desired flatness quality can be improved.
　本発明によるシリコンウェーハの両面研磨方法は、前記シリコンウェーハを両面研磨するステップの前に、前記キャリア本体の平坦度が５μｍ以下且つ前記繊維露出率が５０％未満となるように前記両面研磨用キャリアを予備研磨するステップをさらに備えることが好ましい。このように、平坦度が５μｍ以下且つ繊維露出率が５０％未満のキャリアを用いることにより、キャリアの耐摩耗性を確保しながらウェーハの平坦度品質を高めることができる。 In the method for double-sided polishing of a silicon wafer according to the present invention, before the step of polishing both sides of the silicon wafer, the double-sided polishing carrier is polished so that the flatness of the carrier body is 5 μm or less and the fiber exposure rate is less than 50%. It is preferable to further include a step of pre-polishing. In this way, by using a carrier with a flatness of 5 μm or less and a fiber exposure rate of less than 50%, it is possible to improve the flatness quality of the wafer while ensuring the wear resistance of the carrier.
　本発明において、前記両面研磨用キャリアを予備研磨するステップは、前記シリコンウェーハの研磨前厚みよりも薄く且つ厚み差が５～１０μｍとなるように前記キャリア本体の厚みを調整することが好ましい。さらに、前記シリコンウェーハを両面研磨するステップは、前記シリコンウェーハの研磨前厚みとの厚み差が２０μｍ以下の範囲で前記両面研磨用キャリアを使用することが好ましい。両面研磨工程でキャリアを繰り返し使用することにより、キャリアの厚みが徐々に減少し、シリコンウェーハの研磨前厚みとキャリアの厚みとの差が５～２０μｍの範囲内で変化した場合でも、キャリアの繊維露出率は５０％未満に維持されているので、キャリアの摩耗速度の急激な増加を防止することができる。 In the present invention, it is preferable that in the step of pre-polishing the double-sided polishing carrier, the thickness of the carrier body is adjusted so that it is thinner than the thickness of the silicon wafer before polishing and the difference in thickness is 5 to 10 μm. Further, in the step of polishing both sides of the silicon wafer, it is preferable that the carrier for double-sided polishing is used so that the difference in thickness between the silicon wafer and the thickness before polishing is 20 μm or less. By repeatedly using the carrier in the double-sided polishing process, the thickness of the carrier gradually decreases, and even if the difference between the thickness of the silicon wafer before polishing and the thickness of the carrier changes within the range of 5 to 20 μm, the fibers of the carrier Since the exposure rate is maintained below 50%, a rapid increase in the wear rate of the carrier can be prevented.
　また、本発明による両面研磨装置は、研磨布がそれぞれ貼付された上定盤及び下定盤と、前記上定盤と前記下定盤との間に配設されるシリコンウェーハを保持する両面研磨用キャリアとを備え、前記両面研磨用キャリアは、繊維基材を含む樹脂積層板からなる略円盤状のキャリア本体と、前記キャリア本体に形成されたウェーハ保持孔とを備え、前記キャリア本体の主面の繊維露出率が５０％未満であることを特徴とする。 Further, the double-sided polishing apparatus according to the present invention includes an upper surface plate and a lower surface plate to which polishing cloths are respectively attached, and a double-sided polishing carrier that holds a silicon wafer and is disposed between the upper surface plate and the lower surface plate. The double-sided polishing carrier includes a substantially disc-shaped carrier body made of a resin laminate including a fiber base material, and a wafer holding hole formed in the carrier body, and a wafer holding hole formed in the carrier body. It is characterized by a fiber exposure rate of less than 50%.
　本発明によれば、繊維露出率の増加によるキャリアの摩耗速度の急激な増加を防止してキャリアの長寿命化を図ることができる。したがって、キャリアの交換頻度の減少による生産性の向上並びに所望の平坦度品質を満足するシリコンウェーハの歩留まりの向上を図ることができる。 According to the present invention, it is possible to prevent a rapid increase in the wear rate of the carrier due to an increase in the fiber exposure rate, thereby extending the life of the carrier. Therefore, productivity can be improved by reducing the frequency of carrier replacement, and the yield of silicon wafers satisfying the desired flatness quality can be improved.
　本発明によれば、耐摩耗性の向上により長寿命化を図ることが可能な両面研磨用キャリア及びこれを用いたシリコンウェーハの両面研磨方法及び装置を提供することができる。 According to the present invention, it is possible to provide a carrier for double-sided polishing that can extend the service life by improving wear resistance, and a method and apparatus for double-sided polishing of silicon wafers using the same.
図１は、本発明の実施の形態による単結晶製造装置の構成を示す略断面図である。FIG. 1 is a schematic cross-sectional view showing the configuration of a single crystal manufacturing apparatus according to an embodiment of the present invention. 図２は、本発明の実施の形態による単結晶製造装置の構成を示す略平面図である。FIG. 2 is a schematic plan view showing the configuration of a single crystal manufacturing apparatus according to an embodiment of the present invention. 図３は、キャリアの構成を示す略平面図である。FIG. 3 is a schematic plan view showing the configuration of the carrier. 図４は、キャリアを構成する樹脂積層板の断面構造を示す断面図である。FIG. 4 is a cross-sectional view showing the cross-sectional structure of a resin laminate forming the carrier. 図５は、キャリアの予備研磨（前処理）を説明するための模式図である。FIG. 5 is a schematic diagram for explaining preliminary polishing (pretreatment) of the carrier. 図６は、本発明の実施の形態によるシリコンウェーハの両面研磨方法を説明するためのフローチャートである。FIG. 6 is a flowchart for explaining a method for polishing both sides of a silicon wafer according to an embodiment of the present invention. 図７は、キャリアの平坦度の算出方法を説明するための模式図である。FIG. 7 is a schematic diagram for explaining a method of calculating the flatness of a carrier. 図８は、キャリアの平坦度とウェーハの外周平坦度（ＥＳＦＱＲ）との関係を示すグラフである。FIG. 8 is a graph showing the relationship between carrier flatness and wafer outer peripheral flatness (ESFQR). 図９（ａ）及び（ｂ）は、キャリア表面のＣＣＤ顕微鏡画像であって、図９（ａ）は二値化処理前の画像、図９（ｂ）は二値化処理後の画像をそれぞれ示している。Figures 9(a) and (b) are CCD microscope images of the carrier surface, with Figure 9(a) being the image before the binarization process, and Figure 9(b) being the image after the binarization process. It shows. 図１０は、キャリアの繊維露出率と摩耗速度との関係を示すグラフである。FIG. 10 is a graph showing the relationship between the fiber exposure rate of the carrier and the wear rate. 図１１は、キャリアの繊維露出率とウェーハの処理枚数との関係を示すグラフである。FIG. 11 is a graph showing the relationship between the carrier fiber exposure rate and the number of wafers processed.
　以下、添付図面を参照しながら、本発明の好ましい実施の形態について詳細に説明する。 Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
　図１及び図２は、本発明の実施の形態による両面研磨装置の構成を示す図であって、図１は略断面図、図２は略平面図である。 1 and 2 are diagrams showing the configuration of a double-sided polishing apparatus according to an embodiment of the present invention, with FIG. 1 being a schematic cross-sectional view and FIG. 2 being a schematic plan view.
　図１及び図２に示すように、両面研磨装置１は、上下方向に対向して設けられた上定盤２及び下定盤３を備えており、この上定盤２及び下定盤３の研磨面には研磨布４がそれぞれ貼り付けられている。研磨布４としては、不織布にウレタン樹脂を含浸させたものや発泡ポリウレタンパッドを用いることができる。 As shown in FIGS. 1 and 2, the double-sided polishing device 1 includes an upper surface plate 2 and a lower surface plate 3 that are provided facing each other in the vertical direction, and the polishing surfaces of the upper surface plate 2 and the lower surface plate 3 are A polishing cloth 4 is attached to each. As the polishing cloth 4, a nonwoven fabric impregnated with urethane resin or a foamed polyurethane pad can be used.
　上定盤２の上方には、上定盤２と下定盤３との間にスラリーを供給するためのスラリー供給装置５が設けられている。スラリー供給装置５は、上定盤２の貫通孔２ａに挿入されたノズル６からスラリーを供給する。スラリーとしては、コロイダルシリカを含有した無機アルカリ水溶液を用いることができる。 A slurry supply device 5 is provided above the upper surface plate 2 to supply slurry between the upper surface plate 2 and the lower surface plate 3. The slurry supply device 5 supplies slurry from a nozzle 6 inserted into the through hole 2a of the upper surface plate 2. As the slurry, an inorganic alkaline aqueous solution containing colloidal silica can be used.
　上定盤２と下定盤３との間の中心部にはサンギヤ７が設けられており、外周部にはインターナルギヤ８が設けられており、遊星歯車方式の両面研磨装置を構成している。上定盤２、下定盤３、サンギヤ７及びインターナルギヤ８は同じ回転中心軸を有しており、互いに独立に回転運動することができる。 A sun gear 7 is provided at the center between the upper surface plate 2 and the lower surface plate 3, and an internal gear 8 is provided at the outer periphery, forming a planetary gear type double-sided polishing device. . The upper surface plate 2, the lower surface plate 3, the sun gear 7, and the internal gear 8 have the same rotation center axis and can rotate independently of each other.
　上定盤２と下定盤３との間には複数（ここでは３つ）の両面研磨用キャリア１０（以下、単にキャリアという）が配置されている。各キャリア１０はサンギヤ７とインターナルギヤ８との間に配設されており、キャリア１０の外周歯はサンギヤ７及びインターナルギヤ８の両方と噛合している。上定盤２及び下定盤３が不図示の駆動源によって回転駆動されると、サンギヤ７及びインターナルギヤ８もこれらに連動して回転する。これにより、キャリア１０は上定盤２と下定盤３との間で自転しながらサンギヤ７の周りを公転する。このときシリコンウェーハＷはキャリア１０に設けられたウェーハ保持孔内に閉じ込められて保持されているので、上下の研磨布４によって両面が同時に研磨される。また研磨工程中はノズル６から貫通孔２ａを通じてスラリーが供給される。 A plurality (here, three) double-sided polishing carriers 10 (hereinafter simply referred to as carriers) are arranged between the upper surface plate 2 and the lower surface plate 3. Each carrier 10 is disposed between the sun gear 7 and the internal gear 8, and the outer teeth of the carrier 10 mesh with both the sun gear 7 and the internal gear 8. When the upper surface plate 2 and the lower surface plate 3 are rotationally driven by a drive source (not shown), the sun gear 7 and the internal gear 8 are also rotated in conjunction with them. Thereby, the carrier 10 revolves around the sun gear 7 while rotating between the upper surface plate 2 and the lower surface plate 3. At this time, since the silicon wafer W is confined and held within the wafer holding hole provided in the carrier 10, both surfaces are simultaneously polished by the upper and lower polishing cloths 4. Further, during the polishing process, slurry is supplied from the nozzle 6 through the through hole 2a.
　図３は、キャリア１０の構成を示す略平面図である。 FIG. 3 is a schematic plan view showing the configuration of the carrier 10.
　図３に示すように、キャリア１０は、略円盤状の外形を有するキャリア本体１１と、シリコンウェーハＷを保持するためのウェーハ保持孔１２（以下、単に保持孔という）と、キャリア本体１１の外周部に設けられた外周歯１３とを備えている。保持孔１２は、キャリア本体１１の一方の主面（表面又は上面）から他方の主面（裏面又は下面）まで貫通するように形成された円形の開口であり、保持孔１２の直径はシリコンウェーハＷの直径と略等しい。保持孔１２の中心位置はキャリア１０の中心位置からずれているので、保持孔１２内のシリコンウェーハＷはキャリア１０の回転時に偏心回転する。本実施形態においてキャリア１０に形成される保持孔１２の数は一つであるが、複数の保持孔１２が設けられてもよい。 As shown in FIG. 3, the carrier 10 includes a carrier body 11 having a substantially disk-shaped outer shape, a wafer holding hole 12 (hereinafter simply referred to as a holding hole) for holding a silicon wafer W, and an outer periphery of the carrier body 11. It is provided with outer peripheral teeth 13 provided at the portion. The holding hole 12 is a circular opening formed to penetrate from one main surface (front surface or top surface) to the other main surface (back surface or bottom surface) of the carrier body 11, and the diameter of the holding hole 12 is equal to that of the silicon wafer. It is approximately equal to the diameter of W. Since the center position of the holding hole 12 is shifted from the center position of the carrier 10, the silicon wafer W inside the holding hole 12 rotates eccentrically when the carrier 10 rotates. In this embodiment, the number of holding holes 12 formed in the carrier 10 is one, but a plurality of holding holes 12 may be provided.
　図４は、キャリア１０を構成する樹脂積層板の断面構造を示す断面図である。 FIG. 4 is a cross-sectional view showing the cross-sectional structure of the resin laminate that constitutes the carrier 10.
　図４に示すように、両面研磨用キャリア１０のキャリア本体１１は、繊維基材２１に樹脂２２を含侵させてなる複合シート材２０（ＦＲＰシート）を複数枚重ね合わせた多層構造の樹脂積層板からなる。繊維基材２１としては、ガラス繊維織布、カーボン繊維織布などを用いることが好ましい。樹脂２２としては、エポキシ、フェノール、アラミドなどを用いることが好ましい。樹脂積層板は複合シート材２０を３層以上積層したものであることが好ましく、図示のように５層構造であることが特に好ましい。 As shown in FIG. 4, the carrier main body 11 of the double-sided polishing carrier 10 has a multilayered resin lamination structure in which a plurality of composite sheet materials 20 (FRP sheets) made by impregnating a fiber base material 21 with a resin 22 are laminated. Consists of boards. As the fiber base material 21, it is preferable to use glass fiber woven fabric, carbon fiber woven fabric, or the like. As the resin 22, it is preferable to use epoxy, phenol, aramid, or the like. The resin laminate is preferably one in which three or more layers of the composite sheet material 20 are laminated, and it is particularly preferable to have a five-layer structure as shown in the figure.
　本実施形態において、キャリア１０（キャリア本体１１）の主面の繊維露出率は５０％未満である。すなわち、両面研磨工程においては、繊維露出率が５０未満のキャリア１０が使用され、繊維露出率が５０％以上のキャリア１０は使用されない。繊維露出率が５０％以上になると、キャリアの耐摩耗性が急激に低下してキャリアの寿命が短くなるからである。 In this embodiment, the fiber exposure rate on the main surface of the carrier 10 (carrier main body 11) is less than 50%. That is, in the double-sided polishing step, a carrier 10 with a fiber exposure rate of less than 50 is used, and a carrier 10 with a fiber exposure rate of 50% or more is not used. This is because when the fiber exposure rate becomes 50% or more, the wear resistance of the carrier decreases rapidly and the life of the carrier becomes short.
　両面研磨工程で使用されるキャリア１０の繊維露出率は０％が理想的である。しかし、繊維露出率が０％のキャリア１０を常に使用することは極めて困難である。通常、樹脂積層板は、複数枚の複合シート材２０を熱プレスして一体化することにより作製される。熱プレス時には最表面の樹脂が流れ落ちてしまうため、繊維基材に対する樹脂の含侵量を増やしたとしても最表面の樹脂厚は増えない。 The fiber exposure rate of the carrier 10 used in the double-sided polishing process is ideally 0%. However, it is extremely difficult to always use a carrier 10 with a fiber exposure rate of 0%. Usually, a resin laminate is produced by heat-pressing and integrating a plurality of composite sheet materials 20. During hot pressing, the resin on the outermost surface runs off, so even if the amount of resin impregnated into the fiber base material is increased, the thickness of the resin on the outermost surface does not increase.
　加えて、完成直後の新品未使用のキャリアは平坦度が悪いため、実際に使用する前には新品キャリアの予備研磨（前処理）が行われる（図５参照）。具体的には、加工対象のシリコンウェーハの研磨前厚みとの差が５～１０μｍ、キャリアの平坦度が５μｍ以下となるように予備研磨が行われる。このような前処理を行うと、キャリア１０の主面に繊維基材２１が必ず露出することになり、取り代によっては繊維露出率が５０％以上になることも考えられる。繊維露出率が５０％以上になると、キャリアの摩耗速度が急激に増加し、キャリアの寿命が短くなる。 In addition, since a new, unused carrier immediately after completion has poor flatness, preliminary polishing (pretreatment) is performed on the new carrier before it is actually used (see FIG. 5). Specifically, preliminary polishing is performed so that the difference from the pre-polishing thickness of the silicon wafer to be processed is 5 to 10 μm, and the flatness of the carrier is 5 μm or less. If such pretreatment is performed, the fiber base material 21 will definitely be exposed on the main surface of the carrier 10, and depending on the machining allowance, the fiber exposure rate may be 50% or more. When the fiber exposure rate exceeds 50%, the wear rate of the carrier increases rapidly and the life of the carrier becomes short.
　しかし、本実施形態においては、両面研磨工程で使用するキャリアの主面の繊維露出率を５０％未満に維持し、一度も使用されていない未使用のキャリアを予備研磨する際には、予備研磨直後はもちろんのこと、キャリアを繰り返し使用して厚み下限値に到達したときにも５０％未満の繊維露出率が維持されるように取り代を調整するので、キャリアの耐摩耗性を向上させて長寿命化を図ることができる。 However, in this embodiment, the fiber exposure rate on the main surface of the carrier used in the double-sided polishing step is maintained at less than 50%, and when pre-polishing an unused carrier that has never been used, The machining allowance is adjusted to maintain less than 50% fiber exposure even when the carrier is used repeatedly and reaches the lower limit of thickness, which improves the wear resistance of the carrier. Longer life can be achieved.
　図６は、本発明の実施の形態によるシリコンウェーハの両面研磨方法を示すフローチャートである。 FIG. 6 is a flowchart showing a method for polishing both sides of a silicon wafer according to an embodiment of the present invention.
　図６に示すように、本実施形態によるシリコンウェーハの両面研磨方法では、まず未使用のキャリア１０を用意する（ステップＳ１）。上記のように、キャリア１０は、複数枚（例えば５枚）の複合シート材２０を熱プレスして樹脂積層板を形成した後、保持孔１２及び外周歯１３を含む所定の形状に打ち抜き加工することにより作製される。 As shown in FIG. 6, in the method for polishing both sides of a silicon wafer according to this embodiment, an unused carrier 10 is first prepared (step S1). As described above, the carrier 10 is made by heat-pressing a plurality of composite sheet materials 20 (for example, five sheets) to form a resin laminate, and then punching it into a predetermined shape including the holding holes 12 and the outer peripheral teeth 13. It is made by
　次に、キャリア１０の厚みの調整及び平坦度の向上を図るため、キャリアの予備研磨（前処理）を実施する（ステップＳ２）。キャリアの予備研磨では、ウェーハ研磨用の装置とは別装置を用いて、砥粒入りのスラリーを用いたキャリア研磨を実施する。またキャリアの予備研磨では、繊維露出率が５０％未満となるように研磨の取り代が設定される。例えば、ウェーハの研磨前厚み（例えば７８５μｍ）よりも５～１０μｍ薄い所定の厚み（厚み上限値）となるように研磨の取り代を設定して研磨加工を実施する。これにより、１セット内のキャリアの平坦度が５μｍ以下に調整されると共に、繊維露出率が５０％未満のキャリアが得られる。１セット内のキャリアの平坦度が５μｍ以下となるためには、個々のキャリアの平坦度も５μｍ以下であることは言うまでもない。 Next, in order to adjust the thickness and improve the flatness of the carrier 10, preliminary polishing (pretreatment) of the carrier is performed (step S2). In the carrier preliminary polishing, carrier polishing is performed using a slurry containing abrasive grains using a separate device from the wafer polishing device. In the preliminary polishing of the carrier, the polishing allowance is set so that the fiber exposure rate is less than 50%. For example, the polishing process is performed by setting the polishing allowance so that the wafer has a predetermined thickness (thickness upper limit) that is 5 to 10 μm thinner than the pre-polishing thickness of the wafer (for example, 785 μm). As a result, the flatness of the carrier in one set is adjusted to 5 μm or less, and a carrier with a fiber exposure rate of less than 50% is obtained. Needless to say, in order for the flatness of the carriers within one set to be 5 μm or less, the flatness of each individual carrier must also be 5 μm or less.
　次に、予備研磨後のキャリア１０を用いて実際にシリコンウェーハＷの両面研磨工程を実施する（ステップＳ３）。加工対象のシリコンウェーハは、目標厚み及び平坦度となるように両面研磨される。研磨加工が終了すると、シリコンウェーハＷはキャリアから取り出され、次の加工工程（片面研磨工程）に送られる。 Next, a double-sided polishing process of the silicon wafer W is actually performed using the carrier 10 after preliminary polishing (step S3). Both sides of the silicon wafer to be processed are polished to a target thickness and flatness. When the polishing process is completed, the silicon wafer W is taken out from the carrier and sent to the next process (single-sided polishing process).
　キャリア１０は再利用可能であり、所定の厚み下限値となるまで繰り返し使用される（ステップＳ４Ｎ、Ｓ５、Ｓ６、Ｓ３）。キャリアを両面研磨工程で使用するとキャリアの厚みも減少し、ウェーハの研磨を繰り返すことによりキャリア自身も摩耗していく。特に、樹脂製キャリアは金属製キャリアと比べて摩耗が激しいため、繰り返し使用できる回数が少なく、生産性の低下につながる。 The carrier 10 is reusable and is used repeatedly until a predetermined lower limit thickness is reached (steps S4N, S5, S6, S3). When a carrier is used in a double-sided polishing process, the thickness of the carrier decreases, and the carrier itself wears out as wafers are repeatedly polished. In particular, resin carriers are subject to more wear than metal carriers, so they can be used less frequently, leading to a decrease in productivity.
　ウェーハＷを両面研磨するためにはウェーハＷよりも薄いキャリア１０を使用する必要があるが、ウェーハＷの目標厚みに対して非常に薄いキャリア１０を使用した場合には、ウェーハの所望の平坦度を確保することができない。そのため、両面研磨工程で使用可能なキャリアの厚みの下限値がウェーハの目標厚み付近に規定されており、下限値以下の薄いキャリアは使用対象から除外（廃棄）される（ステップＳ４Ｙ、Ｓ７）。キャリアの厚み下限値は、例えばウェーハの研磨前厚み（例えば７８５μｍ）マイナス２０μｍに設定される。 In order to polish both sides of the wafer W, it is necessary to use a carrier 10 that is thinner than the wafer W. However, if a carrier 10 that is very thin relative to the target thickness of the wafer W is used, the desired flatness of the wafer cannot be achieved. cannot be secured. Therefore, the lower limit of the carrier thickness that can be used in the double-sided polishing process is defined near the target thickness of the wafer, and carriers that are thinner than the lower limit are excluded from use (discarded) (steps S4Y, S7). The lower limit of the carrier thickness is set to, for example, the thickness of the wafer before polishing (for example, 785 μm) minus 20 μm.
　さらに、キャリアの主面の繊維露出率が５０％以上のキャリアも継続使用の対象から除外される（ステップＳ５Ｙ、Ｓ７）。通常、キャリアの繊維露出率は使用回数と共に増加し、繊維露出率が５０％以上のキャリアの摩耗速度は非常に早くなる。また、ガラス繊維の摩耗片の増加によってウェーハの表面にスクラッチが発生する確率が大幅に増加する。しかし、本実施形態によるキャリアは、所定の厚み上限値から厚み下限値に到達するまで繰り返し使用しても繊維露出率が常に５０％未満となるように形成されているため、キャリアの摩耗速度の増加を抑えて長寿命化を図ることができる。また、ウェーハの表面にスクラッチが発生する確率を低減することができる。 Furthermore, carriers with a fiber exposure rate of 50% or more on the main surface of the carrier are also excluded from continued use (steps S5Y, S7). Normally, the fiber exposure rate of a carrier increases with the number of times of use, and the wear rate of a carrier with a fiber exposure rate of 50% or more becomes extremely rapid. Additionally, the probability of scratches occurring on the wafer surface increases significantly due to the increase in glass fiber wear debris. However, the carrier according to the present embodiment is formed so that the fiber exposure rate is always less than 50% even if it is repeatedly used from a predetermined upper thickness limit to a lower thickness limit, so the wear rate of the carrier is reduced. It is possible to suppress the increase and extend the lifespan. Furthermore, the probability of scratches occurring on the surface of the wafer can be reduced.
　以上説明したように、本実施形態によるシリコンウェーハの両面研磨方法は、樹脂積層板からなる両面研磨用キャリアを使用してシリコンウェーハを両面研磨すると共に、キャリアの主面の繊維露出率が５０％未満であるので、耐摩耗性の向上によるキャリアの長寿命化を図ることができる。 As explained above, in the method for double-sided polishing of a silicon wafer according to the present embodiment, both sides of the silicon wafer are polished using a double-sided polishing carrier made of a resin laminate, and the fiber exposure rate on the main surface of the carrier is 50%. Therefore, it is possible to extend the life of the carrier by improving wear resistance.
　以上、本発明の好ましい実施形態について説明したが、本発明は、上記の実施形態に限定されることなく、本発明の主旨を逸脱しない範囲で種々の変更が可能であり、それらも本発明の範囲内に包含されるものであることはいうまでもない。 Although the preferred embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the gist of the present invention. Needless to say, it is included within the scope.
　例えば、上記実施形態においては、３枚の樹脂製キャリアを装填可能な両面研磨装置を例に挙げたが、両面研磨装置の構成は特に限定されず、樹脂製キャリアを使用可能な種々の装置を用いることができる。またキャリアに装填可能なウェーハの枚数やキャリアの形状も特に限定されない。 For example, in the above embodiment, a double-sided polishing device capable of loading three resin carriers was used as an example, but the configuration of the double-sided polishing device is not particularly limited, and various devices capable of using resin carriers can be used. Can be used. Further, the number of wafers that can be loaded into the carrier and the shape of the carrier are not particularly limited.
＜キャリアの平坦度とウェーハの平坦度品質との関係＞
　キャリアの平坦度がウェーハの平坦度品質に与える影響を評価した。両面研磨装置としては、直径５００ｍｍのキャリアを５枚装填可能なものを用いた。キャリアは単一のウェーハ保持孔を有し、直径３００ｍｍのウェーハを１枚装填可能である。ウェーハとしては直径３００ｍｍのｐ型シリコン単結晶ウェーハを用いた。研磨パッドは砥粒を含まないウレタン製研磨パッドを用いた。スラリーは、粒径が６０～１１０ｎｍのシリカ砥粒を含むｐＨが１１～１２の無機アルカリ水溶液を用いた。 <Relationship between carrier flatness and wafer flatness quality>
The influence of carrier flatness on wafer flatness quality was evaluated. As a double-sided polishing device, one capable of loading five carriers each having a diameter of 500 mm was used. The carrier has a single wafer holding hole and can load one wafer with a diameter of 300 mm. A p-type silicon single crystal wafer with a diameter of 300 mm was used as the wafer. A urethane polishing pad containing no abrasive grains was used as the polishing pad. As the slurry, an inorganic alkaline aqueous solution containing silica abrasive grains with a particle size of 60 to 110 nm and having a pH of 11 to 12 was used.
　作製したキャリアは事前に予備研磨を行った後、レーザー変位計を用いてキャリアの厚み測定を行い、１バッチ内のキャリアの平坦度を求めた。１バッチ内のキャリアの平坦度は、キャリアの保持孔中心から上下左右の四方向におけるキャリアの保持孔の中心から１．０１ｒ（ｍｍ）離れた位置を測定点とした。 After the prepared carriers were pre-polished in advance, the thickness of the carriers was measured using a laser displacement meter to determine the flatness of the carriers within one batch. The flatness of the carrier within one batch was measured at positions 1.01 r (mm) away from the center of the carrier's holding hole in four directions, up, down, left, and right from the center of the carrier's holding hole.
　キャリアの平坦度の算出方法を図７に示す。保持孔の中心Ｃからキャリアの中心に向かう方向を基準方位（θ＝０°）とし、θ＝０°、９０°、１８０°、２７０°の四方向における、外周近傍の４点の厚み測定値Ｘ１、Ｘ２、Ｘ３、Ｘ４をそれぞれ求めた。保持孔１２の中心Ｃから厚みの測定点までの距離は１．０１ｒ（ｍｍ）とした。ｒはウェーハ保持孔の半径である。 FIG. 7 shows a method for calculating carrier flatness. The direction from the center C of the holding hole toward the center of the carrier is the reference direction (θ = 0°), and the thickness measurements at four points near the outer periphery in the four directions of θ = 0°, 90°, 180°, and 270°. X 1 , X 2 , X 3 , and X 4 were determined, respectively. The distance from the center C of the holding hole 12 to the thickness measurement point was 1.01 r (mm). r is the radius of the wafer holding hole.
　５枚のキャリアの各々から４点ずつ得られた合計２０点の測定値の中での最大値Ｘｍａｘと最小値Ｘｍｉｎとの差ΔＸ＝Ｘｍａｘ－Ｘｍｉｎを１バッチ内のキャリアの平坦度（μｍ）とした。 The difference between the maximum value X max and the minimum value X min among the measurement values of a total of 20 points, 4 points each obtained from each of the 5 carriers, is calculated as the flatness of the carriers within one batch. degree (μm).
　続いて、両面研磨後のシリコンウェーハのＥＳＦＱＲ（Edge Site flatness Front reference least sQuare Range）を測定した。平坦度が悪化しやすいウェーハのエッジに注目した平坦度の評価指標（サイトフラットネス）であり、エッジロールオフの大きさを示すものである。ウェーハのエッジの平坦度は、ウェーハの最外周から例えば２～３２ｍｍの範囲（セクタ長３０ｍｍ）に設定されたリング状の外周領域を周方向にさらに均等に分割して得られる単位領域（サイト）ごとに求められる。ＥＳＦＱＲの測定にはウェーハ平坦度測定装置（KLA-Tencor社製Wafer Sight）を用いた。測定条件としては、測定範囲を２９６ｍｍ（最外周２ｍｍ除外）とし、エッジサイト測定ではセクタ数（サイト数）を７２とし、セクタ長を３０ｍｍとした。キャリアの平坦度と研磨後のウェーハのＥＳＦＱＲとの関係を図８のグラフに示す。なおＥＳＦＱＲは１バッチ内の５枚のウェーハの測定値の平均値である。 Subsequently, the ESFQR (Edge Site flatness Front reference least sQuare Range) of the silicon wafer after double-sided polishing was measured. This is a flatness evaluation index (site flatness) that focuses on the edges of the wafer, where flatness tends to deteriorate, and indicates the magnitude of edge roll-off. The flatness of the edge of the wafer is determined by unit areas (sites) obtained by dividing a ring-shaped outer circumferential area evenly in the circumferential direction, for example, within a range of 2 to 32 mm (sector length 30 mm) from the outermost circumference of the wafer. required for each. A wafer flatness measuring device (Wafer Sight manufactured by KLA-Tencor) was used to measure ESFQR. As for the measurement conditions, the measurement range was 296 mm (excluding the outermost 2 mm), the number of sectors (sites) was 72 in the edge site measurement, and the sector length was 30 mm. The graph of FIG. 8 shows the relationship between the flatness of the carrier and the ESFQR of the wafer after polishing. Note that ESFQR is the average value of the measured values of five wafers within one batch.
　図８に示すように、キャリアの平坦度が５μｍよりも大きくなるとウェーハのＥＳＦＱＲが急激に悪化することが分かる。これは、１バッチ内のキャリアの厚みばらつき（平坦度）が大きいことにより、１バッチ内のウェーハの研磨状態にばらつきが生じるためと考えられる。 As shown in FIG. 8, it can be seen that when the carrier flatness becomes larger than 5 μm, the ESFQR of the wafer deteriorates rapidly. This is thought to be due to large variations in the thickness (flatness) of the carriers within one batch, which causes variations in the polished state of the wafers within one batch.
＜キャリアの繊維露出率とキャリア摩耗速度との関係＞
　次に、キャリアの主面の繊維露出率がキャリア摩耗速度に与える影響を評価した。キャリアの材料としては、ガラスクロス基材にエポキシ樹脂を含侵させたシート材を５枚重ねた５層構造の樹脂積層板を用いて構成した。 <Relationship between carrier fiber exposure rate and carrier wear rate>
Next, the influence of the fiber exposure rate on the main surface of the carrier on the carrier wear rate was evaluated. As the material of the carrier, a resin laminate having a five-layer structure in which five sheets of glass cloth base material impregnated with epoxy resin were stacked was used.
　キャリアの主面の繊維露出率は、キャリアのウェーハ保持孔の外周端から５０ｍｍ以内の外周部領域から無作為に選んだ１０箇所を観察箇所とし、各観察箇所でＣＣＤ顕微鏡画像を撮影し、撮影画像を二値化処理して繊維部分の面積比を算出した。図９（ａ）及び（ｂ）にキャリア表面のＣＣＤ顕微鏡画像の一例を示す。図９（ａ）は二値化処理前の画像、図９（ｂ）は二値化処理後の画像を示している。各測定箇所の画像サイズは２．８×２．１（ｍｍ）である。キャリア表面の繊維露出率の調整は、キャリアの厚みや平坦度を整えるためにキャリアを予備研磨する工程において取り代を調整することにより行った。 The fiber exposure rate on the main surface of the carrier was determined by observing 10 points randomly selected from the outer circumferential area within 50 mm from the outer edge of the wafer holding hole of the carrier, and taking a CCD microscope image at each observation point. The image was binarized and the area ratio of the fiber portion was calculated. An example of a CCD microscope image of the carrier surface is shown in FIGS. 9(a) and 9(b). FIG. 9(a) shows the image before the binarization process, and FIG. 9(b) shows the image after the binarization process. The image size of each measurement location is 2.8×2.1 (mm). The fiber exposure rate on the carrier surface was adjusted by adjusting the machining allowance in the step of preliminary polishing the carrier in order to adjust the thickness and flatness of the carrier.
　キャリア摩耗速度は、キャリア厚みより少し薄いダミーシリコンウェーハを装填した上で、コロイダルシリカ含有のシリコンウェーハ研磨用スラリーを用いてキャリアを両面研磨し、このときのキャリアの厚みの単位時間当たりの減少量（研磨前後における厚み差）から算出した。その結果を図１０に示す。図１０のグラフにおいて、縦軸のキャリア摩耗速度は、繊維露出率が９０％のときの値を基準値１００としたときの相対値である。 The carrier wear rate is calculated by loading a dummy silicon wafer that is slightly thinner than the carrier thickness and polishing both sides of the carrier using a slurry for polishing silicon wafers containing colloidal silica, and calculating the amount of decrease in carrier thickness per unit time. (Difference in thickness before and after polishing) The results are shown in FIG. In the graph of FIG. 10, the carrier wear rate on the vertical axis is a relative value when the value when the fiber exposure rate is 90% is set as the reference value 100.
　図１０から明らかなように、繊維露出率が４２％以下のときにはキャリア摩耗速度が２７以下と低いが、繊維露出率が５０％前後のときにキャリア摩耗速度が急速に増加し、繊維露出率が６０％以上のときにはキャリア摩耗速度が約１００近くになることが分かる。逆に、キャリア摩耗速度は繊維露出率が６０％を下回るところから急激に低下し、繊維露出率が５０％のときのキャリア摩耗速度は繊維露出率が９０％のときのキャリア摩耗速度の半分以下となることが分かる。このように、繊維露出率が５０％以上になるとキャリアが摩耗しやすくなる理由は、アルカリ性の高い研磨用スラリーによってキャリアの表面に露出しているガラス繊維部分の腐食が進行するからと考えられる。 As is clear from Figure 10, when the fiber exposure rate is 42% or less, the carrier wear rate is low at 27 or less, but when the fiber exposure rate is around 50%, the carrier wear rate increases rapidly and the fiber exposure rate increases. It can be seen that when the ratio is 60% or more, the carrier wear rate approaches about 100. Conversely, the carrier wear rate decreases rapidly when the fiber exposure rate is less than 60%, and the carrier wear rate when the fiber exposure rate is 50% is less than half of the carrier wear rate when the fiber exposure rate is 90%. It turns out that The reason why the carrier is easily worn out when the fiber exposure rate is 50% or more is thought to be that the highly alkaline polishing slurry progresses corrosion of the glass fiber portion exposed on the surface of the carrier.
＜キャリアの繊維露出率とウェーハ処理枚数との関係＞
　あるウェーハの厚み及び平坦度規格を考慮して設定されたキャリアの厚み規格の上限から下限までキャリアを繰り返し使用したときのウェーハの処理枚数を評価した。その結果を図１１に示す。 <Relationship between carrier fiber exposure rate and number of wafers processed>
The number of wafers processed was evaluated when the carrier was repeatedly used from the upper limit to the lower limit of the carrier thickness standard set in consideration of a certain wafer thickness and flatness standard. The results are shown in FIG.
　図１１から明らかなように、繊維露出率が４２％以下のキャリアの場合、ウェーハの処理枚数は４００前後であるが、繊維露出率が４８％のときのウェーハの処理枚数は２５０まで低下し、さらに繊維露出率が６０％以上のときにはウェーハの処理枚数が１００程度まで低下した。 As is clear from FIG. 11, in the case of a carrier with a fiber exposure rate of 42% or less, the number of wafers processed is around 400, but when the fiber exposure rate is 48%, the number of wafers processed drops to 250. Further, when the fiber exposure rate was 60% or more, the number of processed wafers decreased to about 100.
　キャリアの繊維露出率は上記のようにキャリアの摩耗速度に影響を与えることから、繊維露出率を５０％未満に維持することが望ましく、これによりキャリアの寿命を延ばすことができることが確認できた。 Since the fiber exposure rate of the carrier affects the wear rate of the carrier as described above, it is desirable to maintain the fiber exposure rate below 50%, and it was confirmed that this can extend the life of the carrier.
１　　両面研磨装置
２　　上定盤
２ａ　　貫通孔
３　　下定盤
４　　研磨布
５　　スラリー供給装置
６　　ノズル
７　　サンギヤ
８　　インターナルギヤ
１０　　両面研磨用キャリア
１１　　キャリア本体
１２　　ウェーハ保持孔
１３　　外周歯
２０　　複合シート材
２０ａ　　複合シート材
２０ｂ　　複合シート材
２１　　繊維基材
２２　　樹脂
Ｗ　　シリコンウェーハ 1 Double-sided polishing device 2 Upper surface plate 2a Through hole 3 Lower surface plate 4 Polishing cloth 5 Slurry supply device 6 Nozzle 7 Sun gear 8 Internal gear 10 Double-sided polishing carrier 11 Carrier body 12 Wafer holding hole 13 Peripheral teeth 20 Composite sheet material 20a Composite Sheet material 20b Composite sheet material 21 Fiber base material 22 Resin W Silicon wafer

Claims (9)

  1. 　シリコンウェーハを両面研磨する際に前記シリコンウェーハを保持する両面研磨用キャリアであって、
    　繊維基材を含む樹脂積層板からなる略円盤状のキャリア本体と、
    　前記キャリア本体に形成されたウェーハ保持孔とを備え、
    　前記キャリア本体の主面の繊維露出率が５０％未満であることを特徴とする両面研磨用キャリア。     A double-sided polishing carrier that holds a silicon wafer when polishing both sides of the silicon wafer,
    A substantially disc-shaped carrier body made of a resin laminate including a fiber base material;
    a wafer holding hole formed in the carrier body;
    A carrier for double-sided polishing, characterized in that a fiber exposure rate on the main surface of the carrier body is less than 50%.
  2. 　前記キャリア本体の平坦度が５μｍ以下である、請求項１に記載の両面研磨用キャリア。 The carrier for double-sided polishing according to claim 1, wherein the flatness of the carrier body is 5 μm or less.
  3. 　前記キャリア本体の厚みが前記シリコンウェーハの研磨前厚みよりも薄く且つ厚み差が５～２０μｍである、請求項２に記載の両面研磨用キャリア。 The carrier for double-sided polishing according to claim 2, wherein the thickness of the carrier body is thinner than the thickness of the silicon wafer before polishing, and the difference in thickness is 5 to 20 μm.
  4. 　前記樹脂積層板は、前記繊維基材に樹脂を含侵させた複合シート材を複数枚重ねた多層構造を有し、
    　前記樹脂は、エポキシ、フェノール又はアラミドであり、
    　前記繊維基材は、ガラス繊維織布又はカーボン繊維織布であり、
    　前記多層構造は３層以上である、請求項１乃至３のいずれか一項に記載の両面研磨用キャリア。     The resin laminate has a multilayer structure in which a plurality of composite sheet materials in which the fiber base material is impregnated with resin are stacked,
    The resin is epoxy, phenol or aramid,
    The fiber base material is a glass fiber woven fabric or a carbon fiber woven fabric,
    The double-sided polishing carrier according to any one of claims 1 to 3, wherein the multilayer structure has three or more layers.
  5. 　両面研磨用キャリアを用意するステップと、
    　研磨布がそれぞれ貼付された上定盤と下定盤との間に配設された前記両面研磨用キャリアにシリコンウェーハを装填した後、前記上定盤と前記下定盤との間にスラリーを供給しながら前記上定盤と前記下定盤をそれぞれ回転させて前記シリコンウェーハを両面研磨するステップとを備え、
    　前記両面研磨用キャリアは、
    　繊維基材を含む樹脂積層板からなる略円盤状のキャリア本体と、
    　前記キャリア本体に形成されたウェーハ保持孔とを備え、前記キャリア本体の主面の繊維露出率が５０％未満であることを特徴とするシリコンウェーハの両面研磨方法。     a step of preparing a carrier for double-sided polishing;
    After loading a silicon wafer into the double-sided polishing carrier disposed between an upper surface plate and a lower surface plate each having a polishing cloth attached thereto, a slurry is supplied between the upper surface plate and the lower surface plate. while polishing both sides of the silicon wafer by rotating the upper surface plate and the lower surface plate, respectively,
    The double-sided polishing carrier is
    A substantially disc-shaped carrier body made of a resin laminate including a fiber base material;
    A method for double-sided polishing of a silicon wafer, comprising: a wafer holding hole formed in the carrier body, the fiber exposure rate on the main surface of the carrier body being less than 50%.
  6. 　前記シリコンウェーハを両面研磨するステップの前に、前記キャリア本体の平坦度が５μｍ以下且つ前記繊維露出率が５０％未満となるように前記両面研磨用キャリアを予備研磨するステップをさらに備える、請求項５に記載の両面研磨方法。 2. The method further comprises, before the step of polishing both sides of the silicon wafer, pre-polishing the carrier for double-sided polishing so that the flatness of the carrier body is 5 μm or less and the fiber exposure rate is less than 50%. 5. The double-sided polishing method described in 5.
  7. 　前記両面研磨用キャリアを予備研磨するステップは、前記シリコンウェーハの研磨前厚みよりも薄く且つ厚み差が５～１０μｍとなるように前記キャリア本体の厚みを調整する、請求項６に記載の両面研磨方法。 Double-sided polishing according to claim 6, wherein the step of pre-polishing the double-sided polishing carrier adjusts the thickness of the carrier body so that it is thinner than the pre-polishing thickness of the silicon wafer and has a thickness difference of 5 to 10 μm. Method.
  8. 　前記シリコンウェーハを両面研磨するステップは、前記シリコンウェーハの研磨前厚みとの厚み差が２０μｍ以下の範囲で前記両面研磨用キャリアを使用する、請求項７に記載の両面研磨方法。 8. The double-sided polishing method according to claim 7, wherein in the step of polishing both sides of the silicon wafer, the carrier for double-sided polishing is used in a range where the difference in thickness from the thickness of the silicon wafer before polishing is 20 μm or less.
  9. 　研磨布がそれぞれ貼付された上定盤及び下定盤と、
    　前記上定盤と前記下定盤との間に配設されるシリコンウェーハを保持する両面研磨用キャリアとを備え、
    　前記両面研磨用キャリアは、
    　繊維基材を含む樹脂積層板からなる略円盤状のキャリア本体と、
    　前記キャリア本体に形成されたウェーハ保持孔とを備え、
    　前記キャリア本体の主面の繊維露出率が５０％未満であることを特徴とする両面研磨装置。     An upper surface plate and a lower surface plate each having an abrasive cloth attached thereto;
    a double-sided polishing carrier that holds a silicon wafer and is disposed between the upper surface plate and the lower surface plate;
    The double-sided polishing carrier is
    A substantially disc-shaped carrier body made of a resin laminate including a fiber base material;
    a wafer holding hole formed in the carrier body;
    A double-sided polishing device characterized in that a fiber exposure rate on the main surface of the carrier body is less than 50%.
PCT/JP2023/009225 2022-04-19 2023-03-10 Carrier for double-sided polishing, and silicon wafer double-sided polishing method and device employing same WO2023203915A1 (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006026760A (en) * 2004-07-13 2006-02-02 Speedfam Co Ltd Carrier for holding material to be polished
JP2008044083A (en) * 2006-08-18 2008-02-28 Kyocera Chemical Corp Holding material for grinding
KR20100065562A (en) * 2008-12-08 2010-06-17 주식회사 실트론 Lapping carrier
WO2014002467A1 (en) * 2012-06-25 2014-01-03 株式会社Sumco Method for polishing work and work polishing device
JP2015125788A (en) * 2013-12-26 2015-07-06 Hoya株式会社 Manufacturing method of glass substrate for magnetic disk
JP2020055065A (en) * 2018-10-01 2020-04-09 マーベリックパートナーズ株式会社 Resin-made polishing carrier and method for producing the same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006026760A (en) * 2004-07-13 2006-02-02 Speedfam Co Ltd Carrier for holding material to be polished
JP2008044083A (en) * 2006-08-18 2008-02-28 Kyocera Chemical Corp Holding material for grinding
KR20100065562A (en) * 2008-12-08 2010-06-17 주식회사 실트론 Lapping carrier
WO2014002467A1 (en) * 2012-06-25 2014-01-03 株式会社Sumco Method for polishing work and work polishing device
JP2015125788A (en) * 2013-12-26 2015-07-06 Hoya株式会社 Manufacturing method of glass substrate for magnetic disk
JP2020055065A (en) * 2018-10-01 2020-04-09 マーベリックパートナーズ株式会社 Resin-made polishing carrier and method for producing the same

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