WO2023202610A1 - 光模块 - Google Patents

光模块 Download PDF

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Publication number
WO2023202610A1
WO2023202610A1 PCT/CN2023/089180 CN2023089180W WO2023202610A1 WO 2023202610 A1 WO2023202610 A1 WO 2023202610A1 CN 2023089180 W CN2023089180 W CN 2023089180W WO 2023202610 A1 WO2023202610 A1 WO 2023202610A1
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WO
WIPO (PCT)
Prior art keywords
unit
chip
circuit
current supply
differential signal
Prior art date
Application number
PCT/CN2023/089180
Other languages
English (en)
French (fr)
Inventor
张加傲
王欣南
王华强
孙祥勋
杨思更
王旭东
葛君
高佳斌
Original Assignee
青岛海信宽带多媒体技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN202220934545.XU external-priority patent/CN217034336U/zh
Priority claimed from CN202222771414.7U external-priority patent/CN218352503U/zh
Priority claimed from CN202223498426.3U external-priority patent/CN219372431U/zh
Application filed by 青岛海信宽带多媒体技术有限公司 filed Critical 青岛海信宽带多媒体技术有限公司
Publication of WO2023202610A1 publication Critical patent/WO2023202610A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements

Definitions

  • the present disclosure relates to the technical field of optical fiber communication, and in particular, to an optical module.
  • optical modules as one of the key components in optical communication equipment, can realize photoelectric signal conversion; in the development process of optical communication technology, the data transmission rate of optical modules is required to continue to increase.
  • An optical module provided according to some embodiments of the present disclosure includes an upper housing, a lower housing, a circuit board, a light emitting component, a DSP chip located on the circuit board, a current supply circuit, a voltage conversion unit, an MCU and a temperature detector; Wherein, the lower shell and the upper shell are covered to form a wrapping cavity, and the circuit board is arranged inside the wrapping cavity; the light emitting component is electrically connected to the circuit board, and the light emitting component includes: a laser chip (such as a laser), and the laser chip is configured In order to convert the electrical signal into an optical signal, the laser chip includes a light-emitting area and an electro-absorption modulation area, the light-emitting area is configured to emit light that does not carry data, and the electro-absorption modulation area is configured to modulate the light emitted by the light-emitting area; One end of the DSP chip is connected to the electroabsorption modulation area through a differential signal line to output an AC load signal to the electroab
  • the output terminal of the voltage conversion unit is electrically connected to the current supply circuit to output a DC drive signal to the electroabsorption modulation area, thereby providing the electroabsorption modulation area with a DC drive signal.
  • the temperature detector is arranged on one side of the laser chip and is configured to monitor the temperature of the laser chip;
  • the MCU is connected to the temperature detector and the current supply circuit, and the MCU is configured to adjust the current supply circuit according to the temperature the output voltage.
  • the current supply circuit includes: a first unit and a second unit connected in series.
  • the first unit and the second unit are connected through the top layer wiring of the circuit board or the via hole of the circuit board;
  • the first unit includes a first unit and a second unit connected in series.
  • a magnetic bead and a second magnetic bead are electrically connected to the electroabsorption modulation area through a differential signal line;
  • the second unit including an inductor and a resistor, is electrically connected to the voltage conversion unit; and/or,
  • the current supply circuit includes: a voltage stabilizing unit, a sampling unit and a control unit; the input terminal of the voltage stabilizing unit is electrically connected to the output terminal of the voltage conversion unit, and the output terminal of the voltage stabilizing unit is connected to the laser chip; the sampling unit is connected in series between the voltage stabilizing unit and the laser chip between; the first input end of the control unit is electrically connected to one end of the sampling unit, the second input end of the control unit is electrically connected to the other end of the sampling unit, and the output end of the control unit is connected to the control end of the voltage stabilizing unit, so that the voltage stabilizing unit can
  • the control unit controls the input of bias current to the laser chip; and/or,
  • the current supply circuit includes: a bias circuit and a first AC filter circuit.
  • One end of the bias circuit is electrically connected to the output end of the voltage conversion unit, and the other end of the bias circuit is electrically connected to the positive electrode of the laser chip through the first AC filter circuit.
  • the first AC filter circuit is configured to isolate the AC signal.
  • Figure 1 is a connection diagram of an optical communication system provided according to some embodiments of the present disclosure.
  • Figure 2 is a structural diagram of an optical network terminal provided according to some embodiments of the present disclosure.
  • Figure 3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure.
  • Figure 4 is an exploded structural view of an optical module provided according to some embodiments of the present disclosure.
  • Figure 5 is a schematic diagram of a partial structure of an optical module provided according to some embodiments of the present disclosure.
  • Figure 6 is a schematic diagram of partial signal flow of an optical module according to some embodiments of the present disclosure.
  • Figure 7 is a structural block diagram of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 8 is a schematic structural diagram of an MCU provided according to some embodiments of the present disclosure.
  • Figure 9 is a structural block diagram 2 of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 10 is a structural block diagram 3 of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 11 is a structural block diagram 3 of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 12 is a structural block diagram 4 of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 13 is a structural block diagram 5 of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 14 is a structural block diagram 6 of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 15 is a structural block diagram 7 of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 16 is a schematic diagram 1 of the setup of an 8-channel bias circuit in an optical module according to some embodiments of the present disclosure
  • Figure 17 is a schematic diagram 2 of the setup of an 8-channel bias circuit in an optical module according to some embodiments of the present disclosure
  • Figure 18 is a schematic diagram of the setup of a 16-channel bias circuit in an optical module according to some embodiments of the present disclosure
  • Figure 19 is a schematic diagram of the setup of the 8-channel bias circuit in Figure 18;
  • Figure 20 is a partial schematic diagram of Figure 19;
  • Figure 21 is a schematic diagram of the setup of the other 8-channel bias circuit in Figure 18;
  • Figure 22 is a partial schematic diagram of Figure 21;
  • Figure 23 is a schematic diagram of the internal structure of an optical module provided according to some embodiments of the present disclosure.
  • Figure 24 is a schematic diagram of a current source circuit provided according to some embodiments of the present disclosure.
  • Figure 25 is a schematic structural diagram of a current source circuit provided according to some embodiments of the present disclosure.
  • Optical communication technology establishes information transmission between information processing devices.
  • Optical communication technology loads information onto light and uses the propagation of light to realize the transmission of information.
  • Light loaded with information is an optical signal.
  • the propagation of optical signals in information transmission equipment can reduce the loss of optical power and achieve high-speed, long-distance, and low-cost information transmission.
  • the information that information processing equipment can process exists in the form of electrical signals.
  • Optical network terminals/gateways, routers, switches, mobile phones, computers, servers, tablets, and televisions are common information processing equipment, and optical fibers and optical waveguides are common information transmission equipment.
  • Information processing equipment and information transmission equipment can realize mutual conversion of optical signals and electrical signals through optical modules.
  • an optical fiber is connected to the optical signal input end and/or the optical signal output end of the optical module, and an optical network terminal is connected to the electrical signal input end and/or the electrical signal output end of the optical module.
  • the first optical signal from the optical fiber is transmitted into the optical module, the optical module converts the first optical signal into a first electrical signal, and the optical module transmits the first electrical signal into the optical network terminal.
  • the second electrical signal from the optical network terminal is transmitted into the optical module, the optical module converts the second electrical signal into a second optical signal, and the optical module transmits the second optical signal into the optical fiber.
  • information processing equipment can be connected to each other through electrical signal networks, at least one type of information processing equipment needs to be directly connected to the optical module. It is not required that all types of information processing equipment are directly connected to the optical module. The information of the optical module is directly connected. The processing equipment is called the host computer of the optical module.
  • Figure 1 is a partial architecture diagram of an optical communication system according to some embodiments of the present disclosure. As shown in Figure 1, the optical communication system is partially represented by a remote information processing device 1000, a local information processing device 2000, a host computer 100, an optical module 200, an optical fiber 101 and a network cable 103.
  • One end of the optical fiber 101 extends toward the remote information processing device 1000, and the other end is connected to the optical interface of the optical module 200.
  • the optical signal can undergo total reflection in the optical fiber 101.
  • the propagation of the optical signal in the total reflection direction can almost maintain the original optical power.
  • the optical signal undergoes total reflection multiple times in the optical fiber 101 and will come from the direction of the remote information processing device 1000.
  • the optical signal is transmitted into the optical module 200, or the light from the optical module 200 is propagated toward the remote information processing device 1000 to realize long-distance information transmission with low power loss.
  • the number of optical fibers 101 may be one or multiple (two or more); the optical fibers 101 and the optical module 200 may be pluggable or fixedly connected.
  • the host computer 100 has an optical module interface 102, and the optical module interface 102 is configured to access the optical module 200, so that the host computer 100 and the optical module 200 establish a one-way/bi-directional electrical signal connection; the host computer 100 is configured to connect to the optical module 200.
  • 200 provides data signals, or receives data signals from the optical module 200, or monitors and controls the working status of the optical module 200.
  • the host computer 100 has an external electrical interface, such as a Universal Serial Bus interface (Universal Serial Bus, USB) and a network cable interface 104.
  • the external electrical interface can be connected to an electrical signal network.
  • the network cable interface 104 is configured to connect to the network cable 103 so that the host computer 100 and the network cable 103 establish a one-way/bi-directional electrical signal connection.
  • Optical Network Unit Optical Line Terminal
  • ONT Optical Network Equipment
  • data center servers are common host computers.
  • the network cable 103 establishes an electrical signal connection between the local information processing device 2000 and the host computer 100.
  • the third electrical signal sent by the local information processing device 2000 is transmitted to the host computer 100 through the network cable 103.
  • the host computer 100 generates a second electrical signal based on the third electrical signal, and the second electrical signal from the host computer 100 is transmitted into the optical module. 200.
  • the optical module 200 converts the second electrical signal into a second optical signal.
  • the optical module 200 transmits the second optical signal into the optical fiber 101.
  • the second optical signal is transmitted to the remote information processing device 1000 in the optical fiber 101.
  • the first optical signal from the direction of the remote information processing device 1000 is propagated through the optical fiber 101.
  • the first optical signal from the optical fiber 101 is transmitted into the optical module 200.
  • the optical module 200 converts the first optical signal into a first electrical signal.
  • the optical module 200 transmits the first electrical signal to the host computer 100.
  • the host computer 100 generates a fourth electrical signal based on the first electrical signal.
  • the host computer 100 transmits the fourth electrical signal to the local information processing device 2000.
  • the optical module is a tool that realizes the mutual conversion of optical signals and electrical signals. During the above-mentioned conversion process of optical signals and electrical signals, the information does not change, and the encoding and decoding method of the information can change.
  • FIG. 2 is a partial structural diagram of a host computer provided according to some embodiments of the present disclosure.
  • the host computer 100 also includes a PCB circuit board 105 provided in the housing, a cage 106 provided on the surface of the PCB circuit board 105, a radiator 107 provided on the cage 106, and a heat sink 107 provided inside the cage 106.
  • the heat sink 107 has a protruding structure that increases the heat dissipation area, and the fin-like structure is a common protruding structure.
  • the optical module 200 is inserted into the cage 106 of the host computer 100, and the optical module 200 is fixed by the cage 106.
  • the heat generated by the optical module 200 is conducted to the cage 106, and then diffused through the heat sink 107.
  • the electrical interface of the optical module 200 is connected to the electrical connector inside the cage 106.
  • FIG. 3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure
  • FIG. 4 is an exploded view of an optical module provided according to some embodiments of the present disclosure.
  • the optical module 200 includes a shell, a circuit board 300 disposed in the shell, a light emitting component 400 and a light receiving component 500 .
  • the present disclosure is not limited thereto.
  • the optical module 200 includes one of a light emitting component 400 and a light receiving component 500 .
  • the housing includes an upper housing 201 and a lower housing 202.
  • the upper housing 201 is covered on the lower housing 202 to form the above-mentioned housing with two openings 204 and 205; the outer contour of the housing generally presents a square body.
  • the lower case 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and perpendicular to the bottom plate 2021; the upper case 201 includes a cover plate 2011, and the cover plate 2011 covers the lower case. on the two lower side plates 2022 of 202 to form the above-mentioned housing.
  • the lower case 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and perpendicular to the bottom plate 2021;
  • the upper case 201 includes a cover plate 2011, and two lower side plates 2022 located on both sides of the cover plate 2011.
  • the two upper side plates arranged perpendicularly to the cover plate 2011 are combined with the two lower side plates 2022 to realize that the upper housing 201 is covered on the lower housing 202 .
  • the direction of the connection between the two openings 204 and 205 may be consistent with the length direction of the optical module 200 , or may be inconsistent with the length direction of the optical module 200 .
  • the opening 204 is located at the end of the optical module 200 (the right end of FIG. 3 ), and the opening 205 is also located at the end of the optical module 200 (the left end of FIG. 3 ).
  • the opening 204 is located at an end of the optical module 200 and the opening 205 is located at a side of the optical module 200 .
  • the opening 204 is an electrical interface, and the golden finger of the circuit board 300 extends from the electrical interface and is inserted into the electrical connector of the host computer; the opening 205 is an optical port, configured to access the optical fiber 101, so that the optical fiber 101 is connected to the optical module 200 The light emitting component 400 and/or the light receiving component 500.
  • the assembly method of combining the upper housing 201 and the lower housing 202 is used to facilitate the installation of the circuit board 300, the light emitting component 400, the light receiving component 500 and other components into the above-mentioned housing.
  • the upper housing 201 and the lower housing 202 can Shape encapsulation protection for these components.
  • the upper housing 201 and the lower housing 202 are made of metal materials, which facilitates electromagnetic shielding and heat dissipation.
  • the light module 200 also includes an unlocking component 203 located outside its housing.
  • the unlocking component 203 is configured to realize a fixed connection between the optical module 200 and the host computer, or to release the fixed connection between the optical module 200 and the host computer.
  • the unlocking component 203 is located outside the two lower side plates 2022 of the lower housing 202 and includes an engaging component that matches the cage 106 of the host computer.
  • the optical module 200 is inserted into the cage 106, the optical module 200 is fixed in the cage 106 by the engaging parts of the unlocking part 203; when the unlocking part 203 is pulled, the engaging parts of the unlocking part 203 move accordingly, thereby changing the engaging parts.
  • the connection relationship with the host computer is to release the fixed connection between the optical module 200 and the host computer, so that the optical module 200 can be pulled out of the cage 106 .
  • the circuit board 300 includes circuit wiring, electronic components, chips, etc.
  • the electronic components and chips are connected together according to the circuit design through the circuit wiring to realize functions such as power supply, electrical signal transmission, and grounding.
  • Electronic components may include, for example, capacitors, resistors, triodes, and metal oxide semiconductor field effect transistors. (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET).
  • the chip may include, for example, a microcontroller unit (Microcontroller Unit, MCU), a laser driver chip, a transimpedance amplifier (Transimpedance Amplifier, TIA), a limiting amplifier (Limiting Amplifier, LA), and a clock data recovery chip (Clock and Data Recovery, CDR). , power management chip, digital signal processing (Digital Signal Processing, DSP) chip.
  • DSP Digital Signal Processing
  • the circuit board 300 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also perform a load-bearing function. For example, the rigid circuit board can stably carry the above-mentioned electronic components and chips; the rigid circuit board can also be easily inserted into the host computer cage. in electrical connectors.
  • the circuit board 300 also includes gold fingers formed on its end surface, and the gold fingers are composed of a plurality of independent pins.
  • the circuit board 300 is inserted into the cage 106, and the golden finger is connected to the electrical connector in the cage 106.
  • the golden fingers can be provided only on one side of the circuit board 300 (for example, the upper surface shown in FIG. 4 ), or they can be provided on the upper and lower surfaces of the circuit board 300 to provide more pins.
  • the golden finger is configured to establish an electrical connection with the host computer to realize power supply, grounding, I2C signal transmission, data signal transmission, etc.
  • flexible circuit boards are also used in some optical modules.
  • Flexible circuit boards are generally used in conjunction with rigid circuit boards to supplement the rigid circuit boards.
  • the light emitting component 400 and/or the light receiving component 500 are located on the side of the circuit board 300 away from the gold finger; in some embodiments, the light emitting component 400 and the light receiving component 500 are physically separated from the circuit board 300, and then passed through corresponding A flexible circuit board or electrical connector is electrically connected to the circuit board 300; in some embodiments, the light emitting component and/or the light receiving component can be directly disposed on the circuit board 300, can be disposed on the surface of the circuit board, or can be disposed on the circuit board 300. on the side of the circuit board.
  • the most critical structure in the light emitting component 400 is a laser chip (such as a laser).
  • a laser driver chip is provided.
  • the current peripheral power supply and control circuit of the laser driver chip is complex and the PCB layout occupies an area It is large, has a single function and is expensive, which is not conducive to reducing the space occupancy rate and cost control of the optical module.
  • FIG. 5 is a schematic diagram of a partial structure of an optical module provided according to some embodiments of the present disclosure.
  • FIG. 6 is a schematic diagram of a partial signal flow of an optical module provided according to some embodiments of the present disclosure.
  • the present disclosure provides an optical module.
  • One end of the circuit board 300 is provided with a gold finger, which is connected to the host computer and used to receive electrical signals from the host computer.
  • the optical module also includes a current supply circuit disposed on the circuit board 300 .
  • the MCU 302 is disposed on the circuit board 300 and connected to the gold finger, receives electrical signals from the host computer, processes the electrical signals, and is used to control the DSP chip 301 and the current supply circuit.
  • the current providing circuit is electrically connected to the laser chip 401, and the current providing circuit is used to provide a bias current to the laser chip 401 to drive the laser chip to emit light.
  • the current providing circuit in the embodiment of the present disclosure may include a variety of circuit structures.
  • the current providing circuit includes a bias circuit 303 and a first AC filter circuit.
  • the bias circuit 303 includes a low dropout linear regulator (Low Dropout). Regulator (LDO) chip, Direct Current-Direct Current (DC-DC) chip, Interim Digital-analog Converter (IDAC) chip or operational amplifier circuit.
  • LDO low dropout linear regulator
  • IDAC Interim Digital-analog Converter
  • the function of the current providing circuit can be implemented through the bias circuit 303 and the filter network (for example, the first AC filter circuit) in FIG. 6 .
  • the function of the current providing circuit can also be realized through the bias circuit 303 with AC filtering function in Figures 16-24.
  • the bias circuit 303 can also be Different circuit structures (called current supply circuits) are explained.
  • the bias circuit may also be called a laser bias circuit.
  • the bias circuit 303 in Figures 6 to 15 does not have an AC filter function, so the function of the current providing circuit needs to pass through the bias circuit 303 and the filter network (for example, the first AC filter circuit ) are realized together.
  • the bias circuit 303 in Figures 16 to 24 has an AC filtering function, so the function of the current providing circuit can be realized only through the bias circuit 303. That is, in FIGS. 16 to 24 , the current supply circuit is the bias circuit 303 .
  • the current providing circuit including the bias circuit 303
  • the current providing circuit is connected to the MCU 302 and receives the control signal from the MCU 302.
  • the MCU 302 outputs a signal to the bias circuit 303 to control the size of the output signal of the numerical analog converter.
  • the bias circuit 303 is connected to the laser chip 401, outputs a bias signal, and drives the laser chip 401.
  • the bias signal may include a bias current and a bias voltage.
  • the bias current and the bias voltage are both DC driving signals.
  • the DSP chip 301 is also connected to the MCU 302 for communication and receives control signals from the MCU 302.
  • the MCU 302 outputs signals to the DSP chip 301 and controls the output of the DSP chip 301 .
  • the optical module is connected to the host computer through a golden finger on the circuit board and receives electrical signals from the host computer.
  • the MCU 302 is connected to the golden finger, receives the above electrical signal, processes the electrical signal, and outputs an amplitude modulation signal and a control signal for controlling the DSP chip 301 and the bias circuit 303 .
  • the bias circuit 303 receives the control signal from the MCU 302, outputs the bias signal to the laser chip 401, and drives the laser chip 401.
  • the DSP chip 301 receives the amplitude modulated data signal from the MCU 302, performs data processing on the amplitude modulated data signal, outputs the corresponding modulated signal to the laser chip 401, and performs amplitude modulation on the laser chip 401.
  • the bias circuit 303 is controlled by the MCU 302 and outputs different bias currents to drive the laser chip 401 to keep the laser chip 401 turned on and working stably.
  • the input end of the MCU 302 is connected to the golden finger for receiving electrical signals from the host computer and processing the electrical signals.
  • the control pin of the MCU 302 is connected to the bias circuit 303 to control the output voltage of the bias circuit 303 .
  • the control pin of the MCU 302 is a GPIO output terminal, and by controlling the high and low levels, the output voltage and current of the bias circuit 303 are controlled.
  • the bias circuit 303 is arranged on the circuit board 300.
  • the input end of the bias circuit 303 is connected to the control pin of the MCU 302.
  • the output end of the bias circuit 303 is connected to the laser chip 401 to directly drive the laser chip 401, which reduces the number of commonly used laser chips.
  • the configuration of the laser driver chip and the related matching circuit of the laser driver chip is conducive to reducing the circuit board space occupied and improving module integration.
  • the DSP chip 301 outputs an AC load signal (also called a modulation signal), which is loaded to the laser chip 401 together with the drive signal output by the bias circuit 303 .
  • the laser chip 401 includes but is not limited to an electro-absorption modulated laser chip (Electro-absorption Modulated Laser, EML).
  • EML electro-absorption Modulated Laser
  • the electroabsorption modulation laser chip is an integrated device of an electroabsorption modulator (Electro Absorption Modulator, EAM) and a distributed feedback laser chip (Distributed Feedback Laser, DFB-LD). That is, the laser chip electroabsorption modulation laser chip includes a light-emitting area. (LD) and electroabsorption modulation area (EA).
  • the light-emitting area emits light without data under the action of bias current
  • the electroabsorption modulation area modulates the light emitted by the light-emitting area under the action of bias voltage.
  • the electroabsorption modulation region modulates the light emitted by the light-emitting region under the action of a reverse bias voltage.
  • the electroabsorption modulation region is formed by a PIN semiconductor device, which is mainly composed of a P-type semiconductor, an N-type semiconductor, an absorption layer (composed of a multi-quantum well waveguide) and a metal layer.
  • the absorption layer utilizes the quantum Stark effect, and its absorption peak will move under the action of an external bias voltage. Therefore, for the light emitted by the luminescent area of a certain wavelength, adjusting the bias voltage can control the effect of the absorption layer on the light emitted by the luminescent area. Absorption capacity, thereby modulating the changing voltage signal onto the light emitted by the luminescent area, thereby achieving intensity modulation of the light.
  • the embodiment of the present disclosure provides a bias current to the light-emitting area through the bias circuit 303 to drive the light-emitting area to emit light that does not carry data.
  • the bias circuit 303 also provides a bias voltage to the electroabsorption modulation region to achieve modulation of light.
  • a voltage conversion unit is also provided on the surface of the circuit board 300 in the embodiment of the present disclosure.
  • One end of the voltage conversion unit is electrically connected to the power supply pin of the golden finger and is configured as a buck conversion laser chip.
  • the other end of the voltage conversion unit is biased
  • the circuit 303 provides a bias current to the light-emitting area, and at the same time, the voltage conversion unit provides a reverse bias voltage to the electro-absorption modulation area through the bias circuit 303.
  • the DSP chip 301 provides a modulation signal to the electro-absorption modulation area; electro-absorption modulation The region modulates light under a modulation signal and a reverse bias voltage.
  • the voltage conversion unit includes a DC-DC power chip (Direct Current-Direct Current, DC-DC), also known as a DC-DC power chip).
  • DC-DC Direct Current-Direct Current
  • the voltage conversion unit may be a DC-DC chip.
  • the DC-DC chip can also be used as part of the bias circuit 303 .
  • a negative voltage is provided to the positive electrode of the electroabsorption modulation region through the DC-DC chip on the circuit board 300, thereby providing a reverse bias voltage to the electroabsorption modulation region.
  • the DC-DC chip provides a reverse bias voltage to the electroabsorption modulation region through the bias circuit 303, and the reverse bias voltage output by the DC-DC chip is a DC reverse bias voltage.
  • the reverse bias voltage is a key parameter of the EML laser chip, which directly affects the light absorption characteristics of the laser chip 401.
  • the DSP chip 301 provides a modulation signal to the electroabsorption modulation area through a differential signal line, and the modulation signal output by the DSP chip 301 is an AC signal (also known as an AC load signal).
  • the modulation signal output by the DSP chip 301 is a differential signal, so the DSP signal uses a differential signal line for signal transmission; the DSP chip 301 outputs a PAM4 modulation signal, and there are four levels in the PAM4 modulation signal to represent the modulation. information.
  • the differential transmission line is a differential signal line pair, including two differential signal lines. In the embodiment of the present disclosure, one of the differential signal lines is electrically connected to the positive electrode of the electroabsorption modulation area, and the negative electrode of the electroabsorption modulation area is grounded.
  • another differential signal line can be matched with a matching resistor, such as using a 50 ⁇ matching resistor with another The differential signal lines are connected in parallel, so that the signal on the other differential signal line is absorbed by the 50 ⁇ resistor to avoid returning to the DSP chip 301.
  • the electroabsorption modulation region in the present disclosure has two input terminals, namely a first input terminal and a second input terminal.
  • the first input terminal is used to input the reverse bias voltage
  • the second input terminal is used to input the modulation signal.
  • the bias circuit 303 is electrically connected to the first input terminal
  • the DSP chip 301 is electrically connected to the second input terminal; the electroabsorption modulation area realizes intensity modulation of the light emitted by the light-emitting area under the combined action of the reverse bias voltage and the modulation signal. .
  • one end of the bias circuit 303 is electrically connected to the DC-DC chip, and the other end is electrically connected to the positive electrode of the electroabsorption modulation region.
  • the other end of the bias circuit 303 is also electrically connected to the positive electrode of the electroabsorption modulation region through a differential signal line.
  • the current providing circuit may also include a first AC filter circuit (also called a first filter network).
  • the first AC filter circuit is disposed at the output end of the bias circuit 303, for example, a bias circuit.
  • One end of the circuit 303 is electrically connected to the output end of the voltage conversion unit (such as a DC-DC chip), and the other end of the bias circuit 303, that is, the output end, is electrically connected to the positive electrode of the laser chip through the first AC filter circuit to isolate the AC signal.
  • the first AC filter circuit is an RL AC filter circuit (also known as RL filter network), which is mainly an AC filter network built with resistors and inductors or magnetic beads. Its main function is to pass DC bias current in the forward direction and prevent AC signals from passing in the reverse direction. And interfere with the normal operation of the DC signal.
  • Figure 7 is a structural block diagram of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 7 is a schematic structural diagram of a single-ended driven light emitting component.
  • the bias circuit 303 is an LDO chip.
  • the MCU 302 is provided with an enable pin connected to the LDO chip for turning on and off the LDO chip.
  • the LDO chip is also connected to the power circuit, which provides input current to the LDO chip.
  • the MCU302 is also connected to a temperature detector, which can detect the ambient temperature of the laser chip 401 and control the size of the control voltage output to the LDO chip according to the ambient temperature of the laser chip 401.
  • the MCU has a built-in temperature and voltage relationship algorithm that calculates the output voltage based on the received temperature.
  • a temperature detector can also be disposed inside the MCU 302. By detecting the temperature of the MCU 302, the control voltage output to the LDO chip is adjusted according to the mapping relationship between the temperature of the MCU 302 and the optical power of the laser chip 401. size.
  • FIG. 8 is a schematic structural diagram of an MCU according to some embodiments of the present disclosure.
  • the MCU 302 sets a temperature pin and is connected to a temperature detector to receive the ambient temperature of the laser chip 401 .
  • MCU302 also has a control pin connected to the second input terminal of the LDO chip to control the output voltage of the LDO chip.
  • the driving voltage When the driving voltage is the same, the optical power of the laser chip 401 changes as the ambient temperature changes. Therefore, in order to ensure that the emitted optical power of the laser chip 401 is within the rated range, the driving voltage needs to be adjusted when the ambient temperature changes.
  • the input voltage of the LDO chip remains unchanged, and the output voltage is adjusted by controlling the change in voltage.
  • the MCU 302 has a built-in algorithm for the relationship between temperature and control voltage. It calculates and controls the voltage by receiving the ambient temperature of the laser chip 401, and controls the LDO output voltage by adjusting the control voltage.
  • the DSP chip 301 includes data pins, which are connected to the communication pins of the MCU 302 and the MCU 302.
  • the DSP chip 301 receives the amplitude modulated data signal from the MCU 302, performs data processing on the amplitude modulated data signal, and outputs the corresponding modulated signal to
  • the laser chip 401 performs amplitude modulation on the laser chip 401.
  • MCU302 outputs an enable signal to control the shutdown of the LDO chip.
  • the DSP chip 301 is also provided with a positive load pin, which is connected to the positive electrode of the LD of the laser chip 401 .
  • the negative load pin of the DSP chip 301 is connected to the negative electrode of the laser chip 401 .
  • the DSP chip 301 is also connected to the MCU 302 for communication and receives control signals from the MCU 302.
  • the MCU 302 outputs signals to the DSP chip 301 and controls the output of the DSP chip 301 .
  • MCU302 delivers parameter configuration to DSP chip 301.
  • a first DC filter circuit between the positive load pin of the DSP chip 301 and the laser chip 401 is used to isolate the DC signal.
  • the DC filter circuit can be a capacitor whose capacitance is determined based on the AC signal to isolate the DC signal from passing the AC signal.
  • a second DC filter circuit is provided between the load pin of the DSP chip 301 and the laser chip 401 for isolating DC signals.
  • the DC filter circuit can be a capacitor whose capacitance is determined based on the AC signal to isolate the DC signal from passing the AC signal.
  • the laser chip 401 is directly driven through the bias circuit 303 .
  • the circuit design is simplified, the module cost is reduced, and the dependence on the laser driver chip is eliminated.
  • the MCU 302 receives the temperature of the laser chip 401, controls the voltage according to the temperature calculation, and controls the LDO output voltage by adjusting the control voltage, so that the emitted light power of the laser chip 401 is within the rated range.
  • Figure 9 is a second structural block diagram of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 9 is a schematic structural diagram of a double-ended driven light emitting component.
  • the LDO chip is a bias circuit 303.
  • the MCU 302 is provided with an enable pin, which is connected to the LDO chip and is used to turn on and off the LDO chip.
  • the LDO chip is also connected to the power circuit.
  • the power circuit provides the input voltage to the LDO chip, and the voltage of its input circuit is constant.
  • the MCU302 is also connected to a temperature detector, which can detect the ambient temperature of the laser chip 401 and control the size of the control voltage output to the LDO chip according to the ambient temperature of the laser chip 401.
  • MCU302 has a built-in temperature and voltage relationship algorithm, which calculates the output voltage based on the received temperature.
  • the current supply circuit may also include a second AC filter circuit disposed between the negative electrode of the laser chip 401 and the ground line.
  • the negative load pin of the DSP chip 301 is connected to the negative electrode of the laser chip 401 .
  • the DSP chip 301 that is, the digital signal processor, is used to process the load AC signal and convert the load AC signal into an AC signal that can drive the laser chip 401.
  • the processed signal is a differential signal that passes through the negative load pin and the positive load.
  • the pin output is to laser chip 401.
  • MCU302 sets the temperature pin, connects to the temperature detector, and receives the ambient temperature of the laser chip 401.
  • MCU302 also has a control pin, which is connected to the second input terminal of the LDO chip to control the output voltage of the LDO chip.
  • the MCU 302 has a built-in algorithm for the relationship between temperature and control voltage. It calculates and controls the voltage by receiving the ambient temperature of the laser chip 401, and controls the LDO output voltage by adjusting the control voltage.
  • the DSP chip 301 includes data pins, which are connected to the communication pins of the MCU 302.
  • the DSP chip 301 receives the amplitude modulated data signal from the MCU 302, performs data processing on the amplitude modulated data signal, outputs the corresponding modulation signal to the laser chip 401, and performs amplitude modulation on the laser chip 401.
  • MCU302 outputs an enable signal to control the connection and shutdown of the LDO chip.
  • the DSP chip 301 is also provided with a positive load pin, which is connected to the positive electrode of the LD in the laser chip 401.
  • the negative load pin of the DSP chip 301 is connected to the negative electrode of the laser chip 401 .
  • a first DC filter circuit is provided between the positive load pin of the DSP chip 301 and the laser chip 401 to isolate the DC signal.
  • the DC filter circuit can be a capacitor whose capacitance is determined based on the AC signal to isolate the DC signal from passing the AC signal.
  • a second DC filter circuit is provided between the load pin of the DSP chip 301 and the laser chip 401 for isolating DC signals.
  • the DC filter circuit can be a capacitor whose capacitance is determined based on the AC signal to isolate the DC signal from passing the AC signal.
  • Figure 10 is a structural block diagram 3 of a light emitting component provided according to some embodiments of the present disclosure.
  • Figure 10 is a schematic structural diagram of a single-ended driven light emitting component.
  • the DC-DC chip in this example is mainly used to generate a constant voltage or constant current power supply, which is controlled by MCU302.
  • LD provides different drive bias currents.
  • the DC-DC chip is a bias circuit 303, and the MCU 302 is provided with an enable pin, which is connected to the DC-DC chip and is used to turn on and off the DC-DC chip.
  • the DC-DC chip is also connected to the power circuit, which provides input voltage to the DC-DC chip.
  • the MCU is also connected to a temperature detector, which can detect the ambient temperature of the laser chip 401 and control the size of the control voltage output to the DC-DC chip according to the ambient temperature of the laser chip 401.
  • the MCU has a built-in temperature and voltage relationship algorithm that calculates the output voltage based on the received temperature.
  • the current supply circuit may also include a second AC filter circuit, which is disposed between the negative electrode of the laser chip 401 and the ground line, the negative load pin of the DSP chip 301 and the negative electrode of the laser chip 401 Connection, there is a differential signal between the negative load pin and the positive load pin of the DSP chip 301.
  • the DSP chip that is, the digital signal processor, is used to process the load AC signal and convert the load AC signal into an AC signal that can drive the laser chip 401.
  • the processed signal is a differential signal, which is passed through the negative load pin and the positive load pin. pin output to laser chip 401.
  • MCU302 sets the temperature pin, connects to the temperature detector, and receives the ambient temperature of the laser chip 401.
  • MCU302 also has a control pin, which is connected to the second input terminal of the DC-DC chip to control the output voltage of the DC-DC chip.
  • the MCU 302 has a built-in algorithm for the relationship between temperature and control voltage. It calculates and controls the voltage by receiving the ambient temperature of the laser chip 401, and controls the LDO output voltage by adjusting the control voltage.
  • the DSP chip 301 includes data pins, which are connected to the communication pins of the MCU 302 and the MCU 302.
  • the DSP chip 301 receives the amplitude modulated data signal from the MCU 302, performs data processing on the amplitude modulated data signal, and outputs the corresponding modulated signal to
  • the laser chip 401 performs amplitude modulation on the laser chip 401.
  • MCU302 outputs an enable signal to control the connection and shutdown of the DC-DC chip.
  • the DSP chip 301 is also provided with a positive load pin, which is connected to the positive electrode of the LD in the laser chip 401.
  • the negative load pin of the DSP chip 301 is connected to the negative electrode of the laser chip 401 .
  • a first DC filter circuit is provided between the positive load pin of the DSP chip 301 and the laser chip 401 to isolate the DC signal.
  • the DC filter circuit can be a capacitor whose capacitance is determined based on the AC signal to isolate the DC signal from passing the AC signal.
  • a second DC filter circuit is provided between the load pin of the DSP chip 301 and the laser chip 404 for isolating DC signals.
  • the DC filter circuit can be a capacitor whose capacitance is determined based on the AC signal to isolate the DC signal from passing the AC signal.
  • Figure 11 is a structural block diagram 3 of a light emitting component provided according to some embodiments of the present disclosure
  • Figure 12 is a structural block diagram of a light emitting component provided according to some embodiments of the present disclosure.
  • Block diagram four As shown in Figures 11 and 12, circuits such as IDAC chips or operational amplifiers can also be used to connect to the control pins of the MCU302, and output different driving voltages to the laser chip 401 according to the size of the control voltage of the MCU302.
  • Figure 13 is a structural block diagram 5 of a light emitting component provided according to some embodiments of the present disclosure
  • Figure 14 is a structural block diagram 6 of a light emitting component provided according to some embodiments of the present disclosure
  • Figure 15 is a structural diagram 6 of a light emitting component provided according to some embodiments of the present disclosure
  • Figure 15 is a structural block diagram 6 of a light emitting component provided according to some embodiments of the present disclosure
  • Example 7 provides a structural block diagram of a light emitting component.
  • the double-ended driven light emitting component 400 can also use circuits such as DC-DC chips, IDAC chips or operational amplifiers for Connected to the control pin of MCU302, different driving voltages are output to the laser chip 401 according to the size of the control voltage of MCU302.
  • the present disclosure provides an optical module, which includes a temperature detector arranged around the laser chip 401.
  • the temperature detector is used to detect the ambient temperature of the laser chip 401.
  • the optical module also includes an MCU 302.
  • the MCU 302 receives and detects the ambient temperature of the laser chip 401, and outputs different control voltages according to the ambient temperature to adjust the driving voltage output by the bias circuit.
  • the output terminal of the bias circuit 303 is connected to the anode of the laser chip 401 .
  • the optical module also includes a DSP chip 301 disposed on the circuit board 300.
  • the DSP chip 301 outputs an AC load signal to the positive electrode of the laser chip 401 to perform amplitude modulation on the laser chip 401.
  • the laser chip 401 is directly driven through the bias circuit 303 .
  • the MCU 302 has a built-in algorithm for the relationship between temperature and voltage. It calculates the control voltage based on the received temperature. By adjusting the control voltage, the output voltage of the bias circuit 303 is adjusted to achieve the purpose of controlling the output optical power of the laser chip 401.
  • FIGS. 16-22 show the first circuit structure of the bias circuit 303
  • FIGS. 23-24 show the second circuit structure of the bias circuit 303.
  • the first circuit structure of the bias circuit 303 will be introduced below.
  • the bias circuit 303 also includes a first unit and a second unit connected in series.
  • the first unit It includes a first magnetic bead and a second magnetic bead connected in series
  • the second unit includes an inductor and a resistor connected in parallel.
  • the first magnetic bead and the second magnetic bead connected in series are used to allow the negative bias voltage output by the DC-DC chip to pass through, while blocking the modulation signal output by the DSP chip 301 from passing through, thereby preventing the modulation signal output by the DSP chip 301 from being transmitted to DC.
  • -DC chip so the first unit and the second unit in the bias circuit 303 are used to pass the DC negative bias voltage and block the AC modulation signal.
  • the parallel inductors and resistors further hinder the passage of the modulation signal output by the DSP chip 301, thereby preventing the modulation signal output by the DSP chip 301 from being transmitted to the DC-DC chip to a greater extent.
  • the second unit can also be used to filter the negative voltage signal output by the DC-DC chip.
  • a filter capacitor is connected in parallel to the bias circuit 303 to filter the negative voltage output by the DC-DC chip.
  • one end of the filter capacitor is electrically connected to the bias circuit 303 and the other end is grounded. Since the DC-DC chip electrically connected to one end of the bias circuit 303 is grounded, the connection relationship between the filter capacitor and the bias circuit 303 is in parallel.
  • the circuit board 300 is a multi-layer circuit board.
  • the circuit board 300 includes a top layer, a second layer, a third layer, a fourth layer, a fifth layer... and a bottom layer, where the top layer has GND and the second layer is a ground layer.
  • the GND on the top layer and the second layer can be electrically connected through vias
  • the filter capacitor can be connected to the GND on the top layer
  • the DC-DC chip can be connected to the GND on the second layer.
  • the optical module When the optical module is multi-channel, the optical module includes multiple bias circuits 303 (which can also be called multiple current supply circuits) and multiple differential signal lines.
  • the layout of each bias circuit 303 will directly affect the working performance of the optical module. ; Crosstalk between each bias circuit 303 should be avoided to reduce parasitic capacitance and achieve a reasonable layout.
  • each bias circuit 303 modulates the electrical absorption of the corresponding differential signal line and the corresponding channel.
  • the DSP chip 301 is electrically connected to the electrical absorption modulation area of the corresponding channel through corresponding differential signal lines.
  • Figure 16 is a schematic diagram of the arrangement of an 8-channel bias circuit in an optical module according to some embodiments of the present disclosure.
  • Figure 17 is a schematic diagram of the arrangement of an 8-channel bias circuit in an optical module according to some embodiments of the present disclosure. two.
  • the differential signal The number of lines is eight, and the eight differential signal lines are the first differential signal line, the second differential signal line, the third differential signal line, the fourth differential signal line, the fifth differential signal line, the sixth differential signal line, The seventh differential signal line and the eighth differential signal line.
  • the DSP chip 301 is connected to the first differential signal line, the second differential signal line, the third differential signal line, the fourth differential signal line, the fifth differential signal line, the sixth differential signal line, the seventh differential signal line and the eighth differential signal line respectively. Signal line connection.
  • the DSP chip 301 respectively provides modulation signals to the electroabsorption modulation areas of corresponding channels through corresponding differential signal lines.
  • the differential signal lines arranged from top to bottom are the first differential signal line, the second differential signal line, the third differential signal line, the fourth differential signal line, the fifth differential signal line, and the sixth differential signal line.
  • the signal line, the seventh differential signal line and the eighth differential signal line are connected.
  • a first bias circuit (which may also be called a first current supply circuit), a second bias circuit (which may also be called a second current supply circuit), and a third bias circuit are respectively provided on the surface of the circuit board.
  • setting circuit can also be called the third current supply circuit
  • the fourth bias circuit (can also be called the fourth current supply circuit)
  • the fifth bias circuit (can also be called the fifth current supply circuit)
  • the sixth A bias circuit (which may also be called a sixth current supply circuit)
  • a seventh bias circuit (which may also be called a seventh current supply circuit)
  • an eighth bias circuit (which may also be called an eighth current supply circuit).
  • the DC-DC chips respectively provide bias voltages to the electroabsorption modulation areas of corresponding channels through corresponding bias circuits 303. It can be clearly seen from Figure 16 that each bias circuit 303 is located at different positions.
  • each bias circuit 303 includes a corresponding first unit and a second unit.
  • the first unit includes a first magnetic bead and a second magnetic bead connected in series.
  • the magnetic bead is electrically connected to the corresponding differential signal line;
  • the second unit is electrically connected to the DC-DC chip, then one end of the bias circuit 303 is electrically connected to the DC-DC chip, and the other end is connected to the positive electrode of the electroabsorption modulation area through the corresponding differential signal line. Electrical connection.
  • the DSP chip 301 is connected to the electroabsorption modulation area through the first differential signal line to provide modulation signals to the electroabsorption modulation area; the DC-DC chip provides reverse bias to the electroabsorption modulation area through the first bias circuit. set voltage; the first unit in the first bias circuit is electrically connected to the positive electrode of the electroabsorption modulation area by electrically connecting to the first differential signal line, and the second unit is located on one side of the first differential signal line and is connected to the DC -DC chip electrical connection.
  • one end of the first magnetic bead in the first bias circuit is connected to the differential signal line, and the other end is connected to the second magnetic bead, that is, the first magnetic bead and the second magnetic bead are connected in series; the inductor and the resistor are connected in series. in parallel and then in series with the first unit.
  • a first magnetic bead first pad 311 and a first magnetic bead second pad 312 are respectively provided on the surface of the circuit board 300 for arranging the first magnetic bead.
  • one end of the first magnetic bead is disposed on The first magnetic bead is on the first soldering pad 311, and the other end is disposed on the second soldering pad 312 of the first magnetic bead.
  • a second magnetic bead first pad 313 and a second magnetic bead second pad 314 are respectively provided on the surface of the circuit board 300 for setting the second magnetic bead.
  • one end of the second magnetic bead is disposed on the second magnetic bead first pad.
  • the soldering pad 313, the other end is provided on the second soldering pad 314 of the second magnetic bead.
  • the first soldering pad 311 of the first magnetic bead and the second soldering pad 312 of the first magnetic bead are arranged vertically, so the first magnetic bead is arranged vertically; the first soldering pad 313 of the second magnetic bead and the second soldering pad 313 of the second magnetic bead are arranged vertically.
  • the disk 314 is arranged horizontally, and the second magnetic bead is arranged horizontally; the second pad 312 of the first magnetic bead is connected to the first pad 313 of the second magnetic bead to realize the series connection of the first magnetic bead and the second magnetic bead. .
  • An inductor first pad 315 and an inductor second pad 316 are respectively provided on the surface of the circuit board 300 for setting the inductor. For example, one end of the inductor is set on the inductor first pad 315 and the other end is set on the inductor second pad 316. superior.
  • a resistor first pad 317 and a resistor second pad 318 are respectively provided on the surface of the circuit board 300 for setting the resistor. For example, one end of the resistor is set on the resistor first pad 317 and the other end is set on the resistor second pad 318. superior.
  • the first pad 315 of the inductor is connected to the first pad 317 of the resistor, and the second pad 316 of the inductor is connected to the second pad 318 of the resistor to achieve a parallel connection of the inductor and the resistor.
  • the second soldering pad 314 of the second magnetic bead is connected to the first soldering pad 315 of the inductor to realize the series connection of the first unit and the second unit.
  • the inductor's second pad 316 is connected to the resistor's second pad 318, and the other end is connected to the first filter capacitor pad 319.
  • the first filter capacitor pad 319 is used to set one end of the filter capacitor, and the other end of the filter capacitor is grounded.
  • the first filter capacitor pad 319 is connected to the second pad 316 of the inductor to realize the parallel connection of the filter capacitor and the bias circuit 303 .
  • the first unit and the second unit are both provided with a top layer of the circuit board, and the first unit and the second unit are connected through wiring on the top layer of the circuit board 300 .
  • the DSP chip 301 is electrically connected to the positive electrode of the electroabsorption modulation area through a second differential signal line to provide a modulation signal to the electroabsorption modulation area.
  • the DC-DC chip provides a reverse bias voltage to the electroabsorption modulation region through the second bias circuit.
  • the first unit in the second bias circuit is electrically connected to the second differential signal line to be electrically connected to the positive electrode of the electroabsorption modulation region.
  • the second unit is provided on one side of the first differential signal line and is electrically connected to the DC-DC chip.
  • the first unit in the second bias circuit is disposed between the first differential signal line and the second differential signal line, the first magnetic bead of the first unit is electrically connected to the second differential signal line, and the second unit Disposed on one side of the first differential signal line and adjacent to the second unit in the first bias circuit.
  • the surface of the circuit board 300 is provided with corresponding pads for each structure of the second bias circuit.
  • the surface of the circuit board 300 is provided with a first magnetic bead, a first pad 321, a first magnetic bead, a second pad 322, and a second magnetic bead.
  • the arrangement relationship and connection relationship of the second pad 324 are the same as those in the first bias circuit.
  • the second pad 314 of the second magnetic bead in the first bias circuit is connected to the first pad 315 of the inductor, while the second pad 324 of the second magnetic bead in the second bias circuit board is connected to the first pad 315 of the inductor.
  • Pad 325 is not connected.
  • the surface of the circuit board 300 is also provided with a first pad 325 for an inductor, a second pad 326 for an inductor, a first pad 327 for a resistor, and a second pad 328 for a resistor.
  • the arrangement relationship is the same as that of the first bias circuit to realize the inductor. and parallel connection of resistors.
  • the second unit of the second bias circuit is disposed adjacent to the first unit of the first bias circuit. That is, the first unit and the second unit of the second bias circuit are not disposed together, but are placed next to each other. They are arranged separately. In order to avoid mutual crosstalk, the first unit and the second unit in the second bias circuit are connected through circuit board via holes. For example, via holes are provided from the top layer of the circuit board 300 to the third layer of the circuit board.
  • the circuit board 300 is selected Vias are provided from the top layer to the third layer of the circuit board 300, which can shorten the length of the wiring and the depth of the vias, and reduce the parasitic capacitance caused by the wiring and vias.
  • the DSP chip 301 is electrically connected to the positive electrode of the electroabsorption modulation area through the third differential signal line to provide the modulation signal to the electroabsorption modulation area; the DC-DC chip provides the electroabsorption modulation area through the third bias circuit.
  • Reverse bias voltage; the first unit in the third bias circuit is electrically connected to the third differential signal line to be electrically connected to the positive electrode of the electroabsorption modulation area, and the second unit is located on one side of the first differential signal line , electrically connected to the DC-DC chip.
  • the first unit in the third bias circuit is disposed between the second differential signal line and the third differential signal line, and the second unit is disposed on one side of the first differential signal line, for example, on the second bias circuit. Place it adjacent to the second unit of the circuit.
  • the surface of the circuit board 300 is provided with corresponding pads for each structure of the second bias circuit.
  • the surface of the circuit board 300 is provided with a first magnetic bead and a first pad 331, a first magnetic bead and a second pad 332, and a second magnetic bead and a first pad.
  • soldering pad 333 and the second soldering pad 334 of the second magnetic bead, the first soldering pad 331 of the first magnetic bead, the second soldering pad 332 of the first magnetic bead, the first soldering pad 333 of the second magnetic bead and the second soldering pad of the second magnetic bead The arrangement relationship and connection relationship of the pads 334 are the same as those in the second bias circuit.
  • the circuit board 300 is also provided with a first pad 335 for an inductor, a second pad 336 for an inductor, a first pad 337 for a resistor and a second pad 338 for a resistor.
  • the arrangement relationship is the same as the aforementioned second bias circuit to realize the inductance and The resistors are connected in parallel, and the second pad 334 of the second magnetic bead and the first pad 335 of the inductor are not connected; the second unit of the third bias circuit is located adjacent to the second unit of the second bias circuit, That is to say, the first unit and the second unit in the third bias circuit are not arranged together, but are arranged separately.
  • the circuit board has 300 vias for connection.
  • a via hole may be provided from the top layer of the circuit board 300 to the third layer of the circuit board 300 , and then the first unit and the second unit in the third bias circuit are electrically connected through the via hole.
  • the DSP chip 301 is electrically connected to the positive electrode of the electroabsorption modulation area through the fourth differential signal line to provide a modulation signal to the electroabsorption modulation area.
  • the DC-DC chip provides a reverse bias voltage to the electroabsorption modulation region through the fourth bias circuit.
  • the first unit in the fourth bias circuit is disposed between the third differential signal line and the fourth differential signal line.
  • the fourth bias circuit is electrically connected to the fourth differential signal line to communicate with the positive electrode of the electroabsorption modulation region. connect.
  • the second unit is disposed between the fourth differential signal line and the fifth differential signal line, and is electrically connected to the DC-DC chip.
  • the surface of the circuit board 300 is provided with corresponding pads of each structure of the second bias circuit, and the surface of the circuit board 300 is provided with the first magnetic bead and the first pad 341,
  • the arrangement relationship and connection relationship of the first magnetic bead second bonding pad 342, the second magnetic bead first bonding pad 343, and the second magnetic bead second bonding pad 344 are the same as those in the second bias circuit or the third bias circuit.
  • the surface of the circuit board 300 is also provided with an inductor first pad 345, an inductor second pad 346, a resistor first pad 347 and a resistor second pad 348.
  • the arrangement relationship is as the aforementioned second bias circuit or third bias circuit.
  • the circuit is set up to realize the parallel connection of the inductor and the resistor, and the second pad 344 of the second magnetic bead is not connected to the first pad 345 of the inductor; the first unit and the second unit in the fourth bias circuit are also not set together. Instead, they are set up separately.
  • the first unit and the second unit in the fourth bias circuit are connected through the via holes of the circuit board 300 , for example, from the top layer of the circuit board 300 to the third unit of the circuit board 300 .
  • a via hole is provided in the layer, and then the first unit and the second unit in the fourth bias circuit are electrically connected through the via hole.
  • the DSP chip 301 is electrically connected to the positive electrode of the electroabsorption modulation area through the fifth differential signal line to provide a modulation signal to the electroabsorption modulation area.
  • the DC-DC chip provides a reverse bias voltage to the electroabsorption modulation region through the fifth bias circuit.
  • the first unit in the fifth bias circuit is electrically connected to the positive electrode of the electroabsorption modulation region by being electrically connected to the fifth differential signal line, and the second unit is disposed between the fourth differential signal line and the fifth differential signal line, Electrically connected to the DC-DC chip.
  • the surface of the circuit board 300 is respectively provided with a first magnetic bead first pad 351, a first magnetic bead second pad 352, a second magnetic bead first pad 353, and a second magnetic bead second pad 354.
  • the connection relationship between the pads is as described in the first bias circuit and the first magnetic bead.
  • the second soldering pad 352 and the first soldering pad 353 of the second magnetic bead are connected to realize the series connection of the first magnetic bead and the second magnetic bead.
  • the second pad 354 of the second magnetic bead and the first pad 355 of the inductor are directly connected and connected through the top layer wiring of the circuit board 300, thereby connecting the first unit and the second unit together in series; the third unit in the fifth bias circuit
  • the first unit and the second unit are arranged at the same position as the first unit and the second unit in the first bias circuit.
  • the first unit and the second unit in the fifth bias circuit are not arranged separately; are concentrated between the fourth differential signal line and the fifth differential signal line; then the first unit and the second unit in the fifth bias circuit can be connected through the wiring on the top layer of the circuit board 300, that is, the second magnetic bead
  • the second pad is connected to the first pad of the inductor to realize the series connection of the first unit and the second unit.
  • the DSP chip 301 is electrically connected to the positive electrode of the electroabsorption modulation area through the sixth differential signal line to provide a modulation signal to the electroabsorption modulation area.
  • the DC-DC chip provides a reverse bias voltage to the electroabsorption modulation region through the sixth bias circuit.
  • the first unit in the sixth bias circuit is electrically connected to the sixth differential signal line to be electrically connected to the positive electrode of the electroabsorption modulation region.
  • the second unit is located on one side of the eighth differential signal line and is electrically connected to the DC-DC chip.
  • the surface of the circuit board 300 is respectively provided with a first magnetic bead first pad 361, a first magnetic bead second pad 362, a second magnetic bead first pad 363, and a second magnetic bead second pad 364.
  • the arrangement relationship of the first soldering pad 363 of the two magnetic beads and the second soldering pad 364 of the second magnetic bead is as described in the aforementioned bias circuit 303.
  • the second soldering pad 362 of the first magnetic bead and the first soldering pad 363 of the second magnetic bead are connected.
  • the first magnetic bead and the second magnetic bead are connected in series; the second soldering pad 364 of the second magnetic bead and the first soldering pad 365 of the inductor are not connected, and are connected through via holes.
  • the arrangement relationship of the inductor first pad 365, the inductor second pad 366, the resistor first pad 367 and the resistor second pad 368 is as in the aforementioned bias circuit 303, realizing the parallel connection of the inductor and the resistor; in the sixth bias circuit
  • the first unit is arranged between the fifth differential signal line and the sixth differential signal line and is electrically connected to the fifth differential signal line.
  • the second unit is arranged separately from the first unit, and the second unit is arranged between the eighth differential signal line and the fifth differential signal line. one side of the line.
  • the surface of the circuit board 300 is provided with the corresponding pads of each structure of the sixth bias circuit.
  • the surface of the circuit board 300 is provided with the first pad of the first magnetic bead, the second pad of the first magnetic bead, and the first pad of the second magnetic bead.
  • the arrangement relationship and connection relationship of the bonding pad, the second magnetic bead and the second bonding pad are the same as those in the second bias circuit, the third bias circuit, or the fourth bias circuit.
  • the first unit and the second unit in the sixth bias circuit are also not arranged together, but are arranged separately. In order to avoid mutual crosstalk, the first unit and the second unit in the sixth bias circuit are connected through the circuit board.
  • 300 via holes are used to realize the connection. For example, a via hole is provided from the top layer of the circuit board 300 to the third layer of the circuit board 300 , and then the first unit and the second unit in the sixth bias circuit are electrically connected through the via hole.
  • the DSP chip 301 is electrically connected to the positive electrode of the electroabsorption modulation area through the seventh differential signal line to provide a modulation signal to the electroabsorption modulation area.
  • the DC-DC chip provides a reverse bias voltage to the electroabsorption modulation area through the seventh bias circuit; the first unit in the seventh bias circuit is electrically connected to the seventh differential signal line to connect with the positive electrode of the electroabsorption modulation area. Electrically connected, the second unit is located on one side of the eighth differential signal line and is electrically connected to the DC-DC chip.
  • the surface of the circuit board 300 is respectively provided with a first magnetic bead first soldering pad 371, a first magnetic bead second soldering pad 372, a second magnetic bead first soldering pad 373, and a second magnetic bead second soldering pad.
  • the first magnetic bead first bonding pad 371, the first magnetic bead second bonding pad 372, the second magnetic bead first bonding pad 373, and the second magnetic bead second bonding pad 374 are arranged in the same relationship as the aforementioned bias circuit 303.
  • the second soldering pad 372 of a magnetic bead and the first soldering pad 373 of a second magnetic bead are connected to realize the series connection of the first magnetic bead and the second magnetic bead.
  • the second magnetic bead second pad 374 and the inductor first pad 375 are not connected, and are connected through via holes.
  • the arrangement relationship of the inductor first pad 375, the inductor second pad 376, the resistor first pad 377 and the resistor second pad 378 is as in the aforementioned bias circuit 303, realizing the parallel connection of the inductor and the resistor; the seventh bias
  • the first unit in the circuit is disposed between the sixth differential signal line and the seventh differential signal line, and is electrically connected to the seventh differential signal line.
  • the second unit is disposed adjacent to the second unit of the sixth bias circuit.
  • the surface of the circuit board 300 is provided with the corresponding pads of each structure of the seventh bias circuit.
  • the surface of the circuit board 300 is provided with the first pad of the first magnetic bead, the second pad of the first magnetic bead, and the first pad of the second magnetic bead.
  • the arrangement relationship and connection relationship of the bonding pad, the second magnetic bead and the second bonding pad are the same as those in the second bias circuit, the third bias circuit, the fourth bias circuit, or the sixth bias circuit.
  • the first unit and the second unit in the seventh bias circuit are also not arranged together, but are arranged separately. In order to avoid mutual crosstalk, the first unit and the second unit in the seventh bias circuit are connected through the circuit board. 300 vias for connection.
  • a via hole may be provided from the top layer of the circuit board 300 to the third layer of the circuit board 300 , and then the first unit and the second unit in the seventh bias circuit are electrically connected through the via hole.
  • the DSP chip 301 is electrically connected to the positive electrode of the electroabsorption modulation area through the eighth differential signal line to provide a modulation signal to the electroabsorption modulation area.
  • the DC-DC chip provides a reverse bias voltage to the electroabsorption modulation region through the eighth bias circuit.
  • the first unit in the eighth bias circuit is electrically connected to the eighth differential signal line to be electrically connected to the positive electrode of the electroabsorption modulation area.
  • the second unit is located on one side of the eighth differential signal line and is connected to the DC-DC chip. Electrical connection.
  • the surface of the circuit board 300 is respectively provided with a first magnetic bead first pad 381, a first magnetic bead second pad 382, a second magnetic bead first pad 383, a second magnetic bead second pad 384, and an inductor.
  • the arrangement relationship between the first bead pad 383 and the second bead second pad 384 is as in the aforementioned bias circuit 303.
  • the first bead second pad 382 and the second bead first pad 383 are connected to realize the third A series connection of a magnetic bead and a second magnetic bead; the second magnetic bead's second pad 384 and the inductor's first pad 385 are not connected, and are connected through vias.
  • the arrangement relationship of the inductor first pad 385, the inductor second pad 386, the resistor first pad 387 and the resistor second pad 388 is as in the aforementioned bias circuit 303, realizing the parallel connection of the inductor and the resistor; the eighth bias
  • the first unit in the circuit is disposed between the seventh differential signal line and the eighth differential signal line, and is connected to the seventh differential signal line.
  • the second unit is located adjacent to the second unit in the seventh channel.
  • the surface of the circuit board 300 is provided with corresponding pads for each structure of the seventh bias circuit.
  • the surface of the circuit board 300 is provided with a first magnetic bead and a first pad, a first magnetic bead and a second pad, and a second magnetic bead.
  • the arrangement relationship and connection relationship between the first bead pad, the second magnetic bead second pad and the second bias circuit, the third bias circuit, the fourth bias circuit, the sixth bias circuit, or the seventh bias circuit The same as in.
  • the first unit and the second unit in the eighth bias circuit are also not arranged together, but are arranged separately. In order to avoid mutual crosstalk, the first unit and the second unit in the eighth bias circuit are connected through the circuit board.
  • 300 via holes are used to realize the connection. For example, via holes are provided from the top layer of the circuit board 300 to the third layer of the circuit board 300 , and then the first unit and the second unit in the eighth bias circuit are electrically connected through the via holes.
  • the bias circuit 303 of each channel includes a first unit and a second unit.
  • the first unit and the second unit in the bias circuit 303 may be centrally located at the same location, or they may be separately located.
  • first unit and the second unit in the bias circuit 303 When the first unit and the second unit in the bias circuit 303 are centrally located at the same position, they can be directly electrically connected through the wiring on the top layer of the circuit board 300, such as the first bias circuit and the fifth bias circuit. When the first unit and the second unit are centrally located at the same position, they can be directly electrically connected through the wiring on the top layer of the circuit board 300 .
  • the present disclosure avoids crosstalk between the bias circuits 303 by arranging each bias circuit 303 on the circuit board 300 in a compact and reasonable manner, reduces the parasitic capacitance generated, and ensures the normal operation of each bias circuit 303 of the optical module. .
  • Figure 18 is a schematic diagram of the arrangement of a 16-channel bias circuit in an optical module according to some embodiments of the present disclosure.
  • Figure 19 is a schematic diagram of the arrangement of an 8-channel bias circuit in Figure 18.
  • Figure 20 is a partial schematic diagram of Figure 19
  • 21 is a schematic diagram of the setup of another 8-channel bias circuit in Figure 18, and
  • Figure 22 is a partial schematic diagram of Figure 21.
  • the circuit board 300 is provided with a filter capacitor in parallel at the corresponding bias circuit 303 position.
  • the circuit board 300 is provided with a first filter capacitor pad, a second filter capacitor pad, and a third filter capacitor pad.
  • the first filter capacitor pad is connected to the second pad of the inductor in the first bias circuit, so that the corresponding filter capacitor is connected in parallel with the first bias circuit; the second filter capacitor pad is provided in the first bias circuit.
  • the second pad of the filter capacitor is connected to the first pad of the inductor or the first pad of the resistor in the second bias circuit, So that the corresponding filter capacitor is connected in parallel with the second bias circuit;
  • the third filter capacitor pad is arranged in the same manner as the second filter capacitor pad;
  • the fourth filter capacitor pad is arranged in the same manner as the first filter capacitor pad;
  • the fifth filter capacitor pad, the sixth filter capacitor pad, the seventh filter capacitor pad, and the eighth filter capacitor pad are each arranged in the same manner as the second filter capacitor pad.
  • a total of 16 corresponding bias circuits 303 are provided on the circuit board 300 to provide reverse bias voltages.
  • the arrangement relationship between the 16 bias circuits 303 is shown in Figures 18 to 22.
  • the first end of the circuit board 300 is provided with eight-channel bias circuits 303, which are the first bias circuit, the second bias circuit... and the eighth bias circuit. circuit; the second end is provided with eight-channel bias circuits 303, which are respectively the ninth bias circuit 303, the tenth bias circuit 303... the sixteenth bias circuit 303; the first DSP chip 630, the first DSP chip 630 and the first DSP chip 630 are respectively provided in the middle.
  • the first DSP chip 630 is disposed close to the eight-channel bias circuit 303 at the first end, and the second DSP chip 640 is disposed close to the eight-channel bias circuit 303 at the second end.
  • Setting circuit 303 settings are provided.
  • the first DC-DC chip 610 is respectively connected to the eight-channel bias circuit 303 provided at the first end of the circuit board 300 to provide a reverse bias voltage to the electroabsorption modulation area; the second DC-DC chip 620 is connected to the second end of the circuit board 300
  • the eight-channel bias circuits 303 provided at the terminals are respectively connected to provide a reverse bias voltage to the electroabsorption modulation area.
  • the first DSP chip 630 is connected to the first differential signal line, the second differential signal line, the third differential signal line, the fourth differential signal line, and the fifth differential signal line respectively.
  • the differential signal line, the sixth differential signal line, the seventh differential signal line, and the eighth differential signal line are connected.
  • the second DSP chip 640 is connected to the ninth differential signal line, the tenth differential signal line, and the sixteenth differential signal line respectively.
  • the first bias circuit, the second bias circuit...the eighth bias circuit on the surface of the circuit board 300 each include a first unit and a second unit connected in series.
  • the first bias circuit, the second bias circuit...the eighth bias circuit Each first unit of the bias circuit is electrically connected to the corresponding differential signal line, and the second unit of the first bias circuit, the second unit of the second bias circuit, the second unit of the third bias circuit and the fourth bias circuit
  • the second unit of the setting circuit is located on one side of the first differential signal line, and is adjacent and compactly arranged.
  • the first unit and the second unit in the first bias circuit may be directly electrically connected through traces on the top layer of the circuit board 300.
  • the first unit and the second unit in the second bias circuit, the third bias circuit and the fourth bias circuit The units can be electrically connected through vias on the circuit board 300 .
  • the first unit and the second unit in the fifth bias circuit...the eighth bias circuit may be directly electrically connected through traces on the top layer of the circuit board 300 .
  • the first bias circuit includes a first unit 711 and a second unit 712. As shown in Figures 19 and 20, the first unit 711 and the second unit 712 are directly connected through the wiring on the top layer of the circuit board 300; the surface of the circuit board 300 is arranged There is a first bias circuit including a first pad of a first magnetic bead, a second pad of a first magnetic bead, a first pad of a second magnetic bead, a second pad of a second magnetic bead, a first pad of an inductor, and an inductor. the second bonding pad, the resistor first bonding pad and the resistor second bonding pad.
  • the first pad of the first magnetic bead and the second pad of the first magnetic bead are used to set the first magnetic bead
  • the first pad of the second magnetic bead and the second pad of the second magnetic bead are used to set the second magnetic bead
  • the first pad of the inductor and the second pad of the inductor are used to set the inductance
  • the first pad of the resistor and the second pad of the resistor are used to set the resistance
  • the second pad of the first magnetic bead and the first pad of the second magnetic bead are used to set the inductance.
  • the pads are connected to realize the series connection of the first magnetic bead and the second magnetic bead; the second pad of the second magnetic bead is connected to the first pad of the inductor to realize the series connection of the first unit 711 and the second unit 712 , and the first unit 711 and the second unit 712 are directly connected through the traces on the top layer of the circuit board 300 .
  • the second bias circuit includes a first unit 721 and a second unit 722. As shown in Figures 19 and 20, the first unit 721 and the second unit 722 are electrically connected through the via holes of the circuit board 300; the surface of the circuit board 300 is provided with a third unit.
  • the two bias circuits include the first pad of the first magnetic bead, the second pad of the first magnetic bead, the first pad of the second magnetic bead, the second pad of the second magnetic bead, the first pad of the inductor, and the second pad of the inductor. pad, resistor first pad and resistor second pad.
  • the second unit is disposed immediately adjacent to the second unit of the first bias circuit, and is electrically connected to the first unit through a via hole on the circuit board 300 .
  • the third bias circuit includes a first unit 731 and a second unit 732. As shown in Figures 19 and 20, the first unit 731 and the second unit 732 are connected through a via hole on the circuit board 300; a third unit is provided on the surface of the circuit board 300.
  • the bias circuit includes the first pad of the first magnetic bead, the second pad of the first magnetic bead, the first pad of the second magnetic bead, the second pad of the second magnetic bead, the first pad of the inductor, and the second pad of the inductor. pad, resistor first pad and resistor second pad.
  • the second unit is disposed immediately adjacent to the second unit of the second bias circuit, and is electrically connected to the first unit through a via hole on the circuit board 300 .
  • the fourth bias circuit includes a first unit 741 and a second unit 742. As shown in Figures 19 and 20, the first unit 741 and the second unit 742 are connected through a via hole on the circuit board 300; a fourth unit is provided on the surface of the circuit board 300.
  • the bias circuit includes the first pad of the first magnetic bead, the second pad of the first magnetic bead, the first pad of the second magnetic bead, the second pad of the second magnetic bead, the first pad of the inductor, and the second pad of the inductor. pad, a resistor first pad and a resistor second pad; the second unit is disposed close to the second unit of the third bias circuit and is electrically connected to the first unit through the via hole of the circuit board 300 .
  • the fifth bias circuit includes a first unit 751 and a second unit 752. As shown in Figures 19 and 20, the first unit 751 and the second unit 752 are directly connected through the wiring on the top layer of the circuit board 300; the surface of the circuit board 300 is The fifth bias circuit has the first pad of the first magnetic bead, the second pad of the first magnetic bead, the first pad of the second magnetic bead, the second pad of the second magnetic bead, the first pad of the inductor, and the inductor. the second bonding pad, the resistor first bonding pad and the resistor second bonding pad.
  • the second unit is provided at one end of the fifth differential signal line and is directly electrically connected to the first unit through the top layer of the circuit board 300.
  • the second pad of the second magnetic bead is directly connected to the first pad of the inductor.
  • the first unit 751 and the second unit 752 are directly connected through the wiring on the top layer of the circuit board 300 .
  • the sixth bias circuit includes a first unit 761 and a second unit 762. As shown in Figures 19 and 20, the first unit 761 and the second unit 762 are directly connected through the wiring on the top layer of the circuit board 300; the surface of the circuit board 300 is arranged There is a sixth bias circuit including a first pad of a first magnetic bead, a second pad of a first magnetic bead, a first pad of a second magnetic bead, a second pad of a second magnetic bead, a first pad of an inductor, and an inductor. the second bonding pad, the resistor first bonding pad and the resistor second bonding pad.
  • the second unit is provided at one end of the sixth differential signal line and is directly electrically connected to the first unit through the top layer trace of the circuit board 300. Similarly, the second pad of the second magnetic bead is directly connected to the first pad of the inductor. To realize the series connection of the first unit and the second unit, the first unit 761 and the second unit 762 are directly connected through the wiring on the top layer of the circuit board 300 .
  • the seventh bias circuit includes a first unit 771 and a second unit 772. As shown in Figures 19 and 20, the first unit 771 and the second unit 772 are directly connected through the wiring on the top layer of the circuit board 300; the surface of the circuit board 300 is arranged
  • the seventh bias circuit has the first pad of the first magnetic bead, the second pad of the first magnetic bead, the first pad of the second magnetic bead, the second pad of the second magnetic bead, the first pad of the inductor, and the second bonding pad, the resistor first bonding pad and the resistor second bonding pad.
  • the second unit is disposed at one end of the seventh differential signal line and is directly electrically connected to the first unit through the top trace of the circuit board 300.
  • the second pad of the second magnetic bead is directly connected to the first pad of the inductor.
  • the first unit 771 and the second unit 772 are directly connected through the wiring on the top layer of the circuit board 300 .
  • the eighth bias circuit includes a first unit 781 and a second unit 782. As shown in Figures 19 and 20, the first unit 781 and the second unit 782 are directly connected through the wiring on the top layer of the circuit board 300; the surface of the circuit board 300 is arranged There is an eighth bias circuit including a first pad of a first magnetic bead, a second pad of a first magnetic bead, a first pad of a second magnetic bead, a second pad of a second magnetic bead, a first pad of an inductor, and an eighth bias circuit. the second bonding pad, the resistor first bonding pad and the resistor second bonding pad.
  • the second unit is located at the eighth differential signal One end of the line is directly electrically connected to the first unit through the top trace of the circuit board 300.
  • the second pad of the second magnetic bead is directly connected to the first pad of the inductor to realize the connection between the first unit and the second unit.
  • the first unit 781 and the second unit 782 are directly connected through the traces on the top layer of the circuit board 300 .
  • the ninth bias circuit 303, the tenth bias circuit 303... the sixteenth bias circuit 303 are arranged in the same manner as the first bias circuit, the second bias circuit... the eighth bias circuit The circuit is the same.
  • the ninth bias circuit 303 includes a first unit 791 and a second unit 792. The first unit 791 and the second unit 792 are directly connected through traces on the top layer of the circuit board 300.
  • the tenth bias circuit 303 includes a first unit 7101 and a second unit 7102. The first unit 7101 and the second unit 7102 are connected through via holes on the circuit board 300.
  • the eleventh bias circuit 303 includes a first unit 7111 and a second unit 7112. The first unit 7111 and the second unit 7112 are connected through via holes on the circuit board 300.
  • the twelfth bias circuit 303 includes a first unit 7121 and a second unit 7122. The first unit 7121 and the second unit 7122 are connected through via holes on the circuit board 300.
  • the thirteenth bias circuit 303 includes a first unit 7131 and a second unit 7132. The first unit 7131 and the second unit 7132 are directly connected through traces on the top layer of the circuit board 300.
  • the fourteenth bias circuit 303 includes a first unit 7141 and a second unit 7142. The first unit 7141 and the second unit 7142 are directly connected through traces on the top layer of the circuit board 300.
  • the fifteenth bias circuit 303 includes a first unit 7151 and a second unit 7152. The first unit 7151 and the second unit 7152 are directly connected through traces on the top layer of the circuit board 300.
  • the sixteenth bias circuit 303 includes a first unit 7161 and a second unit 7162. The first unit 7161 and the second unit 7162 are directly connected through traces on the top layer of the circuit board 300.
  • each first unit in the 16-channel optical module refers to the structure of each first unit of the eight-channel optical module mentioned above.
  • the setting relationship between the two is the same; for the unfinished structure of each second unit in the 16-channel optical module, please refer to The structure of each second unit of the aforementioned eight-channel optical module has the same arrangement relationship.
  • the bias circuit 303 of each channel includes a first unit and a second unit.
  • the second unit and the second unit in the bias circuit 303 may be centrally located at the same location, or they may be separately located; when the first unit and the second unit in the bias circuit 303 are When two units are centrally located at the same location, the two units can be directly electrically connected through the wiring on the top layer of the circuit board 300.
  • the first unit and the second unit of the first bias circuit and the fifth bias circuit are centrally located at the same location. When they are at the same position, the two can be directly electrically connected through the wiring on the top layer of the circuit board 300 .
  • the present disclosure is compact on the circuit board 300 , Set up each bias circuit 303 reasonably to avoid crosstalk between the bias circuits 303, reduce the generated parasitic capacitance, and ensure the normal operation of each bias circuit 303 of the optical module.
  • a DC-DC chip and a bias circuit 303 are provided on the surface of the circuit board 300.
  • the light-emitting component includes a laser chip 401.
  • the laser chip 401 includes an electroabsorption modulation area.
  • the DC-DC chip passes through the bias circuit 303.
  • a reverse bias voltage is provided to the electroabsorption modulation area, while the DSP chip 301 provides a modulation signal to the electroabsorption modulation area; the electroabsorption modulation area modulates light under the modulation signal and the reverse bias voltage.
  • the bias circuit 303 includes a first unit and a second unit.
  • the first unit includes a first magnetic bead and a second magnetic bead; the second unit includes an inductor and a resistor.
  • the first unit and the second unit in some channels can be electrically connected through wiring on the surface of the circuit board 300, and the first unit and the second unit in other channels can be connected to the intermediate layer through the surface of the circuit board 300.
  • the vias between them are electrically connected to avoid crosstalk between channels, achieve a reasonable layout, reduce the generation of parasitic capacitance, and ensure the working performance of the optical module.
  • the second circuit structure of the bias circuit is introduced below.
  • FIG. 23 is a schematic diagram of the internal structure of an optical module provided according to some embodiments of the present disclosure.
  • FIG. 24 is a schematic diagram of a current source circuit provided according to some embodiments of the present disclosure.
  • the bias circuit 303 includes a voltage stabilizing unit 330 , a sampling unit 340 and a control unit 350 .
  • electrical connection includes direct connection through circuit traces of the circuit board 300 , and other devices may also be provided between the connected circuits.
  • the input terminal of the voltage stabilizing unit 330 is electrically connected to the output terminal of the voltage conversion unit 320, the output terminal of the voltage stabilizing unit 330 is connected to the input terminal of the sampling unit 340, and the output terminal of the voltage stabilizing unit 330 is connected to the laser chip 401; the first terminal of the control unit 350
  • the input terminal is electrically connected to the input terminal of the sampling unit 340
  • the second input terminal of the control unit 350 is electrically connected to the output terminal of the sampling unit 340
  • the output terminal of the control unit 350 is connected to the control terminal of the voltage stabilizing unit 330 .
  • the current supply circuit (eg, bias circuit 303) and voltage conversion unit 320 may together form a current source circuit.
  • the internal resistance of the laser chip 401 may fluctuate during operation.
  • the voltage stabilizing unit 330 usually outputs a voltage of about 1.3V to the laser chip 401, and needs to continuously adjust the actual output voltage according to the change in the internal resistance of the laser chip 401 to ensure a stable bias current is input to the laser chip 401, so the current provides
  • a circuit such as the bias circuit 303 includes a voltage stabilizing unit 330 and a control unit 350 .
  • a voltage conversion unit 320 is provided between the power supply pin of the golden finger and the voltage stabilizing unit 330 for reducing the input voltage from the power supply pin of the golden finger to the voltage stabilizing unit 330. pressure.
  • the voltage stabilizing unit 330 includes a low dropout linear regulator (Low DropOut linear regulator, LDO), such as an LDO voltage stabilizing chip. Therefore, the voltage stabilizing unit 330 including the LDO voltage stabilizing chip and the voltage conversion unit 320 including the DC-DC chip can ensure that the voltage noise provided to the laser chip 401 is low, which further facilitates the normal operation of the laser chip 401.
  • LDO Low DropOut linear regulator
  • the voltage stabilizing unit 330 includes an LDO voltage stabilizing chip and a matching resistor.
  • the LDO voltage stabilizing chip and matching resistor match the output voltage adjusted according to the control of the control unit 350 to stabilize the bias current input to the laser chip 401; the voltage conversion unit 320 Including DC-DC chip and matching resistor, used to realize the voltage reduction conversion from the power supply pin of the golden finger to the voltage stabilizing unit 330, such as reducing the voltage of 3.3V to 1.8V, etc.
  • the sampling unit 340 includes a sampling resistor.
  • the sampling resistor usually uses a resistor with a relatively small resistance, such as 0.1 ⁇ .
  • the control unit 350 includes an MCU, which obtains the sampling value of the current input by the voltage stabilizing unit 330 to the laser chip 401 through the sampling unit 340, and inputs control feedback to the voltage stabilizing unit 330 to adjust the output voltage of the voltage stabilizing unit 330, so that the voltage stabilizing unit 330 outputs a stable current to the laser chip 401.
  • the control unit 350 also includes an amplifier. The amplifier is used to amplify the sampled value, so as to ensure the accuracy of the sampled value obtained by the control unit 350, and thereby facilitate the MCU to control the voltage stabilizing unit in combination with the amplified sampled value. 330.
  • Figure 25 is a schematic structural diagram of a current source circuit provided according to some embodiments of the present disclosure.
  • Figure 25 shows a detailed structural diagram of a current source circuit.
  • the voltage conversion unit 320 in addition to the DC-DC chip 3201, the voltage conversion unit 320 also includes a first resistor 3202, a second resistor 3203 and a third resistor 3204. The first resistor 3202, the second resistor 3203 and the third resistor 3204 Combined to achieve adjustment of the output voltage of the DC-DC chip 3201.
  • one end of the first resistor 3202 is connected to the output voltage feedback pin of the DC-DC chip 3201, and the other end of the first resistor 3202 is connected to ground.
  • One end of the second resistor 3203 is connected to the output voltage feedback pin of the DC-DC chip 3201, the other end of the second resistor 3203 is connected to one end of the third resistor 3204, and the other end of the third resistor 3204 is connected to the output pin of the DC-DC chip 3201. pin, the output pin of the DC-DC chip 3201 is used as the output terminal of the voltage conversion unit 320, and the input pin of the DC-DC chip 3201 is connected to the power supply pin of the golden finger.
  • the first resistor 3202, the second resistor 3203, and the third resistor 3204 are combined to adjust the output voltage of the DC-DC chip 3201, so that the DC-DC chip 3201 can be adjusted by adjusting the resistor value. Adjustment of output voltage.
  • the voltage conversion unit 320 further includes a first capacitor 3205.
  • One end of the first capacitor 3205 is connected between the input pin of the DC-DC chip 3201 and the power supply pin of the golden finger.
  • the other end of the first capacitor 3205 Grounded, the first capacitor 3205 is used to filter out noise in the input voltage of the input pin of the DC-DC chip 3201, that is, to perform filtering processing of the power supply input to the DC-DC chip 3201, and to reduce the noise and noise of the power supply input to the DC-DC chip 3201. interference.
  • the voltage conversion unit 320 further includes a second capacitor 3206 and a first inductor 3207; one end of the second capacitor 3206 is connected to the output pin of the DC-DC chip 3201, and the other end of the second capacitor 3206 is connected to ground.
  • the first inductor 3207 is connected in series between the output pin of the DC-DC chip 3201 and the voltage stabilizing unit 430 between the input terminals. The combination of the second capacitor 3206 and the first inductor 3207 is used for voltage stabilization and current limiting.
  • the voltage stabilizing unit 330 includes an LDO voltage stabilizing chip 3301, a fourth resistor 3302, a fifth resistor 3303 and a sixth resistor 3304.
  • the combination of the fourth resistor 3302, the fifth resistor 3303 and the sixth resistor 3304 is configured as Realize the adjustment of the output voltage of the LDO voltage stabilizing chip 3301.
  • one end of the fourth resistor 3302 is connected to ground, the other end of the fourth resistor 3302 is connected to one end of the fifth resistor 3303, the other end of the fifth resistor 3303 is connected to the output voltage feedback pin of the LDO voltage stabilizing chip 3301, and the sixth resistor 3304
  • One end of the sixth resistor 3304 is connected to the output voltage feedback pin of the LDO voltage stabilizing chip 3301, and the other end of the sixth resistor 3304 is connected to the output pin of the LDO voltage stabilizing chip 3301.
  • the output voltage feedback pin of the LDO voltage stabilizing chip 3301 is also connected to the voltage stabilizing unit 330.
  • the control terminal, the input pin of the LDO voltage stabilizing chip 3301 is connected to the output terminal of the voltage conversion unit 320.
  • the input pin of the LDO voltage stabilizing chip 3301 is connected to the other end of the first inductor 3207.
  • the voltage stabilizing unit 330 further includes a third capacitor 3305.
  • One end of the third capacitor 3305 is connected between the input pin of the LDO voltage stabilizing chip 3301 and the voltage conversion unit 320.
  • the other end of the third capacitor 3305 is connected to ground.
  • the third capacitor 3305 is used to filter out noise in the input voltage of the input pin of the LDO voltage stabilizing chip 3301.
  • the voltage stabilizing unit 330 also includes a fourth capacitor 3306, one end of the fourth capacitor 3306 is connected to ground, and the other end of the fourth capacitor 3306 is connected between the output pin of the LDO voltage stabilizing chip 3301 and the input end of the sampling unit 340, so as to Reduce noise and interference in the output voltage of the LDO voltage stabilizing chip 3301, thereby ensuring the stability of the input current to the sampling unit 340.
  • the sampling unit 340 includes a sampling resistor 3401 , one end of the sampling resistor 3401 is connected to the output end of the voltage stabilizing unit 330 , and the other end of the sampling resistor 3401 is connected to the laser chip 401 .
  • the resistance of the sampling resistor 3401 is 0.1 ⁇ but is not limited to 0.1 ⁇ , so as to reduce the energy consumption of the sampling resistor 3401.
  • the control unit 350 since the resistance of the sampling resistor 3401 is relatively small, the voltage drop generated across the sampling resistor 3401 is relatively small. Therefore, in order to facilitate the control unit 350 to obtain the voltage drop, as shown in Figure 25, the control unit 350 includes MCU3501 and differential amplifier 3502.
  • the first input end of differential amplifier 3502 is connected to one end of sampling resistor 3401.
  • the second input end of differential amplifier 3502 is connected to the other end of sampling resistor 3401.
  • the output end of differential amplifier 3502 is connected to the input end of MCU3501. , and then amplify the voltage drop across the sampling resistor 3401 through the differential amplifier 3502, so that the MCU 3501 can obtain the sampling information to ensure that the MCU 3501 accurately controls the voltage stabilizing unit 330.
  • MCU3501 adopts PID control, and the voltage stabilizing unit 330 continuously adjusts the output voltage value according to the PID control signal of the MCU3501, so that the current input by the voltage stabilizing unit 330 to the laser chip 401 is constant.
  • the target current is set in MCU3501.
  • MCU3501 obtains the actual current input by the voltage stabilizing unit 330 to the laser chip 401 through monitoring, compares the actual current with the target current, and then adjusts the output voltage of the voltage stabilizing unit 330 through PID control so that the voltage stabilizing unit The voltage output by 330 is 1.3 ⁇ 0.3V, which in turn makes the current input by the voltage stabilizing unit 330 to the laser chip 401 tend to be stable, that is, tend to the target current.
  • control unit 350 further includes a seventh resistor 3503.
  • One end of the seventh resistor 3503 is connected to the output voltage feedback pin of the LDO voltage stabilizing chip 3301, and the other end of the seventh resistor 3503 is connected to the output end of the MCU 3501.
  • the seventh resistor 3503 usually samples a resistor with a relatively large resistance in order to limit current and reduce power consumption.
  • the resistance of the seventh resistor 3503 is 100K ⁇ .
  • the optical module provided by the embodiment of the present disclosure realizes the function of the current source chip by using a current source circuit including a voltage conversion unit 320, a voltage stabilizing unit 330, a sampling unit 340 and a control unit 350, thereby reducing product costs and achieving stability of the laser chip 401 work; at the same time, it can also ensure the low power consumption performance of the product, and the noise is basically the same as using a current source chip.

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Abstract

公开了一种光模块，包括：上壳体；下壳体，与所述上壳体盖合形成包裹腔体；电路板，设置于所述包裹腔体内部。电流提供电路，设置于所述电路板上，一端与激光芯片连接，用于控制所述激光芯片的驱动。温度探测器，设置于所述激光芯片的一侧，监测所述激光芯片的温度。MCU，与所述温度探测器、所述电流提供电路连接，根据所述温度调节所述电流提供电路的输出电压。本公开中通过电流提供电路对激光芯片进行直接驱动，即通过用独立设计的电流提供电路来替代集成激光驱动芯片，简化了电路设计，降低了模块成本，摆脱了对激光驱动芯片的依赖。

Description

光模块
本申请要求在2022年10月20日提交中国专利局、申请号为202222771414.7的优先权；在2022年12月27日提交中国专利局、申请号为202223498426.3的优先权；在2022年4月21日提交中国专利局、申请号为202220934545.X的优先权；其全部内容通过引用结合在本申请中。
技术领域
本公开涉及光纤通信技术领域，尤其涉及一种光模块。
背景技术
随着云计算、移动互联网、视频等新型业务和应用模式的发展，光通信技术的进步变得愈加重要。在光通信技术中，光模块作为光通信设备中的关键器件之一，可以实现光电信号转换；在光通信技术的发展过程中，要求光模块的数据传输速率不断提高。
发明内容
根据本公开一些实施例提供的光模块，包括上壳体、下壳体、电路板、光发射部件、设在电路板上的DSP芯片、电流提供电路、电压转换单元、MCU与温度探测器；其中，下壳体与上壳体盖合形成包裹腔体，电路板设置于包裹腔体内部；光发射部件与电路板电连接，光发射部件包括：激光芯片(例如激光器)，激光芯片被配置为将电信号转换为光信号，激光芯片包括发光区和电吸收调制区，发光区被配置为发出不携带数据的光，电吸收调制区被配置为对发光区发出的光进行调制；所述DSP芯片的一端通过差分信号线与电吸收调制区连接，以向电吸收调制区输出交流负载信号，交流负载信号为调制信号；电流提供电路的一端与电吸收调制区电连接；电压转换单元的输入端与金手指的供电引脚电连接，且被配置为降压转换，电压转换单元的输出端与电流提供电路电连接，以向电吸收调制区输出直流驱动信号，从而向电吸收调制区提供负偏置电压；温度探测器设置于激光芯片的一侧，且被配置为监测激光芯片的温度；MCU与温度探测器和电流提供电路连接，MCU被配置为根据温度调节所述电流提供电路的输出电压。
其中，电流提供电路，包括：串联连接的第一单元和第二单元，第一单元和第二单元通过电路板的顶层打线相连接或者电路板的过孔相连接；第一单元，包括第一磁珠和第二磁珠，通过差分信号线与电吸收调制区电连接；第二单元，包括电感和电阻，与电压转换单元电连接；和/或，
电流提供电路包括：稳压单元、采样单元和控制单元；稳压单元的输入端电连接电压转换单元的输出端，稳压单元的输出端连接激光芯片；采样单元串联在稳压单元和激光芯片之间；控制单元的第一输入端电连接采样单元的一端，控制单元的第二输入端电连接采样单元的另一端，控制单元的输出端连接稳压单元的控制端，使稳压单元根据控制单元的控制向激光芯片输入偏置电流；和/或，
电流提供电路包括：偏置电路和第一交流滤波电路，偏置电路的一端与电压转换单元的输出端电连接，偏置电路的另一端通过第一交流滤波电路与激光芯片的正极电连接，第一交流滤波电路被配置为隔离交流信号。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为根据本公开一些实施例提供的光通信系统连接关系图；
图2为根据本公开一些实施例提供的光网络终端结构图；
图3为根据本公开一些实施例提供的光模块结构图；
图4为根据本公开一些实施例提供的光模块分解结构图；
图5为根据本公开一些实施例提供的一种光模块部分结构示意图；
图6为根据本公开一些实施例提供的一种光模块部分信号流示意图；
图7为根据本公开一些实施例提供的一种光发射部件的结构框图一；
图8为根据本公开一些实施例提供的一种MCU结构示意图；
图9为根据本公开一些实施例提供的一种光发射部件的结构框图二；
图10为根据本公开一些实施例提供的一种光发射部件的结构框图三；
图11为根据本公开一些实施例提供的一种光发射部件的结构框图三；
图12为根据本公开一些实施例提供的一种光发射部件的结构框图四；
图13为根据本公开一些实施例提供的一种光发射部件的结构框图五；
图14为根据本公开一些实施例提供的一种光发射部件的结构框图六；
图15为根据本公开一些实施例提供的一种光发射部件的结构框图七；
图16为根据本公开一些实施例提供的一种光模块中8通道偏置电路的设置示意图一；
图17为根据本公开一些实施例提供的一种光模块中8通道偏置电路的设置示意图二；
图18为根据本公开一些实施例提供的一种光模块中16通道偏置电路的设置示意图；
图19为图18中其中8通道偏置电路的设置示意图；
图20为图19的局部示意图；
图21为图18中另外8通道偏置电路的设置示意图；
图22为图21的局部示意图；
图23为根据本公开一些实施例提供的一种光模块的内部结构示意图；
图24为根据本公开一些实施例提供的一种电流源电路的原理图；
图25为根据本公开一些实施例提供的一种电流源电路的结构示意图。
具体实施方式
光通信技术在信息处理设备之间建立信息传递，光通信技术将信息加载到光上，利用光的传播实现信息的传递，加载有信息的光就是光信号。光信号在信息传输设备中传播，可以减少光功率的损耗，实现高速度、远距离、低成本的信息传递。信息处理设备能够处理的信息以电信号的形态存在。光网络终端/网关、路由器、交换机、手机、计算机、服务器、平板电脑、电视机是常见的信息处理设备，光纤及光波导是常见的信息传输设备。
信息处理设备与信息传输设备之间可以通过光模块实现光信号与电信号的相互转换。例如，在光模块的光信号输入端和/或光信号输出端连接有光纤，在光模块的电信号输入端和/或电信号输出端连接有光网络终端。来自光纤的第一光信号传输进光模块，光模块将该第一光信号转换为第一电信号，光模块将第一电信号传输进光网络终端。来自光网络终端的第二电信号传输进光模块，光模块将该第二电信号转换为第二光信号，光模块将第二光信号传输进光纤。由于信息处理设备之间可以通过电信号网络相互连接，所以至少需要一类信息处理设备直接与光模块连接，并不需要所有类型的信息处理设备均直接与光模块连接，直接连接光模块的信息处理设备被称为光模块的上位机。
图1为根据本公开一些实施例提供的一种光通信系统局部架构图。如图1所示，光通信系统的局部呈现为远端信息处理设备1000、本地信息处理设备2000、上位机100、光模块200、光纤101以及网线103。
光纤101的一端向远端信息处理设备1000方向延伸，另一端接入光模块200的光接口。光信号可以在光纤101中发生全反射，光信号在全反射方向上的传播几乎可以维持原有光功率，光信号在光纤101中发生多次的全反射，将来自远端信息处理设备1000方向的光信号传输进光模块200中，或将来自光模块200的光向远端信息处理设备1000方向传播，实现远距离、功率损耗低的信息传递。
光纤101的数量可以是一根，也可以是多根(两根及以上)；光纤101与光模块200采用可插拔式的活动连接，也可采用固定连接。
上位机100具有光模块接口102，光模块接口102被配置为接入光模块200，从而使得上位机100与光模块200建立单向/双向的电信号连接；上位机100被配置为向光模块200提供数据信号，或从光模块200接收数据信号，或对光模块200的工作状态进行监测、控制。
上位机100具有对外电接口，如通用串行总线接口(Universal Serial Bus，USB)、网线接口104，对外电接口可以接入电信号网络。示例地，网线接口104被配置为接入网线103，从而使得上位机100与网线103建立单向/双向的电信号连接。
光网络终端(Optical Network Unit，ONU)、光线路终端(Optical Line Terminal，OLT)、光网络设备(Optical Network Terminal，ONT)及数据中心服务器为常见的上位机。
网线103的一端连接本地信息处理设备2000，另一端连接上位机100，网线103在本地信息处理设备2000与上位机100之间建立电信号连接。
示例地，本地信息处理设备2000发出的第三电信号通过网线103传入上位机100，上位机100基于第三电信号生成第二电信号，来自上位机100的第二电信号传输进光模块200，光模块200将第二电信号转换为第二光信号，光模块200将第二光信号传输进光纤101，第二光信号在光纤101中传向远端信息处理设备1000。
示例地，来自远端信息处理设备1000方向的第一光信号通过光纤101传播，来自光纤101的第一光信号传输进光模块200，光模块200将第一光信号转换为第一电信号，光模块200将第一电信号传输进上位机100，上位机100基于第一电信号生成第四电信号，上位机100将第四电信号传入本地信息处理设备2000。
光模块是实现光信号与电信号相互转换的工具，在上述光信号与电信号的转换过程中，信息并未发生变化，信息的编解码方式可以发生变化。
图2为根据本公开一些实施例提供的一种上位机的局部结构图。为了清楚地显示光模块200与上位机100的连接关系，图2仅示出了上位机100与光模块200相关的结构。如图2所示，上位机100还包括设置于壳体内的PCB电路板105、设置在PCB电路板105的表面的笼子106、设置于笼子106上的散热器107、以及设置于笼子106内部的电连接器(图中未示出)，散热器107具有增大散热面积的凸起结构，翅片状结构是常见的凸起结构。
光模块200插入上位机100的笼子106中，由笼子106固定光模块200，光模块200产生的热量传导给笼子106，然后通过散热器107进行扩散。光模块200插入笼子106中后，光模块200的电接口与笼子106内部的电连接器连接。
图3为根据本公开一些实施例提供的一种光模块的结构图，图4为根据本公开一些实施例提供的一种光模块的分解图。如图3和图4所示，光模块200包括壳体(shell)、设置于壳体内的电路板300、光发射部件400和光接收部件500。但本公开并不局限于此，在一些实施例中，光模块200包括光发射部件400和光接收部件500之一。
壳体包括上壳体201和下壳体202，上壳体201盖合在下壳体202上，以形成具有两个开口204和205的上述壳体；壳体的外轮廓一般呈现方形体。
在一些实施例中，下壳体202包括底板2021以及位于底板2021两侧、与底板2021垂直设置的两个下侧板2022；上壳体201包括盖板2011，盖板2011盖合在下壳体202的两个下侧板2022上，以形成上述壳体。
在一些实施例中，下壳体202包括底板2021以及位于底板2021两侧、与底板2021垂直设置的两个下侧板2022；上壳体201包括盖板2011，以及位于盖板2011两侧、与盖板2011垂直设置的两个上侧板，由两个上侧板与两个下侧板2022结合，以实现上壳体201盖合在下壳体202上。
两个开口204和205的连线所在方向可以与光模块200的长度方向一致，也可以与光模块200的长度方向不一致。例如，开口204位于光模块200的端部(图3的右端)，开口205也位于光模块200的端部(图3的左端)。或者，开口204位于光模块200的端部，而开口205则位于光模块200的侧部。开口204为电接口，电路板300的金手指从电接口伸出，插入上位机的电连接器中；开口205为光口，被配置为接入光纤101，以使光纤101连接光模块200中的光发射部件400和/或光接收部件500。
采用上壳体201、下壳体202结合的装配方式，便于将电路板300、光发射部件400、光接收部件500等组件安装到上述壳体中，由上壳体201、下壳体202可以对这些组件形状封装保护。此外，在装配电路板300、光发射部件400与光接收部件500等组件时，便于这些器件的定位部件、散热部件以及电磁屏蔽部件的部署，有利于自动化地实施生产。
在一些实施例中，上壳体201及下壳体202采用金属材料制成，利于实现电磁屏蔽以及散热。
在一些实施例中，光模块200还包括位于其壳体外部的解锁部件203。解锁部件203被配置为实现光模块200与上位机之间的固定连接，或解除光模块200与上位机之间的固定连接。
例如，解锁部件203位于下壳体202的两个下侧板2022的外侧，包括与上位机的笼子106匹配的卡合部件。当光模块200插入笼子106里时，由解锁部件203的卡合部件将光模块200固定在笼子106里；拉动解锁部件203时，解锁部件203的卡合部件随之移动，进而改变卡合部件与上位机的连接关系，以解除光模块200与上位机的卡合固定连接，从而可以将光模块200从笼子106里抽出。
电路板300包括电路走线、电子元件及芯片等，通过电路走线将电子元件和芯片按照电路设计连接在一起，以实现供电、电信号传输及接地等功能。电子元件例如可以包括电容、电阻、三极管、金属氧化物半导体场效应管 (Metal-Oxide-Semiconductor Field-Effect Transistor，MOSFET)。芯片例如可以包括微控制单元(Microcontroller Unit，MCU)、激光驱动芯片、跨阻放大器(Transimpedance Amplifier，TIA)、限幅放大器(Limiting Amplifier，LA)、时钟数据恢复芯片(Clock and Data Recovery，CDR)、电源管理芯片、数字信号处理(Digital Signal Processing，DSP)芯片。
电路板300一般为硬性电路板，硬性电路板由于其相对坚硬的材质，还可以实现承载作用，如硬性电路板可以平稳的承载上述电子元件和芯片；硬性电路板还便于插入上位机笼子中的电连接器中。
电路板300还包括形成在其端部表面的金手指，金手指由独立的多个引脚组成。电路板300插入笼子106中，由金手指与笼子106内的电连接器导通。金手指可以仅设置在电路板300一侧的表面(例如图4所示的上表面)，也可以设置在电路板300上下两侧的表面，以提供更多的引脚。金手指被配置为与上位机建立电连接，以实现供电、接地、I2C信号传递、数据信号传递等。
当然，部分光模块中也会使用柔性电路板，柔性电路板一般与硬性电路板配合使用，以作为硬性电路板的补充。
光发射部件400和/或光接收部件500位于电路板300的远离金手指的一侧；在一些实施例中，光发射部件400及光接收部件500分别与电路板300物理分离，然后分别通过相应的柔性电路板或电连接件与电路板300电连接；在一些实施例中，光发射部件和/或光接收部件可以直接设置在电路板300上，可以设置在电路板的表面，也可以设置在电路板的侧边。
其中，光发射部件400中最为关键的结构是激光芯片(例如激光器)，为实现对激光芯片的驱动，设有激光驱动芯片，当前激光驱动芯片的外围供电和控制电路复杂，PCB布板占用面积大，同时其功能单一，成本昂贵，不利于降低光模块的空间占用率和成本控制。
图5为根据本公开一些实施例提供的一种光模块部分结构示意图，图6为根据本公开一些实施例提供的一种光模块部分信号流示意图。结合图5和图6所示，为解决以上问题，本公开提供了一种光模块，其电路板300的一端设有金手指，与上位机连接，用于接收上位机的电信号。光模块还包括设置于电路板300上的电流提供电路。MCU302设置于电路板300上，与金手指连接，接收来自上位机的电信号，并对该电信号进行处理，用于控制DSP芯片301和电流提供电路。
在一些示例中，电流提供电路与激光芯片401电连接，电流提供电路用于为激光芯片401提供偏置电流，以驱动激光芯片发光。本公开实施例中电流提供电路可以包括多种电路结构，在一些示例中，电流提供电路包括偏置电路303和第一交流滤波电路，该偏置电路303包括低压差线性稳压器(Low Dropout Regulator，LDO)芯片、直流转直流电源芯片(Direct Current-Direct Current，DC-DC)芯片、临时数字模拟转换器(Interim Digital-analog Converter，IDAC)芯片或运算放大电路中的任一个。例如，如图6所示，电流提供电路的功能可以通过图6中的偏置电路303和滤波网络(例如，第一交流滤波电路)实现。
在另一些示例中，电流提供电路的功能也可通过图16-图24中具备交流滤波功能的偏置电路303实现，下述实施例中结合图16-图24对偏置电路303(也可以称为电流提供电路)的不同电路结构进行说明。示例性地，偏置电路也可称为激光偏置电路。
需要说明的是，下述实施例中图6至图15中的偏置电路303不具备交流滤波功能，因此电流提供电路的功能需要通过偏置电路303和滤波网络(例如，第一交流滤波电路)共同实现。而图16-图24中的偏置电路303具备交流滤波功能，因此电流提供电路的功能可以仅通过偏置电路303实现。即，在图16-图24中，电流提供电路为偏置电路303。
示例性地，以电流提供电路包括偏置电路303为例，电流提供电路例如偏置电路303，与MCU302连接，接收来自MCU302的控制信号。MCU302输出信号至偏置电路303，控制数值模拟转化器输出信号的大小。偏置电路303与激光芯片401连接，输出偏置信号，对激光芯片401进行驱动。其中，偏置信号可以包括偏置电流和偏置电压。示例性地，该偏置电流和偏置电压均为直流驱动信号。
DSP芯片301还与MCU302通信连接，接收来自MCU302的控制信号。MCU302输出信号至DSP芯片301，控制DSP芯片301的输出。
本公开实施例中，光模块通过电路板上的金手指与上位机连接，接收来自上位机的电信号。MCU302与金手指连接，接收上述电信号，对电信号进行处理，输出幅度调制信号和控制信号，用于控制DSP芯片301和偏置电路303。偏置电路303接收来自MCU302的控制信号，输出偏置信号至激光芯片401，对激光芯片401进行驱动。DSP芯片301接收来自MCU302的幅度调制数据信号，对幅度调制数据信号进行数据处理，输出与之对应的调制信号至激光芯片401，对激光芯片401进行幅度调制。
本公开中无复杂、集成且价格昂贵的激光芯片驱动芯片，通过偏置电路303对激光芯片401进行直接驱动。在现有光模块硬件基础上，通过用独立设计的偏置电路303来替代集成激光驱动芯片，简化了电路设计，降低了模块成本，摆脱了对激光驱动芯片的依赖。
在本公开实施例中偏置电路303受到MCU302的控制，输出不同的偏置电流来驱动激光芯片401，保持激光芯片401开启并稳定工作。
在本公开的一些实施例中，MCU302的输入端与金手指连接，用于接收来自上位机的电信号，并对该电信号进行处理。
MCU302的控制引脚与偏置电路303连接，控制偏置电路303的输出电压。示例性地，MCU302的控制引脚为GPIO输出端，通过控制高低电平，控制偏置电路303的输出电压和电流。
偏置电路303设置于电路板300上，偏置电路303的输入端与MCU302的控制引脚连接，偏置电路303的输出端与激光芯片401连接，直接对激光芯片401进行驱动，减少了常用的激光驱动芯片和激光驱动芯片的相关匹配电路的配置，有利于减少电路板空间占用面积，提高模块集成度。
DSP芯片301输出交流负载信号(又称调制信号)，与偏置电路303输出的驱动信号共同加载至激光芯片401。
在一些示例中，激光芯片401包括但不限于电吸收调制激光芯片(Electlro-absorption Modulated Laser，EML)。可以理解，电吸收调制激光芯片为电吸收调制器(Electro Absorption Modulator，EAM)和分布式反馈激光芯片(Distributed Feedback Laser，DFB-LD)的集成器件，即激光芯片电吸收调制激光芯片包括发光区(LD)和电吸收调制区(EA)。发光区在偏置电流作用下发出不携带数据的光，电吸收调制区在偏置电压作用下对发光区所发出光进行调制。例如，电吸收调制区在反向偏置电压作用下对发光区所发出光进行调制。
在一些示例中，电吸收调制区由PIN半导体器件形成，主要由P型半导体、N型半导体、吸收层(由多量子阱波导构成)和金属层所构成。吸收层利用量子Stark效应，其吸收峰在外加偏置电压作用下会发生移动，所以对于一定波长的发光区所发出光而言，调节偏置电压，可以控制吸收层对发光区所发出光的吸收能力，从而将变化的电压信号调制到发光区所发出光上，实现对光的强度调制。
本公开实施例通过偏置电路303向发光区提供偏置电流，以驱动发光区发出不携带数据的光。该偏置电路303还向电吸收调制区提供偏置电压，以实现对光的调制。
本公开实施例的电路板300表面还设有电压转换单元，电压转换单元的一端与金手指的供电引脚电连接，且被配置为降压转换激光芯片，电压转换单元的另一端通过偏置电路303向发光区提供偏置电流，同时，该电压转换单元通过偏置电路303向电吸收调制区提供反向偏置电压，另外，DSP芯片301向电吸收调制区提供调制信号；电吸收调制区在调制信号和反向偏置电压下对光进行调制。
在一些示例中，电压转换单元包括直流转直流电源芯片(Direct Current-Direct Current，DC-DC)，又称DC-DC电源芯片)，例如，电压转换单元可以是DC-DC芯片。在另一些示例中，DC-DC芯片也可以作为偏置电路303的一部分。
根据电吸收调制器的工作原理可知，需向电吸收调制区提供反向偏置电压，可保证电吸收调制区的正常工作。本公开实施例中，通过电路板300上的DC-DC芯片向电吸收调制区的正极提供负电压，进而实现向电吸收调制区提供反向偏置电压。
在本公开的一些实施例中，DC-DC芯片通过偏置电路303向电吸收调制区提供反向偏置电压，DC-DC芯片输出的反向偏置电压为直流反向偏置电压。反向偏置电压是EML激光芯片的关键参数，其直接影响激光芯片401对光的吸收特性。
在一些示例中，DSP芯片301通过差分信号线向电吸收调制区提供调制信号，DSP芯片301输出的调制信号为交流信号(又称交流负载信号)。示例性地，DSP芯片301输出的调制信号为差分信号，因此DSP信号采用差分信号线进行信号的传输；DSP芯片301输出PAM4的调制信号，在PAM4调制信号中有四个电平来表示调制的信息。进一步，差分传输线为差分信号线对，包括两条差分信号线，本公开实施例中采用其中一差分信号线与电吸收调制区的正极电连接即可，电吸收调制区的负极接地。
为了避免另一差分信号线上的信号返回至DSP芯片301，对DSP输出信号造成串扰，本公开实施例中可以将另一差分信号线与匹配电阻相匹配，如采用50Ω的匹配电阻与另一差分信号线相并联，从而实现另一差分信号线上的信号被50Ω的电阻所吸收掉，避免返回至DSP芯片301。
本公开中的电吸收调制区存在两个输入端，分别为第一输入端和第二输入端，第一输入端用于输入反向偏置电压，第二输入端用于输入调制信号。偏置电路303与第一输入端电连接，DSP芯片301与第二输入端电连接；电吸收调制区在反向偏置电压和调制信号的共同作用下，实现对发光区发出光的强度调制。
在本公开的一些实施例中，偏置电路303的一端与DC-DC芯片电连接，另一端与电吸收调制区的正极电连接。示例性地，偏置电路303另一端也通过差分信号线与电吸收调制区的正极电连接。
在一些示例中，为了进一步减少信号扰动，电流提供电路还可包括第一交流滤波电路(又称第一滤波网络)，第一交流滤波电路设置在偏置电路303的输出端，例如，偏置电路303的一端与电压转换单元(例如DC-DC芯片)的输出端电连接，偏置电路303的另一端即输出端通过第一交流滤波电路与激光芯片的正极电连接，以隔离交流信号，防止交流信号反向通过。其中，第一交流滤波电路为RL交流滤波电路(又称RL滤波网络)，主要为电阻和电感或磁珠搭建的交流滤波网络，主要作用是正向通过直流偏置电流，防止交流信号反向通过而干扰到直流信号的正常工作。
图7为根据本公开一些实施例提供的一种光发射部件的结构框图一。图7中为一种单端驱动的光发射部件结构示意图，偏置电路303为LDO芯片，MCU302设有使能引脚，与LDO芯片连接，用于实现LDO芯片的打开与关断。LDO芯片还与电源电路连接，电源电路为LDO芯片提供输入电流。
MCU302还与温度探测器连接，温度探测器可探测激光芯片401的环境温度，根据激光芯片401的环境温度控制向LDO芯片输出的控制电压的大小。MCU内置温度与电压关系算法，通过接收到的温度计算输出电压的大小。
在本公开的一些实施例中，温度探测器还可设置于MCU302的内部，通过探测MCU302的温度，根据MCU302的温度与激光芯片401的光功率的映射关系，调节向LDO芯片输出的控制电压的大小。
图8为根据本公开一些实施例提供的一种MCU结构示意图，结合图8所示，在一些示例中，MCU302设置温度引脚，与温度探测器连接，以接收激光芯片401的环境温度。MCU302还设有控制引脚，与LDO芯片的第二输入端连接，以控制LDO芯片输出电压的大小。
在驱动电压相同的情况下，激光芯片401的光功率随环境温度变化而变化，因此为保证激光芯片401的发射光功率在额定范围内，则需要在环境温度变化时调整驱动电压。LDO芯片的输入电压不变，通过控制电压的变化调节输出电压的大小。MCU302内设温度与控制电压关系算法，通过接收到的激光芯片401的环境温度计算控制住电压，通过调节控制电压的大小控制LDO输出电压的大小。
DSP芯片301包括数据引脚，与MCU302的通信引脚连接，与MCU302通信连接，DSP芯片301接收来自MCU302的幅度调制数据信号，对幅度调制数据信号进行数据处理，输出与之对应的调制信号至激光芯片401，对激光芯片401进行幅度调制。MCU302输出使能信号，控制LDO芯片的关断。DSP芯片301还设置有正极负载引脚，与激光芯片401的LD的正极连接。DSP芯片301的负极负载引脚与激光芯片401的负极连接。
DSP芯片301还与MCU302通信连接，接收来自MCU302的控制信号。MCU302输出信号至DSP芯片301，控制DSP芯片301的输出。MCU302向DSP芯片301下发参数配置。
在一些示例中，为避免信号扰动，在DSP芯片301的正极负载引脚与激光芯片401之间的第一直流滤波电路，用于隔离直流信号。直流滤波电路可以是一个电容，根据交流信号确定容值大小，起到隔离直流信号通过交流信号的作用。
在DSP芯片301的负载引脚与激光芯片401之间设置第二直流滤波电路，用于隔离直流信号。直流滤波电路可以是一个电容，根据交流信号确定容值大小，起到隔离直流信号通过交流信号的作用。
本公开中无复杂、集成且价格昂贵的激光驱动芯片，通过偏置电路303对激光芯片401进行直接驱动。在现有光模块硬件基础上，通过用独立设计的偏置电路303来替代集成激光驱动芯片，简化了电路设计，降低了模块成本，摆脱了对激光驱动芯片的依赖。且MCU302接收激光芯片401的温度，根据温度计算控制住电压，通过调节控制电压的大小控制LDO输出电压的大小，从而使得激光芯片401的发射光光功率在额定范围内。
图9为根据本公开一些实施例提供的一种光发射部件的结构框图二。图9中为一种双端驱动的光发射部件结构示意图，LDO芯片为偏置电路303，MCU302设有使能引脚，与LDO芯片连接，用于实现LDO芯片的打开与关断。LDO芯片还与电源电路连接，电源电路为LDO芯片提供输入电压，其输入电路的电压恒定。MCU302还与温度探测器连接，温度探测器可探测激光芯片401的环境温度，根据激光芯片401的环境温度控制向LDO芯片输出的控制电压的大小。MCU302内置温度与电压关系算法，通过接收到的温度计算输出电压的大小。
在一些示例中，电流提供电路还可包括设置在激光芯片401的负极与接地线之间的第二交流滤波电路，DSP芯片301的负极负载引脚与激光芯片401的负极连接，DSP芯片301的负极负载引脚与正极负载引脚之间为差分信号。DSP芯片301，即数字信号处理器，用于处理负载交流信号，并将该负载交流信号转换为可以驱动激光芯片401的交流信号，处理后的信号为差分信号，经由负极负载引脚与正极负载引脚输出至激光芯片401。
MCU302设置温度引脚，与温度探测器连接，接收激光芯片401的环境温度。MCU302还设有控制引脚，与LDO芯片的第二输入端连接，控制LDO芯片输出电压的大小。MCU302内设温度与控制电压关系算法，通过接收到的激光芯片401的环境温度计算控制住电压，通过调节控制电压的大小控制LDO输出电压的大小。
DSP芯片301包括数据引脚，与MCU302的通信引脚连接。DSP芯片301接收来自MCU302的幅度调制数据信号，对幅度调制数据信号进行数据处理，输出与之对应的调制信号至激光芯片401，对激光芯片401进行幅度调制。MCU302输出使能信号，控制LDO芯片的连接与关断。DSP芯片301还设置有正极负载引脚，与激光芯片401中LD的正极连接。DSP芯片301的负极负载引脚与激光芯片401的负极连接。
为避免信号扰动，在DSP芯片301的正极负载引脚与激光芯片401之间设置第一直流滤波电路，用于隔离直流信号。直流滤波电路可以是一个电容，根据交流信号确定容值大小，起到隔离直流信号通过交流信号的作用。
在DSP芯片301的负载引脚与激光芯片401之间设置第二直流滤波电路，用于隔离直流信号。直流滤波电路可以是一个电容，根据交流信号确定容值大小，起到隔离直流信号通过交流信号的作用。
图10为根据本公开一些实施例提供的一种光发射部件的结构框图三。图10中为一种单端驱动的光发射部件结构示意图，与图7相比，本示例中DC-DC芯片主要用来产生一个恒压或恒流电源，受MCU302控制，根据不同的情况为LD提供不同的驱动偏置电流。
DC-DC芯片为偏置电路303，MCU302设有使能引脚，与DC-DC芯片连接，用于实现DC-DC芯片的打开与关断。DC-DC芯片还与电源电路连接，电源电路为DC-DC芯片提供输入电压。MCU还与温度探测器连接，温度探测器可探测激光芯片401的环境温度，根据激光芯片401的环境温度控制向DC-DC芯片输出的控制电压的大小。MCU内置温度与电压关系算法，通过接收到的温度计算输出电压的大小。
在一些示例中，电流提供电路还可包括第二交流滤波电路，该第二交流滤波电路设置在激光芯片401的负极与接地线之间，DSP芯片301的负极负载引脚与激光芯片401的负极连接，DSP芯片301的负极负载引脚与正极负载引脚之间为差分信号。DSP芯片，即数字信号处理器，用于处理负载交流信号，并将该负载交流信号转换为可以驱动激光芯片401的交流信号，处理后的信号为差分信号，经由负极负载引脚与正极负载引脚输出至激光芯片401。
MCU302设置温度引脚，与温度探测器连接，接收激光芯片401的环境温度。MCU302还设有控制引脚，与DC-DC芯片的第二输入端连接，控制DC-DC芯片输出电压的大小。MCU302内设温度与控制电压关系算法，通过接收到的激光芯片401的环境温度计算控制住电压，通过调节控制电压的大小控制LDO输出电压的大小。
DSP芯片301包括数据引脚，与MCU302的通信引脚连接，与MCU302通信连接，DSP芯片301接收来自MCU302的幅度调制数据信号，对幅度调制数据信号进行数据处理，输出与之对应的调制信号至激光芯片401，对激光芯片401进行幅度调制。MCU302输出使能信号，控制DC-DC芯片的连接与关断。DSP芯片301还设置有正极负载引脚，与激光芯片401中LD的正极连接。DSP芯片301的负极负载引脚与激光芯片401的负极连接。
为避免信号扰动，在DSP芯片301的正极负载引脚与激光芯片401之间设置第一直流滤波电路，用于隔离直流信号。直流滤波电路可以是一个电容，根据交流信号确定容值大小，起到隔离直流信号通过交流信号的作用。
在DSP芯片301的负载引脚与激光芯片404之间设置第二直流滤波电路，用于隔离直流信号。直流滤波电路可以是一个电容，根据交流信号确定容值大小，起到隔离直流信号通过交流信号的作用。
同样的，在本公开的一些示例中，图11为根据本公开一些实施例提供的一种光发射部件的结构框图三；图12为根据本公开一些实施例提供的一种光发射部件的结构框图四。如图11和图12所示，还可采用IDAC芯片或运算放大器等电路，用于与MCU302的控制引脚连接，根据MCU302控制电压的大小输出不同的驱动电压至激光芯片401。
图13为根据本公开一些实施例提供的一种光发射部件的结构框图五；图14为根据本公开一些实施例提供的一种光发射部件的结构框图六；图15为根据本公开一些实施例提供的一种光发射部件的结构框图七。在本公开的一些实施例中，如图9、图13、图14和图15所示，双端驱动的光发射部件400还可采用DC-DC芯片、IDAC芯片或运算放大器等电路，用于与MCU302的控制引脚连接，根据MCU302控制电压的大小输出不同的驱动电压至激光芯片401。
综上所述，本公开提供了一种光模块，包括设置于激光芯片401周围的温度探测器，温度探测器用于探测激光芯片401的环境温度。光模块还包括MCU302，MCU302接收探测激光芯片401的环境温度，根据环境温度输出不同的控制电压，以调节偏置电路输出的驱动电压。偏置电路303的输出端与激光芯片401的正极连接。光模块还包括设置在电路板300上的DSP芯片301，DSP芯片301输出交流负载信号至激光芯片401的正极，对激光芯片401进行幅度调制。
本公开中无复杂、集成且价格昂贵的激光驱动芯片，通过偏置电路303对激光芯片401进行直接驱动。在现有光模块硬件基础上，通过用独立设计的偏置电路303来替代集成激光驱动芯片，简化了电路设计，降低了模块成本，摆脱了对激光驱动芯片的依赖。MCU302内置有温度与电压关系算法，通过接收到的温度计算控制电压的大小，通过调节控制电压的大小，调节偏置电路303的输出电压，达到控制激光芯片401输出光功率的大小的目的。
本公开实施例提供的电流提供电路的功能也可以通过图16-图24中具备交流滤波功能的偏置电路303实现，下面结合图16-图24对电流提供电路(也可以称为偏置电路303)的不同电路结构进行说明。其中，图16-图22为偏置电路303的第一种电路结构，图23-图24为偏置电路303的第二种电路结构。
以下先介绍偏置电路303的第一种电路结构。
为了避免DSP芯片301所输出信号通过差分信号线传输至DC-DC芯片，对DC-DC芯片造成干扰，为此，偏置电路303还包括相互串联的第一单元和第二单元，第一单元包括相互串联的第一磁珠和第二磁珠，第二单元包括相互并联的电感和电阻。相互串联的第一磁珠和第二磁珠用于允许DC-DC芯片输出的负偏置电压通过，而阻碍DSP芯片301输出的调制信号通过，从而避免DSP芯片301输出的调制信号传输至DC-DC芯片上，因此偏置电路303中的第一单元和第二单元用于通直流负偏置电压，阻交流调制信号。
为了完全阻隔DSP芯片301输出的调制信号，相互并联的电感和电阻进一步阻碍DSP芯片301输出的调制信号通过，从而在更大程度上避免DSP芯片301输出的调制信号传输至DC-DC芯片上，保证DC-DC芯片的正常工作。同时，第二单元还可以用于对DC-DC芯片输出的负电压信号进行滤波。
由于DC-DC芯片输出的负电压存在一定波动，本公开实施例中在偏置电路303上并联一滤波电容，用于对DC-DC芯片所输出的负电压进行滤波处理。示例性地，滤波电容一端与偏置电路303电连接，另一端接地，由于偏置电路303一端电连接的DC-DC芯片接地，因此滤波电容与偏置电路303的连接关系为并联。
在一些示例中，电路板300为多层电路板，电路板300包括顶层、第二层、第三层、第四层、第五层…底层，其中，顶层具有GND，第二层为接地层，顶层的GND与第二层可通过过孔实现电连接，滤波电容可连接至顶层的GND，DC-DC芯片可连接至第二层上的GND。
当光模块为多通道时，光模块包括多个偏置电路303(也可以称为多个电流提供电路)以及多个差分信号线，各偏置电路303如何布局会直接影响光模块的工作性能；各偏置电路303之间应避免相互串扰，减少寄生电容，实现合理布局。
可以理解的是，光模块的通道数与偏置电路303的数量一致，相应地，也与差分信号线的数量一致，每个偏置电路303通过相应的差分信号线与对应通道的电吸收调制区电连接，DSP芯片301分别通过相应的差分信号线与对应通道的电吸收调制区连接。
图16为根据本公开一些实施例提供的一种光模块中8通道偏置电路的设置示意图一，图17为根据本公开一些实施例提供的一种光模块中8通道偏置电路的设置示意图二。如图16和图17所示，当光模块为八通道时，差分信号 线的数量为八个，八个差分信号线分别为第一差分信号线、第二差分信号线、第三差分信号线、第四差分信号线、第五差分信号线、第六差分信号线、第七差分信号线和第八差分信号线。
DSP芯片301分别与第一差分信号线、第二差分信号线、第三差分信号线、第四差分信号线、第五差分信号线、第六差分信号线、第七差分信号线和第八差分信号线连接。DSP芯片301分别通过相应差分信号线向相应通道的电吸收调制区提供调制信号。
如图16所示，从上至下排列的差分信号线分别为第一差分信号线、第二差分信号线、第三差分信号线、第四差分信号线、第五差分信号线、第六差分信号线、第七差分信号线和第八差分信号线连接。
当光模块为八通道时，电路板表面分别设置第一偏置电路(也可以称为第一电流提供电路)、第二偏置电路(也可以称为第二电流提供电路)、第三偏置电路(也可以称为第三电流提供电路)、第四偏置电路(也可以称为第四电流提供电路)、第五偏置电路(也可以称为第五电流提供电路)、第六偏置电路(也可以称为第六电流提供电路)、第七偏置电路(也可以称为第七电流提供电路)和第八偏置电路(也可以称为第八电流提供电路)。DC-DC芯片分别通过相应偏置电路303向相应通道的电吸收调制区提供偏置电压，从图16中可以明显看到，各偏置电路303设于不同的位置。
如图16和图17所示，本公开实施例中，各偏置电路303均包括相应第一单元和第二单元，第一单元包括相互串联的第一磁珠和第二磁珠，第一磁珠与相应差分信号线电连接；第二单元与DC-DC芯片电连接，则偏置电路303的一端与DC-DC芯片电连接，另一端通过相应差分信号线与电吸收调制区的正极电连接。
第一通道中，DSP芯片301通过第一差分信号线与电吸收调制区连接，以向电吸收调制区提供调制信号；DC-DC芯片通过第一偏置电路向电吸收调制区提供反向偏置电压；第一偏置电路中的第一单元通过与第一差分信号线电连接，以与电吸收调制区的正极电连接，第二单元设于第一差分信号线的一侧，与DC-DC芯片电连接。
在一些示例中，第一偏置电路中的第一磁珠一端与差分信号线连接，另一端与第二磁珠连接，即第一磁珠和第二磁珠相互串联连接；电感和电阻相并联，然后与第一单元串联在一起。
参照图16所示，电路板300表面分别设有第一磁珠第一焊盘311、第一磁珠第二焊盘312，用于设置第一磁珠，例如，第一磁珠一端设于第一磁珠第一焊盘311上，另一端设于第一磁珠第二焊盘312上。
电路板300表面分别设有第二磁珠第一焊盘313、第二磁珠第二焊盘314，用于设置第二磁珠，例如，第二磁珠一端设于第二磁珠第一焊盘313上，另一端设于第二磁珠第二焊盘314上。第一磁珠第一焊盘311与第一磁珠第二焊盘312呈竖直设置，则第一磁珠竖直设置；第二磁珠第一焊盘313与第二磁珠第二焊盘314呈水平设置，则第二磁珠水平设置；第一磁珠第二焊盘312与第二磁珠第一焊盘313相连接，以实现第一磁珠和第二磁珠的串联连接。
电路板300表面分别设有电感第一焊盘315和电感第二焊盘316，用于设置电感，例如，电感一端设于电感第一焊盘315上，另一端设于电感第二焊盘316上。电路板300表面分别设有电阻第一焊盘317和电阻第二焊盘318，用于设置电阻，例如，电阻一端设于电阻第一焊盘317上，另一端设于电阻第二焊盘318上。电感第一焊盘315与电阻第一焊盘317连接，电感第二焊盘316与电阻第二焊盘318连接，以实现电感和电阻的并联连接。
第二磁珠第二焊盘314与电感第一焊盘315连接，以实现第一单元和第二单元的串联连接。
电感第二焊盘316一端与电阻第二焊盘318连接，另一端与第一滤波电容焊盘319连接，第一滤波电容焊盘319用于设置滤波电容一端，滤波电容的另一端接地，通过第一滤波电容焊盘319与电感第二焊盘316连接，以实现滤波电容与偏置电路303的并联。
由上述可知，第一通道中，第一单元和第二单元均设有电路板顶层，且第一单元和第二单元通过电路板300的顶层打线实现连接。
第二通道中，DSP芯片301通过第二差分信号线与电吸收调制区的正极电连接，以向电吸收调制区提供调制信号。DC-DC芯片通过第二偏置电路向电吸收调制区提供反向偏置电压。第二偏置电路中的第一单元通过与第二差分信号线电连接，以与电吸收调制区的正极电连接。其中，第二单元设于第一差分信号线的一侧，与DC-DC芯片电连接。
示例性地，第二偏置电路中的第一单元设于第一差分信号线和第二差分信号线之间，第一单元的第一磁珠与第二差分信号线电连接，第二单元设于第一差分信号线的一侧，与第一偏置电路中的第二单元相邻设置。其中，电路板300表面设有第二偏置电路各结构的相应焊盘，电路板300表面设有第一磁珠第一焊盘321、第一磁珠第二焊盘322、第二磁珠第一焊盘323、第二磁珠第二焊盘324，第一磁珠第一焊盘321、第一磁珠第二焊盘322、第二磁珠第一焊盘323、第二磁珠第二焊盘324的设置关系、连接关系与第一偏置电路中的相同。
所不同的是：第一偏置电路中第二磁珠第二焊盘314与电感第一焊盘315连接，而第二偏置电路板中第二磁珠第二焊盘324与电感第一焊盘325不连接。同样地，电路板300表面还分别设有电感第一焊盘325、电感第二焊盘326、电阻第一焊盘327和电阻第二焊盘328，设置关系如同第一偏置电路，实现电感和电阻的并联连接。
第二偏置电路的第二单元设于第一偏置电路的第一单元的相邻位置，也就是，第二偏置电路中的第一单元与第二单元未设置在一起，而是被分离开来设置，为了避免相互串扰，第二偏置电路中的第一单元与第二单元通过电路板过孔实现连接，例如，从电路板300的顶层至电路板的第三层设置过孔，然后第二偏置电路中的第一单元与第二单元通过该过孔实现电连接；由于第二层为接地层，从打线长度、过孔深度等因素来衡量，选择从电路板300顶层至电路板300第三层设置过孔，可以缩短打线长度和过孔深度，减小打线和过孔所带来的寄生电容。
第三通道中，DSP芯片301通过第三差分信号线与电吸收调制区的正极电连接，以向电吸收调制区提供调制信号；DC-DC芯片通过第三偏置电路向电吸收调制区提供反向偏置电压；第三偏置电路中的第一单元通过与第三差分信号线电连接，以与电吸收调制区的正极电连接，第二单元设于第一差分信号线的一侧，与DC-DC芯片电连接。
示例性地，第三偏置电路中的第一单元设于第二差分信号线和第三差分信号线之间，第二单元设于第一差分信号线的一侧，例如设于第二偏置电路第二单元的相邻位置处。电路板300表面设有第二偏置电路各结构的相应焊盘，电路板300表面设有第一磁珠第一焊盘331、第一磁珠第二焊盘332、第二磁珠第一焊盘333及第二磁珠第二焊盘334，第一磁珠第一焊盘331、第一磁珠第二焊盘332、第二磁珠第一焊盘333及第二磁珠第二焊盘334的设置关系、连接关系与第二偏置电路中的相同。
电路板300还分别设有电感第一焊盘335、电感第二焊盘336、电阻第一焊盘337和电阻第二焊盘338，设置关系如同前述的第二偏置电路，以实现电感和电阻的并联连接，且第二磁珠第二焊盘334与电感第一焊盘335不连接；第三偏置电路的第二单元设于第二偏置电路的第二单元的相邻位置，也就是，第三偏置电路中的第一单元与第二单元未设置在一起，而是被分离开来设置，为了避免相互串扰，第三偏置电路中的第一单元与第二单元通过电路板300过孔实现连接。在一些示例中，可以从电路板300顶层至电路板300的第三层设置过孔，然后第三偏置电路中的第一单元与第二单元通过该过孔实现电连接。
第四通道中，DSP芯片301通过第四差分信号线与电吸收调制区的正极电连接，以向电吸收调制区提供调制信号。DC-DC芯片通过第四偏置电路向电吸收调制区提供反向偏置电压。第四偏置电路中的第一单元设于第三差分信号线和第四差分信号线之间，第四偏置电路通过与第四差分信号线电连接，以与电吸收调制区的正极电连接。第二单元设于第四差分信号线和第五差分信号线之间，与DC-DC芯片电连接，
在一些示例中，电路板300表面设有第二偏置电路各结构的相应焊盘，电路板300表面设有第一磁珠第一焊盘341、 第一磁珠第二焊盘342、第二磁珠第一焊盘343、第二磁珠第二焊盘344的设置关系、连接关系与第二偏置电路或第三偏置电路中的相同；电路板300表面还设有电感第一焊盘345、电感第二焊盘346、电阻第一焊盘347和电阻第二焊盘348，设置关系如前述的第二偏置电路或第三偏置电路，实现电感和电阻的并联，且第二磁珠第二焊盘344与电感第一焊盘345不连接；第四偏置电路中的第一单元和第二单元同样未设置在一起，而是被分离开来设置，为了避免相互串扰，第四偏置电路中的第一单元与第二单元通过电路板300过孔实现连接，例如，从电路板300顶层至电路板300的第三层设置过孔，然后第四偏置电路中的第一单元与第二单元通过该过孔实现电连接。
第五通道中，DSP芯片301通过第五差分信号线与电吸收调制区的正极电连接，以向电吸收调制区提供调制信号。DC-DC芯片通过第五偏置电路向电吸收调制区提供反向偏置电压。第五偏置电路中的第一单元通过与第五差分信号线电连接，以与电吸收调制区的正极电连接，第二单元设于第四差分信号线和第五差分信号线之间，与DC-DC芯片电连接。
示例性地，电路板300表面分别设有第一磁珠第一焊盘351、第一磁珠第二焊盘352、第二磁珠第一焊盘353、第二磁珠第二焊盘354、电感第一焊盘355、电感第二焊盘356、电阻第一焊盘357和电阻第二焊盘358，各焊盘之间的连接关系如前述的第一偏置电路，第一磁珠第二焊盘352、第二磁珠第一焊盘353连接，以实现第一磁珠和第二磁珠的串联。
第二磁珠第二焊盘354、电感第一焊盘355直接连接，通过电路板300顶层走线实现连接，从而将第一单元和第二单元串联在一起；第五偏置电路中的第一单元和第二单元设置位置与第一偏置电路中第一单元和第二单元的设置位置相同，第五偏置电路中的第一单元和第二单元没有被分离开来设置，而是集中设于第四差分信号线和第五差分信号线之间；则第五偏置电路中的第一单元和第二单元通过电路板300顶层的走线实现连接即可，即第二磁珠第二焊盘与电感第一焊盘相连接，以实现第一单元和第二单元的串联连接。
第六通道中，DSP芯片301通过第六差分信号线与电吸收调制区的正极电连接，以向电吸收调制区提供调制信号。DC-DC芯片通过第六偏置电路向电吸收调制区提供反向偏置电压。第六偏置电路中的第一单元通过与第六差分信号线电连接，以与电吸收调制区的正极电连接。第二单元设于第八差分信号线的一侧，与DC-DC芯片电连接。
示例性地，电路板300表面分别设有第一磁珠第一焊盘361、第一磁珠第二焊盘362、第二磁珠第一焊盘363、第二磁珠第二焊盘364、电感第一焊盘365、电感第二焊盘366、电阻第一焊盘367和电阻第二焊盘368；第一磁珠第一焊盘361、第一磁珠第二焊盘362、第二磁珠第一焊盘363及第二磁珠第二焊盘364的设置关系如前述偏置电路303，第一磁珠第二焊盘362、第二磁珠第一焊盘363相连接，实现第一磁珠和第二磁珠的串联；第二磁珠第二焊盘364、电感第一焊盘365二者不连接，通过过孔实现连接。
电感第一焊盘365、电感第二焊盘366、电阻第一焊盘367和电阻第二焊盘368的设置关系如前述偏置电路303，实现电感与电阻的并联；第六偏置电路中的第一单元设于第五差分信号线和第六差分信号线之间，与第五差分信号线电连接，第二单元与第一单元分离开来设置，第二单元设于第八差分信号线的一侧。
例如，电路板300表面设有第六偏置电路各结构的相应焊盘，电路板300表面设有第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘的设置关系、连接关系与第二偏置电路或第三偏置电路或第四偏置电路中的相同。第六偏置电路中的第一单元和第二单元同样未设置在一起，而是被分离开来设置，为了避免相互串扰，第六偏置电路中的第一单元与第二单元通过电路板300过孔实现连接，例如，从电路板300顶层至电路板300的第三层设置过孔，然后第六偏置电路中的第一单元与第二单元通过该过孔实现电连接。
第七通道中，DSP芯片301通过第七差分信号线与电吸收调制区的正极电连接，以向电吸收调制区提供调制信号。DC-DC芯片通过第七偏置电路向电吸收调制区提供反向偏置电压；第七偏置电路中的第一单元通过与第七差分信号线电连接，以与电吸收调制区的正极电连接，第二单元设于第八差分信号线的一侧，与DC-DC芯片电连接。
在某些示例中，电路板300表面分别设有第一磁珠第一焊盘371、第一磁珠第二焊盘372、第二磁珠第一焊盘373、第二磁珠第二焊盘374、电感第一焊盘375、电感第二焊盘376、电阻第一焊盘377和电阻第二焊盘378。第一磁珠第一焊盘371、第一磁珠第二焊盘372、第二磁珠第一焊盘373及第二磁珠第二焊盘374的设置关系如前述偏置电路303，第一磁珠第二焊盘372、第二磁珠第一焊盘373相连接，实现第一磁珠和第二磁珠的串联。第二磁珠第二焊盘374、电感第一焊盘375二者不连接，通过过孔实现连接。
其中，电感第一焊盘375、电感第二焊盘376、电阻第一焊盘377和电阻第二焊盘378的设置关系如前述偏置电路303，实现电感与电阻的并联；第七偏置电路中的第一单元设于第六差分信号线和第七差分信号线之间，与第七差分信号线电连接。第二单元设于第六偏置电路第二单元的相邻位置。
例如，电路板300表面设有第七偏置电路各结构的相应焊盘，电路板300表面设有第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘的设置关系、连接关系与第二偏置电路或第三偏置电路或第四偏置电路或第六偏置电路中的相同。第七偏置电路中的第一单元和第二单元同样未设置在一起，而是被分离开来设置，为了避免相互串扰，第七偏置电路中的第一单元与第二单元通过电路板300过孔实现连接。在一些示例中，可以从电路板300顶层至电路板300的第三层设置过孔，然后第七偏置电路中的第一单元与第二单元通过该过孔实现电连接。
第八通道中，DSP芯片301通过第八差分信号线与电吸收调制区的正极电连接，以向电吸收调制区提供调制信号。DC-DC芯片通过第八偏置电路向电吸收调制区提供反向偏置电压。第八偏置电路中的第一单元通过与第八差分信号线电连接，以与电吸收调制区的正极电连接，第二单元设于第八差分信号线的一侧，与DC-DC芯片电连接。
例如，电路板300表面分别设有第一磁珠第一焊盘381、第一磁珠第二焊盘382、第二磁珠第一焊盘383、第二磁珠第二焊盘384、电感第一焊盘385、电感第二焊盘386、电阻第一焊盘387和电阻第二焊盘388；第一磁珠第一焊盘381、第一磁珠第二焊盘382、第二磁珠第一焊盘383及第二磁珠第二焊盘384的设置关系如前述偏置电路303，第一磁珠第二焊盘382、第二磁珠第一焊盘383相连接，实现第一磁珠和第二磁珠的串联；第二磁珠第二焊盘384、电感第一焊盘385二者不连接，通过过孔实现连接。
其中，电感第一焊盘385、电感第二焊盘386、电阻第一焊盘387和电阻第二焊盘388的设置关系如前述偏置电路303，实现电感与电阻的并联；第八偏置电路中的第一单元设于第七差分信号线和第八差分信号线之间，与第七差分信号线连接。第二单元设于第七通道第二单元的相邻位置。
在一些示例中，电路板300表面设有第七偏置电路各结构的相应焊盘，电路板300表面设有第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘的设置关系、连接关系与第二偏置电路或第三偏置电路或第四偏置电路或第六偏置电路或第七偏置电路中的相同。第八偏置电路中的第一单元和第二单元同样未设置在一起，而是被分离开来设置，为了避免相互串扰，第八偏置电路中的第一单元与第二单元通过电路板300过孔实现连接，例如，从电路板300顶层至电路板300的第三层设置过孔，然后第八偏置电路中的第一单元与第二单元通过过孔实现电连接。
通过上述对光模块各通道偏置电路303的设置描述可知，本公开实施例中，各通道的偏置电路303包括第一单元和第二单元，为了在有限的电路板300空间上设置多个偏置电路303，则偏置电路303中的第一单元和第二单元可能集中设于同一位置处，也可能被分离开来设置。
当偏置电路303中的第一单元与第二单元集中设于同一位置处时，二者通过电路板300顶层的走线可直接实现电连接，如第一偏置电路和第五偏置电路中各自的第一单元与第二单元集中设于同一位置处时，二者通过电路板300顶层的走线可直接实现电连接。
当偏置电路303中的第一单元和第二单元未设置在一起，而是被分离开来设置时，二者通过电路板300过孔实现电连接。因此本公开通过在电路板300上紧凑、合理地设置各偏置电路303，避免各偏置电路303之间相互串扰，减小所产生的寄生电容，保证光模块各偏置电路303的正常工作。
图18为根据本公开一些实施例提供的一种光模块中16通道偏置电路的设置示意图，19为图18中其中8通道偏置电路的设置示意图，图20为图19的局部示意图，21为图18中另外8通道偏置电路的设置示意图，图22为图21的局部示意图。
在上述各通道中，电路板300在相应偏置电路303位置并联设置有滤波电容，为了设置相应滤波电容，电路板300上分别设有第一滤波电容焊盘、第二滤波电容焊盘、第三滤波电容焊盘、第四滤波电容焊盘、第五滤波电容焊盘、第六滤波电容焊盘、第七滤波电容焊盘、第八滤波电容焊盘。
如图19所示，第一滤波电容焊盘与第一偏置电路中的电感第二焊盘连接，以使相应滤波电容与第一偏置电路并联连接；第二滤波电容焊盘设于第二偏置电路中电感第一焊盘和电阻第一焊盘之间的连接焊盘处，第二滤波电容焊盘与第二偏置电路中电感第一焊盘或电阻第一焊盘连接，以使相应滤波电容与第二偏置电路并联连接；第三滤波电容焊盘设置方式与第二滤波电容焊盘设置方式相同；第四滤波电容焊盘与第一滤波电容焊盘设置方式相同；第五滤波电容焊盘、第六滤波电容焊盘、第七滤波电容焊盘、第八滤波电容焊盘各自的设置方式均与第二滤波电容焊盘设置方式相同。
当光模块为16通道时，电路板300上共设置16个相应偏置电路303，以提供反向偏置电压。16个偏置电路303之间的设置关系如图18-图22所示。
如图18所示，为了实现16通道偏置电路303的功能，电路板300第一端设有八通道偏置电路303，分别为第一偏置电路、第二偏置电路…第八偏置电路；第二端设有八通道偏置电路303，分别为第九偏置电路303、第十偏置电路303…第十六偏置电路303；中间分别设有第一DSP芯片630、第一DC-DC芯片610、第二DSP芯片640和第二DC-DC芯片620，第一DSP芯片630靠近第一端的八通道偏置电路303设置，第二DSP芯片640靠近第二端的八通道偏置电路303设置。
第一DC-DC芯片610与电路板300第一端设置的八通道偏置电路303分别连接，向电吸收调制区提供反向偏置电压；第二DC-DC芯片620与电路板300第二端设置的八通道偏置电路303分别连接，向电吸收调制区提供反向偏置电压。
如图19和图20所示，电路板300第一端中，第一DSP芯片630分别与第一差分信号线、第二差分信号线、第三差分信号线、第四差分信号线、第五差分信号线、第六差分信号线、第七差分信号线、第八差分信号线连接。另一端中，第二DSP芯片640分别与第九差分信号线、第十差分信号线…第十六差分信号线连接。
电路板300表面第一偏置电路、第二偏置电路…第八偏置电路均分别包括相互串联的第一单元和第二单元，第一偏置电路、第二偏置电路…第八偏置电路各自的第一单元均与相应地差分信号线电连接，第一偏置电路的第二单元、第二偏置电路的第二单元、第三偏置电路的第二单元和第四偏置电路的第二单元设于第一差分信号线的一侧，且相邻、紧凑设置.
第一偏置电路中第一单元和第二单元可通过电路板300顶层走线直接电连接，第二偏置电路、第三偏置电路和第四偏置电路中的第一单元和第二单元可通过电路板300过孔实现电连接。第五偏置电路…第八偏置电路中的第一单元和第二单元可通过电路板300顶层走线直接电连接。
第一偏置电路包括第一单元711和第二单元712，如图19和图20所示，第一单元711和第二单元712通过电路板300顶层的走线直接连接；电路板300表面设有第一偏置电路的第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘、电感第一焊盘、电感第二焊盘、电阻第一焊盘及电阻第二焊盘。第一磁珠第一焊盘和第一磁珠第二焊盘用于设置第一磁珠，第二磁珠第一焊盘和第二磁珠第二焊盘用于设置第二磁珠，电感第一焊盘和电感第二焊盘用于设置电感，电阻第一焊盘和电阻第二焊盘用于设置电阻；同样地，第一磁珠第二焊盘与第二磁珠第一焊盘相连接以实现第一磁珠和第二磁珠的串联连接；第二磁珠第二焊盘与电感第一焊盘相连接，以实现第一单元711和第二单元712的串联连接，且第一单元711和第二单元712通过电路板300顶层的走线直接连接。
第二偏置电路包括第一单元721和第二单元722，如图19和图20所示，第一单元721和第二单元722通过电路板300过孔电连接；电路板300表面设有第二偏置电路的第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘、电感第一焊盘、电感第二焊盘、电阻第一焊盘及电阻第二焊盘。第二单元紧邻第一偏置电路第二单元设置，与第一单元通过电路板300过孔电连接。
第三偏置电路包括第一单元731和第二单元732，如图19和图20所示，第一单元731和第二单元732通过电路板300过孔连接；电路板300表面设有第三偏置电路的第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘、电感第一焊盘、电感第二焊盘、电阻第一焊盘及电阻第二焊盘。第二单元紧邻第二偏置电路第二单元设置，与第一单元通过电路板300过孔电连接。
第四偏置电路包括第一单元741和第二单元742，如图19和图20所示，第一单元741和第二单元742通过电路板300过孔连接；电路板300表面设有第四偏置电路的第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘、电感第一焊盘、电感第二焊盘、电阻第一焊盘及电阻第二焊盘；第二单元紧邻第三偏置电路第二单元设置，与第一单元通过电路板300过孔电连接。
第五偏置电路包括第一单元751和第二单元752，如图19和图20所示，第一单元751和第二单元752通过电路板300顶层的走线直接连接；电路板300表面设有第五偏置电路的第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘、电感第一焊盘、电感第二焊盘、电阻第一焊盘及电阻第二焊盘。第二单元设于第五差分信号线的一端，与第一单元通过电路板300顶层走线直接电连接，同样地，第二磁珠第二焊盘与电感第一焊盘直接相连接，以实现第一单元与第二单元的串联连接，第一单元751和第二单元752通过电路板300顶层的走线直接连接。
第六偏置电路包括第一单元761和第二单元762，如图19和图20所示，第一单元761和第二单元762通过电路板300顶层的走线直接连接；电路板300表面设有第六偏置电路的第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘、电感第一焊盘、电感第二焊盘、电阻第一焊盘及电阻第二焊盘。第二单元设于第六差分信号线的一端，与第一单元通过电路板300顶层走线直接电连接，同样地，第二磁珠第二焊盘与电感第一焊盘直接相连接，以实现第一单元与第二单元的串联连接，第一单元761和第二单元762通过电路板300顶层的走线直接连接。
第七偏置电路包括第一单元771和第二单元772，如图19和图20所示，第一单元771和第二单元772通过电路板300顶层的走线直接连接；电路板300表面设有第七偏置电路的第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘、电感第一焊盘、电感第二焊盘、电阻第一焊盘及电阻第二焊盘。第二单元设于第七差分信号线的一端，与第一单元通过电路板300顶层走线直接电连接，同样地，第二磁珠第二焊盘与电感第一焊盘直接相连接，以实现第一单元与第二单元的串联连接，第一单元771和第二单元772通过电路板300顶层的走线直接连接。
第八偏置电路包括第一单元781和第二单元782，如图19和图20所示，第一单元781和第二单元782通过电路板300顶层的走线直接连接；电路板300表面设有第八偏置电路的第一磁珠第一焊盘、第一磁珠第二焊盘、第二磁珠第一焊盘、第二磁珠第二焊盘、电感第一焊盘、电感第二焊盘、电阻第一焊盘及电阻第二焊盘。第二单元设于第八差分信号 线的一端，与第一单元通过电路板300顶层走线直接电连接，同样地，第二磁珠第二焊盘与电感第一焊盘直接相连接，以实现第一单元与第二单元的串联连接，第一单元781和第二单元782通过电路板300顶层的走线直接连接。
如图21和图22所示，第九偏置电路303、第十偏置电路303…第十六偏置电路303的设置方式与第一偏置电路、第二偏置电路…第八偏置电路相同。
第九偏置电路303包括第一单元791和第二单元792，第一单元791和第二单元792通过电路板300顶层走线直接连接。第十偏置电路303包括第一单元7101和第二单元7102，第一单元7101和第二单元7102通过电路板300过孔实现连接。第十一偏置电路303包括第一单元7111和第二单元7112，第一单元7111和第二单元7112通过电路板300过孔实现连接。第十二偏置电路303包括第一单元7121和第二单元7122，第一单元7121和第二单元7122通过电路板300过孔实现连接。第十三偏置电路303包括第一单元7131和第二单元7132，第一单元7131和第二单元7132通过电路板300顶层走线直接连接。第十四偏置电路303包括第一单元7141和第二单元7142，第一单元7141和第二单元7142通过电路板300顶层走线直接连接。第十五偏置电路303包括第一单元7151和第二单元7152，第一单元7151和第二单元7152通过电路板300顶层走线直接连接。第十六偏置电路303包括第一单元7161和第二单元7162，第一单元7161和第二单元7162通过电路板300顶层走线直接连接。
16通道光模块中各第一单元的结构未尽之处参考前述八通道光模块各第一单元的结构，二者设置关系相同；16通道光模块中各第二单元的结构未尽之处参考前述八通道光模块各第二单元的结构，二者设置关系相同。
从上述对16通道光模块偏置电路303设置方式的相关描述来看，本公开实施例中，各通道的偏置电路303包括第一单元和第二单元，为了在有限的电路板300空间上设置多个偏置电路303，则偏置电路303中的第二单元和第二单元可能集中设于同一位置处，也可能被分离开来设置；当偏置电路303中的第一单元与第二单元集中设于同一位置处时，二者通过电路板300顶层的走线可直接实现电连接，如第一偏置电路和第五偏置电路各自的第一单元与第二单元集中设于同一位置处时，二者通过电路板300顶层的走线可直接实现电连接。
当偏置电路303中的第一单元和第二单元未设置在一起，而是被分离开来设置时，二者通过电路板300过孔实现电连接；因此本公开通过在电路板300上紧凑、合理地设置各偏置电路303，避免各偏置电路303之间相互串扰，减小所产生的寄生电容，保证光模块各偏置电路303的正常工作。
综述，本公开实施例中，电路板300表面设有DC-DC芯片和偏置电路303，光发射部件包括激光芯片401，激光芯片401包括电吸收调制区，DC-DC芯片通过偏置电路303向电吸收调制区提供反向偏置电压，同时DSP芯片301向电吸收调制区提供调制信号；电吸收调制区在调制信号和反向偏置电压下对光进行调制。偏置电路303包括第一单元和第二单元，第一单元包括第一磁珠和第二磁珠；第二单元包括电感和电阻。当光模块为多通道时，一些通道中第一单元和第二单元可通过电路板300表面打线实现电连接，另一些通道中第一单元和第二单元可通过电路板300表面与中间层之间的过孔实现电连接，从而避免各通道之间的相互串扰，实现合理布局，减小寄生电容的产生，保证光模块的工作性能。
以下介绍偏置电路的第二种电路结构。
图23为根据本公开一些实施例提供的一种光模块的内部结构示意图，图24为根据本公开一些实施例提供的一种电流源电路的原理图。如图23和24所示，在本公开一些实施例中，偏置电路303包括稳压单元330、采样单元340和控制单元350。
在本公开实施例中电连接包括通过电路板300的电路走线直接连接，也可在连接的电路之间设置有其他器件。稳压单元330的输入端电连接电压转换单元320的输出端，稳压单元330的输出端连接采样单元340的输入端，稳压单元330的输出端连接激光芯片401；控制单元350的第一输入端电连接采样单元340的输入端，控制单元350的第二输入端电连接采样单元340的输出端，控制单元350的输出端连接稳压单元330的控制端。
在一些示例中，电流提供电路(例如偏置电路303)和电压转换单元320可共同形成电流源电路。
在一些实施例中，结合激光芯片401的特性，激光芯片401工作过程中内阻可能会发生波动性变化，为保证激光芯片401的正常工作以及降低稳压单元330到激光芯片401的能耗，稳压单元330通常向激光芯片401输出1.3V左右的电压，且需要根据激光芯片401内阻的变化不断调整实际输出电压的大小，以保证向激光芯片401输入稳定的偏置电流，因此电流提供电路例如偏置电路303包括稳压单元330和控制单元350。进一步，为了降低稳压单元330自身的功耗，在金手指的供电引脚与稳压单元330之间设置电压转换单元320，用于金手指的供电引脚到稳压单元330输入电压的降压。
在一些示例中，稳压单元330包括低压差线性稳压器(Low DropOut linear regulator，LDO)，例如LDO稳压芯片。因此，通过包括LDO稳压芯片的稳压单元330和包括DC-DC芯片的电压转换单元320能够保证提供给激光芯片401的电压噪声低，进一步的便于保证激光芯片401正常工作。
进一步，稳压单元330包括LDO稳压芯片和匹配电阻，LDO稳压芯片和匹配电阻匹配根据控制单元350的控制调整的输出电压，使输入至激光芯片401的偏置电流稳定；电压转换单元320包括DC-DC芯片和匹配电阻，用于实现金手指的供电引脚到稳压单元330的降压转换，如将3.3V的电压降到1.8V等。因为LDO稳压芯片具有输入电压与输出电压的压差×输出电流＝功耗的关系，因此通过金手指供电引脚的电压先经过电压转换单元320进行降压转换，以便于降低LDO稳压芯片功耗损耗。
在本公开一些实施例中，采样单元340包括采样电阻，而为便于节省采样电阻的功耗，采样电阻通常采用阻值相对较小的电阻，如0.1Ω等。控制单元350包括MCU，MCU通过采样单元340获取稳压单元330向激光芯片401输入电流的采样值，并向稳压单元330输入控制反馈，以调整稳压单元330的输出电压，使得稳压单元330向激光芯片401输出稳定电流。进一步的，便于保证控制单元350的控制精度，控制单元350中还包括放大器，放大器用于放大采样值，便于保证控制单元350获得采样值的精度，进而便于MCU结合放大后采样值控制稳压单元330。
图25为根据本公开一些实施例提供的一种电流源电路的结构示意图。图25展示出了一种电流源电路的详细结构示意图。如图25所示，电压转换单元320除了包括DC-DC芯片3201外，还包括第一电阻3202、第二电阻3203和第三电阻3204，第一电阻3202、第二电阻3203和第三电阻3204进行组合，以实现DC-DC芯片3201输出电压大小的调整。
示例地，第一电阻3202的一端连接DC-DC芯片3201的输出电压反馈引脚，第一电阻3202的另一端接地。第二电阻3203的一端连接DC-DC芯片3201的输出电压反馈引脚,第二电阻3203的另一端连接第三电阻3204的一端，第三电阻3204的另一端连接DC-DC芯片3201的输出引脚，DC-DC芯片3201的输出引脚用作电压转换单元320的输出端，DC-DC芯片3201的输入引脚连接金手指的供电引脚。
在本实施例中，第一电阻3202、第二电阻3203和第三电阻3204进行组合，以实现DC-DC芯片3201输出电压大小的调整，便于通过调整电阻阻值，以实现DC-DC芯片3201输出电压的调试。
在一些示例中，电压转换单元320还包括第一电容3205，第一电容3205的一端连接在DC-DC芯片3201的输入引脚和金手指的供电引脚之间，第一电容3205的另一端接地，第一电容3205用于滤除DC-DC芯片3201的输入引脚输入电压中的杂波，即进行输入DC-DC芯片3201电源的滤波处理，减少输入DC-DC芯片3201电源的噪声和干扰。
在一些实施例中，电压转换单元320还包括第二电容3206和第一电感3207；第二电容3206的一端连接DC-DC芯片3201的输出引脚，第二电容3206的另一端接地。第一电感3207串联在DC-DC芯片3201的输出引脚和稳压单元430 的输入端之间。第二电容3206和第一电感3207组合用于稳压、限流。
如图25所示，稳压单元330包括LDO稳压芯片3301、第四电阻3302、第五电阻3303和第六电阻3304，第四电阻3302、第五电阻3303和第六电阻3304组合被配置为实现LDO稳压芯片3301输出电压大小的调整。示例地，第四电阻3302的一端接地，第四电阻3302的另一端连接第五电阻3303的一端，第五电阻3303的另一端连接LDO稳压芯片3301的输出电压反馈引脚，第六电阻3304的一端连接LDO稳压芯片3301的输出电压反馈引脚，第六电阻3304的另一端连接LDO稳压芯片3301的输出引脚，LDO稳压芯片3301的输出电压反馈引脚还连接稳压单元330的控制端，LDO稳压芯片3301的输入引脚连接电压转换单元320的输出端。在一些实施例中，LDO稳压芯片3301的输入引脚连接第一电感3207的另一端。
在一些示例中，稳压单元330还包括第三电容3305，第三电容3305的一端连接在LDO稳压芯片3301的输入引脚和电压转换单元320之间，第三电容3305的另一端接地，第三电容3305用于滤除LDO稳压芯片3301的输入引脚输入电压中的杂波。
另外，稳压单元330还包括第四电容3306，第四电容3306的一端接地，第四电容3306的另一端连接在LDO稳压芯片3301的输出引脚和采样单元340的输入端之间，以减少LDO稳压芯片3301输出电压中的噪声和干扰，进而用于保证向采样单元340输入电流的稳定性。
如图25所示，采样单元340包括采样电阻3401，采样电阻3401的一端连接稳压单元330的输出端，采样电阻3401的另一端连接激光芯片401。示例地，采样电阻3401的阻值为0.1Ω但不局限于0.1Ω，便于降低采样电阻3401的能耗。
在本公开一些实施例，由于采样电阻3401的阻值比较小，进而采样电阻3401两端产生的压降比较小，因此为便于控制单元350获取到该压降，如图25所示，控制单元350包括MCU3501和差分放大器3502，差分放大器3502的第一输入端连接采样电阻3401的一端，差分放大器3502的第二输入端连接采样电阻3401的另一端，差分放大器3502的输出端连接MCU3501的输入端，进而通过差分放大器3502放大采样电阻3401两端的压降，便于MCU3501获取采样信息，以保证MCU3501对稳压单元330进行精准控制。
在本公开一些实施例中，MCU3501采用PID控制，根据MCU3501的PID控制信号稳压单元330不断调整输出电压值，使稳压单元330向激光芯片401输入的电流恒定。示例地，MCU3501中设置目标电流，MCU3501通过监控获得稳压单元330向激光芯片401输入的实际电流，比较实际电流与目标电流进行，然后通过PID控制调整稳压单元330的输出电压使稳压单元330输出的电压在1.3±0.3V，进而使稳压单元330向激光芯片401输入的电流趋于稳定，即趋于目标电流。
在一些实施例中，控制单元350还包括第七电阻3503，第七电阻3503的一端连接LDO稳压芯片3301的输出电压反馈引脚，第七电阻3503的另一端连接MCU3501的输出端。第七电阻3503通常采样阻值相对较大的电阻，以便于限流、降低功耗。示例地，第七电阻3503的阻值为100KΩ。
本公开实施例提供的光模块，通过采用包括电压转换单元320、稳压单元330、采样单元340和控制单元350的电流源电路，实现电流源芯片的功能，以降低产品成本实现激光芯片401稳定工作；同时，还能保证产品的低功耗性能，以及与使用电流源芯片是的噪声基本一致。

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  1. 一种光模块，包括：
    上壳体；
    下壳体，与所述上壳体盖合形成包裹腔体；
    电路板，设置于所述包裹腔体内部；
    光发射部件，与所述电路板电连接，所述光发射部件包括：
    激光芯片，所述激光芯片被配置为将电信号转换为光信号，所述激光芯片包括：
    发光区，被配置为发出不携带数据的光；
    电吸收调制区，被配置为对所述发光区发出的光进行调制；
    DSP芯片，设在所述电路板上，所述DSP芯片的一端通过差分信号线与所述电吸收调制区连接，以向所述电吸收调制区输出交流负载信号，所述交流负载信号为调制信号；
    电流提供电路，设在所述电路板上，所述电流提供电路的一端与所述电吸收调制区电连接；
    电压转换单元，设在所述电路板上，所述电压转换单元的输入端与金手指的供电引脚电连接，且被配置为降压转换，所述电压转换单元的输出端与所述电流提供电路电连接，以向所述电吸收调制区输出直流驱动信号，从而向所述电吸收调制区提供负偏置电压；
    设于所述电路板上的MCU和温度探测器，所述温度探测器设置于所述激光芯片的一侧，且被配置为监测所述激光芯片的温度；所述MCU与所述温度探测器和所述电流提供电路连接，所述MCU被配置为根据所述温度调节所述电流提供电路的输出电压；
    其中，所述电流提供电路包括：串联连接的第一单元和第二单元，所述第一单元和所述第二单元通过所述电路板的顶层打线相连接或者所述电路板的过孔相连接；所述第一单元，包括第一磁珠和第二磁珠，通过所述差分信号线与所述电吸收调制区电连接；所述第二单元，包括电感和电阻，与所述电压转换单元电连接；和/或，
    所述电流提供电路包括：稳压单元，所述稳压单元的输入端电连接所述电压转换单元的输出端，所述稳压单元的输出端连接所述激光芯片；采样单元，串联在所述稳压单元和所述激光芯片之间；控制单元，所述控制单元的第一输入端电连接所述采样单元的一端，所述控制单元的第二输入端电连接所述采样单元的另一端，所述控制单元的输出端连接所述稳压单元的控制端，使所述稳压单元根据所述控制单元的控制向所述激光芯片输入偏置电流；和/或，
    所述电流提供电路包括：偏置电路和第一交流滤波电路，所述偏置电路的一端与所述电压转换单元的输出端电连接，所述偏置电路的另一端通过所述第一交流滤波电路与所述激光芯片的正极电连接，所述第一交流滤波电路被配置为隔离交流信号。
  2. 根据权利要求1所述的光模块，其中，所述电流提供电路包括串联连接的第一单元和第二单元；
    所述电流提供电路的数量为多个，多个所述电流提供电路包括：第一电流提供电路、第二电流提供电路、第三电流提供电路、第四电流提供电路、第五电流提供电路、第六电流提供电路、第七电流提供电路和第八电流提供电路；
    所述第一电流提供电路、第二电流提供电路、第三电流提供电路、第四电流提供电路、第五电流提供电路、第六电流提供电路、第七电流提供电路和第八电流提供电路均包括相应的所述第一单元和所述第二单元；
    与各所述第一单元连接的所述差分信号线包括第一差分信号线、第二差分信号线、第三差分信号线、第四差分信号线、第五差分信号线、第六差分信号线、第七差分信号线和第八差分信号线。
  3. 根据权利要求2所述的光模块，其中，所述第一磁珠和所述第二磁珠串联连接；
    所述第一电流提供电路的第一磁珠与所述第一差分信号线电连接；
    所述第二电流提供电路的第一磁珠与所述第二差分信号线电连接；
    所述第三电流提供电路的第一磁珠与所述第三差分信号线电连接；
    所述第四电流提供电路的第一磁珠与所述第四差分信号线电连接；
    所述第五电流提供电路的第一磁珠与所述第五差分信号线电连接；
    所述第六电流提供电路的第一磁珠与所述第六差分信号线电连接；
    所述第七电流提供电路的第一磁珠与所述第七差分信号线电连接；
    所述第八电流提供电路的第一磁珠与所述第八差分信号线电连接。
  4. 根据权利要求3所述的光模块，其中，所述第一电流提供电路的第二单元、所述第二电流提供电路的第二单元、所述第三电流提供电路的第二单元均设于所述第一差分信号线的一侧；
    所述第四电流提供电路的第二单元、所述第五电流提供电路的第二单元均设于所述第四差分信号线和所述第五差分信号线之间；
    所述第六电流提供电路的第二单元、所述第七电流提供电路的第二单元、所述第八电流提供电路的第二单元均设于所述第八差分信号线的一侧。
  5. 根据权利要求4所述的光模块，其中，所述第一电流提供电路中第一单元和第二单元通过所述电路板顶层的打线实现电连接；
    所述第五电流提供电路中的第一单元和第二单元通过所述电路板顶层的打线实现电连接；
    所述第二电流提供电路、所述第三电流提供电路、所述第四电流提供电路、所述第六电流提供电路、所述第七电流提供电路和所述第八电流提供电路中的第一单元和第二单元均通过所述电路板的过孔实现电连接。
  6. 根据权利要求5所述的光模块，其中，所述电路板包括所述顶层、中间层和底表面；
    所述中间层包括第二层、第三层及第四层；
    所述第二层为接地层；
    所述顶层至所述第三层之间设有所述过孔。
  7. 根据权利要求2所述的光模块，其中，所述电路板表面设有：
    滤波电容，与所述电流提供电路并联连接，所述滤波电容的一端与所述第二单元连接，另一端接地。
  8. 根据权利要求2所述的光模块，其中，所述差分信号线上和所述电路板表面分别设有第一磁珠焊盘，所述第一磁珠焊盘被配置为设置所述第一磁珠的两端；
    所述差分信号线上的所述第一磁珠焊盘设为椭圆状，所述电路板表面的所述第一磁珠焊盘设为方形。
  9. 根据权利要求2所述的光模块，其中，所述电路板的一端设有所述金手指；
    所述金手指包括电源引脚；
    所述电压转换单元包括DC-DC芯片，所述DC-DC芯片的输入端与所述的电源引脚电连接，输出端与所述第二单元电连接，所述DC-DC芯片被配置为输出负偏置电压。
  10. 根据权利要求2所述的光模块，其中，所述电吸收调制区的负极接地，所述电吸收调制区的正极分别与所述DSP芯片和所述电流提供电路电连接。
  11. 根据权利要求1所述的光模块，其中，所述电流提供电路包括：稳压单元、采样单元和控制单元；
    所述电压转换单元包括DC-DC芯片、第一电阻、第二电阻和第三电阻；所述第一电阻的一端连接所述DC-DC芯片的输出电压反馈引脚，另一端接地；所述第二电阻的一端连接所述DC-DC芯片的输出电压反馈引脚，另一端连接所述第三电阻的一端；所述第三电阻的另一端连接所述电压转换单元的输出端；所述DC-DC芯片的输出引脚连接所述电压转换单元的输出端，所述DC-DC芯片的输入引脚连接所述金手指的供电引脚。
  12. 根据权利要求11所述的光模块，其中，所述稳压单元包括LDO稳压芯片、第四电阻、第五电阻和第六电阻；
    所述第四电阻的一端接地，另一端连接所述第五电阻的一端；所述第五电阻的一端连接所述LDO稳压芯片的输出电压反馈引脚，所述第六电阻的一端连接所述LDO稳压芯片的输出电压反馈引脚，另一端连接所述LDO稳压芯片的输出引脚；所述LDO稳压芯片的输出电压反馈引脚连接所述稳压单元的控制端，所述LDO稳压芯片的输入引脚连接所述电压转换单元的输出端。
  13. 根据权利要求11所述的光模块，其特征在于，所述控制单元包括差分放大器和MCU；所述差分放大器的第一输入端连接所述采样单元的输入端、第二输入端连接所述采样单元的输出端，所述差分放大器的输出端连接所述MCU的输入端，所述MCU的输出端连接所述稳压单元的控制端。
  14. 根据权利要求11所述的光模块，其中，所述采样单元包括采样电阻，所述采样电阻的一端连接所述稳压单元的输出端，另一端连接所述激光芯片。
  15. 根据权利要求11所述的光模块，其中，所述电压转换单元还包括第一电容、第二电容和第一电感；所述第一电容的一端接地，另一端连接在所述DC-DC芯片和所述金手指的供电引脚之间；所述第一电感的串联在所述DC-DC芯片的输出引脚和所述稳压单元的输入端之间；所述第二电容的一端接地、另一端连接所述DC-DC芯片的输出引脚。
  16. 根据权利要求12所述的光模块，其中，所述稳压单元还包括第三电容和第四电容；所述第三电容的一端接地，另一端连接在所述LDO稳压芯片的输入引脚和所述电压转换单元的输出端之间；所述第四电容的一端接地，另一端连接在所述LDO稳压芯片的输出引脚和所述采样单元的输入端之间。
  17. 根据权利要求13所述的光模块，其中，所述控制单元还包括第七电阻，所述第七电阻的一端连接所述稳压单元的控制端、另一端连接所述MCU的输出端。
  18. 根据权利要求1所述的光模块，其中，所述电流提供电路包括：偏置电路和第一交流滤波电路，所述偏置电路包括LDO芯片、DC-DC芯片、IDAC芯片或运算放大电路中的任一个。
  19. 根据权利要求18所述的光模块，其中，所述偏置电路包括LDO芯片；所述MCU包括：
    温度引脚，与所述温度探测器连接，所述温度引脚被配置为接收所述激光芯片的温度；
    使能引脚，与所述LDO芯片连接，所述使能引脚被配置为向所述LDO芯片发出使能信号，以控制所述LDO芯片的打开与关断；
    控制引脚，与所述LDO芯片连接，所述控制引脚被配置为根据所述激光芯片的温度，输出不同的控制信号，以控制所述LDO芯片输出电压的大小。
  20. 根据权利要求19所述的光模块，其中，所述DSP芯片还与所述MCU通信连接。
  21. 根据权利要求18所述的光模块，其中，所述DSP芯片包括：
    正极负载引脚，与所述激光芯片的正极连接；
    负极负载引脚，与所述激光芯片的负极连接；
    所述激光芯片的负极接地连接。
  22. 根据权利要求21所述的光模块，其中，所述正极负载引脚与所述激光芯片之间设置第一直流滤波电路，所述第一直流滤波电路被配置为隔离直流信号的通过；
    所述负极负载引脚与所述激光芯片之间设置第二直流滤波电路，所述第二直流滤波电路被配置为隔离直流信号的通过。
  23. 根据权利要求18所述的光模块，其中，所述电流提供电路还包括第二交流滤波电路，所述第二交流滤波电路设置在所述激光芯片的负极与接地线之间。
PCT/CN2023/089180 2022-04-21 2023-04-19 光模块 WO2023202610A1 (zh)

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